[PATCH] I2C: Kill i2c_algorithm.id (4/7)
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / i2c / busses / i2c-ali15x3.c
blobb3f50bff39a06c79f00e5ce59ddc0eea229008e3
1 /*
2 ali15x3.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com> and
6 Mark D. Studebaker <mdsxyz123@yahoo.com>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 This is the driver for the SMB Host controller on
25 Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
27 The M1543C is a South bridge for desktop systems.
28 The M1533 is a South bridge for portable systems.
29 They are part of the following ALI chipsets:
30 "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
31 with AGP and 100MHz CPU Front Side bus
32 "Aladdin V": Includes the M1541 Socket 7 North bridge
33 with AGP and 100MHz CPU Front Side bus
34 "Aladdin IV": Includes the M1541 Socket 7 North bridge
35 with host bus up to 83.3 MHz.
36 For an overview of these chips see http://www.acerlabs.com
38 The M1533/M1543C devices appear as FOUR separate devices
39 on the PCI bus. An output of lspci will show something similar
40 to the following:
42 00:02.0 USB Controller: Acer Laboratories Inc. M5237
43 00:03.0 Bridge: Acer Laboratories Inc. M7101
44 00:07.0 ISA bridge: Acer Laboratories Inc. M1533
45 00:0f.0 IDE interface: Acer Laboratories Inc. M5229
47 The SMB controller is part of the 7101 device, which is an
48 ACPI-compliant Power Management Unit (PMU).
50 The whole 7101 device has to be enabled for the SMB to work.
51 You can't just enable the SMB alone.
52 The SMB and the ACPI have separate I/O spaces.
53 We make sure that the SMB is enabled. We leave the ACPI alone.
55 This driver controls the SMB Host only.
56 The SMB Slave controller on the M15X3 is not enabled.
58 This driver does not use interrupts.
61 /* Note: we assume there can only be one ALI15X3, with one SMBus interface */
63 #include <linux/module.h>
64 #include <linux/pci.h>
65 #include <linux/kernel.h>
66 #include <linux/stddef.h>
67 #include <linux/sched.h>
68 #include <linux/ioport.h>
69 #include <linux/delay.h>
70 #include <linux/i2c.h>
71 #include <linux/init.h>
72 #include <asm/io.h>
74 /* ALI15X3 SMBus address offsets */
75 #define SMBHSTSTS (0 + ali15x3_smba)
76 #define SMBHSTCNT (1 + ali15x3_smba)
77 #define SMBHSTSTART (2 + ali15x3_smba)
78 #define SMBHSTCMD (7 + ali15x3_smba)
79 #define SMBHSTADD (3 + ali15x3_smba)
80 #define SMBHSTDAT0 (4 + ali15x3_smba)
81 #define SMBHSTDAT1 (5 + ali15x3_smba)
82 #define SMBBLKDAT (6 + ali15x3_smba)
84 /* PCI Address Constants */
85 #define SMBCOM 0x004
86 #define SMBBA 0x014
87 #define SMBATPC 0x05B /* used to unlock xxxBA registers */
88 #define SMBHSTCFG 0x0E0
89 #define SMBSLVC 0x0E1
90 #define SMBCLK 0x0E2
91 #define SMBREV 0x008
93 /* Other settings */
94 #define MAX_TIMEOUT 200 /* times 1/100 sec */
95 #define ALI15X3_SMB_IOSIZE 32
97 /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
98 We don't use these here. If the bases aren't set to some value we
99 tell user to upgrade BIOS and we fail.
101 #define ALI15X3_SMB_DEFAULTBASE 0xE800
103 /* ALI15X3 address lock bits */
104 #define ALI15X3_LOCK 0x06
106 /* ALI15X3 command constants */
107 #define ALI15X3_ABORT 0x02
108 #define ALI15X3_T_OUT 0x04
109 #define ALI15X3_QUICK 0x00
110 #define ALI15X3_BYTE 0x10
111 #define ALI15X3_BYTE_DATA 0x20
112 #define ALI15X3_WORD_DATA 0x30
113 #define ALI15X3_BLOCK_DATA 0x40
114 #define ALI15X3_BLOCK_CLR 0x80
116 /* ALI15X3 status register bits */
117 #define ALI15X3_STS_IDLE 0x04
118 #define ALI15X3_STS_BUSY 0x08
119 #define ALI15X3_STS_DONE 0x10
120 #define ALI15X3_STS_DEV 0x20 /* device error */
121 #define ALI15X3_STS_COLL 0x40 /* collision or no response */
122 #define ALI15X3_STS_TERM 0x80 /* terminated by abort */
123 #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
126 /* If force_addr is set to anything different from 0, we forcibly enable
127 the device at the given address. */
128 static u16 force_addr = 0;
129 module_param(force_addr, ushort, 0);
130 MODULE_PARM_DESC(force_addr,
131 "Initialize the base address of the i2c controller");
133 static unsigned short ali15x3_smba = 0;
135 static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
137 u16 a;
138 unsigned char temp;
140 /* Check the following things:
141 - SMB I/O address is initialized
142 - Device is enabled
143 - We can use the addresses
146 /* Unlock the register.
147 The data sheet says that the address registers are read-only
148 if the lock bits are 1, but in fact the address registers
149 are zero unless you clear the lock bits.
151 pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
152 if (temp & ALI15X3_LOCK) {
153 temp &= ~ALI15X3_LOCK;
154 pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
157 /* Determine the address of the SMBus area */
158 pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
159 ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
160 if (ali15x3_smba == 0 && force_addr == 0) {
161 dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
162 "- upgrade BIOS or use force_addr=0xaddr\n");
163 return -ENODEV;
166 if(force_addr)
167 ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
169 if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE, "ali15x3-smb")) {
170 dev_err(&ALI15X3_dev->dev,
171 "ALI15X3_smb region 0x%x already in use!\n",
172 ali15x3_smba);
173 return -ENODEV;
176 if(force_addr) {
177 dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
178 ali15x3_smba);
179 if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
180 SMBBA,
181 ali15x3_smba))
182 goto error;
183 if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
184 SMBBA, &a))
185 goto error;
186 if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
187 /* make sure it works */
188 dev_err(&ALI15X3_dev->dev,
189 "force address failed - not supported?\n");
190 goto error;
193 /* check if whole device is enabled */
194 pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
195 if ((temp & 1) == 0) {
196 dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
197 pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
200 /* Is SMB Host controller enabled? */
201 pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
202 if ((temp & 1) == 0) {
203 dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
204 pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
207 /* set SMB clock to 74KHz as recommended in data sheet */
208 pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
211 The interrupt routing for SMB is set up in register 0x77 in the
212 1533 ISA Bridge device, NOT in the 7101 device.
213 Don't bother with finding the 1533 device and reading the register.
214 if ((....... & 0x0F) == 1)
215 dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
217 pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
218 dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
219 dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
221 return 0;
222 error:
223 release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
224 return -ENODEV;
227 /* Another internally used function */
228 static int ali15x3_transaction(struct i2c_adapter *adap)
230 int temp;
231 int result = 0;
232 int timeout = 0;
234 dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
235 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
236 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
237 inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
239 /* get status */
240 temp = inb_p(SMBHSTSTS);
242 /* Make sure the SMBus host is ready to start transmitting */
243 /* Check the busy bit first */
244 if (temp & ALI15X3_STS_BUSY) {
246 If the host controller is still busy, it may have timed out in the
247 previous transaction, resulting in a "SMBus Timeout" Dev.
248 I've tried the following to reset a stuck busy bit.
249 1. Reset the controller with an ABORT command.
250 (this doesn't seem to clear the controller if an external
251 device is hung)
252 2. Reset the controller and the other SMBus devices with a
253 T_OUT command. (this clears the host busy bit if an
254 external device is hung, but it comes back upon a new access
255 to a device)
256 3. Disable and reenable the controller in SMBHSTCFG
257 Worst case, nothing seems to work except power reset.
259 /* Abort - reset the host controller */
261 Try resetting entire SMB bus, including other devices -
262 This may not work either - it clears the BUSY bit but
263 then the BUSY bit may come back on when you try and use the chip again.
264 If that's the case you are stuck.
266 dev_info(&adap->dev, "Resetting entire SMB Bus to "
267 "clear busy condition (%02x)\n", temp);
268 outb_p(ALI15X3_T_OUT, SMBHSTCNT);
269 temp = inb_p(SMBHSTSTS);
272 /* now check the error bits and the busy bit */
273 if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
274 /* do a clear-on-write */
275 outb_p(0xFF, SMBHSTSTS);
276 if ((temp = inb_p(SMBHSTSTS)) &
277 (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
278 /* this is probably going to be correctable only by a power reset
279 as one of the bits now appears to be stuck */
280 /* This may be a bus or device with electrical problems. */
281 dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
282 "controller or device on bus is probably hung\n",
283 temp);
284 return -1;
286 } else {
287 /* check and clear done bit */
288 if (temp & ALI15X3_STS_DONE) {
289 outb_p(temp, SMBHSTSTS);
293 /* start the transaction by writing anything to the start register */
294 outb_p(0xFF, SMBHSTSTART);
296 /* We will always wait for a fraction of a second! */
297 timeout = 0;
298 do {
299 msleep(1);
300 temp = inb_p(SMBHSTSTS);
301 } while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
302 && (timeout++ < MAX_TIMEOUT));
304 /* If the SMBus is still busy, we give up */
305 if (timeout >= MAX_TIMEOUT) {
306 result = -1;
307 dev_err(&adap->dev, "SMBus Timeout!\n");
310 if (temp & ALI15X3_STS_TERM) {
311 result = -1;
312 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
316 Unfortunately the ALI SMB controller maps "no response" and "bus
317 collision" into a single bit. No reponse is the usual case so don't
318 do a printk.
319 This means that bus collisions go unreported.
321 if (temp & ALI15X3_STS_COLL) {
322 result = -1;
323 dev_dbg(&adap->dev,
324 "Error: no response or bus collision ADD=%02x\n",
325 inb_p(SMBHSTADD));
328 /* haven't ever seen this */
329 if (temp & ALI15X3_STS_DEV) {
330 result = -1;
331 dev_err(&adap->dev, "Error: device error\n");
333 dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
334 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
335 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
336 inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
337 return result;
340 /* Return -1 on error. */
341 static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
342 unsigned short flags, char read_write, u8 command,
343 int size, union i2c_smbus_data * data)
345 int i, len;
346 int temp;
347 int timeout;
349 /* clear all the bits (clear-on-write) */
350 outb_p(0xFF, SMBHSTSTS);
351 /* make sure SMBus is idle */
352 temp = inb_p(SMBHSTSTS);
353 for (timeout = 0;
354 (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
355 timeout++) {
356 msleep(1);
357 temp = inb_p(SMBHSTSTS);
359 if (timeout >= MAX_TIMEOUT) {
360 dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
363 switch (size) {
364 case I2C_SMBUS_PROC_CALL:
365 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
366 return -1;
367 case I2C_SMBUS_QUICK:
368 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
369 SMBHSTADD);
370 size = ALI15X3_QUICK;
371 break;
372 case I2C_SMBUS_BYTE:
373 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
374 SMBHSTADD);
375 if (read_write == I2C_SMBUS_WRITE)
376 outb_p(command, SMBHSTCMD);
377 size = ALI15X3_BYTE;
378 break;
379 case I2C_SMBUS_BYTE_DATA:
380 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
381 SMBHSTADD);
382 outb_p(command, SMBHSTCMD);
383 if (read_write == I2C_SMBUS_WRITE)
384 outb_p(data->byte, SMBHSTDAT0);
385 size = ALI15X3_BYTE_DATA;
386 break;
387 case I2C_SMBUS_WORD_DATA:
388 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
389 SMBHSTADD);
390 outb_p(command, SMBHSTCMD);
391 if (read_write == I2C_SMBUS_WRITE) {
392 outb_p(data->word & 0xff, SMBHSTDAT0);
393 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
395 size = ALI15X3_WORD_DATA;
396 break;
397 case I2C_SMBUS_BLOCK_DATA:
398 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
399 SMBHSTADD);
400 outb_p(command, SMBHSTCMD);
401 if (read_write == I2C_SMBUS_WRITE) {
402 len = data->block[0];
403 if (len < 0) {
404 len = 0;
405 data->block[0] = len;
407 if (len > 32) {
408 len = 32;
409 data->block[0] = len;
411 outb_p(len, SMBHSTDAT0);
412 /* Reset SMBBLKDAT */
413 outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
414 for (i = 1; i <= len; i++)
415 outb_p(data->block[i], SMBBLKDAT);
417 size = ALI15X3_BLOCK_DATA;
418 break;
421 outb_p(size, SMBHSTCNT); /* output command */
423 if (ali15x3_transaction(adap)) /* Error in transaction */
424 return -1;
426 if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
427 return 0;
430 switch (size) {
431 case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */
432 data->byte = inb_p(SMBHSTDAT0);
433 break;
434 case ALI15X3_BYTE_DATA:
435 data->byte = inb_p(SMBHSTDAT0);
436 break;
437 case ALI15X3_WORD_DATA:
438 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
439 break;
440 case ALI15X3_BLOCK_DATA:
441 len = inb_p(SMBHSTDAT0);
442 if (len > 32)
443 len = 32;
444 data->block[0] = len;
445 /* Reset SMBBLKDAT */
446 outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
447 for (i = 1; i <= data->block[0]; i++) {
448 data->block[i] = inb_p(SMBBLKDAT);
449 dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
450 len, i, data->block[i]);
452 break;
454 return 0;
457 static u32 ali15x3_func(struct i2c_adapter *adapter)
459 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
460 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
461 I2C_FUNC_SMBUS_BLOCK_DATA;
464 static struct i2c_algorithm smbus_algorithm = {
465 .smbus_xfer = ali15x3_access,
466 .functionality = ali15x3_func,
469 static struct i2c_adapter ali15x3_adapter = {
470 .owner = THIS_MODULE,
471 .class = I2C_CLASS_HWMON,
472 .algo = &smbus_algorithm,
473 .name = "unset",
476 static struct pci_device_id ali15x3_ids[] = {
477 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
478 { 0, }
481 MODULE_DEVICE_TABLE (pci, ali15x3_ids);
483 static int __devinit ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
485 if (ali15x3_setup(dev)) {
486 dev_err(&dev->dev,
487 "ALI15X3 not detected, module not inserted.\n");
488 return -ENODEV;
491 /* set up the driverfs linkage to our parent device */
492 ali15x3_adapter.dev.parent = &dev->dev;
494 snprintf(ali15x3_adapter.name, I2C_NAME_SIZE,
495 "SMBus ALI15X3 adapter at %04x", ali15x3_smba);
496 return i2c_add_adapter(&ali15x3_adapter);
499 static void __devexit ali15x3_remove(struct pci_dev *dev)
501 i2c_del_adapter(&ali15x3_adapter);
502 release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
505 static struct pci_driver ali15x3_driver = {
506 .name = "ali15x3_smbus",
507 .id_table = ali15x3_ids,
508 .probe = ali15x3_probe,
509 .remove = __devexit_p(ali15x3_remove),
512 static int __init i2c_ali15x3_init(void)
514 return pci_register_driver(&ali15x3_driver);
517 static void __exit i2c_ali15x3_exit(void)
519 pci_unregister_driver(&ali15x3_driver);
522 MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
523 "Philip Edelbrock <phil@netroedge.com>, "
524 "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
525 MODULE_DESCRIPTION("ALI15X3 SMBus driver");
526 MODULE_LICENSE("GPL");
528 module_init(i2c_ali15x3_init);
529 module_exit(i2c_ali15x3_exit);