xhci: Rework port suspend structures for limited ports.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / xhci-hub.c
blob50e250ceee960f9bed6b7b1442fe6a924034aa80
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <asm/unaligned.h>
25 #include "xhci.h"
27 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
31 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc)
34 int ports;
35 u16 temp;
37 ports = HCS_MAX_PORTS(xhci->hcs_params1);
39 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
40 desc->bDescriptorType = 0x29;
41 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
42 desc->bHubContrCurrent = 0;
44 desc->bNbrPorts = ports;
45 temp = 1 + (ports / 8);
46 desc->bDescLength = 7 + 2 * temp;
48 memset(&desc->DeviceRemovable[0], 0, temp);
49 memset(&desc->DeviceRemovable[temp], 0xff, temp);
51 /* Ugh, these should be #defines, FIXME */
52 /* Using table 11-13 in USB 2.0 spec. */
53 temp = 0;
54 /* Bits 1:0 - support port power switching, or power always on */
55 if (HCC_PPC(xhci->hcc_params))
56 temp |= 0x0001;
57 else
58 temp |= 0x0002;
59 /* Bit 2 - root hubs are not part of a compound device */
60 /* Bits 4:3 - individual port over current protection */
61 temp |= 0x0008;
62 /* Bits 6:5 - no TTs in root ports */
63 /* Bit 7 - no port indicators */
64 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
67 static unsigned int xhci_port_speed(unsigned int port_status)
69 if (DEV_LOWSPEED(port_status))
70 return USB_PORT_STAT_LOW_SPEED;
71 if (DEV_HIGHSPEED(port_status))
72 return USB_PORT_STAT_HIGH_SPEED;
73 if (DEV_SUPERSPEED(port_status))
74 return USB_PORT_STAT_SUPER_SPEED;
76 * FIXME: Yes, we should check for full speed, but the core uses that as
77 * a default in portspeed() in usb/core/hub.c (which is the only place
78 * USB_PORT_STAT_*_SPEED is used).
80 return 0;
84 * These bits are Read Only (RO) and should be saved and written to the
85 * registers: 0, 3, 10:13, 30
86 * connect status, over-current status, port speed, and device removable.
87 * connect status and port speed are also sticky - meaning they're in
88 * the AUX well and they aren't changed by a hot, warm, or cold reset.
90 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
92 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
93 * bits 5:8, 9, 14:15, 25:27
94 * link state, port power, port indicator state, "wake on" enable state
96 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
98 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
99 * bit 4 (port reset)
101 #define XHCI_PORT_RW1S ((1<<4))
103 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
104 * bits 1, 17, 18, 19, 20, 21, 22, 23
105 * port enable/disable, and
106 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
107 * over-current, reset, link state, and L1 change
109 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
111 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
112 * latched in
114 #define XHCI_PORT_RW ((1<<16))
116 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
117 * bits 2, 24, 28:31
119 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
122 * Given a port state, this function returns a value that would result in the
123 * port being in the same state, if the value was written to the port status
124 * control register.
125 * Save Read Only (RO) bits and save read/write bits where
126 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
127 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
129 u32 xhci_port_state_to_neutral(u32 state)
131 /* Save read-only status and port state */
132 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
136 * find slot id based on port number.
138 int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
140 int slot_id;
141 int i;
143 slot_id = 0;
144 for (i = 0; i < MAX_HC_SLOTS; i++) {
145 if (!xhci->devs[i])
146 continue;
147 if (xhci->devs[i]->port == port) {
148 slot_id = i;
149 break;
153 return slot_id;
157 * Stop device
158 * It issues stop endpoint command for EP 0 to 30. And wait the last command
159 * to complete.
160 * suspend will set to 1, if suspend bit need to set in command.
162 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
164 struct xhci_virt_device *virt_dev;
165 struct xhci_command *cmd;
166 unsigned long flags;
167 int timeleft;
168 int ret;
169 int i;
171 ret = 0;
172 virt_dev = xhci->devs[slot_id];
173 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
174 if (!cmd) {
175 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
176 return -ENOMEM;
179 spin_lock_irqsave(&xhci->lock, flags);
180 for (i = LAST_EP_INDEX; i > 0; i--) {
181 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
182 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
184 cmd->command_trb = xhci->cmd_ring->enqueue;
185 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
186 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
187 xhci_ring_cmd_db(xhci);
188 spin_unlock_irqrestore(&xhci->lock, flags);
190 /* Wait for last stop endpoint command to finish */
191 timeleft = wait_for_completion_interruptible_timeout(
192 cmd->completion,
193 USB_CTRL_SET_TIMEOUT);
194 if (timeleft <= 0) {
195 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
196 timeleft == 0 ? "Timeout" : "Signal");
197 spin_lock_irqsave(&xhci->lock, flags);
198 /* The timeout might have raced with the event ring handler, so
199 * only delete from the list if the item isn't poisoned.
201 if (cmd->cmd_list.next != LIST_POISON1)
202 list_del(&cmd->cmd_list);
203 spin_unlock_irqrestore(&xhci->lock, flags);
204 ret = -ETIME;
205 goto command_cleanup;
208 command_cleanup:
209 xhci_free_command(xhci, cmd);
210 return ret;
214 * Ring device, it rings the all doorbells unconditionally.
216 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
218 int i;
220 for (i = 0; i < LAST_EP_INDEX + 1; i++)
221 if (xhci->devs[slot_id]->eps[i].ring &&
222 xhci->devs[slot_id]->eps[i].ring->dequeue)
223 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
225 return;
228 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
229 u32 __iomem *addr, u32 port_status)
231 /* Don't allow the USB core to disable SuperSpeed ports. */
232 if (xhci->port_array[wIndex] == 0x03) {
233 xhci_dbg(xhci, "Ignoring request to disable "
234 "SuperSpeed port.\n");
235 return;
238 /* Write 1 to disable the port */
239 xhci_writel(xhci, port_status | PORT_PE, addr);
240 port_status = xhci_readl(xhci, addr);
241 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
242 wIndex, port_status);
245 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
246 u16 wIndex, u32 __iomem *addr, u32 port_status)
248 char *port_change_bit;
249 u32 status;
251 switch (wValue) {
252 case USB_PORT_FEAT_C_RESET:
253 status = PORT_RC;
254 port_change_bit = "reset";
255 break;
256 case USB_PORT_FEAT_C_CONNECTION:
257 status = PORT_CSC;
258 port_change_bit = "connect";
259 break;
260 case USB_PORT_FEAT_C_OVER_CURRENT:
261 status = PORT_OCC;
262 port_change_bit = "over-current";
263 break;
264 case USB_PORT_FEAT_C_ENABLE:
265 status = PORT_PEC;
266 port_change_bit = "enable/disable";
267 break;
268 case USB_PORT_FEAT_C_SUSPEND:
269 status = PORT_PLC;
270 port_change_bit = "suspend/resume";
271 break;
272 default:
273 /* Should never happen */
274 return;
276 /* Change bits are all write 1 to clear */
277 xhci_writel(xhci, port_status | status, addr);
278 port_status = xhci_readl(xhci, addr);
279 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
280 port_change_bit, wIndex, port_status);
283 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
284 u16 wIndex, char *buf, u16 wLength)
286 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
287 int ports;
288 unsigned long flags;
289 u32 temp, temp1, status;
290 int retval = 0;
291 u32 __iomem *addr;
292 int slot_id;
294 ports = HCS_MAX_PORTS(xhci->hcs_params1);
296 spin_lock_irqsave(&xhci->lock, flags);
297 switch (typeReq) {
298 case GetHubStatus:
299 /* No power source, over-current reported per port */
300 memset(buf, 0, 4);
301 break;
302 case GetHubDescriptor:
303 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
304 break;
305 case GetPortStatus:
306 if (!wIndex || wIndex > ports)
307 goto error;
308 wIndex--;
309 status = 0;
310 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
311 temp = xhci_readl(xhci, addr);
312 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
314 /* wPortChange bits */
315 if (temp & PORT_CSC)
316 status |= USB_PORT_STAT_C_CONNECTION << 16;
317 if (temp & PORT_PEC)
318 status |= USB_PORT_STAT_C_ENABLE << 16;
319 if ((temp & PORT_OCC))
320 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
322 * FIXME ignoring reset and USB 2.1/3.0 specific
323 * changes
325 if ((temp & PORT_PLS_MASK) == XDEV_U3
326 && (temp & PORT_POWER))
327 status |= 1 << USB_PORT_FEAT_SUSPEND;
328 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
329 if ((temp & PORT_RESET) || !(temp & PORT_PE))
330 goto error;
331 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
332 xhci->resume_done[wIndex])) {
333 xhci_dbg(xhci, "Resume USB2 port %d\n",
334 wIndex + 1);
335 xhci->resume_done[wIndex] = 0;
336 temp1 = xhci_port_state_to_neutral(temp);
337 temp1 &= ~PORT_PLS_MASK;
338 temp1 |= PORT_LINK_STROBE | XDEV_U0;
339 xhci_writel(xhci, temp1, addr);
341 xhci_dbg(xhci, "set port %d resume\n",
342 wIndex + 1);
343 slot_id = xhci_find_slot_id_by_port(xhci,
344 wIndex + 1);
345 if (!slot_id) {
346 xhci_dbg(xhci, "slot_id is zero\n");
347 goto error;
349 xhci_ring_device(xhci, slot_id);
350 xhci->port_c_suspend |= 1 << wIndex;
351 xhci->suspended_ports &= ~(1 << wIndex);
354 if ((temp & PORT_PLS_MASK) == XDEV_U0
355 && (temp & PORT_POWER)
356 && (xhci->suspended_ports & (1 << wIndex))) {
357 xhci->suspended_ports &= ~(1 << wIndex);
358 xhci->port_c_suspend |= 1 << wIndex;
360 if (temp & PORT_CONNECT) {
361 status |= USB_PORT_STAT_CONNECTION;
362 status |= xhci_port_speed(temp);
364 if (temp & PORT_PE)
365 status |= USB_PORT_STAT_ENABLE;
366 if (temp & PORT_OC)
367 status |= USB_PORT_STAT_OVERCURRENT;
368 if (temp & PORT_RESET)
369 status |= USB_PORT_STAT_RESET;
370 if (temp & PORT_POWER)
371 status |= USB_PORT_STAT_POWER;
372 if (xhci->port_c_suspend & (1 << wIndex))
373 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
374 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
375 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
376 break;
377 case SetPortFeature:
378 wIndex &= 0xff;
379 if (!wIndex || wIndex > ports)
380 goto error;
381 wIndex--;
382 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
383 temp = xhci_readl(xhci, addr);
384 temp = xhci_port_state_to_neutral(temp);
385 switch (wValue) {
386 case USB_PORT_FEAT_SUSPEND:
387 temp = xhci_readl(xhci, addr);
388 /* In spec software should not attempt to suspend
389 * a port unless the port reports that it is in the
390 * enabled (PED = ‘1’,PLS < ‘3’) state.
392 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
393 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
394 xhci_warn(xhci, "USB core suspending device "
395 "not in U0/U1/U2.\n");
396 goto error;
399 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
400 if (!slot_id) {
401 xhci_warn(xhci, "slot_id is zero\n");
402 goto error;
404 /* unlock to execute stop endpoint commands */
405 spin_unlock_irqrestore(&xhci->lock, flags);
406 xhci_stop_device(xhci, slot_id, 1);
407 spin_lock_irqsave(&xhci->lock, flags);
409 temp = xhci_port_state_to_neutral(temp);
410 temp &= ~PORT_PLS_MASK;
411 temp |= PORT_LINK_STROBE | XDEV_U3;
412 xhci_writel(xhci, temp, addr);
414 spin_unlock_irqrestore(&xhci->lock, flags);
415 msleep(10); /* wait device to enter */
416 spin_lock_irqsave(&xhci->lock, flags);
418 temp = xhci_readl(xhci, addr);
419 xhci->suspended_ports |= 1 << wIndex;
420 break;
421 case USB_PORT_FEAT_POWER:
423 * Turn on ports, even if there isn't per-port switching.
424 * HC will report connect events even before this is set.
425 * However, khubd will ignore the roothub events until
426 * the roothub is registered.
428 xhci_writel(xhci, temp | PORT_POWER, addr);
430 temp = xhci_readl(xhci, addr);
431 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
432 break;
433 case USB_PORT_FEAT_RESET:
434 temp = (temp | PORT_RESET);
435 xhci_writel(xhci, temp, addr);
437 temp = xhci_readl(xhci, addr);
438 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
439 break;
440 default:
441 goto error;
443 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
444 break;
445 case ClearPortFeature:
446 if (!wIndex || wIndex > ports)
447 goto error;
448 wIndex--;
449 addr = &xhci->op_regs->port_status_base +
450 NUM_PORT_REGS*(wIndex & 0xff);
451 temp = xhci_readl(xhci, addr);
452 temp = xhci_port_state_to_neutral(temp);
453 switch (wValue) {
454 case USB_PORT_FEAT_SUSPEND:
455 temp = xhci_readl(xhci, addr);
456 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
457 xhci_dbg(xhci, "PORTSC %04x\n", temp);
458 if (temp & PORT_RESET)
459 goto error;
460 if (temp & XDEV_U3) {
461 if ((temp & PORT_PE) == 0)
462 goto error;
463 if (DEV_SUPERSPEED(temp)) {
464 temp = xhci_port_state_to_neutral(temp);
465 temp &= ~PORT_PLS_MASK;
466 temp |= PORT_LINK_STROBE | XDEV_U0;
467 xhci_writel(xhci, temp, addr);
468 xhci_readl(xhci, addr);
469 } else {
470 temp = xhci_port_state_to_neutral(temp);
471 temp &= ~PORT_PLS_MASK;
472 temp |= PORT_LINK_STROBE | XDEV_RESUME;
473 xhci_writel(xhci, temp, addr);
475 spin_unlock_irqrestore(&xhci->lock,
476 flags);
477 msleep(20);
478 spin_lock_irqsave(&xhci->lock, flags);
480 temp = xhci_readl(xhci, addr);
481 temp = xhci_port_state_to_neutral(temp);
482 temp &= ~PORT_PLS_MASK;
483 temp |= PORT_LINK_STROBE | XDEV_U0;
484 xhci_writel(xhci, temp, addr);
486 xhci->port_c_suspend |= 1 << wIndex;
489 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
490 if (!slot_id) {
491 xhci_dbg(xhci, "slot_id is zero\n");
492 goto error;
494 xhci_ring_device(xhci, slot_id);
495 break;
496 case USB_PORT_FEAT_C_SUSPEND:
497 xhci->port_c_suspend &= ~(1 << wIndex);
498 case USB_PORT_FEAT_C_RESET:
499 case USB_PORT_FEAT_C_CONNECTION:
500 case USB_PORT_FEAT_C_OVER_CURRENT:
501 case USB_PORT_FEAT_C_ENABLE:
502 xhci_clear_port_change_bit(xhci, wValue, wIndex,
503 addr, temp);
504 break;
505 case USB_PORT_FEAT_ENABLE:
506 xhci_disable_port(xhci, wIndex, addr, temp);
507 break;
508 default:
509 goto error;
511 break;
512 default:
513 error:
514 /* "stall" on error */
515 retval = -EPIPE;
517 spin_unlock_irqrestore(&xhci->lock, flags);
518 return retval;
522 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
523 * Ports are 0-indexed from the HCD point of view,
524 * and 1-indexed from the USB core pointer of view.
526 * Note that the status change bits will be cleared as soon as a port status
527 * change event is generated, so we use the saved status from that event.
529 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
531 unsigned long flags;
532 u32 temp, status;
533 u32 mask;
534 int i, retval;
535 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
536 int ports;
537 u32 __iomem *addr;
539 ports = HCS_MAX_PORTS(xhci->hcs_params1);
541 /* Initial status is no changes */
542 retval = (ports + 8) / 8;
543 memset(buf, 0, retval);
544 status = 0;
546 mask = PORT_CSC | PORT_PEC | PORT_OCC;
548 spin_lock_irqsave(&xhci->lock, flags);
549 /* For each port, did anything change? If so, set that bit in buf. */
550 for (i = 0; i < ports; i++) {
551 addr = &xhci->op_regs->port_status_base +
552 NUM_PORT_REGS*i;
553 temp = xhci_readl(xhci, addr);
554 if ((temp & mask) != 0 ||
555 (xhci->port_c_suspend & 1 << i) ||
556 (xhci->resume_done[i] && time_after_eq(
557 jiffies, xhci->resume_done[i]))) {
558 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
559 status = 1;
562 spin_unlock_irqrestore(&xhci->lock, flags);
563 return status ? retval : 0;
566 #ifdef CONFIG_PM
568 int xhci_bus_suspend(struct usb_hcd *hcd)
570 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
571 int port;
572 unsigned long flags;
574 xhci_dbg(xhci, "suspend root hub\n");
576 spin_lock_irqsave(&xhci->lock, flags);
578 if (hcd->self.root_hub->do_remote_wakeup) {
579 port = HCS_MAX_PORTS(xhci->hcs_params1);
580 while (port--) {
581 if (xhci->resume_done[port] != 0) {
582 spin_unlock_irqrestore(&xhci->lock, flags);
583 xhci_dbg(xhci, "suspend failed because "
584 "port %d is resuming\n",
585 port + 1);
586 return -EBUSY;
591 port = HCS_MAX_PORTS(xhci->hcs_params1);
592 xhci->bus_suspended = 0;
593 while (port--) {
594 /* suspend the port if the port is not suspended */
595 u32 __iomem *addr;
596 u32 t1, t2;
597 int slot_id;
599 addr = &xhci->op_regs->port_status_base +
600 NUM_PORT_REGS * (port & 0xff);
601 t1 = xhci_readl(xhci, addr);
602 t2 = xhci_port_state_to_neutral(t1);
604 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
605 xhci_dbg(xhci, "port %d not suspended\n", port);
606 slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
607 if (slot_id) {
608 spin_unlock_irqrestore(&xhci->lock, flags);
609 xhci_stop_device(xhci, slot_id, 1);
610 spin_lock_irqsave(&xhci->lock, flags);
612 t2 &= ~PORT_PLS_MASK;
613 t2 |= PORT_LINK_STROBE | XDEV_U3;
614 set_bit(port, &xhci->bus_suspended);
616 if (hcd->self.root_hub->do_remote_wakeup) {
617 if (t1 & PORT_CONNECT) {
618 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
619 t2 &= ~PORT_WKCONN_E;
620 } else {
621 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
622 t2 &= ~PORT_WKDISC_E;
624 } else
625 t2 &= ~PORT_WAKE_BITS;
627 t1 = xhci_port_state_to_neutral(t1);
628 if (t1 != t2)
629 xhci_writel(xhci, t2, addr);
631 if (DEV_HIGHSPEED(t1)) {
632 /* enable remote wake up for USB 2.0 */
633 u32 __iomem *addr;
634 u32 tmp;
636 addr = &xhci->op_regs->port_power_base +
637 NUM_PORT_REGS * (port & 0xff);
638 tmp = xhci_readl(xhci, addr);
639 tmp |= PORT_RWE;
640 xhci_writel(xhci, tmp, addr);
643 hcd->state = HC_STATE_SUSPENDED;
644 xhci->next_statechange = jiffies + msecs_to_jiffies(10);
645 spin_unlock_irqrestore(&xhci->lock, flags);
646 return 0;
649 int xhci_bus_resume(struct usb_hcd *hcd)
651 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
652 int port;
653 u32 temp;
654 unsigned long flags;
656 xhci_dbg(xhci, "resume root hub\n");
658 if (time_before(jiffies, xhci->next_statechange))
659 msleep(5);
661 spin_lock_irqsave(&xhci->lock, flags);
662 if (!HCD_HW_ACCESSIBLE(hcd)) {
663 spin_unlock_irqrestore(&xhci->lock, flags);
664 return -ESHUTDOWN;
667 /* delay the irqs */
668 temp = xhci_readl(xhci, &xhci->op_regs->command);
669 temp &= ~CMD_EIE;
670 xhci_writel(xhci, temp, &xhci->op_regs->command);
672 port = HCS_MAX_PORTS(xhci->hcs_params1);
673 while (port--) {
674 /* Check whether need resume ports. If needed
675 resume port and disable remote wakeup */
676 u32 __iomem *addr;
677 u32 temp;
678 int slot_id;
680 addr = &xhci->op_regs->port_status_base +
681 NUM_PORT_REGS * (port & 0xff);
682 temp = xhci_readl(xhci, addr);
683 if (DEV_SUPERSPEED(temp))
684 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
685 else
686 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
687 if (test_bit(port, &xhci->bus_suspended) &&
688 (temp & PORT_PLS_MASK)) {
689 if (DEV_SUPERSPEED(temp)) {
690 temp = xhci_port_state_to_neutral(temp);
691 temp &= ~PORT_PLS_MASK;
692 temp |= PORT_LINK_STROBE | XDEV_U0;
693 xhci_writel(xhci, temp, addr);
694 } else {
695 temp = xhci_port_state_to_neutral(temp);
696 temp &= ~PORT_PLS_MASK;
697 temp |= PORT_LINK_STROBE | XDEV_RESUME;
698 xhci_writel(xhci, temp, addr);
700 spin_unlock_irqrestore(&xhci->lock, flags);
701 msleep(20);
702 spin_lock_irqsave(&xhci->lock, flags);
704 temp = xhci_readl(xhci, addr);
705 temp = xhci_port_state_to_neutral(temp);
706 temp &= ~PORT_PLS_MASK;
707 temp |= PORT_LINK_STROBE | XDEV_U0;
708 xhci_writel(xhci, temp, addr);
710 slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
711 if (slot_id)
712 xhci_ring_device(xhci, slot_id);
713 } else
714 xhci_writel(xhci, temp, addr);
716 if (DEV_HIGHSPEED(temp)) {
717 /* disable remote wake up for USB 2.0 */
718 u32 __iomem *addr;
719 u32 tmp;
721 addr = &xhci->op_regs->port_power_base +
722 NUM_PORT_REGS * (port & 0xff);
723 tmp = xhci_readl(xhci, addr);
724 tmp &= ~PORT_RWE;
725 xhci_writel(xhci, tmp, addr);
729 (void) xhci_readl(xhci, &xhci->op_regs->command);
731 xhci->next_statechange = jiffies + msecs_to_jiffies(5);
732 hcd->state = HC_STATE_RUNNING;
733 /* re-enable irqs */
734 temp = xhci_readl(xhci, &xhci->op_regs->command);
735 temp |= CMD_EIE;
736 xhci_writel(xhci, temp, &xhci->op_regs->command);
737 temp = xhci_readl(xhci, &xhci->op_regs->command);
739 spin_unlock_irqrestore(&xhci->lock, flags);
740 return 0;
743 #endif /* CONFIG_PM */