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ath9k: Clarify we only want 32-bit DMA
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath9k / main.c
blob9d64ef565c039625562c65669da23e8cb916fb23
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21 #include "reg.h"
22
23 #define ATH_PCI_VERSION "0.1"
24
25 static char *dev_info = "ath9k";
26
27 MODULE_AUTHOR("Atheros Communications");
28 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
29 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
30 MODULE_LICENSE("Dual BSD/GPL");
31
32 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
33 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
34 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
35 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
38 { 0 }
39 };
40
41 static void ath_detach(struct ath_softc *sc);
42
43 static int ath_get_channel(struct ath_softc *sc,
44 struct ieee80211_channel *chan)
45 {
46 int i;
47
48 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
49 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
50 return i;
51 }
52
53 return -1;
54 }
55
56 static u32 ath_get_extchanmode(struct ath_softc *sc,
57 struct ieee80211_channel *chan)
58 {
59 u32 chanmode = 0;
60 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
61 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
62
63 switch (chan->band) {
64 case IEEE80211_BAND_2GHZ:
65 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
66 (tx_chan_width == ATH9K_HT_MACMODE_20))
67 chanmode = CHANNEL_G_HT20;
68 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
69 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40PLUS;
71 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
72 (tx_chan_width == ATH9K_HT_MACMODE_2040))
73 chanmode = CHANNEL_G_HT40MINUS;
74 break;
75 case IEEE80211_BAND_5GHZ:
76 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
77 (tx_chan_width == ATH9K_HT_MACMODE_20))
78 chanmode = CHANNEL_A_HT20;
79 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
80 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40PLUS;
82 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
83 (tx_chan_width == ATH9K_HT_MACMODE_2040))
84 chanmode = CHANNEL_A_HT40MINUS;
85 break;
86 default:
87 break;
88 }
89
90 return chanmode;
91 }
92
93
94 static int ath_setkey_tkip(struct ath_softc *sc,
95 struct ieee80211_key_conf *key,
96 struct ath9k_keyval *hk,
97 const u8 *addr)
98 {
99 u8 *key_rxmic = NULL;
100 u8 *key_txmic = NULL;
101
102 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
103 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
104
105 if (addr == NULL) {
106 /* Group key installation */
107 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
108 return ath_keyset(sc, key->keyidx, hk, addr);
109 }
110 if (!sc->sc_splitmic) {
111 /*
112 * data key goes at first index,
113 * the hal handles the MIC keys at index+64.
114 */
115 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
116 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
117 return ath_keyset(sc, key->keyidx, hk, addr);
118 }
119 /*
120 * TX key goes at first index, RX key at +32.
121 * The hal handles the MIC keys at index+64.
122 */
123 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
124 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
125 /* Txmic entry failed. No need to proceed further */
126 DPRINTF(sc, ATH_DBG_KEYCACHE,
127 "%s Setting TX MIC Key Failed\n", __func__);
128 return 0;
129 }
130
131 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
132 /* XXX delete tx key on failure? */
133 return ath_keyset(sc, key->keyidx+32, hk, addr);
134 }
135
136 static int ath_key_config(struct ath_softc *sc,
137 const u8 *addr,
138 struct ieee80211_key_conf *key)
139 {
140 struct ieee80211_vif *vif;
141 struct ath9k_keyval hk;
142 const u8 *mac = NULL;
143 int ret = 0;
144 enum nl80211_iftype opmode;
145
146 memset(&hk, 0, sizeof(hk));
147
148 switch (key->alg) {
149 case ALG_WEP:
150 hk.kv_type = ATH9K_CIPHER_WEP;
151 break;
152 case ALG_TKIP:
153 hk.kv_type = ATH9K_CIPHER_TKIP;
154 break;
155 case ALG_CCMP:
156 hk.kv_type = ATH9K_CIPHER_AES_CCM;
157 break;
158 default:
159 return -EINVAL;
160 }
161
162 hk.kv_len = key->keylen;
163 memcpy(hk.kv_val, key->key, key->keylen);
164
165 if (!sc->sc_vaps[0])
166 return -EIO;
167
168 vif = sc->sc_vaps[0];
169 opmode = vif->type;
170
171 /*
172 * Strategy:
173 * For _M_STA mc tx, we will not setup a key at all since we never
174 * tx mc.
175 * _M_STA mc rx, we will use the keyID.
176 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
177 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
178 * peer node. BUT we will plumb a cleartext key so that we can do
179 * perSta default key table lookup in software.
180 */
181 if (is_broadcast_ether_addr(addr)) {
182 switch (opmode) {
183 case NL80211_IFTYPE_STATION:
184 /* default key: could be group WPA key
185 * or could be static WEP key */
186 mac = NULL;
187 break;
188 case NL80211_IFTYPE_ADHOC:
189 break;
190 case NL80211_IFTYPE_AP:
191 break;
192 default:
193 ASSERT(0);
194 break;
195 }
196 } else {
197 mac = addr;
198 }
199
200 if (key->alg == ALG_TKIP)
201 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 else
203 ret = ath_keyset(sc, key->keyidx, &hk, mac);
204
205 if (!ret)
206 return -EIO;
207
208 return 0;
209 }
210
211 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
212 {
213 int freeslot;
214
215 freeslot = (key->keyidx >= 4) ? 1 : 0;
216 ath_key_reset(sc, key->keyidx, freeslot);
217 }
218
219 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
220 {
221 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
223
224 ht_info->ht_supported = true;
225 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
226 IEEE80211_HT_CAP_SM_PS |
227 IEEE80211_HT_CAP_SGI_40 |
228 IEEE80211_HT_CAP_DSSSCCK40;
229
230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
232 /* set up supported mcs set */
233 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
234 ht_info->mcs.rx_mask[0] = 0xff;
235 ht_info->mcs.rx_mask[1] = 0xff;
236 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
237 }
238
239 static int ath_rate2idx(struct ath_softc *sc, int rate)
240 {
241 int i = 0, cur_band, n_rates;
242 struct ieee80211_hw *hw = sc->hw;
243
244 cur_band = hw->conf.channel->band;
245 n_rates = sc->sbands[cur_band].n_bitrates;
246
247 for (i = 0; i < n_rates; i++) {
248 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
249 break;
250 }
251
252 /*
253 * NB:mac80211 validates rx rate index against the supported legacy rate
254 * index only (should be done against ht rates also), return the highest
255 * legacy rate index for rx rate which does not match any one of the
256 * supported basic and extended rates to make mac80211 happy.
257 * The following hack will be cleaned up once the issue with
258 * the rx rate index validation in mac80211 is fixed.
259 */
260 if (i == n_rates)
261 return n_rates - 1;
262 return i;
263 }
264
265 static void ath9k_rx_prepare(struct ath_softc *sc,
266 struct sk_buff *skb,
267 struct ath_recv_status *status,
268 struct ieee80211_rx_status *rx_status)
269 {
270 struct ieee80211_hw *hw = sc->hw;
271 struct ieee80211_channel *curchan = hw->conf.channel;
272
273 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
274
275 rx_status->mactime = status->tsf;
276 rx_status->band = curchan->band;
277 rx_status->freq = curchan->center_freq;
278 rx_status->noise = sc->sc_ani.sc_noise_floor;
279 rx_status->signal = rx_status->noise + status->rssi;
280 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
281 rx_status->antenna = status->antenna;
282
283 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
284 * scheme can be used here but it requires tables of SNR/throughput for
285 * each possible mode used. */
286 rx_status->qual = status->rssi * 100 / 45;
287
288 /* rssi can be more than 45 though, anything above that
289 * should be considered at 100% */
290 if (rx_status->qual > 100)
291 rx_status->qual = 100;
292
293 if (status->flags & ATH_RX_MIC_ERROR)
294 rx_status->flag |= RX_FLAG_MMIC_ERROR;
295 if (status->flags & ATH_RX_FCS_ERROR)
296 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
297
298 rx_status->flag |= RX_FLAG_TSFT;
299 }
300
301 static void ath9k_ht_conf(struct ath_softc *sc,
302 struct ieee80211_bss_conf *bss_conf)
303 {
304 struct ath_ht_info *ht_info = &sc->sc_ht_info;
305
306 if (sc->hw->conf.ht.enabled) {
307 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
308
309 if (bss_conf->ht.width_40_ok)
310 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
311 else
312 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
313
314 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
315 }
316 }
317
318 static void ath9k_bss_assoc_info(struct ath_softc *sc,
319 struct ieee80211_vif *vif,
320 struct ieee80211_bss_conf *bss_conf)
321 {
322 struct ieee80211_hw *hw = sc->hw;
323 struct ieee80211_channel *curchan = hw->conf.channel;
324 struct ath_vap *avp = (void *)vif->drv_priv;
325 int pos;
326
327 if (bss_conf->assoc) {
328 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
329 __func__,
330 bss_conf->aid);
331
332 /* New association, store aid */
333 if (avp->av_opmode == ATH9K_M_STA) {
334 sc->sc_curaid = bss_conf->aid;
335 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
336 sc->sc_curaid);
337 }
338
339 /* Configure the beacon */
340 ath_beacon_config(sc, 0);
341 sc->sc_flags |= SC_OP_BEACONS;
342
343 /* Reset rssi stats */
344 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
345 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
346 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
347 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
348
349 /* Update chainmask */
350 ath_update_chainmask(sc, hw->conf.ht.enabled);
351
352 DPRINTF(sc, ATH_DBG_CONFIG,
353 "%s: bssid %pM aid 0x%x\n",
354 __func__,
355 sc->sc_curbssid, sc->sc_curaid);
356
357 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
358 __func__,
359 curchan->center_freq);
360
361 pos = ath_get_channel(sc, curchan);
362 if (pos == -1) {
363 DPRINTF(sc, ATH_DBG_FATAL,
364 "%s: Invalid channel\n", __func__);
365 return;
366 }
367
368 if (hw->conf.ht.enabled)
369 sc->sc_ah->ah_channels[pos].chanmode =
370 ath_get_extchanmode(sc, curchan);
371 else
372 sc->sc_ah->ah_channels[pos].chanmode =
373 (curchan->band == IEEE80211_BAND_2GHZ) ?
374 CHANNEL_G : CHANNEL_A;
375
376 /* set h/w channel */
377 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
378 DPRINTF(sc, ATH_DBG_FATAL,
379 "%s: Unable to set channel\n",
380 __func__);
381
382 ath_rate_newstate(sc, avp);
383 /* Update ratectrl about the new state */
384 ath_rc_node_update(hw, avp->rc_node);
385
386 /* Start ANI */
387 mod_timer(&sc->sc_ani.timer,
388 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
389
390 } else {
391 DPRINTF(sc, ATH_DBG_CONFIG,
392 "%s: Bss Info DISSOC\n", __func__);
393 sc->sc_curaid = 0;
394 }
395 }
396
397 void ath_get_beaconconfig(struct ath_softc *sc,
398 int if_id,
399 struct ath_beacon_config *conf)
400 {
401 struct ieee80211_hw *hw = sc->hw;
402
403 /* fill in beacon config data */
404
405 conf->beacon_interval = hw->conf.beacon_int;
406 conf->listen_interval = 100;
407 conf->dtim_count = 1;
408 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
409 }
410
411 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
412 struct ath_xmit_status *tx_status)
413 {
414 struct ieee80211_hw *hw = sc->hw;
415 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
416
417 DPRINTF(sc, ATH_DBG_XMIT,
418 "%s: TX complete: skb: %p\n", __func__, skb);
419
420 ieee80211_tx_info_clear_status(tx_info);
421 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
422 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
423 /* free driver's private data area of tx_info, XXX: HACK! */
424 if (tx_info->control.vif != NULL)
425 kfree(tx_info->control.vif);
426 tx_info->control.vif = NULL;
427 }
428
429 if (tx_status->flags & ATH_TX_BAR) {
430 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
431 tx_status->flags &= ~ATH_TX_BAR;
432 }
433
434 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
435 /* Frame was ACKed */
436 tx_info->flags |= IEEE80211_TX_STAT_ACK;
437 }
438
439 tx_info->status.rates[0].count = tx_status->retries + 1;
440
441 ieee80211_tx_status(hw, skb);
442 }
443
444 int _ath_rx_indicate(struct ath_softc *sc,
445 struct sk_buff *skb,
446 struct ath_recv_status *status,
447 u16 keyix)
448 {
449 struct ieee80211_hw *hw = sc->hw;
450 struct ieee80211_rx_status rx_status;
451 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
452 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
453 int padsize;
454
455 /* see if any padding is done by the hw and remove it */
456 if (hdrlen & 3) {
457 padsize = hdrlen % 4;
458 memmove(skb->data + padsize, skb->data, hdrlen);
459 skb_pull(skb, padsize);
460 }
461
462 /* Prepare rx status */
463 ath9k_rx_prepare(sc, skb, status, &rx_status);
464
465 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
466 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
467 rx_status.flag |= RX_FLAG_DECRYPTED;
468 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
469 && !(status->flags & ATH_RX_DECRYPT_ERROR)
470 && skb->len >= hdrlen + 4) {
471 keyix = skb->data[hdrlen + 3] >> 6;
472
473 if (test_bit(keyix, sc->sc_keymap))
474 rx_status.flag |= RX_FLAG_DECRYPTED;
475 }
476
477 __ieee80211_rx(hw, skb, &rx_status);
478
479 return 0;
480 }
481
482 /********************************/
483 /* LED functions */
484 /********************************/
485
486 static void ath_led_brightness(struct led_classdev *led_cdev,
487 enum led_brightness brightness)
488 {
489 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
490 struct ath_softc *sc = led->sc;
491
492 switch (brightness) {
493 case LED_OFF:
494 if (led->led_type == ATH_LED_ASSOC ||
495 led->led_type == ATH_LED_RADIO)
496 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
497 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
498 (led->led_type == ATH_LED_RADIO) ? 1 :
499 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
500 break;
501 case LED_FULL:
502 if (led->led_type == ATH_LED_ASSOC)
503 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
504 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
505 break;
506 default:
507 break;
508 }
509 }
510
511 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
512 char *trigger)
513 {
514 int ret;
515
516 led->sc = sc;
517 led->led_cdev.name = led->name;
518 led->led_cdev.default_trigger = trigger;
519 led->led_cdev.brightness_set = ath_led_brightness;
520
521 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
522 if (ret)
523 DPRINTF(sc, ATH_DBG_FATAL,
524 "Failed to register led:%s", led->name);
525 else
526 led->registered = 1;
527 return ret;
528 }
529
530 static void ath_unregister_led(struct ath_led *led)
531 {
532 if (led->registered) {
533 led_classdev_unregister(&led->led_cdev);
534 led->registered = 0;
535 }
536 }
537
538 static void ath_deinit_leds(struct ath_softc *sc)
539 {
540 ath_unregister_led(&sc->assoc_led);
541 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
542 ath_unregister_led(&sc->tx_led);
543 ath_unregister_led(&sc->rx_led);
544 ath_unregister_led(&sc->radio_led);
545 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
546 }
547
548 static void ath_init_leds(struct ath_softc *sc)
549 {
550 char *trigger;
551 int ret;
552
553 /* Configure gpio 1 for output */
554 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
555 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
556 /* LED off, active low */
557 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
558
559 trigger = ieee80211_get_radio_led_name(sc->hw);
560 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
561 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
562 ret = ath_register_led(sc, &sc->radio_led, trigger);
563 sc->radio_led.led_type = ATH_LED_RADIO;
564 if (ret)
565 goto fail;
566
567 trigger = ieee80211_get_assoc_led_name(sc->hw);
568 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
569 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
570 ret = ath_register_led(sc, &sc->assoc_led, trigger);
571 sc->assoc_led.led_type = ATH_LED_ASSOC;
572 if (ret)
573 goto fail;
574
575 trigger = ieee80211_get_tx_led_name(sc->hw);
576 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
577 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
578 ret = ath_register_led(sc, &sc->tx_led, trigger);
579 sc->tx_led.led_type = ATH_LED_TX;
580 if (ret)
581 goto fail;
582
583 trigger = ieee80211_get_rx_led_name(sc->hw);
584 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
585 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
586 ret = ath_register_led(sc, &sc->rx_led, trigger);
587 sc->rx_led.led_type = ATH_LED_RX;
588 if (ret)
589 goto fail;
590
591 return;
592
593 fail:
594 ath_deinit_leds(sc);
595 }
596
597 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
598
599 /*******************/
600 /* Rfkill */
601 /*******************/
602
603 static void ath_radio_enable(struct ath_softc *sc)
604 {
605 struct ath_hal *ah = sc->sc_ah;
606 int status;
607
608 spin_lock_bh(&sc->sc_resetlock);
609 if (!ath9k_hw_reset(ah, ah->ah_curchan,
610 sc->sc_ht_info.tx_chan_width,
611 sc->sc_tx_chainmask,
612 sc->sc_rx_chainmask,
613 sc->sc_ht_extprotspacing,
614 false, &status)) {
615 DPRINTF(sc, ATH_DBG_FATAL,
616 "%s: unable to reset channel %u (%uMhz) "
617 "flags 0x%x hal status %u\n", __func__,
618 ath9k_hw_mhz2ieee(ah,
619 ah->ah_curchan->channel,
620 ah->ah_curchan->channelFlags),
621 ah->ah_curchan->channel,
622 ah->ah_curchan->channelFlags, status);
623 }
624 spin_unlock_bh(&sc->sc_resetlock);
625
626 ath_update_txpow(sc);
627 if (ath_startrecv(sc) != 0) {
628 DPRINTF(sc, ATH_DBG_FATAL,
629 "%s: unable to restart recv logic\n", __func__);
630 return;
631 }
632
633 if (sc->sc_flags & SC_OP_BEACONS)
634 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
635
636 /* Re-Enable interrupts */
637 ath9k_hw_set_interrupts(ah, sc->sc_imask);
638
639 /* Enable LED */
640 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
641 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
642 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
643
644 ieee80211_wake_queues(sc->hw);
645 }
646
647 static void ath_radio_disable(struct ath_softc *sc)
648 {
649 struct ath_hal *ah = sc->sc_ah;
650 int status;
651
652
653 ieee80211_stop_queues(sc->hw);
654
655 /* Disable LED */
656 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
657 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
658
659 /* Disable interrupts */
660 ath9k_hw_set_interrupts(ah, 0);
661
662 ath_draintxq(sc, false); /* clear pending tx frames */
663 ath_stoprecv(sc); /* turn off frame recv */
664 ath_flushrecv(sc); /* flush recv queue */
665
666 spin_lock_bh(&sc->sc_resetlock);
667 if (!ath9k_hw_reset(ah, ah->ah_curchan,
668 sc->sc_ht_info.tx_chan_width,
669 sc->sc_tx_chainmask,
670 sc->sc_rx_chainmask,
671 sc->sc_ht_extprotspacing,
672 false, &status)) {
673 DPRINTF(sc, ATH_DBG_FATAL,
674 "%s: unable to reset channel %u (%uMhz) "
675 "flags 0x%x hal status %u\n", __func__,
676 ath9k_hw_mhz2ieee(ah,
677 ah->ah_curchan->channel,
678 ah->ah_curchan->channelFlags),
679 ah->ah_curchan->channel,
680 ah->ah_curchan->channelFlags, status);
681 }
682 spin_unlock_bh(&sc->sc_resetlock);
683
684 ath9k_hw_phy_disable(ah);
685 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
686 }
687
688 static bool ath_is_rfkill_set(struct ath_softc *sc)
689 {
690 struct ath_hal *ah = sc->sc_ah;
691
692 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
693 ah->ah_rfkill_polarity;
694 }
695
696 /* h/w rfkill poll function */
697 static void ath_rfkill_poll(struct work_struct *work)
698 {
699 struct ath_softc *sc = container_of(work, struct ath_softc,
700 rf_kill.rfkill_poll.work);
701 bool radio_on;
702
703 if (sc->sc_flags & SC_OP_INVALID)
704 return;
705
706 radio_on = !ath_is_rfkill_set(sc);
707
708 /*
709 * enable/disable radio only when there is a
710 * state change in RF switch
711 */
712 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
713 enum rfkill_state state;
714
715 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
716 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
717 : RFKILL_STATE_HARD_BLOCKED;
718 } else if (radio_on) {
719 ath_radio_enable(sc);
720 state = RFKILL_STATE_UNBLOCKED;
721 } else {
722 ath_radio_disable(sc);
723 state = RFKILL_STATE_HARD_BLOCKED;
724 }
725
726 if (state == RFKILL_STATE_HARD_BLOCKED)
727 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
728 else
729 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
730
731 rfkill_force_state(sc->rf_kill.rfkill, state);
732 }
733
734 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
735 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
736 }
737
738 /* s/w rfkill handler */
739 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
740 {
741 struct ath_softc *sc = data;
742
743 switch (state) {
744 case RFKILL_STATE_SOFT_BLOCKED:
745 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
746 SC_OP_RFKILL_SW_BLOCKED)))
747 ath_radio_disable(sc);
748 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
749 return 0;
750 case RFKILL_STATE_UNBLOCKED:
751 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
752 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
753 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
754 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
755 "radio as it is disabled by h/w \n");
756 return -EPERM;
757 }
758 ath_radio_enable(sc);
759 }
760 return 0;
761 default:
762 return -EINVAL;
763 }
764 }
765
766 /* Init s/w rfkill */
767 static int ath_init_sw_rfkill(struct ath_softc *sc)
768 {
769 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
770 RFKILL_TYPE_WLAN);
771 if (!sc->rf_kill.rfkill) {
772 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
773 return -ENOMEM;
774 }
775
776 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
777 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
778 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
779 sc->rf_kill.rfkill->data = sc;
780 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
781 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
782 sc->rf_kill.rfkill->user_claim_unsupported = 1;
783
784 return 0;
785 }
786
787 /* Deinitialize rfkill */
788 static void ath_deinit_rfkill(struct ath_softc *sc)
789 {
790 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
791 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
792
793 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
794 rfkill_unregister(sc->rf_kill.rfkill);
795 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
796 sc->rf_kill.rfkill = NULL;
797 }
798 }
799
800 static int ath_start_rfkill_poll(struct ath_softc *sc)
801 {
802 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
803 queue_delayed_work(sc->hw->workqueue,
804 &sc->rf_kill.rfkill_poll, 0);
805
806 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
807 if (rfkill_register(sc->rf_kill.rfkill)) {
808 DPRINTF(sc, ATH_DBG_FATAL,
809 "Unable to register rfkill\n");
810 rfkill_free(sc->rf_kill.rfkill);
811
812 /* Deinitialize the device */
813 ath_detach(sc);
814 if (sc->pdev->irq)
815 free_irq(sc->pdev->irq, sc);
816 pci_iounmap(sc->pdev, sc->mem);
817 pci_release_region(sc->pdev, 0);
818 pci_disable_device(sc->pdev);
819 ieee80211_free_hw(sc->hw);
820 return -EIO;
821 } else {
822 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
823 }
824 }
825
826 return 0;
827 }
828 #endif /* CONFIG_RFKILL */
829
830 static void ath_detach(struct ath_softc *sc)
831 {
832 struct ieee80211_hw *hw = sc->hw;
833 int i = 0;
834
835 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
836
837 ieee80211_unregister_hw(hw);
838
839 ath_deinit_leds(sc);
840
841 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
842 ath_deinit_rfkill(sc);
843 #endif
844 ath_rate_control_unregister();
845 ath_rate_detach(sc->sc_rc);
846
847 ath_rx_cleanup(sc);
848 ath_tx_cleanup(sc);
849
850 tasklet_kill(&sc->intr_tq);
851 tasklet_kill(&sc->bcon_tasklet);
852
853 if (!(sc->sc_flags & SC_OP_INVALID))
854 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
855
856 /* cleanup tx queues */
857 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
858 if (ATH_TXQ_SETUP(sc, i))
859 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
860
861 ath9k_hw_detach(sc->sc_ah);
862 }
863
864 static int ath_attach(u16 devid, struct ath_softc *sc)
865 {
866 struct ieee80211_hw *hw = sc->hw;
867 int error = 0;
868
869 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
870
871 error = ath_init(devid, sc);
872 if (error != 0)
873 return error;
874
875 /* get mac address from hardware and set in mac80211 */
876
877 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
878
879 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
880 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
881 IEEE80211_HW_SIGNAL_DBM |
882 IEEE80211_HW_AMPDU_AGGREGATION;
883
884 hw->wiphy->interface_modes =
885 BIT(NL80211_IFTYPE_AP) |
886 BIT(NL80211_IFTYPE_STATION) |
887 BIT(NL80211_IFTYPE_ADHOC);
888
889 hw->queues = 4;
890 hw->sta_data_size = sizeof(struct ath_node);
891 hw->vif_data_size = sizeof(struct ath_vap);
892
893 /* Register rate control */
894 hw->rate_control_algorithm = "ath9k_rate_control";
895 error = ath_rate_control_register();
896 if (error != 0) {
897 DPRINTF(sc, ATH_DBG_FATAL,
898 "%s: Unable to register rate control "
899 "algorithm:%d\n", __func__, error);
900 ath_rate_control_unregister();
901 goto bad;
902 }
903
904 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
905 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
906 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
907 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
908 }
909
910 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
911 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
912 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
913 &sc->sbands[IEEE80211_BAND_5GHZ];
914
915 /* initialize tx/rx engine */
916 error = ath_tx_init(sc, ATH_TXBUF);
917 if (error != 0)
918 goto detach;
919
920 error = ath_rx_init(sc, ATH_RXBUF);
921 if (error != 0)
922 goto detach;
923
924 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
925 /* Initialze h/w Rfkill */
926 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
927 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
928
929 /* Initialize s/w rfkill */
930 if (ath_init_sw_rfkill(sc))
931 goto detach;
932 #endif
933
934 error = ieee80211_register_hw(hw);
935 if (error != 0) {
936 ath_rate_control_unregister();
937 goto bad;
938 }
939
940 /* Initialize LED control */
941 ath_init_leds(sc);
942
943 return 0;
944 detach:
945 ath_detach(sc);
946 bad:
947 return error;
948 }
949
950 static int ath9k_start(struct ieee80211_hw *hw)
951 {
952 struct ath_softc *sc = hw->priv;
953 struct ieee80211_channel *curchan = hw->conf.channel;
954 int error = 0, pos;
955
956 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
957 "initial channel: %d MHz\n", __func__, curchan->center_freq);
958
959 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
960
961 /* setup initial channel */
962
963 pos = ath_get_channel(sc, curchan);
964 if (pos == -1) {
965 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
966 error = -EINVAL;
967 goto exit;
968 }
969
970 sc->sc_ah->ah_channels[pos].chanmode =
971 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
972
973 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
974 if (error) {
975 DPRINTF(sc, ATH_DBG_FATAL,
976 "%s: Unable to complete ath_open\n", __func__);
977 goto exit;
978 }
979
980 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
981 error = ath_start_rfkill_poll(sc);
982 #endif
983
984 exit:
985 return error;
986 }
987
988 static int ath9k_tx(struct ieee80211_hw *hw,
989 struct sk_buff *skb)
990 {
991 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
992 struct ath_softc *sc = hw->priv;
993 struct ath_tx_control txctl;
994 int hdrlen, padsize;
995
996 memset(&txctl, 0, sizeof(struct ath_tx_control));
997
998 /*
999 * As a temporary workaround, assign seq# here; this will likely need
1000 * to be cleaned up to work better with Beacon transmission and virtual
1001 * BSSes.
1002 */
1003 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1004 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1005 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1006 sc->seq_no += 0x10;
1007 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1008 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1009 }
1010
1011 /* Add the padding after the header if this is not already done */
1012 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1013 if (hdrlen & 3) {
1014 padsize = hdrlen % 4;
1015 if (skb_headroom(skb) < padsize)
1016 return -1;
1017 skb_push(skb, padsize);
1018 memmove(skb->data, skb->data + padsize, hdrlen);
1019 }
1020
1021 /* Check if a tx queue is available */
1022
1023 txctl.txq = ath_test_get_txq(sc, skb);
1024 if (!txctl.txq)
1025 goto exit;
1026
1027 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1028 __func__,
1029 skb);
1030
1031 if (ath_tx_start(sc, skb, &txctl) != 0) {
1032 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1033 goto exit;
1034 }
1035
1036 return 0;
1037 exit:
1038 dev_kfree_skb_any(skb);
1039 return 0;
1040 }
1041
1042 static void ath9k_stop(struct ieee80211_hw *hw)
1043 {
1044 struct ath_softc *sc = hw->priv;
1045
1046 if (sc->sc_flags & SC_OP_INVALID) {
1047 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
1048 return;
1049 }
1050
1051 ath_stop(sc);
1052
1053 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1054 }
1055
1056 static int ath9k_add_interface(struct ieee80211_hw *hw,
1057 struct ieee80211_if_init_conf *conf)
1058 {
1059 struct ath_softc *sc = hw->priv;
1060 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1061 int ic_opmode = 0;
1062
1063 /* Support only vap for now */
1064
1065 if (sc->sc_nvaps)
1066 return -ENOBUFS;
1067
1068 switch (conf->type) {
1069 case NL80211_IFTYPE_STATION:
1070 ic_opmode = ATH9K_M_STA;
1071 break;
1072 case NL80211_IFTYPE_ADHOC:
1073 ic_opmode = ATH9K_M_IBSS;
1074 break;
1075 case NL80211_IFTYPE_AP:
1076 ic_opmode = ATH9K_M_HOSTAP;
1077 break;
1078 default:
1079 DPRINTF(sc, ATH_DBG_FATAL,
1080 "%s: Interface type %d not yet supported\n",
1081 __func__, conf->type);
1082 return -EOPNOTSUPP;
1083 }
1084
1085 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1086 __func__,
1087 ic_opmode);
1088
1089 /* Set the VAP opmode */
1090 avp->av_opmode = ic_opmode;
1091 avp->av_bslot = -1;
1092
1093 if (ic_opmode == ATH9K_M_HOSTAP)
1094 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1095
1096 sc->sc_vaps[0] = conf->vif;
1097 sc->sc_nvaps++;
1098
1099 /* Set the device opmode */
1100 sc->sc_ah->ah_opmode = ic_opmode;
1101
1102 /* default VAP configuration */
1103 avp->av_config.av_fixed_rateset = IEEE80211_FIXED_RATE_NONE;
1104 avp->av_config.av_fixed_retryset = 0x03030303;
1105
1106 if (conf->type == NL80211_IFTYPE_AP) {
1107 /* TODO: is this a suitable place to start ANI for AP mode? */
1108 /* Start ANI */
1109 mod_timer(&sc->sc_ani.timer,
1110 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1111 }
1112
1113 return 0;
1114 }
1115
1116 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1117 struct ieee80211_if_init_conf *conf)
1118 {
1119 struct ath_softc *sc = hw->priv;
1120 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1121
1122 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1123
1124 #ifdef CONFIG_SLOW_ANT_DIV
1125 ath_slow_ant_div_stop(&sc->sc_antdiv);
1126 #endif
1127 /* Stop ANI */
1128 del_timer_sync(&sc->sc_ani.timer);
1129
1130 /* Reclaim beacon resources */
1131 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1132 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1133 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1134 ath_beacon_return(sc, avp);
1135 }
1136
1137 sc->sc_flags &= ~SC_OP_BEACONS;
1138
1139 sc->sc_vaps[0] = NULL;
1140 sc->sc_nvaps--;
1141 }
1142
1143 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1144 {
1145 struct ath_softc *sc = hw->priv;
1146 struct ieee80211_channel *curchan = hw->conf.channel;
1147 struct ieee80211_conf *conf = &hw->conf;
1148 int pos;
1149
1150 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1151 __func__,
1152 curchan->center_freq);
1153
1154 /* Update chainmask */
1155 ath_update_chainmask(sc, conf->ht.enabled);
1156
1157 pos = ath_get_channel(sc, curchan);
1158 if (pos == -1) {
1159 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1160 return -EINVAL;
1161 }
1162
1163 sc->sc_ah->ah_channels[pos].chanmode =
1164 (curchan->band == IEEE80211_BAND_2GHZ) ?
1165 CHANNEL_G : CHANNEL_A;
1166
1167 if (sc->sc_curaid && hw->conf.ht.enabled)
1168 sc->sc_ah->ah_channels[pos].chanmode =
1169 ath_get_extchanmode(sc, curchan);
1170
1171 if (changed & IEEE80211_CONF_CHANGE_POWER)
1172 sc->sc_config.txpowlimit = 2 * conf->power_level;
1173
1174 /* set h/w channel */
1175 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1176 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1177 __func__);
1178
1179 return 0;
1180 }
1181
1182 static int ath9k_config_interface(struct ieee80211_hw *hw,
1183 struct ieee80211_vif *vif,
1184 struct ieee80211_if_conf *conf)
1185 {
1186 struct ath_softc *sc = hw->priv;
1187 struct ath_hal *ah = sc->sc_ah;
1188 struct ath_vap *avp = (void *)vif->drv_priv;
1189 u32 rfilt = 0;
1190 int error, i;
1191
1192 /* TODO: Need to decide which hw opmode to use for multi-interface
1193 * cases */
1194 if (vif->type == NL80211_IFTYPE_AP &&
1195 ah->ah_opmode != ATH9K_M_HOSTAP) {
1196 ah->ah_opmode = ATH9K_M_HOSTAP;
1197 ath9k_hw_setopmode(ah);
1198 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1199 /* Request full reset to get hw opmode changed properly */
1200 sc->sc_flags |= SC_OP_FULL_RESET;
1201 }
1202
1203 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1204 !is_zero_ether_addr(conf->bssid)) {
1205 switch (vif->type) {
1206 case NL80211_IFTYPE_STATION:
1207 case NL80211_IFTYPE_ADHOC:
1208 /* Update ratectrl about the new state */
1209 ath_rate_newstate(sc, avp);
1210
1211 /* Set BSSID */
1212 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1213 sc->sc_curaid = 0;
1214 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1215 sc->sc_curaid);
1216
1217 /* Set aggregation protection mode parameters */
1218 sc->sc_config.ath_aggr_prot = 0;
1219
1220 DPRINTF(sc, ATH_DBG_CONFIG,
1221 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1222 __func__, rfilt,
1223 sc->sc_curbssid, sc->sc_curaid);
1224
1225 /* need to reconfigure the beacon */
1226 sc->sc_flags &= ~SC_OP_BEACONS ;
1227
1228 break;
1229 default:
1230 break;
1231 }
1232 }
1233
1234 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1235 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1236 (vif->type == NL80211_IFTYPE_AP))) {
1237 /*
1238 * Allocate and setup the beacon frame.
1239 *
1240 * Stop any previous beacon DMA. This may be
1241 * necessary, for example, when an ibss merge
1242 * causes reconfiguration; we may be called
1243 * with beacon transmission active.
1244 */
1245 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1246
1247 error = ath_beacon_alloc(sc, 0);
1248 if (error != 0)
1249 return error;
1250
1251 ath_beacon_sync(sc, 0);
1252 }
1253
1254 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1255 if ((avp->av_opmode != ATH9K_M_STA)) {
1256 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1257 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1258 ath9k_hw_keysetmac(sc->sc_ah,
1259 (u16)i,
1260 sc->sc_curbssid);
1261 }
1262
1263 /* Only legacy IBSS for now */
1264 if (vif->type == NL80211_IFTYPE_ADHOC)
1265 ath_update_chainmask(sc, 0);
1266
1267 return 0;
1268 }
1269
1270 #define SUPPORTED_FILTERS \
1271 (FIF_PROMISC_IN_BSS | \
1272 FIF_ALLMULTI | \
1273 FIF_CONTROL | \
1274 FIF_OTHER_BSS | \
1275 FIF_BCN_PRBRESP_PROMISC | \
1276 FIF_FCSFAIL)
1277
1278 /* FIXME: sc->sc_full_reset ? */
1279 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1280 unsigned int changed_flags,
1281 unsigned int *total_flags,
1282 int mc_count,
1283 struct dev_mc_list *mclist)
1284 {
1285 struct ath_softc *sc = hw->priv;
1286 u32 rfilt;
1287
1288 changed_flags &= SUPPORTED_FILTERS;
1289 *total_flags &= SUPPORTED_FILTERS;
1290
1291 sc->rx_filter = *total_flags;
1292 rfilt = ath_calcrxfilter(sc);
1293 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1294
1295 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1296 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1297 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1298 }
1299
1300 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1301 __func__, sc->rx_filter);
1302 }
1303
1304 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1305 struct ieee80211_vif *vif,
1306 enum sta_notify_cmd cmd,
1307 struct ieee80211_sta *sta)
1308 {
1309 struct ath_softc *sc = hw->priv;
1310
1311 switch (cmd) {
1312 case STA_NOTIFY_ADD:
1313 ath_node_attach(sc, sta);
1314 break;
1315 case STA_NOTIFY_REMOVE:
1316 ath_node_detach(sc, sta);
1317 break;
1318 default:
1319 break;
1320 }
1321 }
1322
1323 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1324 u16 queue,
1325 const struct ieee80211_tx_queue_params *params)
1326 {
1327 struct ath_softc *sc = hw->priv;
1328 struct ath9k_tx_queue_info qi;
1329 int ret = 0, qnum;
1330
1331 if (queue >= WME_NUM_AC)
1332 return 0;
1333
1334 qi.tqi_aifs = params->aifs;
1335 qi.tqi_cwmin = params->cw_min;
1336 qi.tqi_cwmax = params->cw_max;
1337 qi.tqi_burstTime = params->txop;
1338 qnum = ath_get_hal_qnum(queue, sc);
1339
1340 DPRINTF(sc, ATH_DBG_CONFIG,
1341 "%s: Configure tx [queue/halq] [%d/%d], "
1342 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1343 __func__,
1344 queue,
1345 qnum,
1346 params->aifs,
1347 params->cw_min,
1348 params->cw_max,
1349 params->txop);
1350
1351 ret = ath_txq_update(sc, qnum, &qi);
1352 if (ret)
1353 DPRINTF(sc, ATH_DBG_FATAL,
1354 "%s: TXQ Update failed\n", __func__);
1355
1356 return ret;
1357 }
1358
1359 static int ath9k_set_key(struct ieee80211_hw *hw,
1360 enum set_key_cmd cmd,
1361 const u8 *local_addr,
1362 const u8 *addr,
1363 struct ieee80211_key_conf *key)
1364 {
1365 struct ath_softc *sc = hw->priv;
1366 int ret = 0;
1367
1368 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1369
1370 switch (cmd) {
1371 case SET_KEY:
1372 ret = ath_key_config(sc, addr, key);
1373 if (!ret) {
1374 set_bit(key->keyidx, sc->sc_keymap);
1375 key->hw_key_idx = key->keyidx;
1376 /* push IV and Michael MIC generation to stack */
1377 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1378 if (key->alg == ALG_TKIP)
1379 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1380 }
1381 break;
1382 case DISABLE_KEY:
1383 ath_key_delete(sc, key);
1384 clear_bit(key->keyidx, sc->sc_keymap);
1385 break;
1386 default:
1387 ret = -EINVAL;
1388 }
1389
1390 return ret;
1391 }
1392
1393 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1394 struct ieee80211_vif *vif,
1395 struct ieee80211_bss_conf *bss_conf,
1396 u32 changed)
1397 {
1398 struct ath_softc *sc = hw->priv;
1399
1400 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1402 __func__,
1403 bss_conf->use_short_preamble);
1404 if (bss_conf->use_short_preamble)
1405 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1406 else
1407 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1408 }
1409
1410 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1411 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1412 __func__,
1413 bss_conf->use_cts_prot);
1414 if (bss_conf->use_cts_prot &&
1415 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1416 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1417 else
1418 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1419 }
1420
1421 if (changed & BSS_CHANGED_HT) {
1422 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1423 __func__);
1424 ath9k_ht_conf(sc, bss_conf);
1425 }
1426
1427 if (changed & BSS_CHANGED_ASSOC) {
1428 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1429 __func__,
1430 bss_conf->assoc);
1431 ath9k_bss_assoc_info(sc, vif, bss_conf);
1432 }
1433 }
1434
1435 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1436 {
1437 u64 tsf;
1438 struct ath_softc *sc = hw->priv;
1439 struct ath_hal *ah = sc->sc_ah;
1440
1441 tsf = ath9k_hw_gettsf64(ah);
1442
1443 return tsf;
1444 }
1445
1446 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1447 {
1448 struct ath_softc *sc = hw->priv;
1449 struct ath_hal *ah = sc->sc_ah;
1450
1451 ath9k_hw_reset_tsf(ah);
1452 }
1453
1454 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1455 enum ieee80211_ampdu_mlme_action action,
1456 struct ieee80211_sta *sta,
1457 u16 tid, u16 *ssn)
1458 {
1459 struct ath_softc *sc = hw->priv;
1460 int ret = 0;
1461
1462 switch (action) {
1463 case IEEE80211_AMPDU_RX_START:
1464 if (!(sc->sc_flags & SC_OP_RXAGGR))
1465 ret = -ENOTSUPP;
1466 break;
1467 case IEEE80211_AMPDU_RX_STOP:
1468 break;
1469 case IEEE80211_AMPDU_TX_START:
1470 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1471 if (ret < 0)
1472 DPRINTF(sc, ATH_DBG_FATAL,
1473 "%s: Unable to start TX aggregation\n",
1474 __func__);
1475 else
1476 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1477 break;
1478 case IEEE80211_AMPDU_TX_STOP:
1479 ret = ath_tx_aggr_stop(sc, sta, tid);
1480 if (ret < 0)
1481 DPRINTF(sc, ATH_DBG_FATAL,
1482 "%s: Unable to stop TX aggregation\n",
1483 __func__);
1484
1485 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1486 break;
1487 case IEEE80211_AMPDU_TX_RESUME:
1488 ath_tx_aggr_resume(sc, sta, tid);
1489 break;
1490 default:
1491 DPRINTF(sc, ATH_DBG_FATAL,
1492 "%s: Unknown AMPDU action\n", __func__);
1493 }
1494
1495 return ret;
1496 }
1497
1498 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1499 {
1500 return -EOPNOTSUPP;
1501 }
1502
1503 static struct ieee80211_ops ath9k_ops = {
1504 .tx = ath9k_tx,
1505 .start = ath9k_start,
1506 .stop = ath9k_stop,
1507 .add_interface = ath9k_add_interface,
1508 .remove_interface = ath9k_remove_interface,
1509 .config = ath9k_config,
1510 .config_interface = ath9k_config_interface,
1511 .configure_filter = ath9k_configure_filter,
1512 .sta_notify = ath9k_sta_notify,
1513 .conf_tx = ath9k_conf_tx,
1514 .bss_info_changed = ath9k_bss_info_changed,
1515 .set_key = ath9k_set_key,
1516 .get_tsf = ath9k_get_tsf,
1517 .reset_tsf = ath9k_reset_tsf,
1518 .ampdu_action = ath9k_ampdu_action,
1519 .set_frag_threshold = ath9k_no_fragmentation,
1520 };
1521
1522 static struct {
1523 u32 version;
1524 const char * name;
1525 } ath_mac_bb_names[] = {
1526 { AR_SREV_VERSION_5416_PCI, "5416" },
1527 { AR_SREV_VERSION_5416_PCIE, "5418" },
1528 { AR_SREV_VERSION_9100, "9100" },
1529 { AR_SREV_VERSION_9160, "9160" },
1530 { AR_SREV_VERSION_9280, "9280" },
1531 { AR_SREV_VERSION_9285, "9285" }
1532 };
1533
1534 static struct {
1535 u16 version;
1536 const char * name;
1537 } ath_rf_names[] = {
1538 { 0, "5133" },
1539 { AR_RAD5133_SREV_MAJOR, "5133" },
1540 { AR_RAD5122_SREV_MAJOR, "5122" },
1541 { AR_RAD2133_SREV_MAJOR, "2133" },
1542 { AR_RAD2122_SREV_MAJOR, "2122" }
1543 };
1544
1545 /*
1546 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1547 */
1548
1549 static const char *
1550 ath_mac_bb_name(u32 mac_bb_version)
1551 {
1552 int i;
1553
1554 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1555 if (ath_mac_bb_names[i].version == mac_bb_version) {
1556 return ath_mac_bb_names[i].name;
1557 }
1558 }
1559
1560 return "????";
1561 }
1562
1563 /*
1564 * Return the RF name. "????" is returned if the RF is unknown.
1565 */
1566
1567 static const char *
1568 ath_rf_name(u16 rf_version)
1569 {
1570 int i;
1571
1572 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1573 if (ath_rf_names[i].version == rf_version) {
1574 return ath_rf_names[i].name;
1575 }
1576 }
1577
1578 return "????";
1579 }
1580
1581 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1582 {
1583 void __iomem *mem;
1584 struct ath_softc *sc;
1585 struct ieee80211_hw *hw;
1586 u8 csz;
1587 u32 val;
1588 int ret = 0;
1589 struct ath_hal *ah;
1590
1591 if (pci_enable_device(pdev))
1592 return -EIO;
1593
1594 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1595 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
1596 ret = -ENODEV;
1597 goto bad;
1598 }
1599
1600 /*
1601 * Cache line size is used to size and align various
1602 * structures used to communicate with the hardware.
1603 */
1604 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1605 if (csz == 0) {
1606 /*
1607 * Linux 2.4.18 (at least) writes the cache line size
1608 * register as a 16-bit wide register which is wrong.
1609 * We must have this setup properly for rx buffer
1610 * DMA to work so force a reasonable value here if it
1611 * comes up zero.
1612 */
1613 csz = L1_CACHE_BYTES / sizeof(u32);
1614 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1615 }
1616 /*
1617 * The default setting of latency timer yields poor results,
1618 * set it to the value used by other systems. It may be worth
1619 * tweaking this setting more.
1620 */
1621 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1622
1623 pci_set_master(pdev);
1624
1625 /*
1626 * Disable the RETRY_TIMEOUT register (0x41) to keep
1627 * PCI Tx retries from interfering with C3 CPU state.
1628 */
1629 pci_read_config_dword(pdev, 0x40, &val);
1630 if ((val & 0x0000ff00) != 0)
1631 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1632
1633 ret = pci_request_region(pdev, 0, "ath9k");
1634 if (ret) {
1635 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1636 ret = -ENODEV;
1637 goto bad;
1638 }
1639
1640 mem = pci_iomap(pdev, 0, 0);
1641 if (!mem) {
1642 printk(KERN_ERR "PCI memory map error\n") ;
1643 ret = -EIO;
1644 goto bad1;
1645 }
1646
1647 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1648 if (hw == NULL) {
1649 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1650 goto bad2;
1651 }
1652
1653 SET_IEEE80211_DEV(hw, &pdev->dev);
1654 pci_set_drvdata(pdev, hw);
1655
1656 sc = hw->priv;
1657 sc->hw = hw;
1658 sc->pdev = pdev;
1659 sc->mem = mem;
1660
1661 if (ath_attach(id->device, sc) != 0) {
1662 ret = -ENODEV;
1663 goto bad3;
1664 }
1665
1666 /* setup interrupt service routine */
1667
1668 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1669 printk(KERN_ERR "%s: request_irq failed\n",
1670 wiphy_name(hw->wiphy));
1671 ret = -EIO;
1672 goto bad4;
1673 }
1674
1675 ah = sc->sc_ah;
1676 printk(KERN_INFO
1677 "%s: Atheros AR%s MAC/BB Rev:%x "
1678 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
1679 wiphy_name(hw->wiphy),
1680 ath_mac_bb_name(ah->ah_macVersion),
1681 ah->ah_macRev,
1682 ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1683 ah->ah_phyRev,
1684 (unsigned long)mem, pdev->irq);
1685
1686 return 0;
1687 bad4:
1688 ath_detach(sc);
1689 bad3:
1690 ieee80211_free_hw(hw);
1691 bad2:
1692 pci_iounmap(pdev, mem);
1693 bad1:
1694 pci_release_region(pdev, 0);
1695 bad:
1696 pci_disable_device(pdev);
1697 return ret;
1698 }
1699
1700 static void ath_pci_remove(struct pci_dev *pdev)
1701 {
1702 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1703 struct ath_softc *sc = hw->priv;
1704
1705 ath_detach(sc);
1706 if (pdev->irq)
1707 free_irq(pdev->irq, sc);
1708 pci_iounmap(pdev, sc->mem);
1709 pci_release_region(pdev, 0);
1710 pci_disable_device(pdev);
1711 ieee80211_free_hw(hw);
1712 }
1713
1714 #ifdef CONFIG_PM
1715
1716 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1717 {
1718 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1719 struct ath_softc *sc = hw->priv;
1720
1721 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1722
1723 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1724 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1725 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1726 #endif
1727
1728 pci_save_state(pdev);
1729 pci_disable_device(pdev);
1730 pci_set_power_state(pdev, 3);
1731
1732 return 0;
1733 }
1734
1735 static int ath_pci_resume(struct pci_dev *pdev)
1736 {
1737 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1738 struct ath_softc *sc = hw->priv;
1739 u32 val;
1740 int err;
1741
1742 err = pci_enable_device(pdev);
1743 if (err)
1744 return err;
1745 pci_restore_state(pdev);
1746 /*
1747 * Suspend/Resume resets the PCI configuration space, so we have to
1748 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1749 * PCI Tx retries from interfering with C3 CPU state
1750 */
1751 pci_read_config_dword(pdev, 0x40, &val);
1752 if ((val & 0x0000ff00) != 0)
1753 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1754
1755 /* Enable LED */
1756 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1757 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1758 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1759
1760 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1761 /*
1762 * check the h/w rfkill state on resume
1763 * and start the rfkill poll timer
1764 */
1765 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1766 queue_delayed_work(sc->hw->workqueue,
1767 &sc->rf_kill.rfkill_poll, 0);
1768 #endif
1769
1770 return 0;
1771 }
1772
1773 #endif /* CONFIG_PM */
1774
1775 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1776
1777 static struct pci_driver ath_pci_driver = {
1778 .name = "ath9k",
1779 .id_table = ath_pci_id_table,
1780 .probe = ath_pci_probe,
1781 .remove = ath_pci_remove,
1782 #ifdef CONFIG_PM
1783 .suspend = ath_pci_suspend,
1784 .resume = ath_pci_resume,
1785 #endif /* CONFIG_PM */
1786 };
1787
1788 static int __init init_ath_pci(void)
1789 {
1790 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1791
1792 if (pci_register_driver(&ath_pci_driver) < 0) {
1793 printk(KERN_ERR
1794 "ath_pci: No devices found, driver not installed.\n");
1795 pci_unregister_driver(&ath_pci_driver);
1796 return -ENODEV;
1797 }
1798
1799 return 0;
1800 }
1801 module_init(init_ath_pci);
1802
1803 static void __exit exit_ath_pci(void)
1804 {
1805 pci_unregister_driver(&ath_pci_driver);
1806 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1807 }
1808 module_exit(exit_ath_pci);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree