[PATCH] PCI: use the MCFG table to properly access pci devices (x86-64)
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86_64 / pci / mmconfig.c
blob657e88aa09022ba67df0fcc8dca7d20e44ecef53
1 /*
2 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
3 *
4 * This is an 64bit optimized version that always keeps the full mmconfig
5 * space mapped. This allows lockless config space operation.
6 */
8 #include <linux/pci.h>
9 #include <linux/init.h>
10 #include <linux/acpi.h>
11 #include "pci.h"
13 #define MMCONFIG_APER_SIZE (256*1024*1024)
15 /* Static virtual mapping of the MMCONFIG aperture */
16 struct mmcfg_virt {
17 struct acpi_table_mcfg_config *cfg;
18 char *virt;
20 static struct mmcfg_virt *pci_mmcfg_virt;
22 static char *get_virt(unsigned int seg, int bus)
24 int cfg_num = -1;
25 struct acpi_table_mcfg_config *cfg;
27 while (1) {
28 ++cfg_num;
29 if (cfg_num >= pci_mmcfg_config_num) {
30 /* something bad is going on, no cfg table is found. */
31 /* so we fall back to the old way we used to do this */
32 /* and just rely on the first entry to be correct. */
33 return pci_mmcfg_virt[0].virt;
35 cfg = pci_mmcfg_virt[cfg_num].cfg;
36 if (cfg->pci_segment_group_number != seg)
37 continue;
38 if ((cfg->start_bus_number <= bus) &&
39 (cfg->end_bus_number >= bus))
40 return pci_mmcfg_virt[cfg_num].virt;
44 static inline char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
47 return get_virt(seg, bus) + ((bus << 20) | (devfn << 12));
50 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
51 unsigned int devfn, int reg, int len, u32 *value)
53 char *addr = pci_dev_base(seg, bus, devfn);
55 if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
56 return -EINVAL;
58 switch (len) {
59 case 1:
60 *value = readb(addr + reg);
61 break;
62 case 2:
63 *value = readw(addr + reg);
64 break;
65 case 4:
66 *value = readl(addr + reg);
67 break;
70 return 0;
73 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
74 unsigned int devfn, int reg, int len, u32 value)
76 char *addr = pci_dev_base(seg, bus, devfn);
78 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
79 return -EINVAL;
81 switch (len) {
82 case 1:
83 writeb(value, addr + reg);
84 break;
85 case 2:
86 writew(value, addr + reg);
87 break;
88 case 4:
89 writel(value, addr + reg);
90 break;
93 return 0;
96 static struct pci_raw_ops pci_mmcfg = {
97 .read = pci_mmcfg_read,
98 .write = pci_mmcfg_write,
101 static int __init pci_mmcfg_init(void)
103 int i;
105 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
106 return 0;
108 acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
109 if ((pci_mmcfg_config_num == 0) ||
110 (pci_mmcfg_config == NULL) ||
111 (pci_mmcfg_config[0].base_address == 0))
112 return 0;
114 /* Kludge for now. Don't use mmconfig on AMD systems because
115 those have some busses where mmconfig doesn't work,
116 and we don't parse ACPI MCFG well enough to handle that.
117 Remove when proper handling is added. */
118 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
119 return 0;
121 /* RED-PEN i386 doesn't do _nocache right now */
122 pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL);
123 if (pci_mmcfg_virt == NULL) {
124 printk("PCI: Can not allocate memory for mmconfig structures\n");
125 return 0;
127 for (i = 0; i < pci_mmcfg_config_num; ++i) {
128 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
129 pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address, MMCONFIG_APER_SIZE);
130 if (!pci_mmcfg_virt[i].virt) {
131 printk("PCI: Cannot map mmconfig aperture for segment %d\n",
132 pci_mmcfg_config[i].pci_segment_group_number);
133 return 0;
135 printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address);
138 raw_pci_ops = &pci_mmcfg;
139 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
141 return 0;
144 arch_initcall(pci_mmcfg_init);