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usb-xhci: Handle COMP_TX_ERR for isoc tds
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / hpsa.c
blob58f99f44bd056515d4477bf1cbe1690c5ea08b55
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/seq_file.h>
33 #include <linux/init.h>
34 #include <linux/spinlock.h>
35 #include <linux/compat.h>
36 #include <linux/blktrace_api.h>
37 #include <linux/uaccess.h>
38 #include <linux/io.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/completion.h>
41 #include <linux/moduleparam.h>
42 #include <scsi/scsi.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <scsi/scsi_device.h>
45 #include <scsi/scsi_host.h>
46 #include <scsi/scsi_tcq.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <asm/atomic.h>
51 #include <linux/kthread.h>
52 #include "hpsa_cmd.h"
53 #include "hpsa.h"
54
55 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
56 #define HPSA_DRIVER_VERSION "2.0.2-1"
57 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
58
59 /* How long to wait (in milliseconds) for board to go into simple mode */
60 #define MAX_CONFIG_WAIT 30000
61 #define MAX_IOCTL_CONFIG_WAIT 1000
62
63 /*define how many times we will try a command because of bus resets */
64 #define MAX_CMD_RETRIES 3
65
66 /* Embedded module documentation macros - see modules.h */
67 MODULE_AUTHOR("Hewlett-Packard Company");
68 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
69 HPSA_DRIVER_VERSION);
70 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
71 MODULE_VERSION(HPSA_DRIVER_VERSION);
72 MODULE_LICENSE("GPL");
73
74 static int hpsa_allow_any;
75 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
76 MODULE_PARM_DESC(hpsa_allow_any,
77 "Allow hpsa driver to access unknown HP Smart Array hardware");
78 static int hpsa_simple_mode;
79 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
80 MODULE_PARM_DESC(hpsa_simple_mode,
81 "Use 'simple mode' rather than 'performant mode'");
82
83 /* define the PCI info for the cards we can control */
84 static const struct pci_device_id hpsa_pci_device_id[] = {
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
100 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
101 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
102 {0,}
103 };
104
105 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
106
107 /* board_id = Subsystem Device ID & Vendor ID
108 * product = Marketing Name for the board
109 * access = Address of the struct of function pointers
110 */
111 static struct board_type products[] = {
112 {0x3241103C, "Smart Array P212", &SA5_access},
113 {0x3243103C, "Smart Array P410", &SA5_access},
114 {0x3245103C, "Smart Array P410i", &SA5_access},
115 {0x3247103C, "Smart Array P411", &SA5_access},
116 {0x3249103C, "Smart Array P812", &SA5_access},
117 {0x324a103C, "Smart Array P712m", &SA5_access},
118 {0x324b103C, "Smart Array P711m", &SA5_access},
119 {0x3350103C, "Smart Array", &SA5_access},
120 {0x3351103C, "Smart Array", &SA5_access},
121 {0x3352103C, "Smart Array", &SA5_access},
122 {0x3353103C, "Smart Array", &SA5_access},
123 {0x3354103C, "Smart Array", &SA5_access},
124 {0x3355103C, "Smart Array", &SA5_access},
125 {0x3356103C, "Smart Array", &SA5_access},
126 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
127 };
128
129 static int number_of_controllers;
130
131 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
132 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
133 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
134 static void start_io(struct ctlr_info *h);
135
136 #ifdef CONFIG_COMPAT
137 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
138 #endif
139
140 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
141 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
142 static struct CommandList *cmd_alloc(struct ctlr_info *h);
143 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
144 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
145 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
146 int cmd_type);
147
148 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
149 static void hpsa_scan_start(struct Scsi_Host *);
150 static int hpsa_scan_finished(struct Scsi_Host *sh,
151 unsigned long elapsed_time);
152 static int hpsa_change_queue_depth(struct scsi_device *sdev,
153 int qdepth, int reason);
154
155 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
156 static int hpsa_slave_alloc(struct scsi_device *sdev);
157 static void hpsa_slave_destroy(struct scsi_device *sdev);
158
159 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
160 static int check_for_unit_attention(struct ctlr_info *h,
161 struct CommandList *c);
162 static void check_ioctl_unit_attention(struct ctlr_info *h,
163 struct CommandList *c);
164 /* performant mode helper functions */
165 static void calc_bucket_map(int *bucket, int num_buckets,
166 int nsgs, int *bucket_map);
167 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
168 static inline u32 next_command(struct ctlr_info *h);
169 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
170 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
171 u64 *cfg_offset);
172 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
173 unsigned long *memory_bar);
174 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
175 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
176 void __iomem *vaddr, int wait_for_ready);
177 #define BOARD_NOT_READY 0
178 #define BOARD_READY 1
179
180 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
181 {
182 unsigned long *priv = shost_priv(sdev->host);
183 return (struct ctlr_info *) *priv;
184 }
185
186 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
187 {
188 unsigned long *priv = shost_priv(sh);
189 return (struct ctlr_info *) *priv;
190 }
191
192 static int check_for_unit_attention(struct ctlr_info *h,
193 struct CommandList *c)
194 {
195 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
196 return 0;
197
198 switch (c->err_info->SenseInfo[12]) {
199 case STATE_CHANGED:
200 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
201 "detected, command retried\n", h->ctlr);
202 break;
203 case LUN_FAILED:
204 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
205 "detected, action required\n", h->ctlr);
206 break;
207 case REPORT_LUNS_CHANGED:
208 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
209 "changed, action required\n", h->ctlr);
210 /*
211 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
212 */
213 break;
214 case POWER_OR_RESET:
215 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
216 "or device reset detected\n", h->ctlr);
217 break;
218 case UNIT_ATTENTION_CLEARED:
219 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
220 "cleared by another initiator\n", h->ctlr);
221 break;
222 default:
223 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
224 "unit attention detected\n", h->ctlr);
225 break;
226 }
227 return 1;
228 }
229
230 static ssize_t host_store_rescan(struct device *dev,
231 struct device_attribute *attr,
232 const char *buf, size_t count)
233 {
234 struct ctlr_info *h;
235 struct Scsi_Host *shost = class_to_shost(dev);
236 h = shost_to_hba(shost);
237 hpsa_scan_start(h->scsi_host);
238 return count;
239 }
240
241 static ssize_t host_show_firmware_revision(struct device *dev,
242 struct device_attribute *attr, char *buf)
243 {
244 struct ctlr_info *h;
245 struct Scsi_Host *shost = class_to_shost(dev);
246 unsigned char *fwrev;
247
248 h = shost_to_hba(shost);
249 if (!h->hba_inquiry_data)
250 return 0;
251 fwrev = &h->hba_inquiry_data[32];
252 return snprintf(buf, 20, "%c%c%c%c\n",
253 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
254 }
255
256 static ssize_t host_show_commands_outstanding(struct device *dev,
257 struct device_attribute *attr, char *buf)
258 {
259 struct Scsi_Host *shost = class_to_shost(dev);
260 struct ctlr_info *h = shost_to_hba(shost);
261
262 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
263 }
264
265 static ssize_t host_show_transport_mode(struct device *dev,
266 struct device_attribute *attr, char *buf)
267 {
268 struct ctlr_info *h;
269 struct Scsi_Host *shost = class_to_shost(dev);
270
271 h = shost_to_hba(shost);
272 return snprintf(buf, 20, "%s\n",
273 h->transMethod & CFGTBL_Trans_Performant ?
274 "performant" : "simple");
275 }
276
277 /* List of controllers which cannot be hard reset on kexec with reset_devices */
278 static u32 unresettable_controller[] = {
279 0x324a103C, /* Smart Array P712m */
280 0x324b103C, /* SmartArray P711m */
281 0x3223103C, /* Smart Array P800 */
282 0x3234103C, /* Smart Array P400 */
283 0x3235103C, /* Smart Array P400i */
284 0x3211103C, /* Smart Array E200i */
285 0x3212103C, /* Smart Array E200 */
286 0x3213103C, /* Smart Array E200i */
287 0x3214103C, /* Smart Array E200i */
288 0x3215103C, /* Smart Array E200i */
289 0x3237103C, /* Smart Array E500 */
290 0x323D103C, /* Smart Array P700m */
291 0x409C0E11, /* Smart Array 6400 */
292 0x409D0E11, /* Smart Array 6400 EM */
293 };
294
295 /* List of controllers which cannot even be soft reset */
296 static u32 soft_unresettable_controller[] = {
297 /* Exclude 640x boards. These are two pci devices in one slot
298 * which share a battery backed cache module. One controls the
299 * cache, the other accesses the cache through the one that controls
300 * it. If we reset the one controlling the cache, the other will
301 * likely not be happy. Just forbid resetting this conjoined mess.
302 * The 640x isn't really supported by hpsa anyway.
303 */
304 0x409C0E11, /* Smart Array 6400 */
305 0x409D0E11, /* Smart Array 6400 EM */
306 };
307
308 static int ctlr_is_hard_resettable(u32 board_id)
309 {
310 int i;
311
312 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
313 if (unresettable_controller[i] == board_id)
314 return 0;
315 return 1;
316 }
317
318 static int ctlr_is_soft_resettable(u32 board_id)
319 {
320 int i;
321
322 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
323 if (soft_unresettable_controller[i] == board_id)
324 return 0;
325 return 1;
326 }
327
328 static int ctlr_is_resettable(u32 board_id)
329 {
330 return ctlr_is_hard_resettable(board_id) ||
331 ctlr_is_soft_resettable(board_id);
332 }
333
334 static ssize_t host_show_resettable(struct device *dev,
335 struct device_attribute *attr, char *buf)
336 {
337 struct ctlr_info *h;
338 struct Scsi_Host *shost = class_to_shost(dev);
339
340 h = shost_to_hba(shost);
341 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
342 }
343
344 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
345 {
346 return (scsi3addr[3] & 0xC0) == 0x40;
347 }
348
349 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
350 "UNKNOWN"
351 };
352 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
353
354 static ssize_t raid_level_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356 {
357 ssize_t l = 0;
358 unsigned char rlevel;
359 struct ctlr_info *h;
360 struct scsi_device *sdev;
361 struct hpsa_scsi_dev_t *hdev;
362 unsigned long flags;
363
364 sdev = to_scsi_device(dev);
365 h = sdev_to_hba(sdev);
366 spin_lock_irqsave(&h->lock, flags);
367 hdev = sdev->hostdata;
368 if (!hdev) {
369 spin_unlock_irqrestore(&h->lock, flags);
370 return -ENODEV;
371 }
372
373 /* Is this even a logical drive? */
374 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
375 spin_unlock_irqrestore(&h->lock, flags);
376 l = snprintf(buf, PAGE_SIZE, "N/A\n");
377 return l;
378 }
379
380 rlevel = hdev->raid_level;
381 spin_unlock_irqrestore(&h->lock, flags);
382 if (rlevel > RAID_UNKNOWN)
383 rlevel = RAID_UNKNOWN;
384 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
385 return l;
386 }
387
388 static ssize_t lunid_show(struct device *dev,
389 struct device_attribute *attr, char *buf)
390 {
391 struct ctlr_info *h;
392 struct scsi_device *sdev;
393 struct hpsa_scsi_dev_t *hdev;
394 unsigned long flags;
395 unsigned char lunid[8];
396
397 sdev = to_scsi_device(dev);
398 h = sdev_to_hba(sdev);
399 spin_lock_irqsave(&h->lock, flags);
400 hdev = sdev->hostdata;
401 if (!hdev) {
402 spin_unlock_irqrestore(&h->lock, flags);
403 return -ENODEV;
404 }
405 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
406 spin_unlock_irqrestore(&h->lock, flags);
407 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
408 lunid[0], lunid[1], lunid[2], lunid[3],
409 lunid[4], lunid[5], lunid[6], lunid[7]);
410 }
411
412 static ssize_t unique_id_show(struct device *dev,
413 struct device_attribute *attr, char *buf)
414 {
415 struct ctlr_info *h;
416 struct scsi_device *sdev;
417 struct hpsa_scsi_dev_t *hdev;
418 unsigned long flags;
419 unsigned char sn[16];
420
421 sdev = to_scsi_device(dev);
422 h = sdev_to_hba(sdev);
423 spin_lock_irqsave(&h->lock, flags);
424 hdev = sdev->hostdata;
425 if (!hdev) {
426 spin_unlock_irqrestore(&h->lock, flags);
427 return -ENODEV;
428 }
429 memcpy(sn, hdev->device_id, sizeof(sn));
430 spin_unlock_irqrestore(&h->lock, flags);
431 return snprintf(buf, 16 * 2 + 2,
432 "%02X%02X%02X%02X%02X%02X%02X%02X"
433 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
434 sn[0], sn[1], sn[2], sn[3],
435 sn[4], sn[5], sn[6], sn[7],
436 sn[8], sn[9], sn[10], sn[11],
437 sn[12], sn[13], sn[14], sn[15]);
438 }
439
440 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
441 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
442 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
443 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
444 static DEVICE_ATTR(firmware_revision, S_IRUGO,
445 host_show_firmware_revision, NULL);
446 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
447 host_show_commands_outstanding, NULL);
448 static DEVICE_ATTR(transport_mode, S_IRUGO,
449 host_show_transport_mode, NULL);
450 static DEVICE_ATTR(resettable, S_IRUGO,
451 host_show_resettable, NULL);
452
453 static struct device_attribute *hpsa_sdev_attrs[] = {
454 &dev_attr_raid_level,
455 &dev_attr_lunid,
456 &dev_attr_unique_id,
457 NULL,
458 };
459
460 static struct device_attribute *hpsa_shost_attrs[] = {
461 &dev_attr_rescan,
462 &dev_attr_firmware_revision,
463 &dev_attr_commands_outstanding,
464 &dev_attr_transport_mode,
465 &dev_attr_resettable,
466 NULL,
467 };
468
469 static struct scsi_host_template hpsa_driver_template = {
470 .module = THIS_MODULE,
471 .name = "hpsa",
472 .proc_name = "hpsa",
473 .queuecommand = hpsa_scsi_queue_command,
474 .scan_start = hpsa_scan_start,
475 .scan_finished = hpsa_scan_finished,
476 .change_queue_depth = hpsa_change_queue_depth,
477 .this_id = -1,
478 .use_clustering = ENABLE_CLUSTERING,
479 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
480 .ioctl = hpsa_ioctl,
481 .slave_alloc = hpsa_slave_alloc,
482 .slave_destroy = hpsa_slave_destroy,
483 #ifdef CONFIG_COMPAT
484 .compat_ioctl = hpsa_compat_ioctl,
485 #endif
486 .sdev_attrs = hpsa_sdev_attrs,
487 .shost_attrs = hpsa_shost_attrs,
488 };
489
490
491 /* Enqueuing and dequeuing functions for cmdlists. */
492 static inline void addQ(struct list_head *list, struct CommandList *c)
493 {
494 list_add_tail(&c->list, list);
495 }
496
497 static inline u32 next_command(struct ctlr_info *h)
498 {
499 u32 a;
500
501 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
502 return h->access.command_completed(h);
503
504 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
505 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
506 (h->reply_pool_head)++;
507 h->commands_outstanding--;
508 } else {
509 a = FIFO_EMPTY;
510 }
511 /* Check for wraparound */
512 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
513 h->reply_pool_head = h->reply_pool;
514 h->reply_pool_wraparound ^= 1;
515 }
516 return a;
517 }
518
519 /* set_performant_mode: Modify the tag for cciss performant
520 * set bit 0 for pull model, bits 3-1 for block fetch
521 * register number
522 */
523 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
524 {
525 if (likely(h->transMethod & CFGTBL_Trans_Performant))
526 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
527 }
528
529 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
530 struct CommandList *c)
531 {
532 unsigned long flags;
533
534 set_performant_mode(h, c);
535 spin_lock_irqsave(&h->lock, flags);
536 addQ(&h->reqQ, c);
537 h->Qdepth++;
538 start_io(h);
539 spin_unlock_irqrestore(&h->lock, flags);
540 }
541
542 static inline void removeQ(struct CommandList *c)
543 {
544 if (WARN_ON(list_empty(&c->list)))
545 return;
546 list_del_init(&c->list);
547 }
548
549 static inline int is_hba_lunid(unsigned char scsi3addr[])
550 {
551 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
552 }
553
554 static inline int is_scsi_rev_5(struct ctlr_info *h)
555 {
556 if (!h->hba_inquiry_data)
557 return 0;
558 if ((h->hba_inquiry_data[2] & 0x07) == 5)
559 return 1;
560 return 0;
561 }
562
563 static int hpsa_find_target_lun(struct ctlr_info *h,
564 unsigned char scsi3addr[], int bus, int *target, int *lun)
565 {
566 /* finds an unused bus, target, lun for a new physical device
567 * assumes h->devlock is held
568 */
569 int i, found = 0;
570 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
571
572 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
573
574 for (i = 0; i < h->ndevices; i++) {
575 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
576 set_bit(h->dev[i]->target, lun_taken);
577 }
578
579 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
580 if (!test_bit(i, lun_taken)) {
581 /* *bus = 1; */
582 *target = i;
583 *lun = 0;
584 found = 1;
585 break;
586 }
587 }
588 return !found;
589 }
590
591 /* Add an entry into h->dev[] array. */
592 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
593 struct hpsa_scsi_dev_t *device,
594 struct hpsa_scsi_dev_t *added[], int *nadded)
595 {
596 /* assumes h->devlock is held */
597 int n = h->ndevices;
598 int i;
599 unsigned char addr1[8], addr2[8];
600 struct hpsa_scsi_dev_t *sd;
601
602 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
603 dev_err(&h->pdev->dev, "too many devices, some will be "
604 "inaccessible.\n");
605 return -1;
606 }
607
608 /* physical devices do not have lun or target assigned until now. */
609 if (device->lun != -1)
610 /* Logical device, lun is already assigned. */
611 goto lun_assigned;
612
613 /* If this device a non-zero lun of a multi-lun device
614 * byte 4 of the 8-byte LUN addr will contain the logical
615 * unit no, zero otherise.
616 */
617 if (device->scsi3addr[4] == 0) {
618 /* This is not a non-zero lun of a multi-lun device */
619 if (hpsa_find_target_lun(h, device->scsi3addr,
620 device->bus, &device->target, &device->lun) != 0)
621 return -1;
622 goto lun_assigned;
623 }
624
625 /* This is a non-zero lun of a multi-lun device.
626 * Search through our list and find the device which
627 * has the same 8 byte LUN address, excepting byte 4.
628 * Assign the same bus and target for this new LUN.
629 * Use the logical unit number from the firmware.
630 */
631 memcpy(addr1, device->scsi3addr, 8);
632 addr1[4] = 0;
633 for (i = 0; i < n; i++) {
634 sd = h->dev[i];
635 memcpy(addr2, sd->scsi3addr, 8);
636 addr2[4] = 0;
637 /* differ only in byte 4? */
638 if (memcmp(addr1, addr2, 8) == 0) {
639 device->bus = sd->bus;
640 device->target = sd->target;
641 device->lun = device->scsi3addr[4];
642 break;
643 }
644 }
645 if (device->lun == -1) {
646 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
647 " suspect firmware bug or unsupported hardware "
648 "configuration.\n");
649 return -1;
650 }
651
652 lun_assigned:
653
654 h->dev[n] = device;
655 h->ndevices++;
656 added[*nadded] = device;
657 (*nadded)++;
658
659 /* initially, (before registering with scsi layer) we don't
660 * know our hostno and we don't want to print anything first
661 * time anyway (the scsi layer's inquiries will show that info)
662 */
663 /* if (hostno != -1) */
664 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
665 scsi_device_type(device->devtype), hostno,
666 device->bus, device->target, device->lun);
667 return 0;
668 }
669
670 /* Replace an entry from h->dev[] array. */
671 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
672 int entry, struct hpsa_scsi_dev_t *new_entry,
673 struct hpsa_scsi_dev_t *added[], int *nadded,
674 struct hpsa_scsi_dev_t *removed[], int *nremoved)
675 {
676 /* assumes h->devlock is held */
677 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
678 removed[*nremoved] = h->dev[entry];
679 (*nremoved)++;
680
681 /*
682 * New physical devices won't have target/lun assigned yet
683 * so we need to preserve the values in the slot we are replacing.
684 */
685 if (new_entry->target == -1) {
686 new_entry->target = h->dev[entry]->target;
687 new_entry->lun = h->dev[entry]->lun;
688 }
689
690 h->dev[entry] = new_entry;
691 added[*nadded] = new_entry;
692 (*nadded)++;
693 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
694 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
695 new_entry->target, new_entry->lun);
696 }
697
698 /* Remove an entry from h->dev[] array. */
699 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
700 struct hpsa_scsi_dev_t *removed[], int *nremoved)
701 {
702 /* assumes h->devlock is held */
703 int i;
704 struct hpsa_scsi_dev_t *sd;
705
706 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
707
708 sd = h->dev[entry];
709 removed[*nremoved] = h->dev[entry];
710 (*nremoved)++;
711
712 for (i = entry; i < h->ndevices-1; i++)
713 h->dev[i] = h->dev[i+1];
714 h->ndevices--;
715 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
716 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
717 sd->lun);
718 }
719
720 #define SCSI3ADDR_EQ(a, b) ( \
721 (a)[7] == (b)[7] && \
722 (a)[6] == (b)[6] && \
723 (a)[5] == (b)[5] && \
724 (a)[4] == (b)[4] && \
725 (a)[3] == (b)[3] && \
726 (a)[2] == (b)[2] && \
727 (a)[1] == (b)[1] && \
728 (a)[0] == (b)[0])
729
730 static void fixup_botched_add(struct ctlr_info *h,
731 struct hpsa_scsi_dev_t *added)
732 {
733 /* called when scsi_add_device fails in order to re-adjust
734 * h->dev[] to match the mid layer's view.
735 */
736 unsigned long flags;
737 int i, j;
738
739 spin_lock_irqsave(&h->lock, flags);
740 for (i = 0; i < h->ndevices; i++) {
741 if (h->dev[i] == added) {
742 for (j = i; j < h->ndevices-1; j++)
743 h->dev[j] = h->dev[j+1];
744 h->ndevices--;
745 break;
746 }
747 }
748 spin_unlock_irqrestore(&h->lock, flags);
749 kfree(added);
750 }
751
752 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
753 struct hpsa_scsi_dev_t *dev2)
754 {
755 /* we compare everything except lun and target as these
756 * are not yet assigned. Compare parts likely
757 * to differ first
758 */
759 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
760 sizeof(dev1->scsi3addr)) != 0)
761 return 0;
762 if (memcmp(dev1->device_id, dev2->device_id,
763 sizeof(dev1->device_id)) != 0)
764 return 0;
765 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
766 return 0;
767 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
768 return 0;
769 if (dev1->devtype != dev2->devtype)
770 return 0;
771 if (dev1->bus != dev2->bus)
772 return 0;
773 return 1;
774 }
775
776 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
777 * and return needle location in *index. If scsi3addr matches, but not
778 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
779 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
780 */
781 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
782 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
783 int *index)
784 {
785 int i;
786 #define DEVICE_NOT_FOUND 0
787 #define DEVICE_CHANGED 1
788 #define DEVICE_SAME 2
789 for (i = 0; i < haystack_size; i++) {
790 if (haystack[i] == NULL) /* previously removed. */
791 continue;
792 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
793 *index = i;
794 if (device_is_the_same(needle, haystack[i]))
795 return DEVICE_SAME;
796 else
797 return DEVICE_CHANGED;
798 }
799 }
800 *index = -1;
801 return DEVICE_NOT_FOUND;
802 }
803
804 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
805 struct hpsa_scsi_dev_t *sd[], int nsds)
806 {
807 /* sd contains scsi3 addresses and devtypes, and inquiry
808 * data. This function takes what's in sd to be the current
809 * reality and updates h->dev[] to reflect that reality.
810 */
811 int i, entry, device_change, changes = 0;
812 struct hpsa_scsi_dev_t *csd;
813 unsigned long flags;
814 struct hpsa_scsi_dev_t **added, **removed;
815 int nadded, nremoved;
816 struct Scsi_Host *sh = NULL;
817
818 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
819 GFP_KERNEL);
820 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
821 GFP_KERNEL);
822
823 if (!added || !removed) {
824 dev_warn(&h->pdev->dev, "out of memory in "
825 "adjust_hpsa_scsi_table\n");
826 goto free_and_out;
827 }
828
829 spin_lock_irqsave(&h->devlock, flags);
830
831 /* find any devices in h->dev[] that are not in
832 * sd[] and remove them from h->dev[], and for any
833 * devices which have changed, remove the old device
834 * info and add the new device info.
835 */
836 i = 0;
837 nremoved = 0;
838 nadded = 0;
839 while (i < h->ndevices) {
840 csd = h->dev[i];
841 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
842 if (device_change == DEVICE_NOT_FOUND) {
843 changes++;
844 hpsa_scsi_remove_entry(h, hostno, i,
845 removed, &nremoved);
846 continue; /* remove ^^^, hence i not incremented */
847 } else if (device_change == DEVICE_CHANGED) {
848 changes++;
849 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
850 added, &nadded, removed, &nremoved);
851 /* Set it to NULL to prevent it from being freed
852 * at the bottom of hpsa_update_scsi_devices()
853 */
854 sd[entry] = NULL;
855 }
856 i++;
857 }
858
859 /* Now, make sure every device listed in sd[] is also
860 * listed in h->dev[], adding them if they aren't found
861 */
862
863 for (i = 0; i < nsds; i++) {
864 if (!sd[i]) /* if already added above. */
865 continue;
866 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
867 h->ndevices, &entry);
868 if (device_change == DEVICE_NOT_FOUND) {
869 changes++;
870 if (hpsa_scsi_add_entry(h, hostno, sd[i],
871 added, &nadded) != 0)
872 break;
873 sd[i] = NULL; /* prevent from being freed later. */
874 } else if (device_change == DEVICE_CHANGED) {
875 /* should never happen... */
876 changes++;
877 dev_warn(&h->pdev->dev,
878 "device unexpectedly changed.\n");
879 /* but if it does happen, we just ignore that device */
880 }
881 }
882 spin_unlock_irqrestore(&h->devlock, flags);
883
884 /* Don't notify scsi mid layer of any changes the first time through
885 * (or if there are no changes) scsi_scan_host will do it later the
886 * first time through.
887 */
888 if (hostno == -1 || !changes)
889 goto free_and_out;
890
891 sh = h->scsi_host;
892 /* Notify scsi mid layer of any removed devices */
893 for (i = 0; i < nremoved; i++) {
894 struct scsi_device *sdev =
895 scsi_device_lookup(sh, removed[i]->bus,
896 removed[i]->target, removed[i]->lun);
897 if (sdev != NULL) {
898 scsi_remove_device(sdev);
899 scsi_device_put(sdev);
900 } else {
901 /* We don't expect to get here.
902 * future cmds to this device will get selection
903 * timeout as if the device was gone.
904 */
905 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
906 " for removal.", hostno, removed[i]->bus,
907 removed[i]->target, removed[i]->lun);
908 }
909 kfree(removed[i]);
910 removed[i] = NULL;
911 }
912
913 /* Notify scsi mid layer of any added devices */
914 for (i = 0; i < nadded; i++) {
915 if (scsi_add_device(sh, added[i]->bus,
916 added[i]->target, added[i]->lun) == 0)
917 continue;
918 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
919 "device not added.\n", hostno, added[i]->bus,
920 added[i]->target, added[i]->lun);
921 /* now we have to remove it from h->dev,
922 * since it didn't get added to scsi mid layer
923 */
924 fixup_botched_add(h, added[i]);
925 }
926
927 free_and_out:
928 kfree(added);
929 kfree(removed);
930 }
931
932 /*
933 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
934 * Assume's h->devlock is held.
935 */
936 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
937 int bus, int target, int lun)
938 {
939 int i;
940 struct hpsa_scsi_dev_t *sd;
941
942 for (i = 0; i < h->ndevices; i++) {
943 sd = h->dev[i];
944 if (sd->bus == bus && sd->target == target && sd->lun == lun)
945 return sd;
946 }
947 return NULL;
948 }
949
950 /* link sdev->hostdata to our per-device structure. */
951 static int hpsa_slave_alloc(struct scsi_device *sdev)
952 {
953 struct hpsa_scsi_dev_t *sd;
954 unsigned long flags;
955 struct ctlr_info *h;
956
957 h = sdev_to_hba(sdev);
958 spin_lock_irqsave(&h->devlock, flags);
959 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
960 sdev_id(sdev), sdev->lun);
961 if (sd != NULL)
962 sdev->hostdata = sd;
963 spin_unlock_irqrestore(&h->devlock, flags);
964 return 0;
965 }
966
967 static void hpsa_slave_destroy(struct scsi_device *sdev)
968 {
969 /* nothing to do. */
970 }
971
972 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
973 {
974 int i;
975
976 if (!h->cmd_sg_list)
977 return;
978 for (i = 0; i < h->nr_cmds; i++) {
979 kfree(h->cmd_sg_list[i]);
980 h->cmd_sg_list[i] = NULL;
981 }
982 kfree(h->cmd_sg_list);
983 h->cmd_sg_list = NULL;
984 }
985
986 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
987 {
988 int i;
989
990 if (h->chainsize <= 0)
991 return 0;
992
993 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
994 GFP_KERNEL);
995 if (!h->cmd_sg_list)
996 return -ENOMEM;
997 for (i = 0; i < h->nr_cmds; i++) {
998 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
999 h->chainsize, GFP_KERNEL);
1000 if (!h->cmd_sg_list[i])
1001 goto clean;
1002 }
1003 return 0;
1004
1005 clean:
1006 hpsa_free_sg_chain_blocks(h);
1007 return -ENOMEM;
1008 }
1009
1010 static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1011 struct CommandList *c)
1012 {
1013 struct SGDescriptor *chain_sg, *chain_block;
1014 u64 temp64;
1015
1016 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1017 chain_block = h->cmd_sg_list[c->cmdindex];
1018 chain_sg->Ext = HPSA_SG_CHAIN;
1019 chain_sg->Len = sizeof(*chain_sg) *
1020 (c->Header.SGTotal - h->max_cmd_sg_entries);
1021 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1022 PCI_DMA_TODEVICE);
1023 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1024 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1025 }
1026
1027 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1028 struct CommandList *c)
1029 {
1030 struct SGDescriptor *chain_sg;
1031 union u64bit temp64;
1032
1033 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1034 return;
1035
1036 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1037 temp64.val32.lower = chain_sg->Addr.lower;
1038 temp64.val32.upper = chain_sg->Addr.upper;
1039 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1040 }
1041
1042 static void complete_scsi_command(struct CommandList *cp)
1043 {
1044 struct scsi_cmnd *cmd;
1045 struct ctlr_info *h;
1046 struct ErrorInfo *ei;
1047
1048 unsigned char sense_key;
1049 unsigned char asc; /* additional sense code */
1050 unsigned char ascq; /* additional sense code qualifier */
1051 unsigned long sense_data_size;
1052
1053 ei = cp->err_info;
1054 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1055 h = cp->h;
1056
1057 scsi_dma_unmap(cmd); /* undo the DMA mappings */
1058 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1059 hpsa_unmap_sg_chain_block(h, cp);
1060
1061 cmd->result = (DID_OK << 16); /* host byte */
1062 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1063 cmd->result |= ei->ScsiStatus;
1064
1065 /* copy the sense data whether we need to or not. */
1066 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1067 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1068 else
1069 sense_data_size = sizeof(ei->SenseInfo);
1070 if (ei->SenseLen < sense_data_size)
1071 sense_data_size = ei->SenseLen;
1072
1073 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1074 scsi_set_resid(cmd, ei->ResidualCnt);
1075
1076 if (ei->CommandStatus == 0) {
1077 cmd->scsi_done(cmd);
1078 cmd_free(h, cp);
1079 return;
1080 }
1081
1082 /* an error has occurred */
1083 switch (ei->CommandStatus) {
1084
1085 case CMD_TARGET_STATUS:
1086 if (ei->ScsiStatus) {
1087 /* Get sense key */
1088 sense_key = 0xf & ei->SenseInfo[2];
1089 /* Get additional sense code */
1090 asc = ei->SenseInfo[12];
1091 /* Get addition sense code qualifier */
1092 ascq = ei->SenseInfo[13];
1093 }
1094
1095 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1096 if (check_for_unit_attention(h, cp)) {
1097 cmd->result = DID_SOFT_ERROR << 16;
1098 break;
1099 }
1100 if (sense_key == ILLEGAL_REQUEST) {
1101 /*
1102 * SCSI REPORT_LUNS is commonly unsupported on
1103 * Smart Array. Suppress noisy complaint.
1104 */
1105 if (cp->Request.CDB[0] == REPORT_LUNS)
1106 break;
1107
1108 /* If ASC/ASCQ indicate Logical Unit
1109 * Not Supported condition,
1110 */
1111 if ((asc == 0x25) && (ascq == 0x0)) {
1112 dev_warn(&h->pdev->dev, "cp %p "
1113 "has check condition\n", cp);
1114 break;
1115 }
1116 }
1117
1118 if (sense_key == NOT_READY) {
1119 /* If Sense is Not Ready, Logical Unit
1120 * Not ready, Manual Intervention
1121 * required
1122 */
1123 if ((asc == 0x04) && (ascq == 0x03)) {
1124 dev_warn(&h->pdev->dev, "cp %p "
1125 "has check condition: unit "
1126 "not ready, manual "
1127 "intervention required\n", cp);
1128 break;
1129 }
1130 }
1131 if (sense_key == ABORTED_COMMAND) {
1132 /* Aborted command is retryable */
1133 dev_warn(&h->pdev->dev, "cp %p "
1134 "has check condition: aborted command: "
1135 "ASC: 0x%x, ASCQ: 0x%x\n",
1136 cp, asc, ascq);
1137 cmd->result = DID_SOFT_ERROR << 16;
1138 break;
1139 }
1140 /* Must be some other type of check condition */
1141 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1142 "unknown type: "
1143 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1144 "Returning result: 0x%x, "
1145 "cmd=[%02x %02x %02x %02x %02x "
1146 "%02x %02x %02x %02x %02x %02x "
1147 "%02x %02x %02x %02x %02x]\n",
1148 cp, sense_key, asc, ascq,
1149 cmd->result,
1150 cmd->cmnd[0], cmd->cmnd[1],
1151 cmd->cmnd[2], cmd->cmnd[3],
1152 cmd->cmnd[4], cmd->cmnd[5],
1153 cmd->cmnd[6], cmd->cmnd[7],
1154 cmd->cmnd[8], cmd->cmnd[9],
1155 cmd->cmnd[10], cmd->cmnd[11],
1156 cmd->cmnd[12], cmd->cmnd[13],
1157 cmd->cmnd[14], cmd->cmnd[15]);
1158 break;
1159 }
1160
1161
1162 /* Problem was not a check condition
1163 * Pass it up to the upper layers...
1164 */
1165 if (ei->ScsiStatus) {
1166 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1167 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1168 "Returning result: 0x%x\n",
1169 cp, ei->ScsiStatus,
1170 sense_key, asc, ascq,
1171 cmd->result);
1172 } else { /* scsi status is zero??? How??? */
1173 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1174 "Returning no connection.\n", cp),
1175
1176 /* Ordinarily, this case should never happen,
1177 * but there is a bug in some released firmware
1178 * revisions that allows it to happen if, for
1179 * example, a 4100 backplane loses power and
1180 * the tape drive is in it. We assume that
1181 * it's a fatal error of some kind because we
1182 * can't show that it wasn't. We will make it
1183 * look like selection timeout since that is
1184 * the most common reason for this to occur,
1185 * and it's severe enough.
1186 */
1187
1188 cmd->result = DID_NO_CONNECT << 16;
1189 }
1190 break;
1191
1192 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1193 break;
1194 case CMD_DATA_OVERRUN:
1195 dev_warn(&h->pdev->dev, "cp %p has"
1196 " completed with data overrun "
1197 "reported\n", cp);
1198 break;
1199 case CMD_INVALID: {
1200 /* print_bytes(cp, sizeof(*cp), 1, 0);
1201 print_cmd(cp); */
1202 /* We get CMD_INVALID if you address a non-existent device
1203 * instead of a selection timeout (no response). You will
1204 * see this if you yank out a drive, then try to access it.
1205 * This is kind of a shame because it means that any other
1206 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1207 * missing target. */
1208 cmd->result = DID_NO_CONNECT << 16;
1209 }
1210 break;
1211 case CMD_PROTOCOL_ERR:
1212 dev_warn(&h->pdev->dev, "cp %p has "
1213 "protocol error \n", cp);
1214 break;
1215 case CMD_HARDWARE_ERR:
1216 cmd->result = DID_ERROR << 16;
1217 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1218 break;
1219 case CMD_CONNECTION_LOST:
1220 cmd->result = DID_ERROR << 16;
1221 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1222 break;
1223 case CMD_ABORTED:
1224 cmd->result = DID_ABORT << 16;
1225 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1226 cp, ei->ScsiStatus);
1227 break;
1228 case CMD_ABORT_FAILED:
1229 cmd->result = DID_ERROR << 16;
1230 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1231 break;
1232 case CMD_UNSOLICITED_ABORT:
1233 cmd->result = DID_RESET << 16;
1234 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1235 "abort\n", cp);
1236 break;
1237 case CMD_TIMEOUT:
1238 cmd->result = DID_TIME_OUT << 16;
1239 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1240 break;
1241 case CMD_UNABORTABLE:
1242 cmd->result = DID_ERROR << 16;
1243 dev_warn(&h->pdev->dev, "Command unabortable\n");
1244 break;
1245 default:
1246 cmd->result = DID_ERROR << 16;
1247 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1248 cp, ei->CommandStatus);
1249 }
1250 cmd->scsi_done(cmd);
1251 cmd_free(h, cp);
1252 }
1253
1254 static int hpsa_scsi_detect(struct ctlr_info *h)
1255 {
1256 struct Scsi_Host *sh;
1257 int error;
1258
1259 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1260 if (sh == NULL)
1261 goto fail;
1262
1263 sh->io_port = 0;
1264 sh->n_io_port = 0;
1265 sh->this_id = -1;
1266 sh->max_channel = 3;
1267 sh->max_cmd_len = MAX_COMMAND_SIZE;
1268 sh->max_lun = HPSA_MAX_LUN;
1269 sh->max_id = HPSA_MAX_LUN;
1270 sh->can_queue = h->nr_cmds;
1271 sh->cmd_per_lun = h->nr_cmds;
1272 sh->sg_tablesize = h->maxsgentries;
1273 h->scsi_host = sh;
1274 sh->hostdata[0] = (unsigned long) h;
1275 sh->irq = h->intr[h->intr_mode];
1276 sh->unique_id = sh->irq;
1277 error = scsi_add_host(sh, &h->pdev->dev);
1278 if (error)
1279 goto fail_host_put;
1280 scsi_scan_host(sh);
1281 return 0;
1282
1283 fail_host_put:
1284 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1285 " failed for controller %d\n", h->ctlr);
1286 scsi_host_put(sh);
1287 return error;
1288 fail:
1289 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1290 " failed for controller %d\n", h->ctlr);
1291 return -ENOMEM;
1292 }
1293
1294 static void hpsa_pci_unmap(struct pci_dev *pdev,
1295 struct CommandList *c, int sg_used, int data_direction)
1296 {
1297 int i;
1298 union u64bit addr64;
1299
1300 for (i = 0; i < sg_used; i++) {
1301 addr64.val32.lower = c->SG[i].Addr.lower;
1302 addr64.val32.upper = c->SG[i].Addr.upper;
1303 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1304 data_direction);
1305 }
1306 }
1307
1308 static void hpsa_map_one(struct pci_dev *pdev,
1309 struct CommandList *cp,
1310 unsigned char *buf,
1311 size_t buflen,
1312 int data_direction)
1313 {
1314 u64 addr64;
1315
1316 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1317 cp->Header.SGList = 0;
1318 cp->Header.SGTotal = 0;
1319 return;
1320 }
1321
1322 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1323 cp->SG[0].Addr.lower =
1324 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1325 cp->SG[0].Addr.upper =
1326 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1327 cp->SG[0].Len = buflen;
1328 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1329 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1330 }
1331
1332 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1333 struct CommandList *c)
1334 {
1335 DECLARE_COMPLETION_ONSTACK(wait);
1336
1337 c->waiting = &wait;
1338 enqueue_cmd_and_start_io(h, c);
1339 wait_for_completion(&wait);
1340 }
1341
1342 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1343 struct CommandList *c, int data_direction)
1344 {
1345 int retry_count = 0;
1346
1347 do {
1348 memset(c->err_info, 0, sizeof(*c->err_info));
1349 hpsa_scsi_do_simple_cmd_core(h, c);
1350 retry_count++;
1351 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1352 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1353 }
1354
1355 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1356 {
1357 struct ErrorInfo *ei;
1358 struct device *d = &cp->h->pdev->dev;
1359
1360 ei = cp->err_info;
1361 switch (ei->CommandStatus) {
1362 case CMD_TARGET_STATUS:
1363 dev_warn(d, "cmd %p has completed with errors\n", cp);
1364 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1365 ei->ScsiStatus);
1366 if (ei->ScsiStatus == 0)
1367 dev_warn(d, "SCSI status is abnormally zero. "
1368 "(probably indicates selection timeout "
1369 "reported incorrectly due to a known "
1370 "firmware bug, circa July, 2001.)\n");
1371 break;
1372 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1373 dev_info(d, "UNDERRUN\n");
1374 break;
1375 case CMD_DATA_OVERRUN:
1376 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1377 break;
1378 case CMD_INVALID: {
1379 /* controller unfortunately reports SCSI passthru's
1380 * to non-existent targets as invalid commands.
1381 */
1382 dev_warn(d, "cp %p is reported invalid (probably means "
1383 "target device no longer present)\n", cp);
1384 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1385 print_cmd(cp); */
1386 }
1387 break;
1388 case CMD_PROTOCOL_ERR:
1389 dev_warn(d, "cp %p has protocol error \n", cp);
1390 break;
1391 case CMD_HARDWARE_ERR:
1392 /* cmd->result = DID_ERROR << 16; */
1393 dev_warn(d, "cp %p had hardware error\n", cp);
1394 break;
1395 case CMD_CONNECTION_LOST:
1396 dev_warn(d, "cp %p had connection lost\n", cp);
1397 break;
1398 case CMD_ABORTED:
1399 dev_warn(d, "cp %p was aborted\n", cp);
1400 break;
1401 case CMD_ABORT_FAILED:
1402 dev_warn(d, "cp %p reports abort failed\n", cp);
1403 break;
1404 case CMD_UNSOLICITED_ABORT:
1405 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1406 break;
1407 case CMD_TIMEOUT:
1408 dev_warn(d, "cp %p timed out\n", cp);
1409 break;
1410 case CMD_UNABORTABLE:
1411 dev_warn(d, "Command unabortable\n");
1412 break;
1413 default:
1414 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1415 ei->CommandStatus);
1416 }
1417 }
1418
1419 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1420 unsigned char page, unsigned char *buf,
1421 unsigned char bufsize)
1422 {
1423 int rc = IO_OK;
1424 struct CommandList *c;
1425 struct ErrorInfo *ei;
1426
1427 c = cmd_special_alloc(h);
1428
1429 if (c == NULL) { /* trouble... */
1430 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1431 return -ENOMEM;
1432 }
1433
1434 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1435 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1436 ei = c->err_info;
1437 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1438 hpsa_scsi_interpret_error(c);
1439 rc = -1;
1440 }
1441 cmd_special_free(h, c);
1442 return rc;
1443 }
1444
1445 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1446 {
1447 int rc = IO_OK;
1448 struct CommandList *c;
1449 struct ErrorInfo *ei;
1450
1451 c = cmd_special_alloc(h);
1452
1453 if (c == NULL) { /* trouble... */
1454 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1455 return -ENOMEM;
1456 }
1457
1458 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1459 hpsa_scsi_do_simple_cmd_core(h, c);
1460 /* no unmap needed here because no data xfer. */
1461
1462 ei = c->err_info;
1463 if (ei->CommandStatus != 0) {
1464 hpsa_scsi_interpret_error(c);
1465 rc = -1;
1466 }
1467 cmd_special_free(h, c);
1468 return rc;
1469 }
1470
1471 static void hpsa_get_raid_level(struct ctlr_info *h,
1472 unsigned char *scsi3addr, unsigned char *raid_level)
1473 {
1474 int rc;
1475 unsigned char *buf;
1476
1477 *raid_level = RAID_UNKNOWN;
1478 buf = kzalloc(64, GFP_KERNEL);
1479 if (!buf)
1480 return;
1481 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1482 if (rc == 0)
1483 *raid_level = buf[8];
1484 if (*raid_level > RAID_UNKNOWN)
1485 *raid_level = RAID_UNKNOWN;
1486 kfree(buf);
1487 return;
1488 }
1489
1490 /* Get the device id from inquiry page 0x83 */
1491 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1492 unsigned char *device_id, int buflen)
1493 {
1494 int rc;
1495 unsigned char *buf;
1496
1497 if (buflen > 16)
1498 buflen = 16;
1499 buf = kzalloc(64, GFP_KERNEL);
1500 if (!buf)
1501 return -1;
1502 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1503 if (rc == 0)
1504 memcpy(device_id, &buf[8], buflen);
1505 kfree(buf);
1506 return rc != 0;
1507 }
1508
1509 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1510 struct ReportLUNdata *buf, int bufsize,
1511 int extended_response)
1512 {
1513 int rc = IO_OK;
1514 struct CommandList *c;
1515 unsigned char scsi3addr[8];
1516 struct ErrorInfo *ei;
1517
1518 c = cmd_special_alloc(h);
1519 if (c == NULL) { /* trouble... */
1520 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1521 return -1;
1522 }
1523 /* address the controller */
1524 memset(scsi3addr, 0, sizeof(scsi3addr));
1525 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1526 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1527 if (extended_response)
1528 c->Request.CDB[1] = extended_response;
1529 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1530 ei = c->err_info;
1531 if (ei->CommandStatus != 0 &&
1532 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1533 hpsa_scsi_interpret_error(c);
1534 rc = -1;
1535 }
1536 cmd_special_free(h, c);
1537 return rc;
1538 }
1539
1540 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1541 struct ReportLUNdata *buf,
1542 int bufsize, int extended_response)
1543 {
1544 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1545 }
1546
1547 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1548 struct ReportLUNdata *buf, int bufsize)
1549 {
1550 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1551 }
1552
1553 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1554 int bus, int target, int lun)
1555 {
1556 device->bus = bus;
1557 device->target = target;
1558 device->lun = lun;
1559 }
1560
1561 static int hpsa_update_device_info(struct ctlr_info *h,
1562 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1563 unsigned char *is_OBDR_device)
1564 {
1565
1566 #define OBDR_SIG_OFFSET 43
1567 #define OBDR_TAPE_SIG "$DR-10"
1568 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1569 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1570
1571 unsigned char *inq_buff;
1572 unsigned char *obdr_sig;
1573
1574 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1575 if (!inq_buff)
1576 goto bail_out;
1577
1578 /* Do an inquiry to the device to see what it is. */
1579 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1580 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1581 /* Inquiry failed (msg printed already) */
1582 dev_err(&h->pdev->dev,
1583 "hpsa_update_device_info: inquiry failed\n");
1584 goto bail_out;
1585 }
1586
1587 this_device->devtype = (inq_buff[0] & 0x1f);
1588 memcpy(this_device->scsi3addr, scsi3addr, 8);
1589 memcpy(this_device->vendor, &inq_buff[8],
1590 sizeof(this_device->vendor));
1591 memcpy(this_device->model, &inq_buff[16],
1592 sizeof(this_device->model));
1593 memset(this_device->device_id, 0,
1594 sizeof(this_device->device_id));
1595 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1596 sizeof(this_device->device_id));
1597
1598 if (this_device->devtype == TYPE_DISK &&
1599 is_logical_dev_addr_mode(scsi3addr))
1600 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1601 else
1602 this_device->raid_level = RAID_UNKNOWN;
1603
1604 if (is_OBDR_device) {
1605 /* See if this is a One-Button-Disaster-Recovery device
1606 * by looking for "$DR-10" at offset 43 in inquiry data.
1607 */
1608 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1609 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1610 strncmp(obdr_sig, OBDR_TAPE_SIG,
1611 OBDR_SIG_LEN) == 0);
1612 }
1613
1614 kfree(inq_buff);
1615 return 0;
1616
1617 bail_out:
1618 kfree(inq_buff);
1619 return 1;
1620 }
1621
1622 static unsigned char *msa2xxx_model[] = {
1623 "MSA2012",
1624 "MSA2024",
1625 "MSA2312",
1626 "MSA2324",
1627 "P2000 G3 SAS",
1628 NULL,
1629 };
1630
1631 static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1632 {
1633 int i;
1634
1635 for (i = 0; msa2xxx_model[i]; i++)
1636 if (strncmp(device->model, msa2xxx_model[i],
1637 strlen(msa2xxx_model[i])) == 0)
1638 return 1;
1639 return 0;
1640 }
1641
1642 /* Helper function to assign bus, target, lun mapping of devices.
1643 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1644 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1645 * Logical drive target and lun are assigned at this time, but
1646 * physical device lun and target assignment are deferred (assigned
1647 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1648 */
1649 static void figure_bus_target_lun(struct ctlr_info *h,
1650 u8 *lunaddrbytes, int *bus, int *target, int *lun,
1651 struct hpsa_scsi_dev_t *device)
1652 {
1653 u32 lunid;
1654
1655 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1656 /* logical device */
1657 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1658 if (is_msa2xxx(h, device)) {
1659 /* msa2xxx way, put logicals on bus 1
1660 * and match target/lun numbers box
1661 * reports.
1662 */
1663 *bus = 1;
1664 *target = (lunid >> 16) & 0x3fff;
1665 *lun = lunid & 0x00ff;
1666 } else {
1667 if (likely(is_scsi_rev_5(h))) {
1668 /* All current smart arrays (circa 2011) */
1669 *bus = 0;
1670 *target = 0;
1671 *lun = (lunid & 0x3fff) + 1;
1672 } else {
1673 /* Traditional old smart array way. */
1674 *bus = 0;
1675 *target = lunid & 0x3fff;
1676 *lun = 0;
1677 }
1678 }
1679 } else {
1680 /* physical device */
1681 if (is_hba_lunid(lunaddrbytes))
1682 if (unlikely(is_scsi_rev_5(h))) {
1683 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1684 *target = 0;
1685 *lun = 0;
1686 return;
1687 } else
1688 *bus = 3; /* traditional smartarray */
1689 else
1690 *bus = 2; /* physical disk */
1691 *target = -1;
1692 *lun = -1; /* we will fill these in later. */
1693 }
1694 }
1695
1696 /*
1697 * If there is no lun 0 on a target, linux won't find any devices.
1698 * For the MSA2xxx boxes, we have to manually detect the enclosure
1699 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1700 * it for some reason. *tmpdevice is the target we're adding,
1701 * this_device is a pointer into the current element of currentsd[]
1702 * that we're building up in update_scsi_devices(), below.
1703 * lunzerobits is a bitmap that tracks which targets already have a
1704 * lun 0 assigned.
1705 * Returns 1 if an enclosure was added, 0 if not.
1706 */
1707 static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1708 struct hpsa_scsi_dev_t *tmpdevice,
1709 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1710 int bus, int target, int lun, unsigned long lunzerobits[],
1711 int *nmsa2xxx_enclosures)
1712 {
1713 unsigned char scsi3addr[8];
1714
1715 if (test_bit(target, lunzerobits))
1716 return 0; /* There is already a lun 0 on this target. */
1717
1718 if (!is_logical_dev_addr_mode(lunaddrbytes))
1719 return 0; /* It's the logical targets that may lack lun 0. */
1720
1721 if (!is_msa2xxx(h, tmpdevice))
1722 return 0; /* It's only the MSA2xxx that have this problem. */
1723
1724 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1725 return 0;
1726
1727 memset(scsi3addr, 0, 8);
1728 scsi3addr[3] = target;
1729 if (is_hba_lunid(scsi3addr))
1730 return 0; /* Don't add the RAID controller here. */
1731
1732 if (is_scsi_rev_5(h))
1733 return 0; /* p1210m doesn't need to do this. */
1734
1735 #define MAX_MSA2XXX_ENCLOSURES 32
1736 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1737 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1738 "enclosures exceeded. Check your hardware "
1739 "configuration.");
1740 return 0;
1741 }
1742
1743 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1744 return 0;
1745 (*nmsa2xxx_enclosures)++;
1746 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1747 set_bit(target, lunzerobits);
1748 return 1;
1749 }
1750
1751 /*
1752 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1753 * logdev. The number of luns in physdev and logdev are returned in
1754 * *nphysicals and *nlogicals, respectively.
1755 * Returns 0 on success, -1 otherwise.
1756 */
1757 static int hpsa_gather_lun_info(struct ctlr_info *h,
1758 int reportlunsize,
1759 struct ReportLUNdata *physdev, u32 *nphysicals,
1760 struct ReportLUNdata *logdev, u32 *nlogicals)
1761 {
1762 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1763 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1764 return -1;
1765 }
1766 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1767 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1768 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1769 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1770 *nphysicals - HPSA_MAX_PHYS_LUN);
1771 *nphysicals = HPSA_MAX_PHYS_LUN;
1772 }
1773 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1774 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1775 return -1;
1776 }
1777 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1778 /* Reject Logicals in excess of our max capability. */
1779 if (*nlogicals > HPSA_MAX_LUN) {
1780 dev_warn(&h->pdev->dev,
1781 "maximum logical LUNs (%d) exceeded. "
1782 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1783 *nlogicals - HPSA_MAX_LUN);
1784 *nlogicals = HPSA_MAX_LUN;
1785 }
1786 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1787 dev_warn(&h->pdev->dev,
1788 "maximum logical + physical LUNs (%d) exceeded. "
1789 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1790 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1791 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1792 }
1793 return 0;
1794 }
1795
1796 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1797 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1798 struct ReportLUNdata *logdev_list)
1799 {
1800 /* Helper function, figure out where the LUN ID info is coming from
1801 * given index i, lists of physical and logical devices, where in
1802 * the list the raid controller is supposed to appear (first or last)
1803 */
1804
1805 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1806 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1807
1808 if (i == raid_ctlr_position)
1809 return RAID_CTLR_LUNID;
1810
1811 if (i < logicals_start)
1812 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1813
1814 if (i < last_device)
1815 return &logdev_list->LUN[i - nphysicals -
1816 (raid_ctlr_position == 0)][0];
1817 BUG();
1818 return NULL;
1819 }
1820
1821 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1822 {
1823 /* the idea here is we could get notified
1824 * that some devices have changed, so we do a report
1825 * physical luns and report logical luns cmd, and adjust
1826 * our list of devices accordingly.
1827 *
1828 * The scsi3addr's of devices won't change so long as the
1829 * adapter is not reset. That means we can rescan and
1830 * tell which devices we already know about, vs. new
1831 * devices, vs. disappearing devices.
1832 */
1833 struct ReportLUNdata *physdev_list = NULL;
1834 struct ReportLUNdata *logdev_list = NULL;
1835 u32 nphysicals = 0;
1836 u32 nlogicals = 0;
1837 u32 ndev_allocated = 0;
1838 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1839 int ncurrent = 0;
1840 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1841 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1842 int bus, target, lun;
1843 int raid_ctlr_position;
1844 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1845
1846 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1847 GFP_KERNEL);
1848 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1849 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1850 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1851
1852 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1853 dev_err(&h->pdev->dev, "out of memory\n");
1854 goto out;
1855 }
1856 memset(lunzerobits, 0, sizeof(lunzerobits));
1857
1858 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1859 logdev_list, &nlogicals))
1860 goto out;
1861
1862 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1863 * but each of them 4 times through different paths. The plus 1
1864 * is for the RAID controller.
1865 */
1866 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1867
1868 /* Allocate the per device structures */
1869 for (i = 0; i < ndevs_to_allocate; i++) {
1870 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1871 if (!currentsd[i]) {
1872 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1873 __FILE__, __LINE__);
1874 goto out;
1875 }
1876 ndev_allocated++;
1877 }
1878
1879 if (unlikely(is_scsi_rev_5(h)))
1880 raid_ctlr_position = 0;
1881 else
1882 raid_ctlr_position = nphysicals + nlogicals;
1883
1884 /* adjust our table of devices */
1885 nmsa2xxx_enclosures = 0;
1886 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1887 u8 *lunaddrbytes, is_OBDR = 0;
1888
1889 /* Figure out where the LUN ID info is coming from */
1890 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1891 i, nphysicals, nlogicals, physdev_list, logdev_list);
1892 /* skip masked physical devices. */
1893 if (lunaddrbytes[3] & 0xC0 &&
1894 i < nphysicals + (raid_ctlr_position == 0))
1895 continue;
1896
1897 /* Get device type, vendor, model, device id */
1898 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1899 &is_OBDR))
1900 continue; /* skip it if we can't talk to it. */
1901 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1902 tmpdevice);
1903 this_device = currentsd[ncurrent];
1904
1905 /*
1906 * For the msa2xxx boxes, we have to insert a LUN 0 which
1907 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1908 * is nonetheless an enclosure device there. We have to
1909 * present that otherwise linux won't find anything if
1910 * there is no lun 0.
1911 */
1912 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1913 lunaddrbytes, bus, target, lun, lunzerobits,
1914 &nmsa2xxx_enclosures)) {
1915 ncurrent++;
1916 this_device = currentsd[ncurrent];
1917 }
1918
1919 *this_device = *tmpdevice;
1920 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1921
1922 switch (this_device->devtype) {
1923 case TYPE_ROM:
1924 /* We don't *really* support actual CD-ROM devices,
1925 * just "One Button Disaster Recovery" tape drive
1926 * which temporarily pretends to be a CD-ROM drive.
1927 * So we check that the device is really an OBDR tape
1928 * device by checking for "$DR-10" in bytes 43-48 of
1929 * the inquiry data.
1930 */
1931 if (is_OBDR)
1932 ncurrent++;
1933 break;
1934 case TYPE_DISK:
1935 if (i < nphysicals)
1936 break;
1937 ncurrent++;
1938 break;
1939 case TYPE_TAPE:
1940 case TYPE_MEDIUM_CHANGER:
1941 ncurrent++;
1942 break;
1943 case TYPE_RAID:
1944 /* Only present the Smartarray HBA as a RAID controller.
1945 * If it's a RAID controller other than the HBA itself
1946 * (an external RAID controller, MSA500 or similar)
1947 * don't present it.
1948 */
1949 if (!is_hba_lunid(lunaddrbytes))
1950 break;
1951 ncurrent++;
1952 break;
1953 default:
1954 break;
1955 }
1956 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1957 break;
1958 }
1959 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1960 out:
1961 kfree(tmpdevice);
1962 for (i = 0; i < ndev_allocated; i++)
1963 kfree(currentsd[i]);
1964 kfree(currentsd);
1965 kfree(physdev_list);
1966 kfree(logdev_list);
1967 }
1968
1969 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1970 * dma mapping and fills in the scatter gather entries of the
1971 * hpsa command, cp.
1972 */
1973 static int hpsa_scatter_gather(struct ctlr_info *h,
1974 struct CommandList *cp,
1975 struct scsi_cmnd *cmd)
1976 {
1977 unsigned int len;
1978 struct scatterlist *sg;
1979 u64 addr64;
1980 int use_sg, i, sg_index, chained;
1981 struct SGDescriptor *curr_sg;
1982
1983 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
1984
1985 use_sg = scsi_dma_map(cmd);
1986 if (use_sg < 0)
1987 return use_sg;
1988
1989 if (!use_sg)
1990 goto sglist_finished;
1991
1992 curr_sg = cp->SG;
1993 chained = 0;
1994 sg_index = 0;
1995 scsi_for_each_sg(cmd, sg, use_sg, i) {
1996 if (i == h->max_cmd_sg_entries - 1 &&
1997 use_sg > h->max_cmd_sg_entries) {
1998 chained = 1;
1999 curr_sg = h->cmd_sg_list[cp->cmdindex];
2000 sg_index = 0;
2001 }
2002 addr64 = (u64) sg_dma_address(sg);
2003 len = sg_dma_len(sg);
2004 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2005 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2006 curr_sg->Len = len;
2007 curr_sg->Ext = 0; /* we are not chaining */
2008 curr_sg++;
2009 }
2010
2011 if (use_sg + chained > h->maxSG)
2012 h->maxSG = use_sg + chained;
2013
2014 if (chained) {
2015 cp->Header.SGList = h->max_cmd_sg_entries;
2016 cp->Header.SGTotal = (u16) (use_sg + 1);
2017 hpsa_map_sg_chain_block(h, cp);
2018 return 0;
2019 }
2020
2021 sglist_finished:
2022
2023 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2024 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2025 return 0;
2026 }
2027
2028
2029 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2030 void (*done)(struct scsi_cmnd *))
2031 {
2032 struct ctlr_info *h;
2033 struct hpsa_scsi_dev_t *dev;
2034 unsigned char scsi3addr[8];
2035 struct CommandList *c;
2036 unsigned long flags;
2037
2038 /* Get the ptr to our adapter structure out of cmd->host. */
2039 h = sdev_to_hba(cmd->device);
2040 dev = cmd->device->hostdata;
2041 if (!dev) {
2042 cmd->result = DID_NO_CONNECT << 16;
2043 done(cmd);
2044 return 0;
2045 }
2046 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2047
2048 /* Need a lock as this is being allocated from the pool */
2049 spin_lock_irqsave(&h->lock, flags);
2050 c = cmd_alloc(h);
2051 spin_unlock_irqrestore(&h->lock, flags);
2052 if (c == NULL) { /* trouble... */
2053 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2054 return SCSI_MLQUEUE_HOST_BUSY;
2055 }
2056
2057 /* Fill in the command list header */
2058
2059 cmd->scsi_done = done; /* save this for use by completion code */
2060
2061 /* save c in case we have to abort it */
2062 cmd->host_scribble = (unsigned char *) c;
2063
2064 c->cmd_type = CMD_SCSI;
2065 c->scsi_cmd = cmd;
2066 c->Header.ReplyQueue = 0; /* unused in simple mode */
2067 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2068 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2069 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2070
2071 /* Fill in the request block... */
2072
2073 c->Request.Timeout = 0;
2074 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2075 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2076 c->Request.CDBLen = cmd->cmd_len;
2077 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2078 c->Request.Type.Type = TYPE_CMD;
2079 c->Request.Type.Attribute = ATTR_SIMPLE;
2080 switch (cmd->sc_data_direction) {
2081 case DMA_TO_DEVICE:
2082 c->Request.Type.Direction = XFER_WRITE;
2083 break;
2084 case DMA_FROM_DEVICE:
2085 c->Request.Type.Direction = XFER_READ;
2086 break;
2087 case DMA_NONE:
2088 c->Request.Type.Direction = XFER_NONE;
2089 break;
2090 case DMA_BIDIRECTIONAL:
2091 /* This can happen if a buggy application does a scsi passthru
2092 * and sets both inlen and outlen to non-zero. ( see
2093 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2094 */
2095
2096 c->Request.Type.Direction = XFER_RSVD;
2097 /* This is technically wrong, and hpsa controllers should
2098 * reject it with CMD_INVALID, which is the most correct
2099 * response, but non-fibre backends appear to let it
2100 * slide by, and give the same results as if this field
2101 * were set correctly. Either way is acceptable for
2102 * our purposes here.
2103 */
2104
2105 break;
2106
2107 default:
2108 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2109 cmd->sc_data_direction);
2110 BUG();
2111 break;
2112 }
2113
2114 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2115 cmd_free(h, c);
2116 return SCSI_MLQUEUE_HOST_BUSY;
2117 }
2118 enqueue_cmd_and_start_io(h, c);
2119 /* the cmd'll come back via intr handler in complete_scsi_command() */
2120 return 0;
2121 }
2122
2123 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2124
2125 static void hpsa_scan_start(struct Scsi_Host *sh)
2126 {
2127 struct ctlr_info *h = shost_to_hba(sh);
2128 unsigned long flags;
2129
2130 /* wait until any scan already in progress is finished. */
2131 while (1) {
2132 spin_lock_irqsave(&h->scan_lock, flags);
2133 if (h->scan_finished)
2134 break;
2135 spin_unlock_irqrestore(&h->scan_lock, flags);
2136 wait_event(h->scan_wait_queue, h->scan_finished);
2137 /* Note: We don't need to worry about a race between this
2138 * thread and driver unload because the midlayer will
2139 * have incremented the reference count, so unload won't
2140 * happen if we're in here.
2141 */
2142 }
2143 h->scan_finished = 0; /* mark scan as in progress */
2144 spin_unlock_irqrestore(&h->scan_lock, flags);
2145
2146 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2147
2148 spin_lock_irqsave(&h->scan_lock, flags);
2149 h->scan_finished = 1; /* mark scan as finished. */
2150 wake_up_all(&h->scan_wait_queue);
2151 spin_unlock_irqrestore(&h->scan_lock, flags);
2152 }
2153
2154 static int hpsa_scan_finished(struct Scsi_Host *sh,
2155 unsigned long elapsed_time)
2156 {
2157 struct ctlr_info *h = shost_to_hba(sh);
2158 unsigned long flags;
2159 int finished;
2160
2161 spin_lock_irqsave(&h->scan_lock, flags);
2162 finished = h->scan_finished;
2163 spin_unlock_irqrestore(&h->scan_lock, flags);
2164 return finished;
2165 }
2166
2167 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2168 int qdepth, int reason)
2169 {
2170 struct ctlr_info *h = sdev_to_hba(sdev);
2171
2172 if (reason != SCSI_QDEPTH_DEFAULT)
2173 return -ENOTSUPP;
2174
2175 if (qdepth < 1)
2176 qdepth = 1;
2177 else
2178 if (qdepth > h->nr_cmds)
2179 qdepth = h->nr_cmds;
2180 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2181 return sdev->queue_depth;
2182 }
2183
2184 static void hpsa_unregister_scsi(struct ctlr_info *h)
2185 {
2186 /* we are being forcibly unloaded, and may not refuse. */
2187 scsi_remove_host(h->scsi_host);
2188 scsi_host_put(h->scsi_host);
2189 h->scsi_host = NULL;
2190 }
2191
2192 static int hpsa_register_scsi(struct ctlr_info *h)
2193 {
2194 int rc;
2195
2196 rc = hpsa_scsi_detect(h);
2197 if (rc != 0)
2198 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2199 " hpsa_scsi_detect(), rc is %d\n", rc);
2200 return rc;
2201 }
2202
2203 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2204 unsigned char lunaddr[])
2205 {
2206 int rc = 0;
2207 int count = 0;
2208 int waittime = 1; /* seconds */
2209 struct CommandList *c;
2210
2211 c = cmd_special_alloc(h);
2212 if (!c) {
2213 dev_warn(&h->pdev->dev, "out of memory in "
2214 "wait_for_device_to_become_ready.\n");
2215 return IO_ERROR;
2216 }
2217
2218 /* Send test unit ready until device ready, or give up. */
2219 while (count < HPSA_TUR_RETRY_LIMIT) {
2220
2221 /* Wait for a bit. do this first, because if we send
2222 * the TUR right away, the reset will just abort it.
2223 */
2224 msleep(1000 * waittime);
2225 count++;
2226
2227 /* Increase wait time with each try, up to a point. */
2228 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2229 waittime = waittime * 2;
2230
2231 /* Send the Test Unit Ready */
2232 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2233 hpsa_scsi_do_simple_cmd_core(h, c);
2234 /* no unmap needed here because no data xfer. */
2235
2236 if (c->err_info->CommandStatus == CMD_SUCCESS)
2237 break;
2238
2239 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2240 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2241 (c->err_info->SenseInfo[2] == NO_SENSE ||
2242 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2243 break;
2244
2245 dev_warn(&h->pdev->dev, "waiting %d secs "
2246 "for device to become ready.\n", waittime);
2247 rc = 1; /* device not ready. */
2248 }
2249
2250 if (rc)
2251 dev_warn(&h->pdev->dev, "giving up on device.\n");
2252 else
2253 dev_warn(&h->pdev->dev, "device is ready.\n");
2254
2255 cmd_special_free(h, c);
2256 return rc;
2257 }
2258
2259 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2260 * complaining. Doing a host- or bus-reset can't do anything good here.
2261 */
2262 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2263 {
2264 int rc;
2265 struct ctlr_info *h;
2266 struct hpsa_scsi_dev_t *dev;
2267
2268 /* find the controller to which the command to be aborted was sent */
2269 h = sdev_to_hba(scsicmd->device);
2270 if (h == NULL) /* paranoia */
2271 return FAILED;
2272 dev = scsicmd->device->hostdata;
2273 if (!dev) {
2274 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2275 "device lookup failed.\n");
2276 return FAILED;
2277 }
2278 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2279 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2280 /* send a reset to the SCSI LUN which the command was sent to */
2281 rc = hpsa_send_reset(h, dev->scsi3addr);
2282 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2283 return SUCCESS;
2284
2285 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2286 return FAILED;
2287 }
2288
2289 /*
2290 * For operations that cannot sleep, a command block is allocated at init,
2291 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2292 * which ones are free or in use. Lock must be held when calling this.
2293 * cmd_free() is the complement.
2294 */
2295 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2296 {
2297 struct CommandList *c;
2298 int i;
2299 union u64bit temp64;
2300 dma_addr_t cmd_dma_handle, err_dma_handle;
2301
2302 do {
2303 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2304 if (i == h->nr_cmds)
2305 return NULL;
2306 } while (test_and_set_bit
2307 (i & (BITS_PER_LONG - 1),
2308 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2309 c = h->cmd_pool + i;
2310 memset(c, 0, sizeof(*c));
2311 cmd_dma_handle = h->cmd_pool_dhandle
2312 + i * sizeof(*c);
2313 c->err_info = h->errinfo_pool + i;
2314 memset(c->err_info, 0, sizeof(*c->err_info));
2315 err_dma_handle = h->errinfo_pool_dhandle
2316 + i * sizeof(*c->err_info);
2317 h->nr_allocs++;
2318
2319 c->cmdindex = i;
2320
2321 INIT_LIST_HEAD(&c->list);
2322 c->busaddr = (u32) cmd_dma_handle;
2323 temp64.val = (u64) err_dma_handle;
2324 c->ErrDesc.Addr.lower = temp64.val32.lower;
2325 c->ErrDesc.Addr.upper = temp64.val32.upper;
2326 c->ErrDesc.Len = sizeof(*c->err_info);
2327
2328 c->h = h;
2329 return c;
2330 }
2331
2332 /* For operations that can wait for kmalloc to possibly sleep,
2333 * this routine can be called. Lock need not be held to call
2334 * cmd_special_alloc. cmd_special_free() is the complement.
2335 */
2336 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2337 {
2338 struct CommandList *c;
2339 union u64bit temp64;
2340 dma_addr_t cmd_dma_handle, err_dma_handle;
2341
2342 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2343 if (c == NULL)
2344 return NULL;
2345 memset(c, 0, sizeof(*c));
2346
2347 c->cmdindex = -1;
2348
2349 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2350 &err_dma_handle);
2351
2352 if (c->err_info == NULL) {
2353 pci_free_consistent(h->pdev,
2354 sizeof(*c), c, cmd_dma_handle);
2355 return NULL;
2356 }
2357 memset(c->err_info, 0, sizeof(*c->err_info));
2358
2359 INIT_LIST_HEAD(&c->list);
2360 c->busaddr = (u32) cmd_dma_handle;
2361 temp64.val = (u64) err_dma_handle;
2362 c->ErrDesc.Addr.lower = temp64.val32.lower;
2363 c->ErrDesc.Addr.upper = temp64.val32.upper;
2364 c->ErrDesc.Len = sizeof(*c->err_info);
2365
2366 c->h = h;
2367 return c;
2368 }
2369
2370 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2371 {
2372 int i;
2373
2374 i = c - h->cmd_pool;
2375 clear_bit(i & (BITS_PER_LONG - 1),
2376 h->cmd_pool_bits + (i / BITS_PER_LONG));
2377 h->nr_frees++;
2378 }
2379
2380 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2381 {
2382 union u64bit temp64;
2383
2384 temp64.val32.lower = c->ErrDesc.Addr.lower;
2385 temp64.val32.upper = c->ErrDesc.Addr.upper;
2386 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2387 c->err_info, (dma_addr_t) temp64.val);
2388 pci_free_consistent(h->pdev, sizeof(*c),
2389 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2390 }
2391
2392 #ifdef CONFIG_COMPAT
2393
2394 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2395 {
2396 IOCTL32_Command_struct __user *arg32 =
2397 (IOCTL32_Command_struct __user *) arg;
2398 IOCTL_Command_struct arg64;
2399 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2400 int err;
2401 u32 cp;
2402
2403 memset(&arg64, 0, sizeof(arg64));
2404 err = 0;
2405 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2406 sizeof(arg64.LUN_info));
2407 err |= copy_from_user(&arg64.Request, &arg32->Request,
2408 sizeof(arg64.Request));
2409 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2410 sizeof(arg64.error_info));
2411 err |= get_user(arg64.buf_size, &arg32->buf_size);
2412 err |= get_user(cp, &arg32->buf);
2413 arg64.buf = compat_ptr(cp);
2414 err |= copy_to_user(p, &arg64, sizeof(arg64));
2415
2416 if (err)
2417 return -EFAULT;
2418
2419 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2420 if (err)
2421 return err;
2422 err |= copy_in_user(&arg32->error_info, &p->error_info,
2423 sizeof(arg32->error_info));
2424 if (err)
2425 return -EFAULT;
2426 return err;
2427 }
2428
2429 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2430 int cmd, void *arg)
2431 {
2432 BIG_IOCTL32_Command_struct __user *arg32 =
2433 (BIG_IOCTL32_Command_struct __user *) arg;
2434 BIG_IOCTL_Command_struct arg64;
2435 BIG_IOCTL_Command_struct __user *p =
2436 compat_alloc_user_space(sizeof(arg64));
2437 int err;
2438 u32 cp;
2439
2440 memset(&arg64, 0, sizeof(arg64));
2441 err = 0;
2442 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2443 sizeof(arg64.LUN_info));
2444 err |= copy_from_user(&arg64.Request, &arg32->Request,
2445 sizeof(arg64.Request));
2446 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2447 sizeof(arg64.error_info));
2448 err |= get_user(arg64.buf_size, &arg32->buf_size);
2449 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2450 err |= get_user(cp, &arg32->buf);
2451 arg64.buf = compat_ptr(cp);
2452 err |= copy_to_user(p, &arg64, sizeof(arg64));
2453
2454 if (err)
2455 return -EFAULT;
2456
2457 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2458 if (err)
2459 return err;
2460 err |= copy_in_user(&arg32->error_info, &p->error_info,
2461 sizeof(arg32->error_info));
2462 if (err)
2463 return -EFAULT;
2464 return err;
2465 }
2466
2467 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2468 {
2469 switch (cmd) {
2470 case CCISS_GETPCIINFO:
2471 case CCISS_GETINTINFO:
2472 case CCISS_SETINTINFO:
2473 case CCISS_GETNODENAME:
2474 case CCISS_SETNODENAME:
2475 case CCISS_GETHEARTBEAT:
2476 case CCISS_GETBUSTYPES:
2477 case CCISS_GETFIRMVER:
2478 case CCISS_GETDRIVVER:
2479 case CCISS_REVALIDVOLS:
2480 case CCISS_DEREGDISK:
2481 case CCISS_REGNEWDISK:
2482 case CCISS_REGNEWD:
2483 case CCISS_RESCANDISK:
2484 case CCISS_GETLUNINFO:
2485 return hpsa_ioctl(dev, cmd, arg);
2486
2487 case CCISS_PASSTHRU32:
2488 return hpsa_ioctl32_passthru(dev, cmd, arg);
2489 case CCISS_BIG_PASSTHRU32:
2490 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2491
2492 default:
2493 return -ENOIOCTLCMD;
2494 }
2495 }
2496 #endif
2497
2498 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2499 {
2500 struct hpsa_pci_info pciinfo;
2501
2502 if (!argp)
2503 return -EINVAL;
2504 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2505 pciinfo.bus = h->pdev->bus->number;
2506 pciinfo.dev_fn = h->pdev->devfn;
2507 pciinfo.board_id = h->board_id;
2508 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2509 return -EFAULT;
2510 return 0;
2511 }
2512
2513 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2514 {
2515 DriverVer_type DriverVer;
2516 unsigned char vmaj, vmin, vsubmin;
2517 int rc;
2518
2519 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2520 &vmaj, &vmin, &vsubmin);
2521 if (rc != 3) {
2522 dev_info(&h->pdev->dev, "driver version string '%s' "
2523 "unrecognized.", HPSA_DRIVER_VERSION);
2524 vmaj = 0;
2525 vmin = 0;
2526 vsubmin = 0;
2527 }
2528 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2529 if (!argp)
2530 return -EINVAL;
2531 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2532 return -EFAULT;
2533 return 0;
2534 }
2535
2536 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2537 {
2538 IOCTL_Command_struct iocommand;
2539 struct CommandList *c;
2540 char *buff = NULL;
2541 union u64bit temp64;
2542
2543 if (!argp)
2544 return -EINVAL;
2545 if (!capable(CAP_SYS_RAWIO))
2546 return -EPERM;
2547 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2548 return -EFAULT;
2549 if ((iocommand.buf_size < 1) &&
2550 (iocommand.Request.Type.Direction != XFER_NONE)) {
2551 return -EINVAL;
2552 }
2553 if (iocommand.buf_size > 0) {
2554 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2555 if (buff == NULL)
2556 return -EFAULT;
2557 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2558 /* Copy the data into the buffer we created */
2559 if (copy_from_user(buff, iocommand.buf,
2560 iocommand.buf_size)) {
2561 kfree(buff);
2562 return -EFAULT;
2563 }
2564 } else {
2565 memset(buff, 0, iocommand.buf_size);
2566 }
2567 }
2568 c = cmd_special_alloc(h);
2569 if (c == NULL) {
2570 kfree(buff);
2571 return -ENOMEM;
2572 }
2573 /* Fill in the command type */
2574 c->cmd_type = CMD_IOCTL_PEND;
2575 /* Fill in Command Header */
2576 c->Header.ReplyQueue = 0; /* unused in simple mode */
2577 if (iocommand.buf_size > 0) { /* buffer to fill */
2578 c->Header.SGList = 1;
2579 c->Header.SGTotal = 1;
2580 } else { /* no buffers to fill */
2581 c->Header.SGList = 0;
2582 c->Header.SGTotal = 0;
2583 }
2584 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2585 /* use the kernel address the cmd block for tag */
2586 c->Header.Tag.lower = c->busaddr;
2587
2588 /* Fill in Request block */
2589 memcpy(&c->Request, &iocommand.Request,
2590 sizeof(c->Request));
2591
2592 /* Fill in the scatter gather information */
2593 if (iocommand.buf_size > 0) {
2594 temp64.val = pci_map_single(h->pdev, buff,
2595 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2596 c->SG[0].Addr.lower = temp64.val32.lower;
2597 c->SG[0].Addr.upper = temp64.val32.upper;
2598 c->SG[0].Len = iocommand.buf_size;
2599 c->SG[0].Ext = 0; /* we are not chaining*/
2600 }
2601 hpsa_scsi_do_simple_cmd_core(h, c);
2602 if (iocommand.buf_size > 0)
2603 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2604 check_ioctl_unit_attention(h, c);
2605
2606 /* Copy the error information out */
2607 memcpy(&iocommand.error_info, c->err_info,
2608 sizeof(iocommand.error_info));
2609 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2610 kfree(buff);
2611 cmd_special_free(h, c);
2612 return -EFAULT;
2613 }
2614 if (iocommand.Request.Type.Direction == XFER_READ &&
2615 iocommand.buf_size > 0) {
2616 /* Copy the data out of the buffer we created */
2617 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2618 kfree(buff);
2619 cmd_special_free(h, c);
2620 return -EFAULT;
2621 }
2622 }
2623 kfree(buff);
2624 cmd_special_free(h, c);
2625 return 0;
2626 }
2627
2628 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2629 {
2630 BIG_IOCTL_Command_struct *ioc;
2631 struct CommandList *c;
2632 unsigned char **buff = NULL;
2633 int *buff_size = NULL;
2634 union u64bit temp64;
2635 BYTE sg_used = 0;
2636 int status = 0;
2637 int i;
2638 u32 left;
2639 u32 sz;
2640 BYTE __user *data_ptr;
2641
2642 if (!argp)
2643 return -EINVAL;
2644 if (!capable(CAP_SYS_RAWIO))
2645 return -EPERM;
2646 ioc = (BIG_IOCTL_Command_struct *)
2647 kmalloc(sizeof(*ioc), GFP_KERNEL);
2648 if (!ioc) {
2649 status = -ENOMEM;
2650 goto cleanup1;
2651 }
2652 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2653 status = -EFAULT;
2654 goto cleanup1;
2655 }
2656 if ((ioc->buf_size < 1) &&
2657 (ioc->Request.Type.Direction != XFER_NONE)) {
2658 status = -EINVAL;
2659 goto cleanup1;
2660 }
2661 /* Check kmalloc limits using all SGs */
2662 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2663 status = -EINVAL;
2664 goto cleanup1;
2665 }
2666 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2667 status = -EINVAL;
2668 goto cleanup1;
2669 }
2670 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2671 if (!buff) {
2672 status = -ENOMEM;
2673 goto cleanup1;
2674 }
2675 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2676 if (!buff_size) {
2677 status = -ENOMEM;
2678 goto cleanup1;
2679 }
2680 left = ioc->buf_size;
2681 data_ptr = ioc->buf;
2682 while (left) {
2683 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2684 buff_size[sg_used] = sz;
2685 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2686 if (buff[sg_used] == NULL) {
2687 status = -ENOMEM;
2688 goto cleanup1;
2689 }
2690 if (ioc->Request.Type.Direction == XFER_WRITE) {
2691 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2692 status = -ENOMEM;
2693 goto cleanup1;
2694 }
2695 } else
2696 memset(buff[sg_used], 0, sz);
2697 left -= sz;
2698 data_ptr += sz;
2699 sg_used++;
2700 }
2701 c = cmd_special_alloc(h);
2702 if (c == NULL) {
2703 status = -ENOMEM;
2704 goto cleanup1;
2705 }
2706 c->cmd_type = CMD_IOCTL_PEND;
2707 c->Header.ReplyQueue = 0;
2708 c->Header.SGList = c->Header.SGTotal = sg_used;
2709 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2710 c->Header.Tag.lower = c->busaddr;
2711 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2712 if (ioc->buf_size > 0) {
2713 int i;
2714 for (i = 0; i < sg_used; i++) {
2715 temp64.val = pci_map_single(h->pdev, buff[i],
2716 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2717 c->SG[i].Addr.lower = temp64.val32.lower;
2718 c->SG[i].Addr.upper = temp64.val32.upper;
2719 c->SG[i].Len = buff_size[i];
2720 /* we are not chaining */
2721 c->SG[i].Ext = 0;
2722 }
2723 }
2724 hpsa_scsi_do_simple_cmd_core(h, c);
2725 if (sg_used)
2726 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
2727 check_ioctl_unit_attention(h, c);
2728 /* Copy the error information out */
2729 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2730 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2731 cmd_special_free(h, c);
2732 status = -EFAULT;
2733 goto cleanup1;
2734 }
2735 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
2736 /* Copy the data out of the buffer we created */
2737 BYTE __user *ptr = ioc->buf;
2738 for (i = 0; i < sg_used; i++) {
2739 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2740 cmd_special_free(h, c);
2741 status = -EFAULT;
2742 goto cleanup1;
2743 }
2744 ptr += buff_size[i];
2745 }
2746 }
2747 cmd_special_free(h, c);
2748 status = 0;
2749 cleanup1:
2750 if (buff) {
2751 for (i = 0; i < sg_used; i++)
2752 kfree(buff[i]);
2753 kfree(buff);
2754 }
2755 kfree(buff_size);
2756 kfree(ioc);
2757 return status;
2758 }
2759
2760 static void check_ioctl_unit_attention(struct ctlr_info *h,
2761 struct CommandList *c)
2762 {
2763 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2764 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2765 (void) check_for_unit_attention(h, c);
2766 }
2767 /*
2768 * ioctl
2769 */
2770 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2771 {
2772 struct ctlr_info *h;
2773 void __user *argp = (void __user *)arg;
2774
2775 h = sdev_to_hba(dev);
2776
2777 switch (cmd) {
2778 case CCISS_DEREGDISK:
2779 case CCISS_REGNEWDISK:
2780 case CCISS_REGNEWD:
2781 hpsa_scan_start(h->scsi_host);
2782 return 0;
2783 case CCISS_GETPCIINFO:
2784 return hpsa_getpciinfo_ioctl(h, argp);
2785 case CCISS_GETDRIVVER:
2786 return hpsa_getdrivver_ioctl(h, argp);
2787 case CCISS_PASSTHRU:
2788 return hpsa_passthru_ioctl(h, argp);
2789 case CCISS_BIG_PASSTHRU:
2790 return hpsa_big_passthru_ioctl(h, argp);
2791 default:
2792 return -ENOTTY;
2793 }
2794 }
2795
2796 static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2797 unsigned char *scsi3addr, u8 reset_type)
2798 {
2799 struct CommandList *c;
2800
2801 c = cmd_alloc(h);
2802 if (!c)
2803 return -ENOMEM;
2804 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2805 RAID_CTLR_LUNID, TYPE_MSG);
2806 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2807 c->waiting = NULL;
2808 enqueue_cmd_and_start_io(h, c);
2809 /* Don't wait for completion, the reset won't complete. Don't free
2810 * the command either. This is the last command we will send before
2811 * re-initializing everything, so it doesn't matter and won't leak.
2812 */
2813 return 0;
2814 }
2815
2816 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2817 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
2818 int cmd_type)
2819 {
2820 int pci_dir = XFER_NONE;
2821
2822 c->cmd_type = CMD_IOCTL_PEND;
2823 c->Header.ReplyQueue = 0;
2824 if (buff != NULL && size > 0) {
2825 c->Header.SGList = 1;
2826 c->Header.SGTotal = 1;
2827 } else {
2828 c->Header.SGList = 0;
2829 c->Header.SGTotal = 0;
2830 }
2831 c->Header.Tag.lower = c->busaddr;
2832 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2833
2834 c->Request.Type.Type = cmd_type;
2835 if (cmd_type == TYPE_CMD) {
2836 switch (cmd) {
2837 case HPSA_INQUIRY:
2838 /* are we trying to read a vital product page */
2839 if (page_code != 0) {
2840 c->Request.CDB[1] = 0x01;
2841 c->Request.CDB[2] = page_code;
2842 }
2843 c->Request.CDBLen = 6;
2844 c->Request.Type.Attribute = ATTR_SIMPLE;
2845 c->Request.Type.Direction = XFER_READ;
2846 c->Request.Timeout = 0;
2847 c->Request.CDB[0] = HPSA_INQUIRY;
2848 c->Request.CDB[4] = size & 0xFF;
2849 break;
2850 case HPSA_REPORT_LOG:
2851 case HPSA_REPORT_PHYS:
2852 /* Talking to controller so It's a physical command
2853 mode = 00 target = 0. Nothing to write.
2854 */
2855 c->Request.CDBLen = 12;
2856 c->Request.Type.Attribute = ATTR_SIMPLE;
2857 c->Request.Type.Direction = XFER_READ;
2858 c->Request.Timeout = 0;
2859 c->Request.CDB[0] = cmd;
2860 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2861 c->Request.CDB[7] = (size >> 16) & 0xFF;
2862 c->Request.CDB[8] = (size >> 8) & 0xFF;
2863 c->Request.CDB[9] = size & 0xFF;
2864 break;
2865 case HPSA_CACHE_FLUSH:
2866 c->Request.CDBLen = 12;
2867 c->Request.Type.Attribute = ATTR_SIMPLE;
2868 c->Request.Type.Direction = XFER_WRITE;
2869 c->Request.Timeout = 0;
2870 c->Request.CDB[0] = BMIC_WRITE;
2871 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2872 break;
2873 case TEST_UNIT_READY:
2874 c->Request.CDBLen = 6;
2875 c->Request.Type.Attribute = ATTR_SIMPLE;
2876 c->Request.Type.Direction = XFER_NONE;
2877 c->Request.Timeout = 0;
2878 break;
2879 default:
2880 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2881 BUG();
2882 return;
2883 }
2884 } else if (cmd_type == TYPE_MSG) {
2885 switch (cmd) {
2886
2887 case HPSA_DEVICE_RESET_MSG:
2888 c->Request.CDBLen = 16;
2889 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2890 c->Request.Type.Attribute = ATTR_SIMPLE;
2891 c->Request.Type.Direction = XFER_NONE;
2892 c->Request.Timeout = 0; /* Don't time out */
2893 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2894 c->Request.CDB[0] = cmd;
2895 c->Request.CDB[1] = 0x03; /* Reset target above */
2896 /* If bytes 4-7 are zero, it means reset the */
2897 /* LunID device */
2898 c->Request.CDB[4] = 0x00;
2899 c->Request.CDB[5] = 0x00;
2900 c->Request.CDB[6] = 0x00;
2901 c->Request.CDB[7] = 0x00;
2902 break;
2903
2904 default:
2905 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2906 cmd);
2907 BUG();
2908 }
2909 } else {
2910 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2911 BUG();
2912 }
2913
2914 switch (c->Request.Type.Direction) {
2915 case XFER_READ:
2916 pci_dir = PCI_DMA_FROMDEVICE;
2917 break;
2918 case XFER_WRITE:
2919 pci_dir = PCI_DMA_TODEVICE;
2920 break;
2921 case XFER_NONE:
2922 pci_dir = PCI_DMA_NONE;
2923 break;
2924 default:
2925 pci_dir = PCI_DMA_BIDIRECTIONAL;
2926 }
2927
2928 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2929
2930 return;
2931 }
2932
2933 /*
2934 * Map (physical) PCI mem into (virtual) kernel space
2935 */
2936 static void __iomem *remap_pci_mem(ulong base, ulong size)
2937 {
2938 ulong page_base = ((ulong) base) & PAGE_MASK;
2939 ulong page_offs = ((ulong) base) - page_base;
2940 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2941
2942 return page_remapped ? (page_remapped + page_offs) : NULL;
2943 }
2944
2945 /* Takes cmds off the submission queue and sends them to the hardware,
2946 * then puts them on the queue of cmds waiting for completion.
2947 */
2948 static void start_io(struct ctlr_info *h)
2949 {
2950 struct CommandList *c;
2951
2952 while (!list_empty(&h->reqQ)) {
2953 c = list_entry(h->reqQ.next, struct CommandList, list);
2954 /* can't do anything if fifo is full */
2955 if ((h->access.fifo_full(h))) {
2956 dev_warn(&h->pdev->dev, "fifo full\n");
2957 break;
2958 }
2959
2960 /* Get the first entry from the Request Q */
2961 removeQ(c);
2962 h->Qdepth--;
2963
2964 /* Tell the controller execute command */
2965 h->access.submit_command(h, c);
2966
2967 /* Put job onto the completed Q */
2968 addQ(&h->cmpQ, c);
2969 }
2970 }
2971
2972 static inline unsigned long get_next_completion(struct ctlr_info *h)
2973 {
2974 return h->access.command_completed(h);
2975 }
2976
2977 static inline bool interrupt_pending(struct ctlr_info *h)
2978 {
2979 return h->access.intr_pending(h);
2980 }
2981
2982 static inline long interrupt_not_for_us(struct ctlr_info *h)
2983 {
2984 return (h->access.intr_pending(h) == 0) ||
2985 (h->interrupts_enabled == 0);
2986 }
2987
2988 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2989 u32 raw_tag)
2990 {
2991 if (unlikely(tag_index >= h->nr_cmds)) {
2992 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2993 return 1;
2994 }
2995 return 0;
2996 }
2997
2998 static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
2999 {
3000 removeQ(c);
3001 if (likely(c->cmd_type == CMD_SCSI))
3002 complete_scsi_command(c);
3003 else if (c->cmd_type == CMD_IOCTL_PEND)
3004 complete(c->waiting);
3005 }
3006
3007 static inline u32 hpsa_tag_contains_index(u32 tag)
3008 {
3009 return tag & DIRECT_LOOKUP_BIT;
3010 }
3011
3012 static inline u32 hpsa_tag_to_index(u32 tag)
3013 {
3014 return tag >> DIRECT_LOOKUP_SHIFT;
3015 }
3016
3017
3018 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3019 {
3020 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3021 #define HPSA_SIMPLE_ERROR_BITS 0x03
3022 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3023 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3024 return tag & ~HPSA_PERF_ERROR_BITS;
3025 }
3026
3027 /* process completion of an indexed ("direct lookup") command */
3028 static inline u32 process_indexed_cmd(struct ctlr_info *h,
3029 u32 raw_tag)
3030 {
3031 u32 tag_index;
3032 struct CommandList *c;
3033
3034 tag_index = hpsa_tag_to_index(raw_tag);
3035 if (bad_tag(h, tag_index, raw_tag))
3036 return next_command(h);
3037 c = h->cmd_pool + tag_index;
3038 finish_cmd(c, raw_tag);
3039 return next_command(h);
3040 }
3041
3042 /* process completion of a non-indexed command */
3043 static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3044 u32 raw_tag)
3045 {
3046 u32 tag;
3047 struct CommandList *c = NULL;
3048
3049 tag = hpsa_tag_discard_error_bits(h, raw_tag);
3050 list_for_each_entry(c, &h->cmpQ, list) {
3051 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3052 finish_cmd(c, raw_tag);
3053 return next_command(h);
3054 }
3055 }
3056 bad_tag(h, h->nr_cmds + 1, raw_tag);
3057 return next_command(h);
3058 }
3059
3060 /* Some controllers, like p400, will give us one interrupt
3061 * after a soft reset, even if we turned interrupts off.
3062 * Only need to check for this in the hpsa_xxx_discard_completions
3063 * functions.
3064 */
3065 static int ignore_bogus_interrupt(struct ctlr_info *h)
3066 {
3067 if (likely(!reset_devices))
3068 return 0;
3069
3070 if (likely(h->interrupts_enabled))
3071 return 0;
3072
3073 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3074 "(known firmware bug.) Ignoring.\n");
3075
3076 return 1;
3077 }
3078
3079 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3080 {
3081 struct ctlr_info *h = dev_id;
3082 unsigned long flags;
3083 u32 raw_tag;
3084
3085 if (ignore_bogus_interrupt(h))
3086 return IRQ_NONE;
3087
3088 if (interrupt_not_for_us(h))
3089 return IRQ_NONE;
3090 spin_lock_irqsave(&h->lock, flags);
3091 while (interrupt_pending(h)) {
3092 raw_tag = get_next_completion(h);
3093 while (raw_tag != FIFO_EMPTY)
3094 raw_tag = next_command(h);
3095 }
3096 spin_unlock_irqrestore(&h->lock, flags);
3097 return IRQ_HANDLED;
3098 }
3099
3100 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3101 {
3102 struct ctlr_info *h = dev_id;
3103 unsigned long flags;
3104 u32 raw_tag;
3105
3106 if (ignore_bogus_interrupt(h))
3107 return IRQ_NONE;
3108
3109 spin_lock_irqsave(&h->lock, flags);
3110 raw_tag = get_next_completion(h);
3111 while (raw_tag != FIFO_EMPTY)
3112 raw_tag = next_command(h);
3113 spin_unlock_irqrestore(&h->lock, flags);
3114 return IRQ_HANDLED;
3115 }
3116
3117 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
3118 {
3119 struct ctlr_info *h = dev_id;
3120 unsigned long flags;
3121 u32 raw_tag;
3122
3123 if (interrupt_not_for_us(h))
3124 return IRQ_NONE;
3125 spin_lock_irqsave(&h->lock, flags);
3126 while (interrupt_pending(h)) {
3127 raw_tag = get_next_completion(h);
3128 while (raw_tag != FIFO_EMPTY) {
3129 if (hpsa_tag_contains_index(raw_tag))
3130 raw_tag = process_indexed_cmd(h, raw_tag);
3131 else
3132 raw_tag = process_nonindexed_cmd(h, raw_tag);
3133 }
3134 }
3135 spin_unlock_irqrestore(&h->lock, flags);
3136 return IRQ_HANDLED;
3137 }
3138
3139 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3140 {
3141 struct ctlr_info *h = dev_id;
3142 unsigned long flags;
3143 u32 raw_tag;
3144
3145 spin_lock_irqsave(&h->lock, flags);
3146 raw_tag = get_next_completion(h);
3147 while (raw_tag != FIFO_EMPTY) {
3148 if (hpsa_tag_contains_index(raw_tag))
3149 raw_tag = process_indexed_cmd(h, raw_tag);
3150 else
3151 raw_tag = process_nonindexed_cmd(h, raw_tag);
3152 }
3153 spin_unlock_irqrestore(&h->lock, flags);
3154 return IRQ_HANDLED;
3155 }
3156
3157 /* Send a message CDB to the firmware. Careful, this only works
3158 * in simple mode, not performant mode due to the tag lookup.
3159 * We only ever use this immediately after a controller reset.
3160 */
3161 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3162 unsigned char type)
3163 {
3164 struct Command {
3165 struct CommandListHeader CommandHeader;
3166 struct RequestBlock Request;
3167 struct ErrDescriptor ErrorDescriptor;
3168 };
3169 struct Command *cmd;
3170 static const size_t cmd_sz = sizeof(*cmd) +
3171 sizeof(cmd->ErrorDescriptor);
3172 dma_addr_t paddr64;
3173 uint32_t paddr32, tag;
3174 void __iomem *vaddr;
3175 int i, err;
3176
3177 vaddr = pci_ioremap_bar(pdev, 0);
3178 if (vaddr == NULL)
3179 return -ENOMEM;
3180
3181 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3182 * CCISS commands, so they must be allocated from the lower 4GiB of
3183 * memory.
3184 */
3185 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3186 if (err) {
3187 iounmap(vaddr);
3188 return -ENOMEM;
3189 }
3190
3191 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3192 if (cmd == NULL) {
3193 iounmap(vaddr);
3194 return -ENOMEM;
3195 }
3196
3197 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3198 * although there's no guarantee, we assume that the address is at
3199 * least 4-byte aligned (most likely, it's page-aligned).
3200 */
3201 paddr32 = paddr64;
3202
3203 cmd->CommandHeader.ReplyQueue = 0;
3204 cmd->CommandHeader.SGList = 0;
3205 cmd->CommandHeader.SGTotal = 0;
3206 cmd->CommandHeader.Tag.lower = paddr32;
3207 cmd->CommandHeader.Tag.upper = 0;
3208 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3209
3210 cmd->Request.CDBLen = 16;
3211 cmd->Request.Type.Type = TYPE_MSG;
3212 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3213 cmd->Request.Type.Direction = XFER_NONE;
3214 cmd->Request.Timeout = 0; /* Don't time out */
3215 cmd->Request.CDB[0] = opcode;
3216 cmd->Request.CDB[1] = type;
3217 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3218 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3219 cmd->ErrorDescriptor.Addr.upper = 0;
3220 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3221
3222 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3223
3224 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3225 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3226 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3227 break;
3228 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3229 }
3230
3231 iounmap(vaddr);
3232
3233 /* we leak the DMA buffer here ... no choice since the controller could
3234 * still complete the command.
3235 */
3236 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3237 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3238 opcode, type);
3239 return -ETIMEDOUT;
3240 }
3241
3242 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3243
3244 if (tag & HPSA_ERROR_BIT) {
3245 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3246 opcode, type);
3247 return -EIO;
3248 }
3249
3250 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3251 opcode, type);
3252 return 0;
3253 }
3254
3255 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3256
3257 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3258 void * __iomem vaddr, u32 use_doorbell)
3259 {
3260 u16 pmcsr;
3261 int pos;
3262
3263 if (use_doorbell) {
3264 /* For everything after the P600, the PCI power state method
3265 * of resetting the controller doesn't work, so we have this
3266 * other way using the doorbell register.
3267 */
3268 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3269 writel(use_doorbell, vaddr + SA5_DOORBELL);
3270 } else { /* Try to do it the PCI power state way */
3271
3272 /* Quoting from the Open CISS Specification: "The Power
3273 * Management Control/Status Register (CSR) controls the power
3274 * state of the device. The normal operating state is D0,
3275 * CSR=00h. The software off state is D3, CSR=03h. To reset
3276 * the controller, place the interface device in D3 then to D0,
3277 * this causes a secondary PCI reset which will reset the
3278 * controller." */
3279
3280 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3281 if (pos == 0) {
3282 dev_err(&pdev->dev,
3283 "hpsa_reset_controller: "
3284 "PCI PM not supported\n");
3285 return -ENODEV;
3286 }
3287 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3288 /* enter the D3hot power management state */
3289 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3290 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3291 pmcsr |= PCI_D3hot;
3292 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3293
3294 msleep(500);
3295
3296 /* enter the D0 power management state */
3297 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3298 pmcsr |= PCI_D0;
3299 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3300
3301 /*
3302 * The P600 requires a small delay when changing states.
3303 * Otherwise we may think the board did not reset and we bail.
3304 * This for kdump only and is particular to the P600.
3305 */
3306 msleep(500);
3307 }
3308 return 0;
3309 }
3310
3311 static __devinit void init_driver_version(char *driver_version, int len)
3312 {
3313 memset(driver_version, 0, len);
3314 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3315 }
3316
3317 static __devinit int write_driver_ver_to_cfgtable(
3318 struct CfgTable __iomem *cfgtable)
3319 {
3320 char *driver_version;
3321 int i, size = sizeof(cfgtable->driver_version);
3322
3323 driver_version = kmalloc(size, GFP_KERNEL);
3324 if (!driver_version)
3325 return -ENOMEM;
3326
3327 init_driver_version(driver_version, size);
3328 for (i = 0; i < size; i++)
3329 writeb(driver_version[i], &cfgtable->driver_version[i]);
3330 kfree(driver_version);
3331 return 0;
3332 }
3333
3334 static __devinit void read_driver_ver_from_cfgtable(
3335 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3336 {
3337 int i;
3338
3339 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3340 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3341 }
3342
3343 static __devinit int controller_reset_failed(
3344 struct CfgTable __iomem *cfgtable)
3345 {
3346
3347 char *driver_ver, *old_driver_ver;
3348 int rc, size = sizeof(cfgtable->driver_version);
3349
3350 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3351 if (!old_driver_ver)
3352 return -ENOMEM;
3353 driver_ver = old_driver_ver + size;
3354
3355 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3356 * should have been changed, otherwise we know the reset failed.
3357 */
3358 init_driver_version(old_driver_ver, size);
3359 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3360 rc = !memcmp(driver_ver, old_driver_ver, size);
3361 kfree(old_driver_ver);
3362 return rc;
3363 }
3364 /* This does a hard reset of the controller using PCI power management
3365 * states or the using the doorbell register.
3366 */
3367 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3368 {
3369 u64 cfg_offset;
3370 u32 cfg_base_addr;
3371 u64 cfg_base_addr_index;
3372 void __iomem *vaddr;
3373 unsigned long paddr;
3374 u32 misc_fw_support;
3375 int rc;
3376 struct CfgTable __iomem *cfgtable;
3377 u32 use_doorbell;
3378 u32 board_id;
3379 u16 command_register;
3380
3381 /* For controllers as old as the P600, this is very nearly
3382 * the same thing as
3383 *
3384 * pci_save_state(pci_dev);
3385 * pci_set_power_state(pci_dev, PCI_D3hot);
3386 * pci_set_power_state(pci_dev, PCI_D0);
3387 * pci_restore_state(pci_dev);
3388 *
3389 * For controllers newer than the P600, the pci power state
3390 * method of resetting doesn't work so we have another way
3391 * using the doorbell register.
3392 */
3393
3394 rc = hpsa_lookup_board_id(pdev, &board_id);
3395 if (rc < 0 || !ctlr_is_resettable(board_id)) {
3396 dev_warn(&pdev->dev, "Not resetting device.\n");
3397 return -ENODEV;
3398 }
3399
3400 /* if controller is soft- but not hard resettable... */
3401 if (!ctlr_is_hard_resettable(board_id))
3402 return -ENOTSUPP; /* try soft reset later. */
3403
3404 /* Save the PCI command register */
3405 pci_read_config_word(pdev, 4, &command_register);
3406 /* Turn the board off. This is so that later pci_restore_state()
3407 * won't turn the board on before the rest of config space is ready.
3408 */
3409 pci_disable_device(pdev);
3410 pci_save_state(pdev);
3411
3412 /* find the first memory BAR, so we can find the cfg table */
3413 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3414 if (rc)
3415 return rc;
3416 vaddr = remap_pci_mem(paddr, 0x250);
3417 if (!vaddr)
3418 return -ENOMEM;
3419
3420 /* find cfgtable in order to check if reset via doorbell is supported */
3421 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3422 &cfg_base_addr_index, &cfg_offset);
3423 if (rc)
3424 goto unmap_vaddr;
3425 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3426 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3427 if (!cfgtable) {
3428 rc = -ENOMEM;
3429 goto unmap_vaddr;
3430 }
3431 rc = write_driver_ver_to_cfgtable(cfgtable);
3432 if (rc)
3433 goto unmap_vaddr;
3434
3435 /* If reset via doorbell register is supported, use that.
3436 * There are two such methods. Favor the newest method.
3437 */
3438 misc_fw_support = readl(&cfgtable->misc_fw_support);
3439 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3440 if (use_doorbell) {
3441 use_doorbell = DOORBELL_CTLR_RESET2;
3442 } else {
3443 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3444 if (use_doorbell) {
3445 dev_warn(&pdev->dev, "Controller claims that "
3446 "'Bit 2 doorbell reset' is "
3447 "supported, but not 'bit 5 doorbell reset'. "
3448 "Firmware update is recommended.\n");
3449 rc = -ENOTSUPP; /* try soft reset */
3450 goto unmap_cfgtable;
3451 }
3452 }
3453
3454 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3455 if (rc)
3456 goto unmap_cfgtable;
3457
3458 pci_restore_state(pdev);
3459 rc = pci_enable_device(pdev);
3460 if (rc) {
3461 dev_warn(&pdev->dev, "failed to enable device.\n");
3462 goto unmap_cfgtable;
3463 }
3464 pci_write_config_word(pdev, 4, command_register);
3465
3466 /* Some devices (notably the HP Smart Array 5i Controller)
3467 need a little pause here */
3468 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3469
3470 /* Wait for board to become not ready, then ready. */
3471 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3472 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3473 if (rc) {
3474 dev_warn(&pdev->dev,
3475 "failed waiting for board to reset."
3476 " Will try soft reset.\n");
3477 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3478 goto unmap_cfgtable;
3479 }
3480 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3481 if (rc) {
3482 dev_warn(&pdev->dev,
3483 "failed waiting for board to become ready "
3484 "after hard reset\n");
3485 goto unmap_cfgtable;
3486 }
3487
3488 rc = controller_reset_failed(vaddr);
3489 if (rc < 0)
3490 goto unmap_cfgtable;
3491 if (rc) {
3492 dev_warn(&pdev->dev, "Unable to successfully reset "
3493 "controller. Will try soft reset.\n");
3494 rc = -ENOTSUPP;
3495 } else {
3496 dev_info(&pdev->dev, "board ready after hard reset.\n");
3497 }
3498
3499 unmap_cfgtable:
3500 iounmap(cfgtable);
3501
3502 unmap_vaddr:
3503 iounmap(vaddr);
3504 return rc;
3505 }
3506
3507 /*
3508 * We cannot read the structure directly, for portability we must use
3509 * the io functions.
3510 * This is for debug only.
3511 */
3512 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3513 {
3514 #ifdef HPSA_DEBUG
3515 int i;
3516 char temp_name[17];
3517
3518 dev_info(dev, "Controller Configuration information\n");
3519 dev_info(dev, "------------------------------------\n");
3520 for (i = 0; i < 4; i++)
3521 temp_name[i] = readb(&(tb->Signature[i]));
3522 temp_name[4] = '\0';
3523 dev_info(dev, " Signature = %s\n", temp_name);
3524 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3525 dev_info(dev, " Transport methods supported = 0x%x\n",
3526 readl(&(tb->TransportSupport)));
3527 dev_info(dev, " Transport methods active = 0x%x\n",
3528 readl(&(tb->TransportActive)));
3529 dev_info(dev, " Requested transport Method = 0x%x\n",
3530 readl(&(tb->HostWrite.TransportRequest)));
3531 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3532 readl(&(tb->HostWrite.CoalIntDelay)));
3533 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3534 readl(&(tb->HostWrite.CoalIntCount)));
3535 dev_info(dev, " Max outstanding commands = 0x%d\n",
3536 readl(&(tb->CmdsOutMax)));
3537 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3538 for (i = 0; i < 16; i++)
3539 temp_name[i] = readb(&(tb->ServerName[i]));
3540 temp_name[16] = '\0';
3541 dev_info(dev, " Server Name = %s\n", temp_name);
3542 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3543 readl(&(tb->HeartBeat)));
3544 #endif /* HPSA_DEBUG */
3545 }
3546
3547 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3548 {
3549 int i, offset, mem_type, bar_type;
3550
3551 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3552 return 0;
3553 offset = 0;
3554 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3555 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3556 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3557 offset += 4;
3558 else {
3559 mem_type = pci_resource_flags(pdev, i) &
3560 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3561 switch (mem_type) {
3562 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3563 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3564 offset += 4; /* 32 bit */
3565 break;
3566 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3567 offset += 8;
3568 break;
3569 default: /* reserved in PCI 2.2 */
3570 dev_warn(&pdev->dev,
3571 "base address is invalid\n");
3572 return -1;
3573 break;
3574 }
3575 }
3576 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3577 return i + 1;
3578 }
3579 return -1;
3580 }
3581
3582 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3583 * controllers that are capable. If not, we use IO-APIC mode.
3584 */
3585
3586 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
3587 {
3588 #ifdef CONFIG_PCI_MSI
3589 int err;
3590 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3591 {0, 2}, {0, 3}
3592 };
3593
3594 /* Some boards advertise MSI but don't really support it */
3595 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3596 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3597 goto default_int_mode;
3598 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3599 dev_info(&h->pdev->dev, "MSIX\n");
3600 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
3601 if (!err) {
3602 h->intr[0] = hpsa_msix_entries[0].vector;
3603 h->intr[1] = hpsa_msix_entries[1].vector;
3604 h->intr[2] = hpsa_msix_entries[2].vector;
3605 h->intr[3] = hpsa_msix_entries[3].vector;
3606 h->msix_vector = 1;
3607 return;
3608 }
3609 if (err > 0) {
3610 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
3611 "available\n", err);
3612 goto default_int_mode;
3613 } else {
3614 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
3615 err);
3616 goto default_int_mode;
3617 }
3618 }
3619 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3620 dev_info(&h->pdev->dev, "MSI\n");
3621 if (!pci_enable_msi(h->pdev))
3622 h->msi_vector = 1;
3623 else
3624 dev_warn(&h->pdev->dev, "MSI init failed\n");
3625 }
3626 default_int_mode:
3627 #endif /* CONFIG_PCI_MSI */
3628 /* if we get here we're going to use the default interrupt mode */
3629 h->intr[h->intr_mode] = h->pdev->irq;
3630 }
3631
3632 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3633 {
3634 int i;
3635 u32 subsystem_vendor_id, subsystem_device_id;
3636
3637 subsystem_vendor_id = pdev->subsystem_vendor;
3638 subsystem_device_id = pdev->subsystem_device;
3639 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3640 subsystem_vendor_id;
3641
3642 for (i = 0; i < ARRAY_SIZE(products); i++)
3643 if (*board_id == products[i].board_id)
3644 return i;
3645
3646 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3647 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3648 !hpsa_allow_any) {
3649 dev_warn(&pdev->dev, "unrecognized board ID: "
3650 "0x%08x, ignoring.\n", *board_id);
3651 return -ENODEV;
3652 }
3653 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3654 }
3655
3656 static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3657 {
3658 u16 command;
3659
3660 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3661 return ((command & PCI_COMMAND_MEMORY) == 0);
3662 }
3663
3664 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3665 unsigned long *memory_bar)
3666 {
3667 int i;
3668
3669 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3670 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3671 /* addressing mode bits already removed */
3672 *memory_bar = pci_resource_start(pdev, i);
3673 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3674 *memory_bar);
3675 return 0;
3676 }
3677 dev_warn(&pdev->dev, "no memory BAR found\n");
3678 return -ENODEV;
3679 }
3680
3681 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3682 void __iomem *vaddr, int wait_for_ready)
3683 {
3684 int i, iterations;
3685 u32 scratchpad;
3686 if (wait_for_ready)
3687 iterations = HPSA_BOARD_READY_ITERATIONS;
3688 else
3689 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
3690
3691 for (i = 0; i < iterations; i++) {
3692 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3693 if (wait_for_ready) {
3694 if (scratchpad == HPSA_FIRMWARE_READY)
3695 return 0;
3696 } else {
3697 if (scratchpad != HPSA_FIRMWARE_READY)
3698 return 0;
3699 }
3700 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3701 }
3702 dev_warn(&pdev->dev, "board not ready, timed out.\n");
3703 return -ENODEV;
3704 }
3705
3706 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3707 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3708 u64 *cfg_offset)
3709 {
3710 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3711 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3712 *cfg_base_addr &= (u32) 0x0000ffff;
3713 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3714 if (*cfg_base_addr_index == -1) {
3715 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3716 return -ENODEV;
3717 }
3718 return 0;
3719 }
3720
3721 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
3722 {
3723 u64 cfg_offset;
3724 u32 cfg_base_addr;
3725 u64 cfg_base_addr_index;
3726 u32 trans_offset;
3727 int rc;
3728
3729 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3730 &cfg_base_addr_index, &cfg_offset);
3731 if (rc)
3732 return rc;
3733 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
3734 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
3735 if (!h->cfgtable)
3736 return -ENOMEM;
3737 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3738 if (rc)
3739 return rc;
3740 /* Find performant mode table. */
3741 trans_offset = readl(&h->cfgtable->TransMethodOffset);
3742 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3743 cfg_base_addr_index)+cfg_offset+trans_offset,
3744 sizeof(*h->transtable));
3745 if (!h->transtable)
3746 return -ENOMEM;
3747 return 0;
3748 }
3749
3750 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3751 {
3752 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3753
3754 /* Limit commands in memory limited kdump scenario. */
3755 if (reset_devices && h->max_commands > 32)
3756 h->max_commands = 32;
3757
3758 if (h->max_commands < 16) {
3759 dev_warn(&h->pdev->dev, "Controller reports "
3760 "max supported commands of %d, an obvious lie. "
3761 "Using 16. Ensure that firmware is up to date.\n",
3762 h->max_commands);
3763 h->max_commands = 16;
3764 }
3765 }
3766
3767 /* Interrogate the hardware for some limits:
3768 * max commands, max SG elements without chaining, and with chaining,
3769 * SG chain block size, etc.
3770 */
3771 static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3772 {
3773 hpsa_get_max_perf_mode_cmds(h);
3774 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3775 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3776 /*
3777 * Limit in-command s/g elements to 32 save dma'able memory.
3778 * Howvever spec says if 0, use 31
3779 */
3780 h->max_cmd_sg_entries = 31;
3781 if (h->maxsgentries > 512) {
3782 h->max_cmd_sg_entries = 32;
3783 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3784 h->maxsgentries--; /* save one for chain pointer */
3785 } else {
3786 h->maxsgentries = 31; /* default to traditional values */
3787 h->chainsize = 0;
3788 }
3789 }
3790
3791 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3792 {
3793 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3794 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3795 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3796 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3797 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3798 return false;
3799 }
3800 return true;
3801 }
3802
3803 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
3804 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3805 {
3806 #ifdef CONFIG_X86
3807 u32 prefetch;
3808
3809 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3810 prefetch |= 0x100;
3811 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3812 #endif
3813 }
3814
3815 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3816 * in a prefetch beyond physical memory.
3817 */
3818 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3819 {
3820 u32 dma_prefetch;
3821
3822 if (h->board_id != 0x3225103C)
3823 return;
3824 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3825 dma_prefetch |= 0x8000;
3826 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3827 }
3828
3829 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
3830 {
3831 int i;
3832 u32 doorbell_value;
3833 unsigned long flags;
3834
3835 /* under certain very rare conditions, this can take awhile.
3836 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3837 * as we enter this code.)
3838 */
3839 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3840 spin_lock_irqsave(&h->lock, flags);
3841 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3842 spin_unlock_irqrestore(&h->lock, flags);
3843 if (!(doorbell_value & CFGTBL_ChangeReq))
3844 break;
3845 /* delay and try again */
3846 usleep_range(10000, 20000);
3847 }
3848 }
3849
3850 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3851 {
3852 u32 trans_support;
3853
3854 trans_support = readl(&(h->cfgtable->TransportSupport));
3855 if (!(trans_support & SIMPLE_MODE))
3856 return -ENOTSUPP;
3857
3858 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3859 /* Update the field, and then ring the doorbell */
3860 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3861 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3862 hpsa_wait_for_mode_change_ack(h);
3863 print_cfg_table(&h->pdev->dev, h->cfgtable);
3864 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3865 dev_warn(&h->pdev->dev,
3866 "unable to get board into simple mode\n");
3867 return -ENODEV;
3868 }
3869 h->transMethod = CFGTBL_Trans_Simple;
3870 return 0;
3871 }
3872
3873 static int __devinit hpsa_pci_init(struct ctlr_info *h)
3874 {
3875 int prod_index, err;
3876
3877 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3878 if (prod_index < 0)
3879 return -ENODEV;
3880 h->product_name = products[prod_index].product_name;
3881 h->access = *(products[prod_index].access);
3882
3883 if (hpsa_board_disabled(h->pdev)) {
3884 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
3885 return -ENODEV;
3886 }
3887
3888 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
3889 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
3890
3891 err = pci_enable_device(h->pdev);
3892 if (err) {
3893 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
3894 return err;
3895 }
3896
3897 err = pci_request_regions(h->pdev, "hpsa");
3898 if (err) {
3899 dev_err(&h->pdev->dev,
3900 "cannot obtain PCI resources, aborting\n");
3901 return err;
3902 }
3903 hpsa_interrupt_mode(h);
3904 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3905 if (err)
3906 goto err_out_free_res;
3907 h->vaddr = remap_pci_mem(h->paddr, 0x250);
3908 if (!h->vaddr) {
3909 err = -ENOMEM;
3910 goto err_out_free_res;
3911 }
3912 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
3913 if (err)
3914 goto err_out_free_res;
3915 err = hpsa_find_cfgtables(h);
3916 if (err)
3917 goto err_out_free_res;
3918 hpsa_find_board_params(h);
3919
3920 if (!hpsa_CISS_signature_present(h)) {
3921 err = -ENODEV;
3922 goto err_out_free_res;
3923 }
3924 hpsa_enable_scsi_prefetch(h);
3925 hpsa_p600_dma_prefetch_quirk(h);
3926 err = hpsa_enter_simple_mode(h);
3927 if (err)
3928 goto err_out_free_res;
3929 return 0;
3930
3931 err_out_free_res:
3932 if (h->transtable)
3933 iounmap(h->transtable);
3934 if (h->cfgtable)
3935 iounmap(h->cfgtable);
3936 if (h->vaddr)
3937 iounmap(h->vaddr);
3938 /*
3939 * Deliberately omit pci_disable_device(): it does something nasty to
3940 * Smart Array controllers that pci_enable_device does not undo
3941 */
3942 pci_release_regions(h->pdev);
3943 return err;
3944 }
3945
3946 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3947 {
3948 int rc;
3949
3950 #define HBA_INQUIRY_BYTE_COUNT 64
3951 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3952 if (!h->hba_inquiry_data)
3953 return;
3954 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3955 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3956 if (rc != 0) {
3957 kfree(h->hba_inquiry_data);
3958 h->hba_inquiry_data = NULL;
3959 }
3960 }
3961
3962 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3963 {
3964 int rc, i;
3965
3966 if (!reset_devices)
3967 return 0;
3968
3969 /* Reset the controller with a PCI power-cycle or via doorbell */
3970 rc = hpsa_kdump_hard_reset_controller(pdev);
3971
3972 /* -ENOTSUPP here means we cannot reset the controller
3973 * but it's already (and still) up and running in
3974 * "performant mode". Or, it might be 640x, which can't reset
3975 * due to concerns about shared bbwc between 6402/6404 pair.
3976 */
3977 if (rc == -ENOTSUPP)
3978 return rc; /* just try to do the kdump anyhow. */
3979 if (rc)
3980 return -ENODEV;
3981
3982 /* Now try to get the controller to respond to a no-op */
3983 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
3984 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3985 if (hpsa_noop(pdev) == 0)
3986 break;
3987 else
3988 dev_warn(&pdev->dev, "no-op failed%s\n",
3989 (i < 11 ? "; re-trying" : ""));
3990 }
3991 return 0;
3992 }
3993
3994 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
3995 {
3996 h->cmd_pool_bits = kzalloc(
3997 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
3998 sizeof(unsigned long), GFP_KERNEL);
3999 h->cmd_pool = pci_alloc_consistent(h->pdev,
4000 h->nr_cmds * sizeof(*h->cmd_pool),
4001 &(h->cmd_pool_dhandle));
4002 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4003 h->nr_cmds * sizeof(*h->errinfo_pool),
4004 &(h->errinfo_pool_dhandle));
4005 if ((h->cmd_pool_bits == NULL)
4006 || (h->cmd_pool == NULL)
4007 || (h->errinfo_pool == NULL)) {
4008 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4009 return -ENOMEM;
4010 }
4011 return 0;
4012 }
4013
4014 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4015 {
4016 kfree(h->cmd_pool_bits);
4017 if (h->cmd_pool)
4018 pci_free_consistent(h->pdev,
4019 h->nr_cmds * sizeof(struct CommandList),
4020 h->cmd_pool, h->cmd_pool_dhandle);
4021 if (h->errinfo_pool)
4022 pci_free_consistent(h->pdev,
4023 h->nr_cmds * sizeof(struct ErrorInfo),
4024 h->errinfo_pool,
4025 h->errinfo_pool_dhandle);
4026 }
4027
4028 static int hpsa_request_irq(struct ctlr_info *h,
4029 irqreturn_t (*msixhandler)(int, void *),
4030 irqreturn_t (*intxhandler)(int, void *))
4031 {
4032 int rc;
4033
4034 if (h->msix_vector || h->msi_vector)
4035 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4036 0, h->devname, h);
4037 else
4038 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4039 IRQF_SHARED, h->devname, h);
4040 if (rc) {
4041 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4042 h->intr[h->intr_mode], h->devname);
4043 return -ENODEV;
4044 }
4045 return 0;
4046 }
4047
4048 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4049 {
4050 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4051 HPSA_RESET_TYPE_CONTROLLER)) {
4052 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4053 return -EIO;
4054 }
4055
4056 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4057 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4058 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4059 return -1;
4060 }
4061
4062 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4063 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4064 dev_warn(&h->pdev->dev, "Board failed to become ready "
4065 "after soft reset.\n");
4066 return -1;
4067 }
4068
4069 return 0;
4070 }
4071
4072 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4073 {
4074 free_irq(h->intr[h->intr_mode], h);
4075 #ifdef CONFIG_PCI_MSI
4076 if (h->msix_vector)
4077 pci_disable_msix(h->pdev);
4078 else if (h->msi_vector)
4079 pci_disable_msi(h->pdev);
4080 #endif /* CONFIG_PCI_MSI */
4081 hpsa_free_sg_chain_blocks(h);
4082 hpsa_free_cmd_pool(h);
4083 kfree(h->blockFetchTable);
4084 pci_free_consistent(h->pdev, h->reply_pool_size,
4085 h->reply_pool, h->reply_pool_dhandle);
4086 if (h->vaddr)
4087 iounmap(h->vaddr);
4088 if (h->transtable)
4089 iounmap(h->transtable);
4090 if (h->cfgtable)
4091 iounmap(h->cfgtable);
4092 pci_release_regions(h->pdev);
4093 kfree(h);
4094 }
4095
4096 static int __devinit hpsa_init_one(struct pci_dev *pdev,
4097 const struct pci_device_id *ent)
4098 {
4099 int dac, rc;
4100 struct ctlr_info *h;
4101 int try_soft_reset = 0;
4102 unsigned long flags;
4103
4104 if (number_of_controllers == 0)
4105 printk(KERN_INFO DRIVER_NAME "\n");
4106
4107 rc = hpsa_init_reset_devices(pdev);
4108 if (rc) {
4109 if (rc != -ENOTSUPP)
4110 return rc;
4111 /* If the reset fails in a particular way (it has no way to do
4112 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4113 * a soft reset once we get the controller configured up to the
4114 * point that it can accept a command.
4115 */
4116 try_soft_reset = 1;
4117 rc = 0;
4118 }
4119
4120 reinit_after_soft_reset:
4121
4122 /* Command structures must be aligned on a 32-byte boundary because
4123 * the 5 lower bits of the address are used by the hardware. and by
4124 * the driver. See comments in hpsa.h for more info.
4125 */
4126 #define COMMANDLIST_ALIGNMENT 32
4127 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4128 h = kzalloc(sizeof(*h), GFP_KERNEL);
4129 if (!h)
4130 return -ENOMEM;
4131
4132 h->pdev = pdev;
4133 h->busy_initializing = 1;
4134 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4135 INIT_LIST_HEAD(&h->cmpQ);
4136 INIT_LIST_HEAD(&h->reqQ);
4137 spin_lock_init(&h->lock);
4138 spin_lock_init(&h->scan_lock);
4139 rc = hpsa_pci_init(h);
4140 if (rc != 0)
4141 goto clean1;
4142
4143 sprintf(h->devname, "hpsa%d", number_of_controllers);
4144 h->ctlr = number_of_controllers;
4145 number_of_controllers++;
4146
4147 /* configure PCI DMA stuff */
4148 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4149 if (rc == 0) {
4150 dac = 1;
4151 } else {
4152 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4153 if (rc == 0) {
4154 dac = 0;
4155 } else {
4156 dev_err(&pdev->dev, "no suitable DMA available\n");
4157 goto clean1;
4158 }
4159 }
4160
4161 /* make sure the board interrupts are off */
4162 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4163
4164 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4165 goto clean2;
4166 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4167 h->devname, pdev->device,
4168 h->intr[h->intr_mode], dac ? "" : " not");
4169 if (hpsa_allocate_cmd_pool(h))
4170 goto clean4;
4171 if (hpsa_allocate_sg_chain_blocks(h))
4172 goto clean4;
4173 init_waitqueue_head(&h->scan_wait_queue);
4174 h->scan_finished = 1; /* no scan currently in progress */
4175
4176 pci_set_drvdata(pdev, h);
4177 h->ndevices = 0;
4178 h->scsi_host = NULL;
4179 spin_lock_init(&h->devlock);
4180 hpsa_put_ctlr_into_performant_mode(h);
4181
4182 /* At this point, the controller is ready to take commands.
4183 * Now, if reset_devices and the hard reset didn't work, try
4184 * the soft reset and see if that works.
4185 */
4186 if (try_soft_reset) {
4187
4188 /* This is kind of gross. We may or may not get a completion
4189 * from the soft reset command, and if we do, then the value
4190 * from the fifo may or may not be valid. So, we wait 10 secs
4191 * after the reset throwing away any completions we get during
4192 * that time. Unregister the interrupt handler and register
4193 * fake ones to scoop up any residual completions.
4194 */
4195 spin_lock_irqsave(&h->lock, flags);
4196 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4197 spin_unlock_irqrestore(&h->lock, flags);
4198 free_irq(h->intr[h->intr_mode], h);
4199 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4200 hpsa_intx_discard_completions);
4201 if (rc) {
4202 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4203 "soft reset.\n");
4204 goto clean4;
4205 }
4206
4207 rc = hpsa_kdump_soft_reset(h);
4208 if (rc)
4209 /* Neither hard nor soft reset worked, we're hosed. */
4210 goto clean4;
4211
4212 dev_info(&h->pdev->dev, "Board READY.\n");
4213 dev_info(&h->pdev->dev,
4214 "Waiting for stale completions to drain.\n");
4215 h->access.set_intr_mask(h, HPSA_INTR_ON);
4216 msleep(10000);
4217 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4218
4219 rc = controller_reset_failed(h->cfgtable);
4220 if (rc)
4221 dev_info(&h->pdev->dev,
4222 "Soft reset appears to have failed.\n");
4223
4224 /* since the controller's reset, we have to go back and re-init
4225 * everything. Easiest to just forget what we've done and do it
4226 * all over again.
4227 */
4228 hpsa_undo_allocations_after_kdump_soft_reset(h);
4229 try_soft_reset = 0;
4230 if (rc)
4231 /* don't go to clean4, we already unallocated */
4232 return -ENODEV;
4233
4234 goto reinit_after_soft_reset;
4235 }
4236
4237 /* Turn the interrupts on so we can service requests */
4238 h->access.set_intr_mask(h, HPSA_INTR_ON);
4239
4240 hpsa_hba_inquiry(h);
4241 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4242 h->busy_initializing = 0;
4243 return 1;
4244
4245 clean4:
4246 hpsa_free_sg_chain_blocks(h);
4247 hpsa_free_cmd_pool(h);
4248 free_irq(h->intr[h->intr_mode], h);
4249 clean2:
4250 clean1:
4251 h->busy_initializing = 0;
4252 kfree(h);
4253 return rc;
4254 }
4255
4256 static void hpsa_flush_cache(struct ctlr_info *h)
4257 {
4258 char *flush_buf;
4259 struct CommandList *c;
4260
4261 flush_buf = kzalloc(4, GFP_KERNEL);
4262 if (!flush_buf)
4263 return;
4264
4265 c = cmd_special_alloc(h);
4266 if (!c) {
4267 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4268 goto out_of_memory;
4269 }
4270 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4271 RAID_CTLR_LUNID, TYPE_CMD);
4272 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4273 if (c->err_info->CommandStatus != 0)
4274 dev_warn(&h->pdev->dev,
4275 "error flushing cache on controller\n");
4276 cmd_special_free(h, c);
4277 out_of_memory:
4278 kfree(flush_buf);
4279 }
4280
4281 static void hpsa_shutdown(struct pci_dev *pdev)
4282 {
4283 struct ctlr_info *h;
4284
4285 h = pci_get_drvdata(pdev);
4286 /* Turn board interrupts off and send the flush cache command
4287 * sendcmd will turn off interrupt, and send the flush...
4288 * To write all data in the battery backed cache to disks
4289 */
4290 hpsa_flush_cache(h);
4291 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4292 free_irq(h->intr[h->intr_mode], h);
4293 #ifdef CONFIG_PCI_MSI
4294 if (h->msix_vector)
4295 pci_disable_msix(h->pdev);
4296 else if (h->msi_vector)
4297 pci_disable_msi(h->pdev);
4298 #endif /* CONFIG_PCI_MSI */
4299 }
4300
4301 static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4302 {
4303 struct ctlr_info *h;
4304
4305 if (pci_get_drvdata(pdev) == NULL) {
4306 dev_err(&pdev->dev, "unable to remove device \n");
4307 return;
4308 }
4309 h = pci_get_drvdata(pdev);
4310 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4311 hpsa_shutdown(pdev);
4312 iounmap(h->vaddr);
4313 iounmap(h->transtable);
4314 iounmap(h->cfgtable);
4315 hpsa_free_sg_chain_blocks(h);
4316 pci_free_consistent(h->pdev,
4317 h->nr_cmds * sizeof(struct CommandList),
4318 h->cmd_pool, h->cmd_pool_dhandle);
4319 pci_free_consistent(h->pdev,
4320 h->nr_cmds * sizeof(struct ErrorInfo),
4321 h->errinfo_pool, h->errinfo_pool_dhandle);
4322 pci_free_consistent(h->pdev, h->reply_pool_size,
4323 h->reply_pool, h->reply_pool_dhandle);
4324 kfree(h->cmd_pool_bits);
4325 kfree(h->blockFetchTable);
4326 kfree(h->hba_inquiry_data);
4327 /*
4328 * Deliberately omit pci_disable_device(): it does something nasty to
4329 * Smart Array controllers that pci_enable_device does not undo
4330 */
4331 pci_release_regions(pdev);
4332 pci_set_drvdata(pdev, NULL);
4333 kfree(h);
4334 }
4335
4336 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4337 __attribute__((unused)) pm_message_t state)
4338 {
4339 return -ENOSYS;
4340 }
4341
4342 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4343 {
4344 return -ENOSYS;
4345 }
4346
4347 static struct pci_driver hpsa_pci_driver = {
4348 .name = "hpsa",
4349 .probe = hpsa_init_one,
4350 .remove = __devexit_p(hpsa_remove_one),
4351 .id_table = hpsa_pci_device_id, /* id_table */
4352 .shutdown = hpsa_shutdown,
4353 .suspend = hpsa_suspend,
4354 .resume = hpsa_resume,
4355 };
4356
4357 /* Fill in bucket_map[], given nsgs (the max number of
4358 * scatter gather elements supported) and bucket[],
4359 * which is an array of 8 integers. The bucket[] array
4360 * contains 8 different DMA transfer sizes (in 16
4361 * byte increments) which the controller uses to fetch
4362 * commands. This function fills in bucket_map[], which
4363 * maps a given number of scatter gather elements to one of
4364 * the 8 DMA transfer sizes. The point of it is to allow the
4365 * controller to only do as much DMA as needed to fetch the
4366 * command, with the DMA transfer size encoded in the lower
4367 * bits of the command address.
4368 */
4369 static void calc_bucket_map(int bucket[], int num_buckets,
4370 int nsgs, int *bucket_map)
4371 {
4372 int i, j, b, size;
4373
4374 /* even a command with 0 SGs requires 4 blocks */
4375 #define MINIMUM_TRANSFER_BLOCKS 4
4376 #define NUM_BUCKETS 8
4377 /* Note, bucket_map must have nsgs+1 entries. */
4378 for (i = 0; i <= nsgs; i++) {
4379 /* Compute size of a command with i SG entries */
4380 size = i + MINIMUM_TRANSFER_BLOCKS;
4381 b = num_buckets; /* Assume the biggest bucket */
4382 /* Find the bucket that is just big enough */
4383 for (j = 0; j < 8; j++) {
4384 if (bucket[j] >= size) {
4385 b = j;
4386 break;
4387 }
4388 }
4389 /* for a command with i SG entries, use bucket b. */
4390 bucket_map[i] = b;
4391 }
4392 }
4393
4394 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4395 u32 use_short_tags)
4396 {
4397 int i;
4398 unsigned long register_value;
4399
4400 /* This is a bit complicated. There are 8 registers on
4401 * the controller which we write to to tell it 8 different
4402 * sizes of commands which there may be. It's a way of
4403 * reducing the DMA done to fetch each command. Encoded into
4404 * each command's tag are 3 bits which communicate to the controller
4405 * which of the eight sizes that command fits within. The size of
4406 * each command depends on how many scatter gather entries there are.
4407 * Each SG entry requires 16 bytes. The eight registers are programmed
4408 * with the number of 16-byte blocks a command of that size requires.
4409 * The smallest command possible requires 5 such 16 byte blocks.
4410 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4411 * blocks. Note, this only extends to the SG entries contained
4412 * within the command block, and does not extend to chained blocks
4413 * of SG elements. bft[] contains the eight values we write to
4414 * the registers. They are not evenly distributed, but have more
4415 * sizes for small commands, and fewer sizes for larger commands.
4416 */
4417 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4418 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
4419 /* 5 = 1 s/g entry or 4k
4420 * 6 = 2 s/g entry or 8k
4421 * 8 = 4 s/g entry or 16k
4422 * 10 = 6 s/g entry or 24k
4423 */
4424
4425 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4426
4427 /* Controller spec: zero out this buffer. */
4428 memset(h->reply_pool, 0, h->reply_pool_size);
4429 h->reply_pool_head = h->reply_pool;
4430
4431 bft[7] = h->max_sg_entries + 4;
4432 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4433 for (i = 0; i < 8; i++)
4434 writel(bft[i], &h->transtable->BlockFetch[i]);
4435
4436 /* size of controller ring buffer */
4437 writel(h->max_commands, &h->transtable->RepQSize);
4438 writel(1, &h->transtable->RepQCount);
4439 writel(0, &h->transtable->RepQCtrAddrLow32);
4440 writel(0, &h->transtable->RepQCtrAddrHigh32);
4441 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4442 writel(0, &h->transtable->RepQAddr0High32);
4443 writel(CFGTBL_Trans_Performant | use_short_tags,
4444 &(h->cfgtable->HostWrite.TransportRequest));
4445 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4446 hpsa_wait_for_mode_change_ack(h);
4447 register_value = readl(&(h->cfgtable->TransportActive));
4448 if (!(register_value & CFGTBL_Trans_Performant)) {
4449 dev_warn(&h->pdev->dev, "unable to get board into"
4450 " performant mode\n");
4451 return;
4452 }
4453 /* Change the access methods to the performant access methods */
4454 h->access = SA5_performant_access;
4455 h->transMethod = CFGTBL_Trans_Performant;
4456 }
4457
4458 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4459 {
4460 u32 trans_support;
4461
4462 if (hpsa_simple_mode)
4463 return;
4464
4465 trans_support = readl(&(h->cfgtable->TransportSupport));
4466 if (!(trans_support & PERFORMANT_MODE))
4467 return;
4468
4469 hpsa_get_max_perf_mode_cmds(h);
4470 h->max_sg_entries = 32;
4471 /* Performant mode ring buffer and supporting data structures */
4472 h->reply_pool_size = h->max_commands * sizeof(u64);
4473 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4474 &(h->reply_pool_dhandle));
4475
4476 /* Need a block fetch table for performant mode */
4477 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4478 sizeof(u32)), GFP_KERNEL);
4479
4480 if ((h->reply_pool == NULL)
4481 || (h->blockFetchTable == NULL))
4482 goto clean_up;
4483
4484 hpsa_enter_performant_mode(h,
4485 trans_support & CFGTBL_Trans_use_short_tags);
4486
4487 return;
4488
4489 clean_up:
4490 if (h->reply_pool)
4491 pci_free_consistent(h->pdev, h->reply_pool_size,
4492 h->reply_pool, h->reply_pool_dhandle);
4493 kfree(h->blockFetchTable);
4494 }
4495
4496 /*
4497 * This is it. Register the PCI driver information for the cards we control
4498 * the OS will call our registered routines when it finds one of our cards.
4499 */
4500 static int __init hpsa_init(void)
4501 {
4502 return pci_register_driver(&hpsa_pci_driver);
4503 }
4504
4505 static void __exit hpsa_cleanup(void)
4506 {
4507 pci_unregister_driver(&hpsa_pci_driver);
4508 }
4509
4510 module_init(hpsa_init);
4511 module_exit(hpsa_cleanup);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree