2 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset
4 * (c) Copyright 2004 Google Inc.
5 * (c) Copyright 2005 David Härdeman <david@2gen.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * based on i810-tco.c which is in turn based on softdog.c
14 * The timer is implemented in the following I/O controller hubs:
15 * (See the intel documentation on http://developer.intel.com.)
16 * 6300ESB chip : document number 300641-004
19 * Initial version 0.01
22 * 20050210 David Härdeman <david@2gen.com>
23 * Ported driver to kernel 2.6
27 * Includes, defines, variables, module parameters, ...
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/init.h>
38 #include <linux/pci.h>
39 #include <linux/ioport.h>
40 #include <linux/uaccess.h>
43 /* Module and version information */
44 #define ESB_VERSION "0.05"
45 #define ESB_MODULE_NAME "i6300ESB timer"
46 #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
47 #define PFX ESB_MODULE_NAME ": "
49 /* PCI configuration registers */
50 #define ESB_CONFIG_REG 0x60 /* Config register */
51 #define ESB_LOCK_REG 0x68 /* WDT lock register */
53 /* Memory mapped registers */
54 #define ESB_TIMER1_REG (BASEADDR + 0x00)/* Timer1 value after each reset */
55 #define ESB_TIMER2_REG (BASEADDR + 0x04)/* Timer2 value after each reset */
56 #define ESB_GINTSR_REG (BASEADDR + 0x08)/* General Interrupt Status Register */
57 #define ESB_RELOAD_REG (BASEADDR + 0x0c)/* Reload register */
59 /* Lock register bits */
60 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
61 #define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
62 #define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
64 /* Config register bits */
65 #define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
66 #define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
67 #define ESB_WDT_INTTYPE (0x03 << 0) /* Interrupt type on timer1 timeout */
69 /* Reload register bits */
70 #define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */
71 #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
74 #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
75 #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
77 /* internal variables */
78 static void __iomem
*BASEADDR
;
79 static DEFINE_SPINLOCK(esb_lock
); /* Guards the hardware */
80 static unsigned long timer_alive
;
81 static struct pci_dev
*esb_pci
;
82 static unsigned short triggered
; /* The status of the watchdog upon boot */
83 static char esb_expect_close
;
85 /* We can only use 1 card due to the /dev/watchdog restriction */
86 static int cards_found
;
88 /* module parameters */
89 /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
90 #define WATCHDOG_HEARTBEAT 30
91 static int heartbeat
= WATCHDOG_HEARTBEAT
; /* in seconds */
92 module_param(heartbeat
, int, 0);
93 MODULE_PARM_DESC(heartbeat
,
94 "Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
95 __MODULE_STRING(WATCHDOG_HEARTBEAT
) ")");
97 static int nowayout
= WATCHDOG_NOWAYOUT
;
98 module_param(nowayout
, int, 0);
99 MODULE_PARM_DESC(nowayout
,
100 "Watchdog cannot be stopped once started (default="
101 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
104 * Some i6300ESB specific functions
108 * Prepare for reloading the timer by unlocking the proper registers.
109 * This is performed by first writing 0x80 followed by 0x86 to the
110 * reload register. After this the appropriate registers can be written
111 * to once before they need to be unlocked again.
113 static inline void esb_unlock_registers(void)
115 writew(ESB_UNLOCK1
, ESB_RELOAD_REG
);
116 writew(ESB_UNLOCK2
, ESB_RELOAD_REG
);
119 static int esb_timer_start(void)
123 spin_lock(&esb_lock
);
124 esb_unlock_registers();
125 writew(ESB_WDT_RELOAD
, ESB_RELOAD_REG
);
126 /* Enable or Enable + Lock? */
127 val
= ESB_WDT_ENABLE
| (nowayout
? ESB_WDT_LOCK
: 0x00);
128 pci_write_config_byte(esb_pci
, ESB_LOCK_REG
, val
);
129 spin_unlock(&esb_lock
);
133 static int esb_timer_stop(void)
137 spin_lock(&esb_lock
);
138 /* First, reset timers as suggested by the docs */
139 esb_unlock_registers();
140 writew(ESB_WDT_RELOAD
, ESB_RELOAD_REG
);
141 /* Then disable the WDT */
142 pci_write_config_byte(esb_pci
, ESB_LOCK_REG
, 0x0);
143 pci_read_config_byte(esb_pci
, ESB_LOCK_REG
, &val
);
144 spin_unlock(&esb_lock
);
146 /* Returns 0 if the timer was disabled, non-zero otherwise */
147 return val
& ESB_WDT_ENABLE
;
150 static void esb_timer_keepalive(void)
152 spin_lock(&esb_lock
);
153 esb_unlock_registers();
154 writew(ESB_WDT_RELOAD
, ESB_RELOAD_REG
);
155 /* FIXME: Do we need to flush anything here? */
156 spin_unlock(&esb_lock
);
159 static int esb_timer_set_heartbeat(int time
)
163 if (time
< 0x1 || time
> (2 * 0x03ff))
166 spin_lock(&esb_lock
);
168 /* We shift by 9, so if we are passed a value of 1 sec,
169 * val will be 1 << 9 = 512, then write that to two
170 * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
175 esb_unlock_registers();
176 writel(val
, ESB_TIMER1_REG
);
179 esb_unlock_registers();
180 writel(val
, ESB_TIMER2_REG
);
183 esb_unlock_registers();
184 writew(ESB_WDT_RELOAD
, ESB_RELOAD_REG
);
186 /* FIXME: Do we need to flush everything out? */
190 spin_unlock(&esb_lock
);
195 * /dev/watchdog handling
198 static int esb_open(struct inode
*inode
, struct file
*file
)
200 /* /dev/watchdog can only be opened once */
201 if (test_and_set_bit(0, &timer_alive
))
204 /* Reload and activate timer */
207 return nonseekable_open(inode
, file
);
210 static int esb_release(struct inode
*inode
, struct file
*file
)
212 /* Shut off the timer. */
213 if (esb_expect_close
== 42)
217 "Unexpected close, not stopping watchdog!\n");
218 esb_timer_keepalive();
220 clear_bit(0, &timer_alive
);
221 esb_expect_close
= 0;
225 static ssize_t
esb_write(struct file
*file
, const char __user
*data
,
226 size_t len
, loff_t
*ppos
)
228 /* See if we got the magic character 'V' and reload the timer */
233 /* note: just in case someone wrote the magic character
234 * five months ago... */
235 esb_expect_close
= 0;
237 /* scan to see whether or not we got the
239 for (i
= 0; i
!= len
; i
++) {
241 if (get_user(c
, data
+ i
))
244 esb_expect_close
= 42;
248 /* someone wrote to us, we should reload the timer */
249 esb_timer_keepalive();
254 static long esb_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
256 int new_options
, retval
= -EINVAL
;
258 void __user
*argp
= (void __user
*)arg
;
259 int __user
*p
= argp
;
260 static const struct watchdog_info ident
= {
261 .options
= WDIOF_SETTIMEOUT
|
262 WDIOF_KEEPALIVEPING
|
264 .firmware_version
= 0,
265 .identity
= ESB_MODULE_NAME
,
269 case WDIOC_GETSUPPORT
:
270 return copy_to_user(argp
, &ident
,
271 sizeof(ident
)) ? -EFAULT
: 0;
273 case WDIOC_GETSTATUS
:
274 return put_user(0, p
);
276 case WDIOC_GETBOOTSTATUS
:
277 return put_user(triggered
, p
);
279 case WDIOC_SETOPTIONS
:
281 if (get_user(new_options
, p
))
284 if (new_options
& WDIOS_DISABLECARD
) {
289 if (new_options
& WDIOS_ENABLECARD
) {
295 case WDIOC_KEEPALIVE
:
296 esb_timer_keepalive();
299 case WDIOC_SETTIMEOUT
:
301 if (get_user(new_heartbeat
, p
))
303 if (esb_timer_set_heartbeat(new_heartbeat
))
305 esb_timer_keepalive();
308 case WDIOC_GETTIMEOUT
:
309 return put_user(heartbeat
, p
);
319 static const struct file_operations esb_fops
= {
320 .owner
= THIS_MODULE
,
323 .unlocked_ioctl
= esb_ioctl
,
325 .release
= esb_release
,
328 static struct miscdevice esb_miscdev
= {
329 .minor
= WATCHDOG_MINOR
,
335 * Data for PCI driver interface
337 static struct pci_device_id esb_pci_tbl
[] = {
338 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_ESB_9
), },
339 { 0, }, /* End of list */
341 MODULE_DEVICE_TABLE(pci
, esb_pci_tbl
);
344 * Init & exit routines
347 static unsigned char __devinit
esb_getdevice(struct pci_dev
*pdev
)
349 if (pci_enable_device(pdev
)) {
350 printk(KERN_ERR PFX
"failed to enable device\n");
354 if (pci_request_region(pdev
, 0, ESB_MODULE_NAME
)) {
355 printk(KERN_ERR PFX
"failed to request region\n");
359 BASEADDR
= pci_ioremap_bar(pdev
, 0);
360 if (BASEADDR
== NULL
) {
361 /* Something's wrong here, BASEADDR has to be set */
362 printk(KERN_ERR PFX
"failed to get BASEADDR\n");
371 pci_release_region(pdev
, 0);
373 pci_disable_device(pdev
);
378 static void __devinit
esb_initdevice(void)
385 * Bit 5 : 0 = Enable WDT_OUTPUT
386 * Bit 2 : 0 = set the timer frequency to the PCI clock
387 * divided by 2^15 (approx 1KHz).
388 * Bits 1:0 : 11 = WDT_INT_TYPE Disabled.
389 * The watchdog has two timers, it can be setup so that the
390 * expiry of timer1 results in an interrupt and the expiry of
391 * timer2 results in a reboot. We set it to not generate
392 * any interrupts as there is not much we can do with it
395 pci_write_config_word(esb_pci
, ESB_CONFIG_REG
, 0x0003);
397 /* Check that the WDT isn't already locked */
398 pci_read_config_byte(esb_pci
, ESB_LOCK_REG
, &val1
);
399 if (val1
& ESB_WDT_LOCK
)
400 printk(KERN_WARNING PFX
"nowayout already set\n");
402 /* Set the timer to watchdog mode and disable it for now */
403 pci_write_config_byte(esb_pci
, ESB_LOCK_REG
, 0x00);
405 /* Check if the watchdog was previously triggered */
406 esb_unlock_registers();
407 val2
= readw(ESB_RELOAD_REG
);
408 if (val2
& ESB_WDT_TIMEOUT
)
409 triggered
= WDIOF_CARDRESET
;
411 /* Reset WDT_TIMEOUT flag and timers */
412 esb_unlock_registers();
413 writew((ESB_WDT_TIMEOUT
| ESB_WDT_RELOAD
), ESB_RELOAD_REG
);
415 /* And set the correct timeout value */
416 esb_timer_set_heartbeat(heartbeat
);
419 static int __devinit
esb_probe(struct pci_dev
*pdev
,
420 const struct pci_device_id
*ent
)
425 if (cards_found
== 1)
426 printk(KERN_INFO PFX
"Intel 6300ESB WatchDog Timer Driver v%s\n",
429 if (cards_found
> 1) {
430 printk(KERN_ERR PFX
"This driver only supports 1 device\n");
434 /* Check whether or not the hardware watchdog is there */
435 if (!esb_getdevice(pdev
) || esb_pci
== NULL
)
438 /* Check that the heartbeat value is within it's range;
439 if not reset to the default */
440 if (heartbeat
< 0x1 || heartbeat
> 2 * 0x03ff) {
441 heartbeat
= WATCHDOG_HEARTBEAT
;
443 "heartbeat value must be 1<heartbeat<2046, using %d\n",
447 /* Initialize the watchdog and make sure it does not run */
450 /* Register the watchdog so that userspace has access to it */
451 ret
= misc_register(&esb_miscdev
);
454 "cannot register miscdev on minor=%d (err=%d)\n",
455 WATCHDOG_MINOR
, ret
);
459 "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
460 BASEADDR
, heartbeat
, nowayout
);
465 pci_release_region(esb_pci
, 0);
466 pci_disable_device(esb_pci
);
471 static void __devexit
esb_remove(struct pci_dev
*pdev
)
473 /* Stop the timer before we leave */
478 misc_deregister(&esb_miscdev
);
480 pci_release_region(esb_pci
, 0);
481 pci_disable_device(esb_pci
);
485 static void esb_shutdown(struct pci_dev
*pdev
)
490 static struct pci_driver esb_driver
= {
491 .name
= ESB_MODULE_NAME
,
492 .id_table
= esb_pci_tbl
,
494 .remove
= __devexit_p(esb_remove
),
495 .shutdown
= esb_shutdown
,
498 static int __init
watchdog_init(void)
500 return pci_register_driver(&esb_driver
);
503 static void __exit
watchdog_cleanup(void)
505 pci_unregister_driver(&esb_driver
);
506 printk(KERN_INFO PFX
"Watchdog Module Unloaded.\n");
509 module_init(watchdog_init
);
510 module_exit(watchdog_cleanup
);
512 MODULE_AUTHOR("Ross Biro and David Härdeman");
513 MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
514 MODULE_LICENSE("GPL");
515 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);