arch/ia64/kernel/pci-dma.c

   1 /*
   2  * Dynamic DMA mapping support.
   3  */
   4
   5 #include <linux/types.h>
   6 #include <linux/mm.h>
   7 #include <linux/string.h>
   8 #include <linux/pci.h>
   9 #include <linux/module.h>
  10 #include <linux/dmar.h>
  11 #include <asm/iommu.h>
  12 #include <asm/machvec.h>
  13 #include <linux/dma-mapping.h>
  14
  15 #include <asm/system.h>
  16
  17 #ifdef CONFIG_DMAR
  18
  19 #include <linux/kernel.h>
  20
  21 #include <asm/page.h>
  22
  23 dma_addr_t bad_dma_address __read_mostly;
  24 EXPORT_SYMBOL(bad_dma_address);
  25
  26 static int iommu_sac_force __read_mostly;
  27
  28 int no_iommu __read_mostly;
  29 #ifdef CONFIG_IOMMU_DEBUG
  30 int force_iommu __read_mostly = 1;
  31 #else
  32 int force_iommu __read_mostly;
  33 #endif
  34
  35 /* Set this to 1 if there is a HW IOMMU in the system */
  36 int iommu_detected __read_mostly;
  37
  38 /* Dummy device used for NULL arguments (normally ISA). Better would
  39    be probably a smaller DMA mask, but this is bug-to-bug compatible
  40    to i386. */
  41 struct device fallback_dev = {
  42         .init_name = "fallback device",
  43         .coherent_dma_mask = DMA_32BIT_MASK,
  44         .dma_mask = &fallback_dev.coherent_dma_mask,
  45 };
  46
  47 void __init pci_iommu_alloc(void)
  48 {
  49         /*
  50          * The order of these functions is important for
  51          * fall-back/fail-over reasons
  52          */
  53         detect_intel_iommu();
  54
  55 #ifdef CONFIG_SWIOTLB
  56         pci_swiotlb_init();
  57 #endif
  58 }
  59
  60 static int __init pci_iommu_init(void)
  61 {
  62         if (iommu_detected)
  63                 intel_iommu_init();
  64
  65         return 0;
  66 }
  67
  68 /* Must execute after PCI subsystem */
  69 fs_initcall(pci_iommu_init);
  70
  71 void pci_iommu_shutdown(void)
  72 {
  73         return;
  74 }
  75
  76 void __init
  77 iommu_dma_init(void)
  78 {
  79         return;
  80 }
  81
  82 struct dma_mapping_ops *dma_ops;
  83 EXPORT_SYMBOL(dma_ops);
  84
  85 int iommu_dma_supported(struct device *dev, u64 mask)
  86 {
  87         struct dma_mapping_ops *ops = get_dma_ops(dev);
  88
  89         if (ops->dma_supported_op)
  90                 return ops->dma_supported_op(dev, mask);
  91
  92         /* Copied from i386. Doesn't make much sense, because it will
  93            only work for pci_alloc_coherent.
  94            The caller just has to use GFP_DMA in this case. */
  95         if (mask < DMA_24BIT_MASK)
  96                 return 0;
  97
  98         /* Tell the device to use SAC when IOMMU force is on.  This
  99            allows the driver to use cheaper accesses in some cases.
 100
 101            Problem with this is that if we overflow the IOMMU area and
 102            return DAC as fallback address the device may not handle it
 103            correctly.
 104
 105            As a special case some controllers have a 39bit address
 106            mode that is as efficient as 32bit (aic79xx). Don't force
 107            SAC for these.  Assume all masks <= 40 bits are of this
 108            type. Normally this doesn't make any difference, but gives
 109            more gentle handling of IOMMU overflow. */
 110         if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
 111                 dev_info(dev, "Force SAC with mask %lx\n", mask);
 112                 return 0;
 113         }
 114
 115         return 1;
 116 }
 117 EXPORT_SYMBOL(iommu_dma_supported);
 118
 119 #endif