| blob | e5341e2c1175c6f0b5e16f88bd831f90422fbf03 |
1 /*
2 * arch/ia64/kernel/entry.S
3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16 /*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
25 /*
26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
27 * VA Linux Systems Japan K.K.
28 * pv_ops.
29 */
30 /*
31 * Global (preserved) predicate usage on syscall entry/exit path:
32 *
33 * pKStk: See entry.h.
34 * pUStk: See entry.h.
35 * pSys: See entry.h.
36 * pNonSys: !pSys
37 */
40 #include <asm/asmmacro.h>
41 #include <asm/cache.h>
42 #include <asm/errno.h>
43 #include <asm/kregs.h>
44 #include <asm/asm-offsets.h>
45 #include <asm/pgtable.h>
46 #include <asm/percpu.h>
47 #include <asm/processor.h>
48 #include <asm/thread_info.h>
49 #include <asm/unistd.h>
51 #include "minstate.h"
53 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
54 /*
55 * execve() is special because in case of success, we need to
56 * setup a null register window frame.
57 */
58 ENTRY(ia64_execve)
59 /*
60 * Allocate 8 input registers since ptrace() may clobber them
61 */
62 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
63 alloc loc1=ar.pfs,8,2,4,0
64 mov loc0=rp
65 .body
66 mov out0=in0 // filename
67 ;; // stop bit between alloc and call
68 mov out1=in1 // argv
69 mov out2=in2 // envp
70 add out3=16,sp // regs
71 br.call.sptk.many rp=sys_execve
72 .ret0:
73 #ifdef CONFIG_IA32_SUPPORT
74 /*
75 * Check if we're returning to ia32 mode. If so, we need to restore ia32 registers
76 * from pt_regs.
77 */
78 adds r16=PT(CR_IPSR)+16,sp
79 ;;
80 ld8 r16=[r16]
81 #endif
82 cmp4.ge p6,p7=r8,r0
83 mov ar.pfs=loc1 // restore ar.pfs
84 sxt4 r8=r8 // return 64-bit result
85 ;;
86 stf.spill [sp]=f0
87 (p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode...
88 mov rp=loc0
89 (p6) mov ar.pfs=r0 // clear ar.pfs on success
90 (p7) br.ret.sptk.many rp
92 /*
93 * In theory, we'd have to zap this state only to prevent leaking of
94 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
95 * this executes in less than 20 cycles even on Itanium, so it's not worth
96 * optimizing for...).
97 */
98 mov ar.unat=0; mov ar.lc=0
99 mov r4=0; mov f2=f0; mov b1=r0
100 mov r5=0; mov f3=f0; mov b2=r0
101 mov r6=0; mov f4=f0; mov b3=r0
102 mov r7=0; mov f5=f0; mov b4=r0
103 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
104 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
105 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
106 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
107 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
108 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
109 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
110 #ifdef CONFIG_IA32_SUPPORT
111 tbit.nz p6,p0=r16, IA64_PSR_IS_BIT
112 movl loc0=ia64_ret_from_ia32_execve
113 ;;
114 (p6) mov rp=loc0
115 #endif
116 br.ret.sptk.many rp
117 END(ia64_execve)
119 /*
120 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
121 * u64 tls)
122 */
123 GLOBAL_ENTRY(sys_clone2)
124 /*
125 * Allocate 8 input registers since ptrace() may clobber them
126 */
127 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
128 alloc r16=ar.pfs,8,2,6,0
129 DO_SAVE_SWITCH_STACK
130 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
131 mov loc0=rp
132 mov loc1=r16 // save ar.pfs across do_fork
133 .body
134 mov out1=in1
135 mov out3=in2
136 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
137 mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
138 ;;
139 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
140 mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
141 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s
142 mov out0=in0 // out0 = clone_flags
143 br.call.sptk.many rp=do_fork
144 .ret1: .restore sp
145 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
146 mov ar.pfs=loc1
147 mov rp=loc0
148 br.ret.sptk.many rp
149 END(sys_clone2)
151 /*
152 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
153 * Deprecated. Use sys_clone2() instead.
154 */
155 GLOBAL_ENTRY(sys_clone)
156 /*
157 * Allocate 8 input registers since ptrace() may clobber them
158 */
159 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
160 alloc r16=ar.pfs,8,2,6,0
161 DO_SAVE_SWITCH_STACK
162 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
163 mov loc0=rp
164 mov loc1=r16 // save ar.pfs across do_fork
165 .body
166 mov out1=in1
167 mov out3=16 // stacksize (compensates for 16-byte scratch area)
168 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
169 mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
170 ;;
171 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
172 mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
173 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s
174 mov out0=in0 // out0 = clone_flags
175 br.call.sptk.many rp=do_fork
176 .ret2: .restore sp
177 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
178 mov ar.pfs=loc1
179 mov rp=loc0
180 br.ret.sptk.many rp
181 END(sys_clone)
182 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
184 /*
185 * prev_task <- ia64_switch_to(struct task_struct *next)
186 * With Ingo's new scheduler, interrupts are disabled when this routine gets
187 * called. The code starting at .map relies on this. The rest of the code
188 * doesn't care about the interrupt masking status.
189 */
190 GLOBAL_ENTRY(__paravirt_switch_to)
191 .prologue
192 alloc r16=ar.pfs,1,0,0,0
193 DO_SAVE_SWITCH_STACK
194 .body
196 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
197 movl r25=init_task
198 mov r27=IA64_KR(CURRENT_STACK)
199 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
200 dep r20=0,in0,61,3 // physical address of "next"
201 ;;
202 st8 [r22]=sp // save kernel stack pointer of old task
203 shr.u r26=r20,IA64_GRANULE_SHIFT
204 cmp.eq p7,p6=r25,in0
205 ;;
206 /*
207 * If we've already mapped this task's page, we can skip doing it again.
208 */
209 (p6) cmp.eq p7,p6=r26,r27
210 (p6) br.cond.dpnt .map
211 ;;
212 .done:
213 ld8 sp=[r21] // load kernel stack pointer of new task
214 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
215 mov r8=r13 // return pointer to previously running task
216 mov r13=in0 // set "current" pointer
217 ;;
218 DO_LOAD_SWITCH_STACK
220 #ifdef CONFIG_SMP
221 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
222 #endif
223 br.ret.sptk.many rp // boogie on out in new context
225 .map:
226 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
227 movl r25=PAGE_KERNEL
228 ;;
229 srlz.d
230 or r23=r25,r20 // construct PA | page properties
231 mov r25=IA64_GRANULE_SHIFT<<2
232 ;;
233 MOV_TO_ITIR(p0, r25, r8)
234 MOV_TO_IFA(in0, r8) // VA of next task...
235 ;;
236 mov r25=IA64_TR_CURRENT_STACK
237 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
238 ;;
239 itr.d dtr[r25]=r23 // wire in new mapping...
240 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
241 br.cond.sptk .done
242 END(__paravirt_switch_to)
244 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
245 /*
246 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
247 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
248 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
249 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
250 * problem. Also, we don't need to specify unwind information for preserved registers
251 * that are not modified in save_switch_stack as the right unwind information is already
252 * specified at the call-site of save_switch_stack.
253 */
255 /*
256 * save_switch_stack:
257 * - r16 holds ar.pfs
258 * - b7 holds address to return to
259 * - rp (b0) holds return address to save
260 */
261 GLOBAL_ENTRY(save_switch_stack)
262 .prologue
263 .altrp b7
264 flushrs // flush dirty regs to backing store (must be first in insn group)
265 .save @priunat,r17
266 mov r17=ar.unat // preserve caller's
267 .body
268 #ifdef CONFIG_ITANIUM
269 adds r2=16+128,sp
270 adds r3=16+64,sp
271 adds r14=SW(R4)+16,sp
272 ;;
273 st8.spill [r14]=r4,16 // spill r4
274 lfetch.fault.excl.nt1 [r3],128
275 ;;
276 lfetch.fault.excl.nt1 [r2],128
277 lfetch.fault.excl.nt1 [r3],128
278 ;;
279 lfetch.fault.excl [r2]
280 lfetch.fault.excl [r3]
281 adds r15=SW(R5)+16,sp
282 #else
283 add r2=16+3*128,sp
284 add r3=16,sp
285 add r14=SW(R4)+16,sp
286 ;;
287 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
288 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
289 ;;
290 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
291 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
292 ;;
293 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
294 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
295 adds r15=SW(R5)+16,sp
296 #endif
297 ;;
298 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
299 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
300 add r2=SW(F2)+16,sp // r2 = &sw->f2
301 ;;
302 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
303 mov.m r18=ar.fpsr // preserve fpsr
304 add r3=SW(F3)+16,sp // r3 = &sw->f3
305 ;;
306 stf.spill [r2]=f2,32
307 mov.m r19=ar.rnat
308 mov r21=b0
310 stf.spill [r3]=f3,32
311 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
312 mov r22=b1
313 ;;
314 // since we're done with the spills, read and save ar.unat:
315 mov.m r29=ar.unat
316 mov.m r20=ar.bspstore
317 mov r23=b2
318 stf.spill [r2]=f4,32
319 stf.spill [r3]=f5,32
320 mov r24=b3
321 ;;
322 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
323 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
324 mov r25=b4
325 mov r26=b5
326 ;;
327 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
328 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
329 mov r21=ar.lc // I-unit
330 stf.spill [r2]=f12,32
331 stf.spill [r3]=f13,32
332 ;;
333 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
334 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
335 stf.spill [r2]=f14,32
336 stf.spill [r3]=f15,32
337 ;;
338 st8 [r14]=r26 // save b5
339 st8 [r15]=r21 // save ar.lc
340 stf.spill [r2]=f16,32
341 stf.spill [r3]=f17,32
342 ;;
343 stf.spill [r2]=f18,32
344 stf.spill [r3]=f19,32
345 ;;
346 stf.spill [r2]=f20,32
347 stf.spill [r3]=f21,32
348 ;;
349 stf.spill [r2]=f22,32
350 stf.spill [r3]=f23,32
351 ;;
352 stf.spill [r2]=f24,32
353 stf.spill [r3]=f25,32
354 ;;
355 stf.spill [r2]=f26,32
356 stf.spill [r3]=f27,32
357 ;;
358 stf.spill [r2]=f28,32
359 stf.spill [r3]=f29,32
360 ;;
361 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
362 stf.spill [r3]=f31,SW(PR)-SW(F31)
363 add r14=SW(CALLER_UNAT)+16,sp
364 ;;
365 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
366 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
367 mov r21=pr
368 ;;
369 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
370 st8 [r3]=r21 // save predicate registers
371 ;;
372 st8 [r2]=r20 // save ar.bspstore
373 st8 [r14]=r18 // save fpsr
374 mov ar.rsc=3 // put RSE back into eager mode, pl 0
375 br.cond.sptk.many b7
376 END(save_switch_stack)
378 /*
379 * load_switch_stack:
380 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
381 * - b7 holds address to return to
382 * - must not touch r8-r11
383 */
384 GLOBAL_ENTRY(load_switch_stack)
385 .prologue
386 .altrp b7
388 .body
389 lfetch.fault.nt1 [sp]
390 adds r2=SW(AR_BSPSTORE)+16,sp
391 adds r3=SW(AR_UNAT)+16,sp
392 mov ar.rsc=0 // put RSE into enforced lazy mode
393 adds r14=SW(CALLER_UNAT)+16,sp
394 adds r15=SW(AR_FPSR)+16,sp
395 ;;
396 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
397 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
398 ;;
399 ld8 r21=[r2],16 // restore b0
400 ld8 r22=[r3],16 // restore b1
401 ;;
402 ld8 r23=[r2],16 // restore b2
403 ld8 r24=[r3],16 // restore b3
404 ;;
405 ld8 r25=[r2],16 // restore b4
406 ld8 r26=[r3],16 // restore b5
407 ;;
408 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
409 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
410 ;;
411 ld8 r28=[r2] // restore pr
412 ld8 r30=[r3] // restore rnat
413 ;;
414 ld8 r18=[r14],16 // restore caller's unat
415 ld8 r19=[r15],24 // restore fpsr
416 ;;
417 ldf.fill f2=[r14],32
418 ldf.fill f3=[r15],32
419 ;;
420 ldf.fill f4=[r14],32
421 ldf.fill f5=[r15],32
422 ;;
423 ldf.fill f12=[r14],32
424 ldf.fill f13=[r15],32
425 ;;
426 ldf.fill f14=[r14],32
427 ldf.fill f15=[r15],32
428 ;;
429 ldf.fill f16=[r14],32
430 ldf.fill f17=[r15],32
431 ;;
432 ldf.fill f18=[r14],32
433 ldf.fill f19=[r15],32
434 mov b0=r21
435 ;;
436 ldf.fill f20=[r14],32
437 ldf.fill f21=[r15],32
438 mov b1=r22
439 ;;
440 ldf.fill f22=[r14],32
441 ldf.fill f23=[r15],32
442 mov b2=r23
443 ;;
444 mov ar.bspstore=r27
445 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
446 mov b3=r24
447 ;;
448 ldf.fill f24=[r14],32
449 ldf.fill f25=[r15],32
450 mov b4=r25
451 ;;
452 ldf.fill f26=[r14],32
453 ldf.fill f27=[r15],32
454 mov b5=r26
455 ;;
456 ldf.fill f28=[r14],32
457 ldf.fill f29=[r15],32
458 mov ar.pfs=r16
459 ;;
460 ldf.fill f30=[r14],32
461 ldf.fill f31=[r15],24
462 mov ar.lc=r17
463 ;;
464 ld8.fill r4=[r14],16
465 ld8.fill r5=[r15],16
466 mov pr=r28,-1
467 ;;
468 ld8.fill r6=[r14],16
469 ld8.fill r7=[r15],16
471 mov ar.unat=r18 // restore caller's unat
472 mov ar.rnat=r30 // must restore after bspstore but before rsc!
473 mov ar.fpsr=r19 // restore fpsr
474 mov ar.rsc=3 // put RSE back into eager mode, pl 0
475 br.cond.sptk.many b7
476 END(load_switch_stack)
478 GLOBAL_ENTRY(prefetch_stack)
479 add r14 = -IA64_SWITCH_STACK_SIZE, sp
480 add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
481 ;;
482 ld8 r16 = [r15] // load next's stack pointer
483 lfetch.fault.excl [r14], 128
484 ;;
485 lfetch.fault.excl [r14], 128
486 lfetch.fault [r16], 128
487 ;;
488 lfetch.fault.excl [r14], 128
489 lfetch.fault [r16], 128
490 ;;
491 lfetch.fault.excl [r14], 128
492 lfetch.fault [r16], 128
493 ;;
494 lfetch.fault.excl [r14], 128
495 lfetch.fault [r16], 128
496 ;;
497 lfetch.fault [r16], 128
498 br.ret.sptk.many rp
499 END(prefetch_stack)
501 GLOBAL_ENTRY(kernel_execve)
502 rum psr.ac
503 mov r15=__NR_execve // put syscall number in place
504 break __BREAK_SYSCALL
505 br.ret.sptk.many rp
506 END(kernel_execve)
508 GLOBAL_ENTRY(clone)
509 mov r15=__NR_clone // put syscall number in place
510 break __BREAK_SYSCALL
511 br.ret.sptk.many rp
512 END(clone)
514 /*
515 * Invoke a system call, but do some tracing before and after the call.
516 * We MUST preserve the current register frame throughout this routine
517 * because some system calls (such as ia64_execve) directly
518 * manipulate ar.pfs.
519 */
520 GLOBAL_ENTRY(ia64_trace_syscall)
521 PT_REGS_UNWIND_INFO(0)
522 /*
523 * We need to preserve the scratch registers f6-f11 in case the system
524 * call is sigreturn.
525 */
526 adds r16=PT(F6)+16,sp
527 adds r17=PT(F7)+16,sp
528 ;;
529 stf.spill [r16]=f6,32
530 stf.spill [r17]=f7,32
531 ;;
532 stf.spill [r16]=f8,32
533 stf.spill [r17]=f9,32
534 ;;
535 stf.spill [r16]=f10
536 stf.spill [r17]=f11
537 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
538 cmp.lt p6,p0=r8,r0 // check tracehook
539 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
540 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
541 mov r10=0
542 (p6) br.cond.sptk strace_error // syscall failed ->
543 adds r16=PT(F6)+16,sp
544 adds r17=PT(F7)+16,sp
545 ;;
546 ldf.fill f6=[r16],32
547 ldf.fill f7=[r17],32
548 ;;
549 ldf.fill f8=[r16],32
550 ldf.fill f9=[r17],32
551 ;;
552 ldf.fill f10=[r16]
553 ldf.fill f11=[r17]
554 // the syscall number may have changed, so re-load it and re-calculate the
555 // syscall entry-point:
556 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
557 ;;
558 ld8 r15=[r15]
559 mov r3=NR_syscalls - 1
560 ;;
561 adds r15=-1024,r15
562 movl r16=sys_call_table
563 ;;
564 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
565 cmp.leu p6,p7=r15,r3
566 ;;
567 (p6) ld8 r20=[r20] // load address of syscall entry point
568 (p7) movl r20=sys_ni_syscall
569 ;;
570 mov b6=r20
571 br.call.sptk.many rp=b6 // do the syscall
572 .strace_check_retval:
573 cmp.lt p6,p0=r8,r0 // syscall failed?
574 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
575 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
576 mov r10=0
577 (p6) br.cond.sptk strace_error // syscall failed ->
578 ;; // avoid RAW on r10
579 .strace_save_retval:
580 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
581 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
582 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
583 .ret3:
584 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
585 (pUStk) rsm psr.i // disable interrupts
586 br.cond.sptk ia64_work_pending_syscall_end
588 strace_error:
589 ld8 r3=[r2] // load pt_regs.r8
590 sub r9=0,r8 // negate return value to get errno value
591 ;;
592 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
593 adds r3=16,r2 // r3=&pt_regs.r10
594 ;;
595 (p6) mov r10=-1
596 (p6) mov r8=r9
597 br.cond.sptk .strace_save_retval
598 END(ia64_trace_syscall)
600 /*
601 * When traced and returning from sigreturn, we invoke syscall_trace but then
602 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
603 */
604 GLOBAL_ENTRY(ia64_strace_leave_kernel)
605 PT_REGS_UNWIND_INFO(0)
606 { /*
607 * Some versions of gas generate bad unwind info if the first instruction of a
608 * procedure doesn't go into the first slot of a bundle. This is a workaround.
609 */
610 nop.m 0
611 nop.i 0
612 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
613 }
614 .ret4: br.cond.sptk ia64_leave_kernel
615 END(ia64_strace_leave_kernel)
617 GLOBAL_ENTRY(ia64_ret_from_clone)
618 PT_REGS_UNWIND_INFO(0)
619 { /*
620 * Some versions of gas generate bad unwind info if the first instruction of a
621 * procedure doesn't go into the first slot of a bundle. This is a workaround.
622 */
623 nop.m 0
624 nop.i 0
625 /*
626 * We need to call schedule_tail() to complete the scheduling process.
627 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
628 * address of the previously executing task.
629 */
630 br.call.sptk.many rp=ia64_invoke_schedule_tail
631 }
632 .ret8:
633 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
634 ;;
635 ld4 r2=[r2]
636 ;;
637 mov r8=0
638 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
639 ;;
640 cmp.ne p6,p0=r2,r0
641 (p6) br.cond.spnt .strace_check_retval
642 ;; // added stop bits to prevent r8 dependency
643 END(ia64_ret_from_clone)
644 // fall through
645 GLOBAL_ENTRY(ia64_ret_from_syscall)
646 PT_REGS_UNWIND_INFO(0)
647 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
648 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
649 mov r10=r0 // clear error indication in r10
650 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
651 #ifdef CONFIG_PARAVIRT
652 ;;
653 br.cond.sptk.few ia64_leave_syscall
654 ;;
655 #endif /* CONFIG_PARAVIRT */
656 END(ia64_ret_from_syscall)
657 #ifndef CONFIG_PARAVIRT
658 // fall through
659 #endif
660 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
662 /*
663 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
664 * need to switch to bank 0 and doesn't restore the scratch registers.
665 * To avoid leaking kernel bits, the scratch registers are set to
666 * the following known-to-be-safe values:
667 *
668 * r1: restored (global pointer)
669 * r2: cleared
670 * r3: 1 (when returning to user-level)
671 * r8-r11: restored (syscall return value(s))
672 * r12: restored (user-level stack pointer)
673 * r13: restored (user-level thread pointer)
674 * r14: set to __kernel_syscall_via_epc
675 * r15: restored (syscall #)
676 * r16-r17: cleared
677 * r18: user-level b6
678 * r19: cleared
679 * r20: user-level ar.fpsr
680 * r21: user-level b0
681 * r22: cleared
682 * r23: user-level ar.bspstore
683 * r24: user-level ar.rnat
684 * r25: user-level ar.unat
685 * r26: user-level ar.pfs
686 * r27: user-level ar.rsc
687 * r28: user-level ip
688 * r29: user-level psr
689 * r30: user-level cfm
690 * r31: user-level pr
691 * f6-f11: cleared
692 * pr: restored (user-level pr)
693 * b0: restored (user-level rp)
694 * b6: restored
695 * b7: set to __kernel_syscall_via_epc
696 * ar.unat: restored (user-level ar.unat)
697 * ar.pfs: restored (user-level ar.pfs)
698 * ar.rsc: restored (user-level ar.rsc)
699 * ar.rnat: restored (user-level ar.rnat)
700 * ar.bspstore: restored (user-level ar.bspstore)
701 * ar.fpsr: restored (user-level ar.fpsr)
702 * ar.ccv: cleared
703 * ar.csd: cleared
704 * ar.ssd: cleared
705 */
706 GLOBAL_ENTRY(__paravirt_leave_syscall)
707 PT_REGS_UNWIND_INFO(0)
708 /*
709 * work.need_resched etc. mustn't get changed by this CPU before it returns to
710 * user- or fsys-mode, hence we disable interrupts early on.
711 *
712 * p6 controls whether current_thread_info()->flags needs to be check for
713 * extra work. We always check for extra work when returning to user-level.
714 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
715 * is 0. After extra work processing has been completed, execution
716 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
717 * needs to be redone.
718 */
719 #ifdef CONFIG_PREEMPT
720 RSM_PSR_I(p0, r2, r18) // disable interrupts
721 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
722 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
723 ;;
724 .pred.rel.mutex pUStk,pKStk
725 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
726 (pUStk) mov r21=0 // r21 <- 0
727 ;;
728 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
729 #else /* !CONFIG_PREEMPT */
730 RSM_PSR_I(pUStk, r2, r18)
731 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
732 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
733 #endif
734 .global __paravirt_work_processed_syscall;
735 __paravirt_work_processed_syscall:
736 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
737 adds r2=PT(LOADRS)+16,r12
738 (pUStk) mov.m r22=ar.itc // fetch time at leave
739 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
740 ;;
741 (p6) ld4 r31=[r18] // load current_thread_info()->flags
742 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
743 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
744 ;;
745 #else
746 adds r2=PT(LOADRS)+16,r12
747 adds r3=PT(AR_BSPSTORE)+16,r12
748 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
749 ;;
750 (p6) ld4 r31=[r18] // load current_thread_info()->flags
751 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
752 nop.i 0
753 ;;
754 #endif
755 mov r16=ar.bsp // M2 get existing backing store pointer
756 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
757 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
758 ;;
759 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
760 (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
761 (p6) br.cond.spnt .work_pending_syscall
762 ;;
763 // start restoring the state saved on the kernel stack (struct pt_regs):
764 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
765 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
766 (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
767 ;;
768 invala // M0|1 invalidate ALAT
769 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
770 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
772 ld8 r29=[r2],16 // M0|1 load cr.ipsr
773 ld8 r28=[r3],16 // M0|1 load cr.iip
774 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
775 (pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
776 ;;
777 ld8 r30=[r2],16 // M0|1 load cr.ifs
778 ld8 r25=[r3],16 // M0|1 load ar.unat
779 (pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
780 ;;
781 #else
782 mov r22=r0 // A clear r22
783 ;;
784 ld8 r30=[r2],16 // M0|1 load cr.ifs
785 ld8 r25=[r3],16 // M0|1 load ar.unat
786 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
787 ;;
788 #endif
789 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
790 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
791 nop 0
792 ;;
793 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
794 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
795 mov f6=f0 // F clear f6
796 ;;
797 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
798 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
799 mov f7=f0 // F clear f7
800 ;;
801 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
802 ld8.fill r1=[r3],16 // M0|1 load r1
803 (pUStk) mov r17=1 // A
804 ;;
805 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
806 (pUStk) st1 [r15]=r17 // M2|3
807 #else
808 (pUStk) st1 [r14]=r17 // M2|3
809 #endif
810 ld8.fill r13=[r3],16 // M0|1
811 mov f8=f0 // F clear f8
812 ;;
813 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
814 ld8.fill r15=[r3] // M0|1 restore r15
815 mov b6=r18 // I0 restore b6
817 LOAD_PHYS_STACK_REG_SIZE(r17)
818 mov f9=f0 // F clear f9
819 (pKStk) br.cond.dpnt.many skip_rbs_switch // B
821 srlz.d // M0 ensure interruption collection is off (for cover)
822 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
823 COVER // B add current frame into dirty partition & set cr.ifs
824 ;;
825 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
826 mov r19=ar.bsp // M2 get new backing store pointer
827 st8 [r14]=r22 // M save time at leave
828 mov f10=f0 // F clear f10
830 mov r22=r0 // A clear r22
831 movl r14=__kernel_syscall_via_epc // X
832 ;;
833 #else
834 mov r19=ar.bsp // M2 get new backing store pointer
835 mov f10=f0 // F clear f10
837 nop.m 0
838 movl r14=__kernel_syscall_via_epc // X
839 ;;
840 #endif
841 mov.m ar.csd=r0 // M2 clear ar.csd
842 mov.m ar.ccv=r0 // M2 clear ar.ccv
843 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
845 mov.m ar.ssd=r0 // M2 clear ar.ssd
846 mov f11=f0 // F clear f11
847 br.cond.sptk.many rbs_switch // B
848 END(__paravirt_leave_syscall)
850 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
851 #ifdef CONFIG_IA32_SUPPORT
852 GLOBAL_ENTRY(ia64_ret_from_ia32_execve)
853 PT_REGS_UNWIND_INFO(0)
854 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
855 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
856 ;;
857 .mem.offset 0,0
858 st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit
859 .mem.offset 8,0
860 st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit
861 #ifdef CONFIG_PARAVIRT
862 ;;
863 // don't fall through, ia64_leave_kernel may be #define'd
864 br.cond.sptk.few ia64_leave_kernel
865 ;;
866 #endif /* CONFIG_PARAVIRT */
867 END(ia64_ret_from_ia32_execve)
868 #ifndef CONFIG_PARAVIRT
869 // fall through
870 #endif
871 #endif /* CONFIG_IA32_SUPPORT */
872 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
874 GLOBAL_ENTRY(__paravirt_leave_kernel)
875 PT_REGS_UNWIND_INFO(0)
876 /*
877 * work.need_resched etc. mustn't get changed by this CPU before it returns to
878 * user- or fsys-mode, hence we disable interrupts early on.
879 *
880 * p6 controls whether current_thread_info()->flags needs to be check for
881 * extra work. We always check for extra work when returning to user-level.
882 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
883 * is 0. After extra work processing has been completed, execution
884 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
885 * needs to be redone.
886 */
887 #ifdef CONFIG_PREEMPT
888 RSM_PSR_I(p0, r17, r31) // disable interrupts
889 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
890 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
891 ;;
892 .pred.rel.mutex pUStk,pKStk
893 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
894 (pUStk) mov r21=0 // r21 <- 0
895 ;;
896 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
897 #else
898 RSM_PSR_I(pUStk, r17, r31)
899 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
900 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
901 #endif
902 .work_processed_kernel:
903 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
904 ;;
905 (p6) ld4 r31=[r17] // load current_thread_info()->flags
906 adds r21=PT(PR)+16,r12
907 ;;
909 lfetch [r21],PT(CR_IPSR)-PT(PR)
910 adds r2=PT(B6)+16,r12
911 adds r3=PT(R16)+16,r12
912 ;;
913 lfetch [r21]
914 ld8 r28=[r2],8 // load b6
915 adds r29=PT(R24)+16,r12
917 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
918 adds r30=PT(AR_CCV)+16,r12
919 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
920 ;;
921 ld8.fill r24=[r29]
922 ld8 r15=[r30] // load ar.ccv
923 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
924 ;;
925 ld8 r29=[r2],16 // load b7
926 ld8 r30=[r3],16 // load ar.csd
927 (p6) br.cond.spnt .work_pending
928 ;;
929 ld8 r31=[r2],16 // load ar.ssd
930 ld8.fill r8=[r3],16
931 ;;
932 ld8.fill r9=[r2],16
933 ld8.fill r10=[r3],PT(R17)-PT(R10)
934 ;;
935 ld8.fill r11=[r2],PT(R18)-PT(R11)
936 ld8.fill r17=[r3],16
937 ;;
938 ld8.fill r18=[r2],16
939 ld8.fill r19=[r3],16
940 ;;
941 ld8.fill r20=[r2],16
942 ld8.fill r21=[r3],16
943 mov ar.csd=r30
944 mov ar.ssd=r31
945 ;;
946 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
947 invala // invalidate ALAT
948 ;;
949 ld8.fill r22=[r2],24
950 ld8.fill r23=[r3],24
951 mov b6=r28
952 ;;
953 ld8.fill r25=[r2],16
954 ld8.fill r26=[r3],16
955 mov b7=r29
956 ;;
957 ld8.fill r27=[r2],16
958 ld8.fill r28=[r3],16
959 ;;
960 ld8.fill r29=[r2],16
961 ld8.fill r30=[r3],24
962 ;;
963 ld8.fill r31=[r2],PT(F9)-PT(R31)
964 adds r3=PT(F10)-PT(F6),r3
965 ;;
966 ldf.fill f9=[r2],PT(F6)-PT(F9)
967 ldf.fill f10=[r3],PT(F8)-PT(F10)
968 ;;
969 ldf.fill f6=[r2],PT(F7)-PT(F6)
970 ;;
971 ldf.fill f7=[r2],PT(F11)-PT(F7)
972 ldf.fill f8=[r3],32
973 ;;
974 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
975 mov ar.ccv=r15
976 ;;
977 ldf.fill f11=[r2]
978 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
979 ;;
980 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
981 adds r16=PT(CR_IPSR)+16,r12
982 adds r17=PT(CR_IIP)+16,r12
984 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
985 .pred.rel.mutex pUStk,pKStk
986 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
987 (pUStk) mov.m r22=ar.itc // M fetch time at leave
988 nop.i 0
989 ;;
990 #else
991 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
992 nop.i 0
993 nop.i 0
994 ;;
995 #endif
996 ld8 r29=[r16],16 // load cr.ipsr
997 ld8 r28=[r17],16 // load cr.iip
998 ;;
999 ld8 r30=[r16],16 // load cr.ifs
1000 ld8 r25=[r17],16 // load ar.unat
1001 ;;
1002 ld8 r26=[r16],16 // load ar.pfs
1003 ld8 r27=[r17],16 // load ar.rsc
1004 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
1005 ;;
1006 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
1007 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
1008 ;;
1009 ld8 r31=[r16],16 // load predicates
1010 ld8 r21=[r17],16 // load b0
1011 ;;
1012 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
1013 ld8.fill r1=[r17],16 // load r1
1014 ;;
1015 ld8.fill r12=[r16],16
1016 ld8.fill r13=[r17],16
1017 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1018 (pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
1019 #else
1020 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
1021 #endif
1022 ;;
1023 ld8 r20=[r16],16 // ar.fpsr
1024 ld8.fill r15=[r17],16
1025 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1026 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
1027 #endif
1028 ;;
1029 ld8.fill r14=[r16],16
1030 ld8.fill r2=[r17]
1031 (pUStk) mov r17=1
1032 ;;
1033 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1034 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
1035 // mib : mov add br -> mib : ld8 add br
1036 // bbb_ : br nop cover;; mbb_ : mov br cover;;
1037 //
1038 // no one require bsp in r16 if (pKStk) branch is selected.
1039 (pUStk) st8 [r3]=r22 // save time at leave
1040 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1041 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1042 ;;
1043 ld8.fill r3=[r16] // deferred
1044 LOAD_PHYS_STACK_REG_SIZE(r17)
1045 (pKStk) br.cond.dpnt skip_rbs_switch
1046 mov r16=ar.bsp // get existing backing store pointer
1047 #else
1048 ld8.fill r3=[r16]
1049 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1050 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1051 ;;
1052 mov r16=ar.bsp // get existing backing store pointer
1053 LOAD_PHYS_STACK_REG_SIZE(r17)
1054 (pKStk) br.cond.dpnt skip_rbs_switch
1055 #endif
1057 /*
1058 * Restore user backing store.
1059 *
1060 * NOTE: alloc, loadrs, and cover can't be predicated.
1061 */
1062 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1063 COVER // add current frame into dirty partition and set cr.ifs
1064 ;;
1065 mov r19=ar.bsp // get new backing store pointer
1066 rbs_switch:
1067 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1068 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1069 ;;
1070 sub r19=r19,r16 // calculate total byte size of dirty partition
1071 add r18=64,r18 // don't force in0-in7 into memory...
1072 ;;
1073 shl r19=r19,16 // shift size of dirty partition into loadrs position
1074 ;;
1075 dont_preserve_current_frame:
1076 /*
1077 * To prevent leaking bits between the kernel and user-space,
1078 * we must clear the stacked registers in the "invalid" partition here.
1079 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1080 * 5 registers/cycle on McKinley).
1081 */
1082 # define pRecurse p6
1083 # define pReturn p7
1084 #ifdef CONFIG_ITANIUM
1085 # define Nregs 10
1086 #else
1087 # define Nregs 14
1088 #endif
1089 alloc loc0=ar.pfs,2,Nregs-2,2,0
1090 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1091 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1092 ;;
1093 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1094 shladd in0=loc1,3,r17
1095 mov in1=0
1096 ;;
1097 TEXT_ALIGN(32)
1098 rse_clear_invalid:
1099 #ifdef CONFIG_ITANIUM
1100 // cycle 0
1101 { .mii
1102 alloc loc0=ar.pfs,2,Nregs-2,2,0
1103 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1104 add out0=-Nregs*8,in0
1105 }{ .mfb
1106 add out1=1,in1 // increment recursion count
1107 nop.f 0
1108 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1109 ;;
1110 }{ .mfi // cycle 1
1111 mov loc1=0
1112 nop.f 0
1113 mov loc2=0
1114 }{ .mib
1115 mov loc3=0
1116 mov loc4=0
1117 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1119 }{ .mfi // cycle 2
1120 mov loc5=0
1121 nop.f 0
1122 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1123 }{ .mib
1124 mov loc6=0
1125 mov loc7=0
1126 (pReturn) br.ret.sptk.many b0
1127 }
1128 #else /* !CONFIG_ITANIUM */
1129 alloc loc0=ar.pfs,2,Nregs-2,2,0
1130 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1131 add out0=-Nregs*8,in0
1132 add out1=1,in1 // increment recursion count
1133 mov loc1=0
1134 mov loc2=0
1135 ;;
1136 mov loc3=0
1137 mov loc4=0
1138 mov loc5=0
1139 mov loc6=0
1140 mov loc7=0
1141 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1142 ;;
1143 mov loc8=0
1144 mov loc9=0
1145 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1146 mov loc10=0
1147 mov loc11=0
1148 (pReturn) br.ret.dptk.many b0
1149 #endif /* !CONFIG_ITANIUM */
1150 # undef pRecurse
1151 # undef pReturn
1152 ;;
1153 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1154 ;;
1155 loadrs
1156 ;;
1157 skip_rbs_switch:
1158 mov ar.unat=r25 // M2
1159 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1160 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1161 ;;
1162 (pUStk) mov ar.bspstore=r23 // M2
1163 (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1164 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1165 ;;
1166 MOV_TO_IPSR(p0, r29, r25) // M2
1167 mov ar.pfs=r26 // I0
1168 (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1170 MOV_TO_IFS(p9, r30, r25)// M2
1171 mov b0=r21 // I0
1172 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1174 mov ar.fpsr=r20 // M2
1175 MOV_TO_IIP(r28, r25) // M2
1176 nop 0
1177 ;;
1178 (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1179 nop 0
1180 (pLvSys)mov r2=r0
1182 mov ar.rsc=r27 // M2
1183 mov pr=r31,-1 // I0
1184 RFI // B
1186 /*
1187 * On entry:
1188 * r20 = ¤t->thread_info->pre_count (if CONFIG_PREEMPT)
1189 * r31 = current->thread_info->flags
1190 * On exit:
1191 * p6 = TRUE if work-pending-check needs to be redone
1192 *
1193 * Interrupts are disabled on entry, reenabled depend on work, and
1194 * disabled on exit.
1195 */
1196 .work_pending_syscall:
1197 add r2=-8,r2
1198 add r3=-8,r3
1199 ;;
1200 st8 [r2]=r8
1201 st8 [r3]=r10
1202 .work_pending:
1203 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
1204 (p6) br.cond.sptk.few .notify
1205 #ifdef CONFIG_PREEMPT
1206 (pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1207 ;;
1208 (pKStk) st4 [r20]=r21
1209 #endif
1210 SSM_PSR_I(p0, p6, r2) // enable interrupts
1211 br.call.spnt.many rp=schedule
1212 .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
1213 RSM_PSR_I(p0, r2, r20) // disable interrupts
1214 ;;
1215 #ifdef CONFIG_PREEMPT
1216 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1217 ;;
1218 (pKStk) st4 [r20]=r0 // preempt_count() <- 0
1219 #endif
1220 (pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
1221 br.cond.sptk.many .work_processed_kernel
1223 .notify:
1224 (pUStk) br.call.spnt.many rp=notify_resume_user
1225 .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
1226 (pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
1227 br.cond.sptk.many .work_processed_kernel
1229 .global __paravirt_pending_syscall_end;
1230 __paravirt_pending_syscall_end:
1231 adds r2=PT(R8)+16,r12
1232 adds r3=PT(R10)+16,r12
1233 ;;
1234 ld8 r8=[r2]
1235 ld8 r10=[r3]
1236 br.cond.sptk.many __paravirt_work_processed_syscall_target
1237 END(__paravirt_leave_kernel)
1239 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
1240 ENTRY(handle_syscall_error)
1241 /*
1242 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1243 * lead us to mistake a negative return value as a failed syscall. Those syscall
1244 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1245 * pt_regs.r8 is zero, we assume that the call completed successfully.
1246 */
1247 PT_REGS_UNWIND_INFO(0)
1248 ld8 r3=[r2] // load pt_regs.r8
1249 ;;
1250 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1251 ;;
1252 (p7) mov r10=-1
1253 (p7) sub r8=0,r8 // negate return value to get errno
1254 br.cond.sptk ia64_leave_syscall
1255 END(handle_syscall_error)
1257 /*
1258 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1259 * in case a system call gets restarted.
1260 */
1261 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1262 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1263 alloc loc1=ar.pfs,8,2,1,0
1264 mov loc0=rp
1265 mov out0=r8 // Address of previous task
1266 ;;
1267 br.call.sptk.many rp=schedule_tail
1268 .ret11: mov ar.pfs=loc1
1269 mov rp=loc0
1270 br.ret.sptk.many rp
1271 END(ia64_invoke_schedule_tail)
1273 /*
1274 * Setup stack and call do_notify_resume_user(), keeping interrupts
1275 * disabled.
1276 *
1277 * Note that pSys and pNonSys need to be set up by the caller.
1278 * We declare 8 input registers so the system call args get preserved,
1279 * in case we need to restart a system call.
1280 */
1281 GLOBAL_ENTRY(notify_resume_user)
1282 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1283 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1284 mov r9=ar.unat
1285 mov loc0=rp // save return address
1286 mov out0=0 // there is no "oldset"
1287 adds out1=8,sp // out1=&sigscratch->ar_pfs
1288 (pSys) mov out2=1 // out2==1 => we're in a syscall
1289 ;;
1290 (pNonSys) mov out2=0 // out2==0 => not a syscall
1291 .fframe 16
1292 .spillsp ar.unat, 16
1293 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1294 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1295 .body
1296 br.call.sptk.many rp=do_notify_resume_user
1297 .ret15: .restore sp
1298 adds sp=16,sp // pop scratch stack space
1299 ;;
1300 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1301 mov rp=loc0
1302 ;;
1303 mov ar.unat=r9
1304 mov ar.pfs=loc1
1305 br.ret.sptk.many rp
1306 END(notify_resume_user)
1308 ENTRY(sys_rt_sigreturn)
1309 PT_REGS_UNWIND_INFO(0)
1310 /*
1311 * Allocate 8 input registers since ptrace() may clobber them
1312 */
1313 alloc r2=ar.pfs,8,0,1,0
1314 .prologue
1315 PT_REGS_SAVES(16)
1316 adds sp=-16,sp
1317 .body
1318 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1319 ;;
1320 /*
1321 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1322 * syscall-entry path does not save them we save them here instead. Note: we
1323 * don't need to save any other registers that are not saved by the stream-lined
1324 * syscall path, because restore_sigcontext() restores them.
1325 */
1326 adds r16=PT(F6)+32,sp
1327 adds r17=PT(F7)+32,sp
1328 ;;
1329 stf.spill [r16]=f6,32
1330 stf.spill [r17]=f7,32
1331 ;;
1332 stf.spill [r16]=f8,32
1333 stf.spill [r17]=f9,32
1334 ;;
1335 stf.spill [r16]=f10
1336 stf.spill [r17]=f11
1337 adds out0=16,sp // out0 = &sigscratch
1338 br.call.sptk.many rp=ia64_rt_sigreturn
1339 .ret19: .restore sp,0
1340 adds sp=16,sp
1341 ;;
1342 ld8 r9=[sp] // load new ar.unat
1343 mov.sptk b7=r8,ia64_native_leave_kernel
1344 ;;
1345 mov ar.unat=r9
1346 br.many b7
1347 END(sys_rt_sigreturn)
1349 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1350 .prologue
1351 /*
1352 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1353 */
1354 mov r16=r0
1355 DO_SAVE_SWITCH_STACK
1356 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1357 .ret21: .body
1358 DO_LOAD_SWITCH_STACK
1359 br.cond.sptk.many rp // goes to ia64_leave_kernel
1360 END(ia64_prepare_handle_unaligned)
1362 //
1363 // unw_init_running(void (*callback)(info, arg), void *arg)
1364 //
1365 # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1367 GLOBAL_ENTRY(unw_init_running)
1368 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1369 alloc loc1=ar.pfs,2,3,3,0
1370 ;;
1371 ld8 loc2=[in0],8
1372 mov loc0=rp
1373 mov r16=loc1
1374 DO_SAVE_SWITCH_STACK
1375 .body
1377 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1378 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1379 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1380 adds sp=-EXTRA_FRAME_SIZE,sp
1381 .body
1382 ;;
1383 adds out0=16,sp // &info
1384 mov out1=r13 // current
1385 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1386 br.call.sptk.many rp=unw_init_frame_info
1387 1: adds out0=16,sp // &info
1388 mov b6=loc2
1389 mov loc2=gp // save gp across indirect function call
1390 ;;
1391 ld8 gp=[in0]
1392 mov out1=in1 // arg
1393 br.call.sptk.many rp=b6 // invoke the callback function
1394 1: mov gp=loc2 // restore gp
1396 // For now, we don't allow changing registers from within
1397 // unw_init_running; if we ever want to allow that, we'd
1398 // have to do a load_switch_stack here:
1399 .restore sp
1400 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1402 mov ar.pfs=loc1
1403 mov rp=loc0
1404 br.ret.sptk.many rp
1405 END(unw_init_running)
1407 .rodata
1408 .align 8
1409 .globl sys_call_table
1410 sys_call_table:
1411 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1412 data8 sys_exit // 1025
1413 data8 sys_read
1414 data8 sys_write
1415 data8 sys_open
1416 data8 sys_close
1417 data8 sys_creat // 1030
1418 data8 sys_link
1419 data8 sys_unlink
1420 data8 ia64_execve
1421 data8 sys_chdir
1422 data8 sys_fchdir // 1035
1423 data8 sys_utimes
1424 data8 sys_mknod
1425 data8 sys_chmod
1426 data8 sys_chown
1427 data8 sys_lseek // 1040
1428 data8 sys_getpid
1429 data8 sys_getppid
1430 data8 sys_mount
1431 data8 sys_umount
1432 data8 sys_setuid // 1045
1433 data8 sys_getuid
1434 data8 sys_geteuid
1435 data8 sys_ptrace
1436 data8 sys_access
1437 data8 sys_sync // 1050
1438 data8 sys_fsync
1439 data8 sys_fdatasync
1440 data8 sys_kill
1441 data8 sys_rename
1442 data8 sys_mkdir // 1055
1443 data8 sys_rmdir
1444 data8 sys_dup
1445 data8 sys_ia64_pipe
1446 data8 sys_times
1447 data8 ia64_brk // 1060
1448 data8 sys_setgid
1449 data8 sys_getgid
1450 data8 sys_getegid
1451 data8 sys_acct
1452 data8 sys_ioctl // 1065
1453 data8 sys_fcntl
1454 data8 sys_umask
1455 data8 sys_chroot
1456 data8 sys_ustat
1457 data8 sys_dup2 // 1070
1458 data8 sys_setreuid
1459 data8 sys_setregid
1460 data8 sys_getresuid
1461 data8 sys_setresuid
1462 data8 sys_getresgid // 1075
1463 data8 sys_setresgid
1464 data8 sys_getgroups
1465 data8 sys_setgroups
1466 data8 sys_getpgid
1467 data8 sys_setpgid // 1080
1468 data8 sys_setsid
1469 data8 sys_getsid
1470 data8 sys_sethostname
1471 data8 sys_setrlimit
1472 data8 sys_getrlimit // 1085
1473 data8 sys_getrusage
1474 data8 sys_gettimeofday
1475 data8 sys_settimeofday
1476 data8 sys_select
1477 data8 sys_poll // 1090
1478 data8 sys_symlink
1479 data8 sys_readlink
1480 data8 sys_uselib
1481 data8 sys_swapon
1482 data8 sys_swapoff // 1095
1483 data8 sys_reboot
1484 data8 sys_truncate
1485 data8 sys_ftruncate
1486 data8 sys_fchmod
1487 data8 sys_fchown // 1100
1488 data8 ia64_getpriority
1489 data8 sys_setpriority
1490 data8 sys_statfs
1491 data8 sys_fstatfs
1492 data8 sys_gettid // 1105
1493 data8 sys_semget
1494 data8 sys_semop
1495 data8 sys_semctl
1496 data8 sys_msgget
1497 data8 sys_msgsnd // 1110
1498 data8 sys_msgrcv
1499 data8 sys_msgctl
1500 data8 sys_shmget
1501 data8 sys_shmat
1502 data8 sys_shmdt // 1115
1503 data8 sys_shmctl
1504 data8 sys_syslog
1505 data8 sys_setitimer
1506 data8 sys_getitimer
1507 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1508 data8 sys_ni_syscall /* was: ia64_oldlstat */
1509 data8 sys_ni_syscall /* was: ia64_oldfstat */
1510 data8 sys_vhangup
1511 data8 sys_lchown
1512 data8 sys_remap_file_pages // 1125
1513 data8 sys_wait4
1514 data8 sys_sysinfo
1515 data8 sys_clone
1516 data8 sys_setdomainname
1517 data8 sys_newuname // 1130
1518 data8 sys_adjtimex
1519 data8 sys_ni_syscall /* was: ia64_create_module */
1520 data8 sys_init_module
1521 data8 sys_delete_module
1522 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1523 data8 sys_ni_syscall /* was: sys_query_module */
1524 data8 sys_quotactl
1525 data8 sys_bdflush
1526 data8 sys_sysfs
1527 data8 sys_personality // 1140
1528 data8 sys_ni_syscall // sys_afs_syscall
1529 data8 sys_setfsuid
1530 data8 sys_setfsgid
1531 data8 sys_getdents
1532 data8 sys_flock // 1145
1533 data8 sys_readv
1534 data8 sys_writev
1535 data8 sys_pread64
1536 data8 sys_pwrite64
1537 data8 sys_sysctl // 1150
1538 data8 sys_mmap
1539 data8 sys_munmap
1540 data8 sys_mlock
1541 data8 sys_mlockall
1542 data8 sys_mprotect // 1155
1543 data8 ia64_mremap
1544 data8 sys_msync
1545 data8 sys_munlock
1546 data8 sys_munlockall
1547 data8 sys_sched_getparam // 1160
1548 data8 sys_sched_setparam
1549 data8 sys_sched_getscheduler
1550 data8 sys_sched_setscheduler
1551 data8 sys_sched_yield
1552 data8 sys_sched_get_priority_max // 1165
1553 data8 sys_sched_get_priority_min
1554 data8 sys_sched_rr_get_interval
1555 data8 sys_nanosleep
1556 data8 sys_nfsservctl
1557 data8 sys_prctl // 1170
1558 data8 sys_getpagesize
1559 data8 sys_mmap2
1560 data8 sys_pciconfig_read
1561 data8 sys_pciconfig_write
1562 data8 sys_perfmonctl // 1175
1563 data8 sys_sigaltstack
1564 data8 sys_rt_sigaction
1565 data8 sys_rt_sigpending
1566 data8 sys_rt_sigprocmask
1567 data8 sys_rt_sigqueueinfo // 1180
1568 data8 sys_rt_sigreturn
1569 data8 sys_rt_sigsuspend
1570 data8 sys_rt_sigtimedwait
1571 data8 sys_getcwd
1572 data8 sys_capget // 1185
1573 data8 sys_capset
1574 data8 sys_sendfile64
1575 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1576 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1577 data8 sys_socket // 1190
1578 data8 sys_bind
1579 data8 sys_connect
1580 data8 sys_listen
1581 data8 sys_accept
1582 data8 sys_getsockname // 1195
1583 data8 sys_getpeername
1584 data8 sys_socketpair
1585 data8 sys_send
1586 data8 sys_sendto
1587 data8 sys_recv // 1200
1588 data8 sys_recvfrom
1589 data8 sys_shutdown
1590 data8 sys_setsockopt
1591 data8 sys_getsockopt
1592 data8 sys_sendmsg // 1205
1593 data8 sys_recvmsg
1594 data8 sys_pivot_root
1595 data8 sys_mincore
1596 data8 sys_madvise
1597 data8 sys_newstat // 1210
1598 data8 sys_newlstat
1599 data8 sys_newfstat
1600 data8 sys_clone2
1601 data8 sys_getdents64
1602 data8 sys_getunwind // 1215
1603 data8 sys_readahead
1604 data8 sys_setxattr
1605 data8 sys_lsetxattr
1606 data8 sys_fsetxattr
1607 data8 sys_getxattr // 1220
1608 data8 sys_lgetxattr
1609 data8 sys_fgetxattr
1610 data8 sys_listxattr
1611 data8 sys_llistxattr
1612 data8 sys_flistxattr // 1225
1613 data8 sys_removexattr
1614 data8 sys_lremovexattr
1615 data8 sys_fremovexattr
1616 data8 sys_tkill
1617 data8 sys_futex // 1230
1618 data8 sys_sched_setaffinity
1619 data8 sys_sched_getaffinity
1620 data8 sys_set_tid_address
1621 data8 sys_fadvise64_64
1622 data8 sys_tgkill // 1235
1623 data8 sys_exit_group
1624 data8 sys_lookup_dcookie
1625 data8 sys_io_setup
1626 data8 sys_io_destroy
1627 data8 sys_io_getevents // 1240
1628 data8 sys_io_submit
1629 data8 sys_io_cancel
1630 data8 sys_epoll_create
1631 data8 sys_epoll_ctl
1632 data8 sys_epoll_wait // 1245
1633 data8 sys_restart_syscall
1634 data8 sys_semtimedop
1635 data8 sys_timer_create
1636 data8 sys_timer_settime
1637 data8 sys_timer_gettime // 1250
1638 data8 sys_timer_getoverrun
1639 data8 sys_timer_delete
1640 data8 sys_clock_settime
1641 data8 sys_clock_gettime
1642 data8 sys_clock_getres // 1255
1643 data8 sys_clock_nanosleep
1644 data8 sys_fstatfs64
1645 data8 sys_statfs64
1646 data8 sys_mbind
1647 data8 sys_get_mempolicy // 1260
1648 data8 sys_set_mempolicy
1649 data8 sys_mq_open
1650 data8 sys_mq_unlink
1651 data8 sys_mq_timedsend
1652 data8 sys_mq_timedreceive // 1265
1653 data8 sys_mq_notify
1654 data8 sys_mq_getsetattr
1655 data8 sys_kexec_load
1656 data8 sys_ni_syscall // reserved for vserver
1657 data8 sys_waitid // 1270
1658 data8 sys_add_key
1659 data8 sys_request_key
1660 data8 sys_keyctl
1661 data8 sys_ioprio_set
1662 data8 sys_ioprio_get // 1275
1663 data8 sys_move_pages
1664 data8 sys_inotify_init
1665 data8 sys_inotify_add_watch
1666 data8 sys_inotify_rm_watch
1667 data8 sys_migrate_pages // 1280
1668 data8 sys_openat
1669 data8 sys_mkdirat
1670 data8 sys_mknodat
1671 data8 sys_fchownat
1672 data8 sys_futimesat // 1285
1673 data8 sys_newfstatat
1674 data8 sys_unlinkat
1675 data8 sys_renameat
1676 data8 sys_linkat
1677 data8 sys_symlinkat // 1290
1678 data8 sys_readlinkat
1679 data8 sys_fchmodat
1680 data8 sys_faccessat
1681 data8 sys_pselect6
1682 data8 sys_ppoll // 1295
1683 data8 sys_unshare
1684 data8 sys_splice
1685 data8 sys_set_robust_list
1686 data8 sys_get_robust_list
1687 data8 sys_sync_file_range // 1300
1688 data8 sys_tee
1689 data8 sys_vmsplice
1690 data8 sys_fallocate
1691 data8 sys_getcpu
1692 data8 sys_epoll_pwait // 1305
1693 data8 sys_utimensat
1694 data8 sys_signalfd
1695 data8 sys_ni_syscall
1696 data8 sys_eventfd
1697 data8 sys_timerfd_create // 1310
1698 data8 sys_timerfd_settime
1699 data8 sys_timerfd_gettime
1700 data8 sys_signalfd4
1701 data8 sys_eventfd2
1702 data8 sys_epoll_create1 // 1315
1703 data8 sys_dup3
1704 data8 sys_pipe2
1705 data8 sys_inotify_init1
1707 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1708 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */