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Use BOOTMEM_EXCLUSIVE for kdump
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kernel / setup_64.c
bloba49f5f734a5e09d68f9fd1859e6c076405fb7059
1 /*
2 * Copyright (C) 1995 Linus Torvalds
3 */
4
5 /*
6 * This file handles the architecture-dependent parts of initialization
7 */
8
9 #include <linux/errno.h>
10 #include <linux/sched.h>
11 #include <linux/kernel.h>
12 #include <linux/mm.h>
13 #include <linux/stddef.h>
14 #include <linux/unistd.h>
15 #include <linux/ptrace.h>
16 #include <linux/slab.h>
17 #include <linux/user.h>
18 #include <linux/a.out.h>
19 #include <linux/screen_info.h>
20 #include <linux/ioport.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/initrd.h>
24 #include <linux/highmem.h>
25 #include <linux/bootmem.h>
26 #include <linux/module.h>
27 #include <asm/processor.h>
28 #include <linux/console.h>
29 #include <linux/seq_file.h>
30 #include <linux/crash_dump.h>
31 #include <linux/root_dev.h>
32 #include <linux/pci.h>
33 #include <linux/efi.h>
34 #include <linux/acpi.h>
35 #include <linux/kallsyms.h>
36 #include <linux/edd.h>
37 #include <linux/mmzone.h>
38 #include <linux/kexec.h>
39 #include <linux/cpufreq.h>
40 #include <linux/dmi.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/ctype.h>
43 #include <linux/uaccess.h>
44 #include <linux/init_ohci1394_dma.h>
45
46 #include <asm/mtrr.h>
47 #include <asm/uaccess.h>
48 #include <asm/system.h>
49 #include <asm/vsyscall.h>
50 #include <asm/io.h>
51 #include <asm/smp.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <video/edid.h>
55 #include <asm/e820.h>
56 #include <asm/dma.h>
57 #include <asm/gart.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/proto.h>
61 #include <asm/setup.h>
62 #include <asm/mach_apic.h>
63 #include <asm/numa.h>
64 #include <asm/sections.h>
65 #include <asm/dmi.h>
66 #include <asm/cacheflush.h>
67 #include <asm/mce.h>
68 #include <asm/ds.h>
69 #include <asm/topology.h>
70
71 #ifdef CONFIG_PARAVIRT
72 #include <asm/paravirt.h>
73 #else
74 #define ARCH_SETUP
75 #endif
76
77 /*
78 * Machine setup..
79 */
80
81 struct cpuinfo_x86 boot_cpu_data __read_mostly;
82 EXPORT_SYMBOL(boot_cpu_data);
83
84 __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
85
86 unsigned long mmu_cr4_features;
87
88 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
89 int bootloader_type;
90
91 unsigned long saved_video_mode;
92
93 int force_mwait __cpuinitdata;
94
95 /*
96 * Early DMI memory
97 */
98 int dmi_alloc_index;
99 char dmi_alloc_data[DMI_MAX_DATA];
100
101 /*
102 * Setup options
103 */
104 struct screen_info screen_info;
105 EXPORT_SYMBOL(screen_info);
106 struct sys_desc_table_struct {
107 unsigned short length;
108 unsigned char table[0];
109 };
110
111 struct edid_info edid_info;
112 EXPORT_SYMBOL_GPL(edid_info);
113
114 extern int root_mountflags;
115
116 char __initdata command_line[COMMAND_LINE_SIZE];
117
118 struct resource standard_io_resources[] = {
119 { .name = "dma1", .start = 0x00, .end = 0x1f,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "pic1", .start = 0x20, .end = 0x21,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "timer0", .start = 0x40, .end = 0x43,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "timer1", .start = 0x50, .end = 0x53,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "keyboard", .start = 0x60, .end = 0x6f,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "pic2", .start = 0xa0, .end = 0xa1,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "dma2", .start = 0xc0, .end = 0xdf,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
135 { .name = "fpu", .start = 0xf0, .end = 0xff,
136 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
137 };
138
139 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
140
141 static struct resource data_resource = {
142 .name = "Kernel data",
143 .start = 0,
144 .end = 0,
145 .flags = IORESOURCE_RAM,
146 };
147 static struct resource code_resource = {
148 .name = "Kernel code",
149 .start = 0,
150 .end = 0,
151 .flags = IORESOURCE_RAM,
152 };
153 static struct resource bss_resource = {
154 .name = "Kernel bss",
155 .start = 0,
156 .end = 0,
157 .flags = IORESOURCE_RAM,
158 };
159
160 static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c);
161
162 #ifdef CONFIG_PROC_VMCORE
163 /* elfcorehdr= specifies the location of elf core header
164 * stored by the crashed kernel. This option will be passed
165 * by kexec loader to the capture kernel.
166 */
167 static int __init setup_elfcorehdr(char *arg)
168 {
169 char *end;
170 if (!arg)
171 return -EINVAL;
172 elfcorehdr_addr = memparse(arg, &end);
173 return end > arg ? 0 : -EINVAL;
174 }
175 early_param("elfcorehdr", setup_elfcorehdr);
176 #endif
177
178 #ifndef CONFIG_NUMA
179 static void __init
180 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
181 {
182 unsigned long bootmap_size, bootmap;
183
184 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
185 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size,
186 PAGE_SIZE);
187 if (bootmap == -1L)
188 panic("Cannot find bootmem map of size %ld\n", bootmap_size);
189 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
190 e820_register_active_regions(0, start_pfn, end_pfn);
191 free_bootmem_with_active_regions(0, end_pfn);
192 reserve_bootmem(bootmap, bootmap_size, BOOTMEM_DEFAULT);
193 }
194 #endif
195
196 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
197 struct edd edd;
198 #ifdef CONFIG_EDD_MODULE
199 EXPORT_SYMBOL(edd);
200 #endif
201 /**
202 * copy_edd() - Copy the BIOS EDD information
203 * from boot_params into a safe place.
204 *
205 */
206 static inline void copy_edd(void)
207 {
208 memcpy(edd.mbr_signature, boot_params.edd_mbr_sig_buffer,
209 sizeof(edd.mbr_signature));
210 memcpy(edd.edd_info, boot_params.eddbuf, sizeof(edd.edd_info));
211 edd.mbr_signature_nr = boot_params.edd_mbr_sig_buf_entries;
212 edd.edd_info_nr = boot_params.eddbuf_entries;
213 }
214 #else
215 static inline void copy_edd(void)
216 {
217 }
218 #endif
219
220 #ifdef CONFIG_KEXEC
221 static void __init reserve_crashkernel(void)
222 {
223 unsigned long long total_mem;
224 unsigned long long crash_size, crash_base;
225 int ret;
226
227 total_mem = ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT;
228
229 ret = parse_crashkernel(boot_command_line, total_mem,
230 &crash_size, &crash_base);
231 if (ret == 0 && crash_size) {
232 if (crash_base <= 0) {
233 printk(KERN_INFO "crashkernel reservation failed - "
234 "you have to specify a base address\n");
235 return;
236 }
237
238 if (reserve_bootmem(crash_base, crash_size,
239 BOOTMEM_EXCLUSIVE) < 0) {
240 printk(KERN_INFO "crashkernel reservation failed - "
241 "memory is in use\n");
242 return;
243 }
244
245 printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
246 "for crashkernel (System RAM: %ldMB)\n",
247 (unsigned long)(crash_size >> 20),
248 (unsigned long)(crash_base >> 20),
249 (unsigned long)(total_mem >> 20));
250 crashk_res.start = crash_base;
251 crashk_res.end = crash_base + crash_size - 1;
252 }
253 }
254 #else
255 static inline void __init reserve_crashkernel(void)
256 {}
257 #endif
258
259 /* Overridden in paravirt.c if CONFIG_PARAVIRT */
260 void __attribute__((weak)) __init memory_setup(void)
261 {
262 machine_specific_memory_setup();
263 }
264
265 /*
266 * setup_arch - architecture-specific boot-time initializations
267 *
268 * Note: On x86_64, fixmaps are ready for use even before this is called.
269 */
270 void __init setup_arch(char **cmdline_p)
271 {
272 unsigned i;
273
274 printk(KERN_INFO "Command line: %s\n", boot_command_line);
275
276 ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev);
277 screen_info = boot_params.screen_info;
278 edid_info = boot_params.edid_info;
279 saved_video_mode = boot_params.hdr.vid_mode;
280 bootloader_type = boot_params.hdr.type_of_loader;
281
282 #ifdef CONFIG_BLK_DEV_RAM
283 rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK;
284 rd_prompt = ((boot_params.hdr.ram_size & RAMDISK_PROMPT_FLAG) != 0);
285 rd_doload = ((boot_params.hdr.ram_size & RAMDISK_LOAD_FLAG) != 0);
286 #endif
287 #ifdef CONFIG_EFI
288 if (!strncmp((char *)&boot_params.efi_info.efi_loader_signature,
289 "EL64", 4))
290 efi_enabled = 1;
291 #endif
292
293 ARCH_SETUP
294
295 memory_setup();
296 copy_edd();
297
298 if (!boot_params.hdr.root_flags)
299 root_mountflags &= ~MS_RDONLY;
300 init_mm.start_code = (unsigned long) &_text;
301 init_mm.end_code = (unsigned long) &_etext;
302 init_mm.end_data = (unsigned long) &_edata;
303 init_mm.brk = (unsigned long) &_end;
304
305 code_resource.start = virt_to_phys(&_text);
306 code_resource.end = virt_to_phys(&_etext)-1;
307 data_resource.start = virt_to_phys(&_etext);
308 data_resource.end = virt_to_phys(&_edata)-1;
309 bss_resource.start = virt_to_phys(&__bss_start);
310 bss_resource.end = virt_to_phys(&__bss_stop)-1;
311
312 early_identify_cpu(&boot_cpu_data);
313
314 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
315 *cmdline_p = command_line;
316
317 parse_early_param();
318
319 #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
320 if (init_ohci1394_dma_early)
321 init_ohci1394_dma_on_all_controllers();
322 #endif
323
324 finish_e820_parsing();
325
326 early_gart_iommu_check();
327
328 e820_register_active_regions(0, 0, -1UL);
329 /*
330 * partially used pages are not usable - thus
331 * we are rounding upwards:
332 */
333 end_pfn = e820_end_of_ram();
334 /* update e820 for memory not covered by WB MTRRs */
335 mtrr_bp_init();
336 if (mtrr_trim_uncached_memory(end_pfn)) {
337 e820_register_active_regions(0, 0, -1UL);
338 end_pfn = e820_end_of_ram();
339 }
340
341 num_physpages = end_pfn;
342
343 check_efer();
344
345 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
346 if (efi_enabled)
347 efi_init();
348
349 dmi_scan_machine();
350
351 io_delay_init();
352
353 #ifdef CONFIG_SMP
354 /* setup to use the early static init tables during kernel startup */
355 x86_cpu_to_apicid_early_ptr = (void *)x86_cpu_to_apicid_init;
356 x86_bios_cpu_apicid_early_ptr = (void *)x86_bios_cpu_apicid_init;
357 #ifdef CONFIG_NUMA
358 x86_cpu_to_node_map_early_ptr = (void *)x86_cpu_to_node_map_init;
359 #endif
360 #endif
361
362 #ifdef CONFIG_ACPI
363 /*
364 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
365 * Call this early for SRAT node setup.
366 */
367 acpi_boot_table_init();
368 #endif
369
370 /* How many end-of-memory variables you have, grandma! */
371 max_low_pfn = end_pfn;
372 max_pfn = end_pfn;
373 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
374
375 /* Remove active ranges so rediscovery with NUMA-awareness happens */
376 remove_all_active_ranges();
377
378 #ifdef CONFIG_ACPI_NUMA
379 /*
380 * Parse SRAT to discover nodes.
381 */
382 acpi_numa_init();
383 #endif
384
385 #ifdef CONFIG_NUMA
386 numa_initmem_init(0, end_pfn);
387 #else
388 contig_initmem_init(0, end_pfn);
389 #endif
390
391 early_res_to_bootmem();
392
393 #ifdef CONFIG_ACPI_SLEEP
394 /*
395 * Reserve low memory region for sleep support.
396 */
397 acpi_reserve_bootmem();
398 #endif
399
400 if (efi_enabled)
401 efi_reserve_bootmem();
402
403 /*
404 * Find and reserve possible boot-time SMP configuration:
405 */
406 find_smp_config();
407 #ifdef CONFIG_BLK_DEV_INITRD
408 if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) {
409 unsigned long ramdisk_image = boot_params.hdr.ramdisk_image;
410 unsigned long ramdisk_size = boot_params.hdr.ramdisk_size;
411 unsigned long ramdisk_end = ramdisk_image + ramdisk_size;
412 unsigned long end_of_mem = end_pfn << PAGE_SHIFT;
413
414 if (ramdisk_end <= end_of_mem) {
415 reserve_bootmem_generic(ramdisk_image, ramdisk_size);
416 initrd_start = ramdisk_image + PAGE_OFFSET;
417 initrd_end = initrd_start+ramdisk_size;
418 } else {
419 /* Assumes everything on node 0 */
420 free_bootmem(ramdisk_image, ramdisk_size);
421 printk(KERN_ERR "initrd extends beyond end of memory "
422 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
423 ramdisk_end, end_of_mem);
424 initrd_start = 0;
425 }
426 }
427 #endif
428 reserve_crashkernel();
429 paging_init();
430 map_vsyscall();
431
432 early_quirks();
433
434 #ifdef CONFIG_ACPI
435 /*
436 * Read APIC and some other early information from ACPI tables.
437 */
438 acpi_boot_init();
439 #endif
440
441 init_cpu_to_node();
442
443 /*
444 * get boot-time SMP configuration:
445 */
446 if (smp_found_config)
447 get_smp_config();
448 init_apic_mappings();
449 ioapic_init_mappings();
450
451 /*
452 * We trust e820 completely. No explicit ROM probing in memory.
453 */
454 e820_reserve_resources(&code_resource, &data_resource, &bss_resource);
455 e820_mark_nosave_regions();
456
457 /* request I/O space for devices used on all i[345]86 PCs */
458 for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
459 request_resource(&ioport_resource, &standard_io_resources[i]);
460
461 e820_setup_gap();
462
463 #ifdef CONFIG_VT
464 #if defined(CONFIG_VGA_CONSOLE)
465 if (!efi_enabled || (efi_mem_type(0xa0000) != EFI_CONVENTIONAL_MEMORY))
466 conswitchp = &vga_con;
467 #elif defined(CONFIG_DUMMY_CONSOLE)
468 conswitchp = &dummy_con;
469 #endif
470 #endif
471 }
472
473 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
474 {
475 unsigned int *v;
476
477 if (c->extended_cpuid_level < 0x80000004)
478 return 0;
479
480 v = (unsigned int *) c->x86_model_id;
481 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
482 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
483 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
484 c->x86_model_id[48] = 0;
485 return 1;
486 }
487
488
489 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
490 {
491 unsigned int n, dummy, eax, ebx, ecx, edx;
492
493 n = c->extended_cpuid_level;
494
495 if (n >= 0x80000005) {
496 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
497 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), "
498 "D cache %dK (%d bytes/line)\n",
499 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
500 c->x86_cache_size = (ecx>>24) + (edx>>24);
501 /* On K8 L1 TLB is inclusive, so don't count it */
502 c->x86_tlbsize = 0;
503 }
504
505 if (n >= 0x80000006) {
506 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
507 ecx = cpuid_ecx(0x80000006);
508 c->x86_cache_size = ecx >> 16;
509 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
510
511 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
512 c->x86_cache_size, ecx & 0xFF);
513 }
514 if (n >= 0x80000008) {
515 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
516 c->x86_virt_bits = (eax >> 8) & 0xff;
517 c->x86_phys_bits = eax & 0xff;
518 }
519 }
520
521 #ifdef CONFIG_NUMA
522 static int nearby_node(int apicid)
523 {
524 int i, node;
525
526 for (i = apicid - 1; i >= 0; i--) {
527 node = apicid_to_node[i];
528 if (node != NUMA_NO_NODE && node_online(node))
529 return node;
530 }
531 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
532 node = apicid_to_node[i];
533 if (node != NUMA_NO_NODE && node_online(node))
534 return node;
535 }
536 return first_node(node_online_map); /* Shouldn't happen */
537 }
538 #endif
539
540 /*
541 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
542 * Assumes number of cores is a power of two.
543 */
544 static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
545 {
546 #ifdef CONFIG_SMP
547 unsigned bits;
548 #ifdef CONFIG_NUMA
549 int cpu = smp_processor_id();
550 int node = 0;
551 unsigned apicid = hard_smp_processor_id();
552 #endif
553 bits = c->x86_coreid_bits;
554
555 /* Low order bits define the core id (index of core in socket) */
556 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
557 /* Convert the APIC ID into the socket ID */
558 c->phys_proc_id = phys_pkg_id(bits);
559
560 #ifdef CONFIG_NUMA
561 node = c->phys_proc_id;
562 if (apicid_to_node[apicid] != NUMA_NO_NODE)
563 node = apicid_to_node[apicid];
564 if (!node_online(node)) {
565 /* Two possibilities here:
566 - The CPU is missing memory and no node was created.
567 In that case try picking one from a nearby CPU
568 - The APIC IDs differ from the HyperTransport node IDs
569 which the K8 northbridge parsing fills in.
570 Assume they are all increased by a constant offset,
571 but in the same order as the HT nodeids.
572 If that doesn't result in a usable node fall back to the
573 path for the previous case. */
574
575 int ht_nodeid = apicid - (cpu_data(0).phys_proc_id << bits);
576
577 if (ht_nodeid >= 0 &&
578 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
579 node = apicid_to_node[ht_nodeid];
580 /* Pick a nearby node */
581 if (!node_online(node))
582 node = nearby_node(apicid);
583 }
584 numa_set_node(cpu, node);
585
586 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
587 #endif
588 #endif
589 }
590
591 static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
592 {
593 #ifdef CONFIG_SMP
594 unsigned bits, ecx;
595
596 /* Multi core CPU? */
597 if (c->extended_cpuid_level < 0x80000008)
598 return;
599
600 ecx = cpuid_ecx(0x80000008);
601
602 c->x86_max_cores = (ecx & 0xff) + 1;
603
604 /* CPU telling us the core id bits shift? */
605 bits = (ecx >> 12) & 0xF;
606
607 /* Otherwise recompute */
608 if (bits == 0) {
609 while ((1 << bits) < c->x86_max_cores)
610 bits++;
611 }
612
613 c->x86_coreid_bits = bits;
614
615 #endif
616 }
617
618 #define ENABLE_C1E_MASK 0x18000000
619 #define CPUID_PROCESSOR_SIGNATURE 1
620 #define CPUID_XFAM 0x0ff00000
621 #define CPUID_XFAM_K8 0x00000000
622 #define CPUID_XFAM_10H 0x00100000
623 #define CPUID_XFAM_11H 0x00200000
624 #define CPUID_XMOD 0x000f0000
625 #define CPUID_XMOD_REV_F 0x00040000
626
627 /* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
628 static __cpuinit int amd_apic_timer_broken(void)
629 {
630 u32 lo, hi, eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
631
632 switch (eax & CPUID_XFAM) {
633 case CPUID_XFAM_K8:
634 if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
635 break;
636 case CPUID_XFAM_10H:
637 case CPUID_XFAM_11H:
638 rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
639 if (lo & ENABLE_C1E_MASK)
640 return 1;
641 break;
642 default:
643 /* err on the side of caution */
644 return 1;
645 }
646 return 0;
647 }
648
649 static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
650 {
651 early_init_amd_mc(c);
652
653 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
654 if (c->x86_power & (1<<8))
655 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
656 }
657
658 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
659 {
660 unsigned level;
661
662 #ifdef CONFIG_SMP
663 unsigned long value;
664
665 /*
666 * Disable TLB flush filter by setting HWCR.FFDIS on K8
667 * bit 6 of msr C001_0015
668 *
669 * Errata 63 for SH-B3 steppings
670 * Errata 122 for all steppings (F+ have it disabled by default)
671 */
672 if (c->x86 == 15) {
673 rdmsrl(MSR_K8_HWCR, value);
674 value |= 1 << 6;
675 wrmsrl(MSR_K8_HWCR, value);
676 }
677 #endif
678
679 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
680 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
681 clear_bit(0*32+31, (unsigned long *)&c->x86_capability);
682
683 /* On C+ stepping K8 rep microcode works well for copy/memset */
684 level = cpuid_eax(1);
685 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||
686 level >= 0x0f58))
687 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
688 if (c->x86 == 0x10 || c->x86 == 0x11)
689 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
690
691 /* Enable workaround for FXSAVE leak */
692 if (c->x86 >= 6)
693 set_cpu_cap(c, X86_FEATURE_FXSAVE_LEAK);
694
695 level = get_model_name(c);
696 if (!level) {
697 switch (c->x86) {
698 case 15:
699 /* Should distinguish Models here, but this is only
700 a fallback anyways. */
701 strcpy(c->x86_model_id, "Hammer");
702 break;
703 }
704 }
705 display_cacheinfo(c);
706
707 /* Multi core CPU? */
708 if (c->extended_cpuid_level >= 0x80000008)
709 amd_detect_cmp(c);
710
711 if (c->extended_cpuid_level >= 0x80000006 &&
712 (cpuid_edx(0x80000006) & 0xf000))
713 num_cache_leaves = 4;
714 else
715 num_cache_leaves = 3;
716
717 if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11)
718 set_cpu_cap(c, X86_FEATURE_K8);
719
720 /* MFENCE stops RDTSC speculation */
721 set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
722
723 if (amd_apic_timer_broken())
724 disable_apic_timer = 1;
725 }
726
727 void __cpuinit detect_ht(struct cpuinfo_x86 *c)
728 {
729 #ifdef CONFIG_SMP
730 u32 eax, ebx, ecx, edx;
731 int index_msb, core_bits;
732
733 cpuid(1, &eax, &ebx, &ecx, &edx);
734
735
736 if (!cpu_has(c, X86_FEATURE_HT))
737 return;
738 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
739 goto out;
740
741 smp_num_siblings = (ebx & 0xff0000) >> 16;
742
743 if (smp_num_siblings == 1) {
744 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
745 } else if (smp_num_siblings > 1) {
746
747 if (smp_num_siblings > NR_CPUS) {
748 printk(KERN_WARNING "CPU: Unsupported number of "
749 "siblings %d", smp_num_siblings);
750 smp_num_siblings = 1;
751 return;
752 }
753
754 index_msb = get_count_order(smp_num_siblings);
755 c->phys_proc_id = phys_pkg_id(index_msb);
756
757 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
758
759 index_msb = get_count_order(smp_num_siblings);
760
761 core_bits = get_count_order(c->x86_max_cores);
762
763 c->cpu_core_id = phys_pkg_id(index_msb) &
764 ((1 << core_bits) - 1);
765 }
766 out:
767 if ((c->x86_max_cores * smp_num_siblings) > 1) {
768 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
769 c->phys_proc_id);
770 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
771 c->cpu_core_id);
772 }
773
774 #endif
775 }
776
777 /*
778 * find out the number of processor cores on the die
779 */
780 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
781 {
782 unsigned int eax, t;
783
784 if (c->cpuid_level < 4)
785 return 1;
786
787 cpuid_count(4, 0, &eax, &t, &t, &t);
788
789 if (eax & 0x1f)
790 return ((eax >> 26) + 1);
791 else
792 return 1;
793 }
794
795 static void srat_detect_node(void)
796 {
797 #ifdef CONFIG_NUMA
798 unsigned node;
799 int cpu = smp_processor_id();
800 int apicid = hard_smp_processor_id();
801
802 /* Don't do the funky fallback heuristics the AMD version employs
803 for now. */
804 node = apicid_to_node[apicid];
805 if (node == NUMA_NO_NODE)
806 node = first_node(node_online_map);
807 numa_set_node(cpu, node);
808
809 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
810 #endif
811 }
812
813 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
814 {
815 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
816 (c->x86 == 0x6 && c->x86_model >= 0x0e))
817 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
818 }
819
820 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
821 {
822 /* Cache sizes */
823 unsigned n;
824
825 init_intel_cacheinfo(c);
826 if (c->cpuid_level > 9) {
827 unsigned eax = cpuid_eax(10);
828 /* Check for version and the number of counters */
829 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
830 set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
831 }
832
833 if (cpu_has_ds) {
834 unsigned int l1, l2;
835 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
836 if (!(l1 & (1<<11)))
837 set_cpu_cap(c, X86_FEATURE_BTS);
838 if (!(l1 & (1<<12)))
839 set_cpu_cap(c, X86_FEATURE_PEBS);
840 }
841
842
843 if (cpu_has_bts)
844 ds_init_intel(c);
845
846 n = c->extended_cpuid_level;
847 if (n >= 0x80000008) {
848 unsigned eax = cpuid_eax(0x80000008);
849 c->x86_virt_bits = (eax >> 8) & 0xff;
850 c->x86_phys_bits = eax & 0xff;
851 /* CPUID workaround for Intel 0F34 CPU */
852 if (c->x86_vendor == X86_VENDOR_INTEL &&
853 c->x86 == 0xF && c->x86_model == 0x3 &&
854 c->x86_mask == 0x4)
855 c->x86_phys_bits = 36;
856 }
857
858 if (c->x86 == 15)
859 c->x86_cache_alignment = c->x86_clflush_size * 2;
860 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
861 (c->x86 == 0x6 && c->x86_model >= 0x0e))
862 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
863 if (c->x86 == 6)
864 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
865 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
866 c->x86_max_cores = intel_num_cpu_cores(c);
867
868 srat_detect_node();
869 }
870
871 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
872 {
873 char *v = c->x86_vendor_id;
874
875 if (!strcmp(v, "AuthenticAMD"))
876 c->x86_vendor = X86_VENDOR_AMD;
877 else if (!strcmp(v, "GenuineIntel"))
878 c->x86_vendor = X86_VENDOR_INTEL;
879 else
880 c->x86_vendor = X86_VENDOR_UNKNOWN;
881 }
882
883 /* Do some early cpuid on the boot CPU to get some parameter that are
884 needed before check_bugs. Everything advanced is in identify_cpu
885 below. */
886 static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
887 {
888 u32 tfms, xlvl;
889
890 c->loops_per_jiffy = loops_per_jiffy;
891 c->x86_cache_size = -1;
892 c->x86_vendor = X86_VENDOR_UNKNOWN;
893 c->x86_model = c->x86_mask = 0; /* So far unknown... */
894 c->x86_vendor_id[0] = '\0'; /* Unset */
895 c->x86_model_id[0] = '\0'; /* Unset */
896 c->x86_clflush_size = 64;
897 c->x86_cache_alignment = c->x86_clflush_size;
898 c->x86_max_cores = 1;
899 c->x86_coreid_bits = 0;
900 c->extended_cpuid_level = 0;
901 memset(&c->x86_capability, 0, sizeof c->x86_capability);
902
903 /* Get vendor name */
904 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
905 (unsigned int *)&c->x86_vendor_id[0],
906 (unsigned int *)&c->x86_vendor_id[8],
907 (unsigned int *)&c->x86_vendor_id[4]);
908
909 get_cpu_vendor(c);
910
911 /* Initialize the standard set of capabilities */
912 /* Note that the vendor-specific code below might override */
913
914 /* Intel-defined flags: level 0x00000001 */
915 if (c->cpuid_level >= 0x00000001) {
916 __u32 misc;
917 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
918 &c->x86_capability[0]);
919 c->x86 = (tfms >> 8) & 0xf;
920 c->x86_model = (tfms >> 4) & 0xf;
921 c->x86_mask = tfms & 0xf;
922 if (c->x86 == 0xf)
923 c->x86 += (tfms >> 20) & 0xff;
924 if (c->x86 >= 0x6)
925 c->x86_model += ((tfms >> 16) & 0xF) << 4;
926 if (c->x86_capability[0] & (1<<19))
927 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
928 } else {
929 /* Have CPUID level 0 only - unheard of */
930 c->x86 = 4;
931 }
932
933 #ifdef CONFIG_SMP
934 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
935 #endif
936 /* AMD-defined flags: level 0x80000001 */
937 xlvl = cpuid_eax(0x80000000);
938 c->extended_cpuid_level = xlvl;
939 if ((xlvl & 0xffff0000) == 0x80000000) {
940 if (xlvl >= 0x80000001) {
941 c->x86_capability[1] = cpuid_edx(0x80000001);
942 c->x86_capability[6] = cpuid_ecx(0x80000001);
943 }
944 if (xlvl >= 0x80000004)
945 get_model_name(c); /* Default name */
946 }
947
948 /* Transmeta-defined flags: level 0x80860001 */
949 xlvl = cpuid_eax(0x80860000);
950 if ((xlvl & 0xffff0000) == 0x80860000) {
951 /* Don't set x86_cpuid_level here for now to not confuse. */
952 if (xlvl >= 0x80860001)
953 c->x86_capability[2] = cpuid_edx(0x80860001);
954 }
955
956 c->extended_cpuid_level = cpuid_eax(0x80000000);
957 if (c->extended_cpuid_level >= 0x80000007)
958 c->x86_power = cpuid_edx(0x80000007);
959
960 switch (c->x86_vendor) {
961 case X86_VENDOR_AMD:
962 early_init_amd(c);
963 break;
964 case X86_VENDOR_INTEL:
965 early_init_intel(c);
966 break;
967 }
968
969 }
970
971 /*
972 * This does the hard work of actually picking apart the CPU stuff...
973 */
974 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
975 {
976 int i;
977
978 early_identify_cpu(c);
979
980 init_scattered_cpuid_features(c);
981
982 c->apicid = phys_pkg_id(0);
983
984 /*
985 * Vendor-specific initialization. In this section we
986 * canonicalize the feature flags, meaning if there are
987 * features a certain CPU supports which CPUID doesn't
988 * tell us, CPUID claiming incorrect flags, or other bugs,
989 * we handle them here.
990 *
991 * At the end of this section, c->x86_capability better
992 * indicate the features this CPU genuinely supports!
993 */
994 switch (c->x86_vendor) {
995 case X86_VENDOR_AMD:
996 init_amd(c);
997 break;
998
999 case X86_VENDOR_INTEL:
1000 init_intel(c);
1001 break;
1002
1003 case X86_VENDOR_UNKNOWN:
1004 default:
1005 display_cacheinfo(c);
1006 break;
1007 }
1008
1009 detect_ht(c);
1010
1011 /*
1012 * On SMP, boot_cpu_data holds the common feature set between
1013 * all CPUs; so make sure that we indicate which features are
1014 * common between the CPUs. The first time this routine gets
1015 * executed, c == &boot_cpu_data.
1016 */
1017 if (c != &boot_cpu_data) {
1018 /* AND the already accumulated flags with these */
1019 for (i = 0; i < NCAPINTS; i++)
1020 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1021 }
1022
1023 /* Clear all flags overriden by options */
1024 for (i = 0; i < NCAPINTS; i++)
1025 c->x86_capability[i] ^= cleared_cpu_caps[i];
1026
1027 #ifdef CONFIG_X86_MCE
1028 mcheck_init(c);
1029 #endif
1030 select_idle_routine(c);
1031
1032 if (c != &boot_cpu_data)
1033 mtrr_ap_init();
1034 #ifdef CONFIG_NUMA
1035 numa_add_cpu(smp_processor_id());
1036 #endif
1037
1038 }
1039
1040 static __init int setup_noclflush(char *arg)
1041 {
1042 setup_clear_cpu_cap(X86_FEATURE_CLFLSH);
1043 return 1;
1044 }
1045 __setup("noclflush", setup_noclflush);
1046
1047 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1048 {
1049 if (c->x86_model_id[0])
1050 printk(KERN_INFO "%s", c->x86_model_id);
1051
1052 if (c->x86_mask || c->cpuid_level >= 0)
1053 printk(KERN_CONT " stepping %02x\n", c->x86_mask);
1054 else
1055 printk(KERN_CONT "\n");
1056 }
1057
1058 static __init int setup_disablecpuid(char *arg)
1059 {
1060 int bit;
1061 if (get_option(&arg, &bit) && bit < NCAPINTS*32)
1062 setup_clear_cpu_cap(bit);
1063 else
1064 return 0;
1065 return 1;
1066 }
1067 __setup("clearcpuid=", setup_disablecpuid);
1068
1069 /*
1070 * Get CPU information for use by the procfs.
1071 */
1072
1073 static int show_cpuinfo(struct seq_file *m, void *v)
1074 {
1075 struct cpuinfo_x86 *c = v;
1076 int cpu = 0, i;
1077
1078 #ifdef CONFIG_SMP
1079 cpu = c->cpu_index;
1080 #endif
1081
1082 seq_printf(m, "processor\t: %u\n"
1083 "vendor_id\t: %s\n"
1084 "cpu family\t: %d\n"
1085 "model\t\t: %d\n"
1086 "model name\t: %s\n",
1087 (unsigned)cpu,
1088 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1089 c->x86,
1090 (int)c->x86_model,
1091 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1092
1093 if (c->x86_mask || c->cpuid_level >= 0)
1094 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1095 else
1096 seq_printf(m, "stepping\t: unknown\n");
1097
1098 if (cpu_has(c, X86_FEATURE_TSC)) {
1099 unsigned int freq = cpufreq_quick_get((unsigned)cpu);
1100
1101 if (!freq)
1102 freq = cpu_khz;
1103 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1104 freq / 1000, (freq % 1000));
1105 }
1106
1107 /* Cache size */
1108 if (c->x86_cache_size >= 0)
1109 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1110
1111 #ifdef CONFIG_SMP
1112 if (smp_num_siblings * c->x86_max_cores > 1) {
1113 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1114 seq_printf(m, "siblings\t: %d\n",
1115 cpus_weight(per_cpu(cpu_core_map, cpu)));
1116 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1117 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1118 }
1119 #endif
1120
1121 seq_printf(m,
1122 "fpu\t\t: yes\n"
1123 "fpu_exception\t: yes\n"
1124 "cpuid level\t: %d\n"
1125 "wp\t\t: yes\n"
1126 "flags\t\t:",
1127 c->cpuid_level);
1128
1129 for (i = 0; i < 32*NCAPINTS; i++)
1130 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1131 seq_printf(m, " %s", x86_cap_flags[i]);
1132
1133 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1134 c->loops_per_jiffy/(500000/HZ),
1135 (c->loops_per_jiffy/(5000/HZ)) % 100);
1136
1137 if (c->x86_tlbsize > 0)
1138 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1139 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1140 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1141
1142 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1143 c->x86_phys_bits, c->x86_virt_bits);
1144
1145 seq_printf(m, "power management:");
1146 for (i = 0; i < 32; i++) {
1147 if (c->x86_power & (1 << i)) {
1148 if (i < ARRAY_SIZE(x86_power_flags) &&
1149 x86_power_flags[i])
1150 seq_printf(m, "%s%s",
1151 x86_power_flags[i][0]?" ":"",
1152 x86_power_flags[i]);
1153 else
1154 seq_printf(m, " [%d]", i);
1155 }
1156 }
1157
1158 seq_printf(m, "\n\n");
1159
1160 return 0;
1161 }
1162
1163 static void *c_start(struct seq_file *m, loff_t *pos)
1164 {
1165 if (*pos == 0) /* just in case, cpu 0 is not the first */
1166 *pos = first_cpu(cpu_online_map);
1167 if ((*pos) < NR_CPUS && cpu_online(*pos))
1168 return &cpu_data(*pos);
1169 return NULL;
1170 }
1171
1172 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1173 {
1174 *pos = next_cpu(*pos, cpu_online_map);
1175 return c_start(m, pos);
1176 }
1177
1178 static void c_stop(struct seq_file *m, void *v)
1179 {
1180 }
1181
1182 const struct seq_operations cpuinfo_op = {
1183 .start = c_start,
1184 .next = c_next,
1185 .stop = c_stop,
1186 .show = show_cpuinfo,
1187 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree