include/asm-v850/sim85e2.h

   1 /*
   2  * include/asm-v850/sim85e2.h -- Machine-dependent defs for
   3  *      V850E2 RTL simulator
   4  *
   5  *  Copyright (C) 2002,03  NEC Electronics Corporation
   6  *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General
   9  * Public License.  See the file COPYING in the main directory of this
  10  * archive for more details.
  11  *
  12  * Written by Miles Bader <miles@gnu.org>
  13  */
  14
  15 #ifndef __V850_SIM85E2_H__
  16 #define __V850_SIM85E2_H__
  17
  18
  19 #include <asm/v850e2.h>         /* Based on V850E2 core.  */
  20
  21
  22 /* Various memory areas supported by the simulator.
  23    These should match the corresponding definitions in the linker script.  */
  24
  25 /* `instruction RAM'; instruction fetches are much faster from IRAM than
  26    from DRAM.  */
  27 #define IRAM_ADDR               0
  28 #define IRAM_SIZE               0x00100000 /* 1MB */
  29 /* `data RAM', below and contiguous with the I/O space.
  30    Data fetches are much faster from DRAM than from IRAM.  */
  31 #define DRAM_ADDR               0xfff00000
  32 #define DRAM_SIZE               0x000ff000 /* 1020KB */
  33 /* `external ram'.  Unlike the above RAM areas, this memory is cached,
  34    so both instruction and data fetches should be (mostly) fast --
  35    however, currently only write-through caching is supported, so writes
  36    to ERAM will be slow.  */
  37 #define ERAM_ADDR               0x00100000
  38 #define ERAM_SIZE               0x07f00000 /* 127MB (max) */
  39 /* Dynamic RAM; uses memory controller.  */
  40 #define SDRAM_ADDR              0x10000000
  41 #define SDRAM_SIZE              0x01000000 /* 16MB */
  42
  43
  44 /* Simulator specific control registers.  */
  45 /* NOTHAL controls whether the simulator will stop at a `halt' insn.  */
  46 #define SIM85E2_NOTHAL_ADDR     0xffffff22
  47 #define SIM85E2_NOTHAL          (*(volatile u8 *)SIM85E2_NOTHAL_ADDR)
  48 /* The simulator will stop N cycles after N is written to SIMFIN.  */
  49 #define SIM85E2_SIMFIN_ADDR     0xffffff24
  50 #define SIM85E2_SIMFIN          (*(volatile u16 *)SIM85E2_SIMFIN_ADDR)
  51
  52
  53 /* For <asm/irq.h> */
  54 #define NUM_CPU_IRQS            64
  55
  56
  57 /* For <asm/page.h> */
  58 #define PAGE_OFFSET             SDRAM_ADDR
  59
  60
  61 /* For <asm/entry.h> */
  62 /* `R0 RAM', used for a few miscellaneous variables that must be accessible
  63    using a load instruction relative to R0.  The sim85e2 simulator
  64    actually puts 1020K of RAM from FFF00000 to FFFFF000, so we arbitarily
  65    choose a small portion at the end of that.  */
  66 #define R0_RAM_ADDR             0xFFFFE000
  67
  68
  69 #endif /* __V850_SIM85E2_H__ */