1 /* linux/drivers/mmc/host/sdhci-s3c.c
3 * Copyright 2008 Openmoko Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * SDHCI (HSMMC) support for Samsung SoC
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/clk.h>
21 #include <linux/gpio.h>
23 #include <linux/mmc/host.h>
25 #include <plat/sdhci.h>
26 #include <plat/regs-sdhci.h>
30 #define MAX_BUS_CLK (4)
33 * struct sdhci_s3c - S3C SDHCI instance
34 * @host: The SDHCI host created
35 * @pdev: The platform device we where created from.
36 * @ioarea: The resource created when we claimed the IO area.
37 * @pdata: The platform data for this controller.
38 * @cur_clk: The index of the current bus clock.
39 * @clk_io: The clock for the internal bus interface.
40 * @clk_bus: The clocks that are available for the SD/MMC bus clock.
43 struct sdhci_host
*host
;
44 struct platform_device
*pdev
;
45 struct resource
*ioarea
;
46 struct s3c_sdhci_platdata
*pdata
;
52 struct clk
*clk_bus
[MAX_BUS_CLK
];
55 static inline struct sdhci_s3c
*to_s3c(struct sdhci_host
*host
)
57 return sdhci_priv(host
);
61 * get_curclk - convert ctrl2 register to clock source number
62 * @ctrl2: Control2 register value.
64 static u32
get_curclk(u32 ctrl2
)
66 ctrl2
&= S3C_SDHCI_CTRL2_SELBASECLK_MASK
;
67 ctrl2
>>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT
;
72 static void sdhci_s3c_check_sclk(struct sdhci_host
*host
)
74 struct sdhci_s3c
*ourhost
= to_s3c(host
);
75 u32 tmp
= readl(host
->ioaddr
+ S3C_SDHCI_CONTROL2
);
77 if (get_curclk(tmp
) != ourhost
->cur_clk
) {
78 dev_dbg(&ourhost
->pdev
->dev
, "restored ctrl2 clock setting\n");
80 tmp
&= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK
;
81 tmp
|= ourhost
->cur_clk
<< S3C_SDHCI_CTRL2_SELBASECLK_SHIFT
;
82 writel(tmp
, host
->ioaddr
+ 0x80);
87 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
88 * @host: The SDHCI host instance.
90 * Callback to return the maximum clock rate acheivable by the controller.
92 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host
*host
)
94 struct sdhci_s3c
*ourhost
= to_s3c(host
);
96 unsigned int rate
, max
;
99 /* note, a reset will reset the clock source */
101 sdhci_s3c_check_sclk(host
);
103 for (max
= 0, clk
= 0; clk
< MAX_BUS_CLK
; clk
++) {
104 busclk
= ourhost
->clk_bus
[clk
];
108 rate
= clk_get_rate(busclk
);
117 * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
118 * @ourhost: Our SDHCI instance.
119 * @src: The source clock index.
120 * @wanted: The clock frequency wanted.
122 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c
*ourhost
,
127 struct clk
*clksrc
= ourhost
->clk_bus
[src
];
134 * Clock divider's step is different as 1 from that of host controller
135 * when 'clk_type' is S3C_SDHCI_CLK_DIV_EXTERNAL.
137 if (ourhost
->pdata
->clk_type
) {
138 rate
= clk_round_rate(clksrc
, wanted
);
139 return wanted
- rate
;
142 rate
= clk_get_rate(clksrc
);
144 for (div
= 1; div
< 256; div
*= 2) {
145 if ((rate
/ div
) <= wanted
)
149 dev_dbg(&ourhost
->pdev
->dev
, "clk %d: rate %ld, want %d, got %ld\n",
150 src
, rate
, wanted
, rate
/ div
);
152 return (wanted
- (rate
/ div
));
156 * sdhci_s3c_set_clock - callback on clock change
157 * @host: The SDHCI host being changed
158 * @clock: The clock rate being requested.
160 * When the card's clock is going to be changed, look at the new frequency
161 * and find the best clock source to go with it.
163 static void sdhci_s3c_set_clock(struct sdhci_host
*host
, unsigned int clock
)
165 struct sdhci_s3c
*ourhost
= to_s3c(host
);
166 unsigned int best
= UINT_MAX
;
172 /* don't bother if the clock is going off. */
176 for (src
= 0; src
< MAX_BUS_CLK
; src
++) {
177 delta
= sdhci_s3c_consider_clock(ourhost
, src
, clock
);
184 dev_dbg(&ourhost
->pdev
->dev
,
185 "selected source %d, clock %d, delta %d\n",
186 best_src
, clock
, best
);
188 /* select the new clock source */
190 if (ourhost
->cur_clk
!= best_src
) {
191 struct clk
*clk
= ourhost
->clk_bus
[best_src
];
193 /* turn clock off to card before changing clock source */
194 writew(0, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
196 ourhost
->cur_clk
= best_src
;
197 host
->max_clk
= clk_get_rate(clk
);
199 ctrl
= readl(host
->ioaddr
+ S3C_SDHCI_CONTROL2
);
200 ctrl
&= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK
;
201 ctrl
|= best_src
<< S3C_SDHCI_CTRL2_SELBASECLK_SHIFT
;
202 writel(ctrl
, host
->ioaddr
+ S3C_SDHCI_CONTROL2
);
205 /* reconfigure the hardware for new clock rate */
212 if (ourhost
->pdata
->cfg_card
)
213 (ourhost
->pdata
->cfg_card
)(ourhost
->pdev
, host
->ioaddr
,
219 * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
220 * @host: The SDHCI host being queried
222 * To init mmc host properly a minimal clock value is needed. For high system
223 * bus clock's values the standard formula gives values out of allowed range.
224 * The clock still can be set to lower values, if clock source other then
225 * system bus is selected.
227 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host
*host
)
229 struct sdhci_s3c
*ourhost
= to_s3c(host
);
230 unsigned int delta
, min
= UINT_MAX
;
233 for (src
= 0; src
< MAX_BUS_CLK
; src
++) {
234 delta
= sdhci_s3c_consider_clock(ourhost
, src
, 0);
235 if (delta
== UINT_MAX
)
237 /* delta is a negative value in this case */
244 /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
245 static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host
*host
)
247 struct sdhci_s3c
*ourhost
= to_s3c(host
);
249 return clk_round_rate(ourhost
->clk_bus
[ourhost
->cur_clk
], UINT_MAX
);
252 /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
253 static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host
*host
)
255 struct sdhci_s3c
*ourhost
= to_s3c(host
);
258 * initial clock can be in the frequency range of
259 * 100KHz-400KHz, so we set it as max value.
261 return clk_round_rate(ourhost
->clk_bus
[ourhost
->cur_clk
], 400000);
264 /* sdhci_cmu_set_clock - callback on clock change.*/
265 static void sdhci_cmu_set_clock(struct sdhci_host
*host
, unsigned int clock
)
267 struct sdhci_s3c
*ourhost
= to_s3c(host
);
269 /* don't bother if the clock is going off */
273 sdhci_s3c_set_clock(host
, clock
);
275 clk_set_rate(ourhost
->clk_bus
[ourhost
->cur_clk
], clock
);
281 * sdhci_s3c_platform_8bit_width - support 8bit buswidth
282 * @host: The SDHCI host being queried
283 * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
285 * We have 8-bit width support but is not a v3 controller.
286 * So we add platform_8bit_width() and support 8bit width.
288 static int sdhci_s3c_platform_8bit_width(struct sdhci_host
*host
, int width
)
292 ctrl
= sdhci_readb(host
, SDHCI_HOST_CONTROL
);
295 case MMC_BUS_WIDTH_8
:
296 ctrl
|= SDHCI_CTRL_8BITBUS
;
297 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
299 case MMC_BUS_WIDTH_4
:
300 ctrl
|= SDHCI_CTRL_4BITBUS
;
301 ctrl
&= ~SDHCI_CTRL_8BITBUS
;
307 sdhci_writeb(host
, ctrl
, SDHCI_HOST_CONTROL
);
312 static struct sdhci_ops sdhci_s3c_ops
= {
313 .get_max_clock
= sdhci_s3c_get_max_clk
,
314 .set_clock
= sdhci_s3c_set_clock
,
315 .get_min_clock
= sdhci_s3c_get_min_clock
,
316 .platform_8bit_width
= sdhci_s3c_platform_8bit_width
,
319 static void sdhci_s3c_notify_change(struct platform_device
*dev
, int state
)
321 struct sdhci_host
*host
= platform_get_drvdata(dev
);
325 spin_lock_irqsave(&host
->lock
, flags
);
327 dev_dbg(&dev
->dev
, "card inserted.\n");
328 host
->flags
&= ~SDHCI_DEVICE_DEAD
;
329 host
->quirks
|= SDHCI_QUIRK_BROKEN_CARD_DETECTION
;
331 dev_dbg(&dev
->dev
, "card removed.\n");
332 host
->flags
|= SDHCI_DEVICE_DEAD
;
333 host
->quirks
&= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION
;
335 tasklet_schedule(&host
->card_tasklet
);
336 spin_unlock_irqrestore(&host
->lock
, flags
);
340 static irqreturn_t
sdhci_s3c_gpio_card_detect_thread(int irq
, void *dev_id
)
342 struct sdhci_s3c
*sc
= dev_id
;
343 int status
= gpio_get_value(sc
->ext_cd_gpio
);
344 if (sc
->pdata
->ext_cd_gpio_invert
)
346 sdhci_s3c_notify_change(sc
->pdev
, status
);
350 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c
*sc
)
352 struct s3c_sdhci_platdata
*pdata
= sc
->pdata
;
353 struct device
*dev
= &sc
->pdev
->dev
;
355 if (gpio_request(pdata
->ext_cd_gpio
, "SDHCI EXT CD") == 0) {
356 sc
->ext_cd_gpio
= pdata
->ext_cd_gpio
;
357 sc
->ext_cd_irq
= gpio_to_irq(pdata
->ext_cd_gpio
);
358 if (sc
->ext_cd_irq
&&
359 request_threaded_irq(sc
->ext_cd_irq
, NULL
,
360 sdhci_s3c_gpio_card_detect_thread
,
361 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
,
362 dev_name(dev
), sc
) == 0) {
363 int status
= gpio_get_value(sc
->ext_cd_gpio
);
364 if (pdata
->ext_cd_gpio_invert
)
366 sdhci_s3c_notify_change(sc
->pdev
, status
);
368 dev_warn(dev
, "cannot request irq for card detect\n");
372 dev_err(dev
, "cannot request gpio for card detect\n");
376 static int __devinit
sdhci_s3c_probe(struct platform_device
*pdev
)
378 struct s3c_sdhci_platdata
*pdata
= pdev
->dev
.platform_data
;
379 struct device
*dev
= &pdev
->dev
;
380 struct sdhci_host
*host
;
381 struct sdhci_s3c
*sc
;
382 struct resource
*res
;
383 int ret
, irq
, ptr
, clks
;
386 dev_err(dev
, "no device data specified\n");
390 irq
= platform_get_irq(pdev
, 0);
392 dev_err(dev
, "no irq specified\n");
396 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
398 dev_err(dev
, "no memory specified\n");
402 host
= sdhci_alloc_host(dev
, sizeof(struct sdhci_s3c
));
404 dev_err(dev
, "sdhci_alloc_host() failed\n");
405 return PTR_ERR(host
);
408 sc
= sdhci_priv(host
);
413 sc
->ext_cd_gpio
= -1; /* invalid gpio number */
415 platform_set_drvdata(pdev
, host
);
417 sc
->clk_io
= clk_get(dev
, "hsmmc");
418 if (IS_ERR(sc
->clk_io
)) {
419 dev_err(dev
, "failed to get io clock\n");
420 ret
= PTR_ERR(sc
->clk_io
);
424 /* enable the local io clock and keep it running for the moment. */
425 clk_enable(sc
->clk_io
);
427 for (clks
= 0, ptr
= 0; ptr
< MAX_BUS_CLK
; ptr
++) {
429 char *name
= pdata
->clocks
[ptr
];
434 clk
= clk_get(dev
, name
);
436 dev_err(dev
, "failed to get clock %s\n", name
);
441 sc
->clk_bus
[ptr
] = clk
;
444 * save current clock index to know which clock bus
445 * is used later in overriding functions.
451 dev_info(dev
, "clock source %d: %s (%ld Hz)\n",
452 ptr
, name
, clk_get_rate(clk
));
456 dev_err(dev
, "failed to find any bus clocks\n");
461 sc
->ioarea
= request_mem_region(res
->start
, resource_size(res
),
462 mmc_hostname(host
->mmc
));
464 dev_err(dev
, "failed to reserve register area\n");
469 host
->ioaddr
= ioremap_nocache(res
->start
, resource_size(res
));
471 dev_err(dev
, "failed to map registers\n");
476 /* Ensure we have minimal gpio selected CMD/CLK/Detect */
478 pdata
->cfg_gpio(pdev
, pdata
->max_width
);
480 host
->hw_name
= "samsung-hsmmc";
481 host
->ops
= &sdhci_s3c_ops
;
485 /* Setup quirks for the controller */
486 host
->quirks
|= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
;
487 host
->quirks
|= SDHCI_QUIRK_NO_HISPD_BIT
;
489 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
491 /* we currently see overruns on errors, so disable the SDMA
492 * support as well. */
493 host
->quirks
|= SDHCI_QUIRK_BROKEN_DMA
;
495 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
497 /* It seems we do not get an DATA transfer complete on non-busy
498 * transfers, not sure if this is a problem with this specific
499 * SDHCI block, or a missing configuration that needs to be set. */
500 host
->quirks
|= SDHCI_QUIRK_NO_BUSY_IRQ
;
502 /* This host supports the Auto CMD12 */
503 host
->quirks
|= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
;
505 if (pdata
->cd_type
== S3C_SDHCI_CD_NONE
||
506 pdata
->cd_type
== S3C_SDHCI_CD_PERMANENT
)
507 host
->quirks
|= SDHCI_QUIRK_BROKEN_CARD_DETECTION
;
509 if (pdata
->cd_type
== S3C_SDHCI_CD_PERMANENT
)
510 host
->mmc
->caps
= MMC_CAP_NONREMOVABLE
;
512 if (pdata
->host_caps
)
513 host
->mmc
->caps
|= pdata
->host_caps
;
515 host
->quirks
|= (SDHCI_QUIRK_32BIT_DMA_ADDR
|
516 SDHCI_QUIRK_32BIT_DMA_SIZE
);
518 /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
519 host
->quirks
|= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
;
522 * If controller does not have internal clock divider,
523 * we can use overriding functions instead of default.
525 if (pdata
->clk_type
) {
526 sdhci_s3c_ops
.set_clock
= sdhci_cmu_set_clock
;
527 sdhci_s3c_ops
.get_min_clock
= sdhci_cmu_get_min_clock
;
528 sdhci_s3c_ops
.get_max_clock
= sdhci_cmu_get_max_clock
;
531 /* It supports additional host capabilities if needed */
532 if (pdata
->host_caps
)
533 host
->mmc
->caps
|= pdata
->host_caps
;
535 ret
= sdhci_add_host(host
);
537 dev_err(dev
, "sdhci_add_host() failed\n");
541 /* The following two methods of card detection might call
542 sdhci_s3c_notify_change() immediately, so they can be called
543 only after sdhci_add_host(). Setup errors are ignored. */
544 if (pdata
->cd_type
== S3C_SDHCI_CD_EXTERNAL
&& pdata
->ext_cd_init
)
545 pdata
->ext_cd_init(&sdhci_s3c_notify_change
);
546 if (pdata
->cd_type
== S3C_SDHCI_CD_GPIO
&&
547 gpio_is_valid(pdata
->ext_cd_gpio
))
548 sdhci_s3c_setup_card_detect_gpio(sc
);
553 release_resource(sc
->ioarea
);
557 for (ptr
= 0; ptr
< MAX_BUS_CLK
; ptr
++) {
558 clk_disable(sc
->clk_bus
[ptr
]);
559 clk_put(sc
->clk_bus
[ptr
]);
563 clk_disable(sc
->clk_io
);
567 sdhci_free_host(host
);
572 static int __devexit
sdhci_s3c_remove(struct platform_device
*pdev
)
574 struct s3c_sdhci_platdata
*pdata
= pdev
->dev
.platform_data
;
575 struct sdhci_host
*host
= platform_get_drvdata(pdev
);
576 struct sdhci_s3c
*sc
= sdhci_priv(host
);
579 if (pdata
->cd_type
== S3C_SDHCI_CD_EXTERNAL
&& pdata
->ext_cd_cleanup
)
580 pdata
->ext_cd_cleanup(&sdhci_s3c_notify_change
);
583 free_irq(sc
->ext_cd_irq
, sc
);
585 if (gpio_is_valid(sc
->ext_cd_gpio
))
586 gpio_free(sc
->ext_cd_gpio
);
588 sdhci_remove_host(host
, 1);
590 for (ptr
= 0; ptr
< 3; ptr
++) {
591 if (sc
->clk_bus
[ptr
]) {
592 clk_disable(sc
->clk_bus
[ptr
]);
593 clk_put(sc
->clk_bus
[ptr
]);
596 clk_disable(sc
->clk_io
);
599 iounmap(host
->ioaddr
);
600 release_resource(sc
->ioarea
);
603 sdhci_free_host(host
);
604 platform_set_drvdata(pdev
, NULL
);
611 static int sdhci_s3c_suspend(struct platform_device
*dev
, pm_message_t pm
)
613 struct sdhci_host
*host
= platform_get_drvdata(dev
);
615 sdhci_suspend_host(host
, pm
);
619 static int sdhci_s3c_resume(struct platform_device
*dev
)
621 struct sdhci_host
*host
= platform_get_drvdata(dev
);
623 sdhci_resume_host(host
);
628 #define sdhci_s3c_suspend NULL
629 #define sdhci_s3c_resume NULL
632 static struct platform_driver sdhci_s3c_driver
= {
633 .probe
= sdhci_s3c_probe
,
634 .remove
= __devexit_p(sdhci_s3c_remove
),
635 .suspend
= sdhci_s3c_suspend
,
636 .resume
= sdhci_s3c_resume
,
638 .owner
= THIS_MODULE
,
643 static int __init
sdhci_s3c_init(void)
645 return platform_driver_register(&sdhci_s3c_driver
);
648 static void __exit
sdhci_s3c_exit(void)
650 platform_driver_unregister(&sdhci_s3c_driver
);
653 module_init(sdhci_s3c_init
);
654 module_exit(sdhci_s3c_exit
);
656 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
657 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
658 MODULE_LICENSE("GPL v2");
659 MODULE_ALIAS("platform:s3c-sdhci");