drivers/serial/bcm63xx_uart.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Derived from many drivers using generic_serial interface.
   7  *
   8  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
   9  *
  10  *  Serial driver for BCM63xx integrated UART.
  11  *
  12  * Hardware flow control was _not_ tested since I only have RX/TX on
  13  * my board.
  14  */
  15
  16 #if defined(CONFIG_SERIAL_BCM63XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  17 #define SUPPORT_SYSRQ
  18 #endif
  19
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/init.h>
  23 #include <linux/delay.h>
  24 #include <linux/module.h>
  25 #include <linux/console.h>
  26 #include <linux/clk.h>
  27 #include <linux/tty.h>
  28 #include <linux/tty_flip.h>
  29 #include <linux/sysrq.h>
  30 #include <linux/serial.h>
  31 #include <linux/serial_core.h>
  32
  33 #include <bcm63xx_clk.h>
  34 #include <bcm63xx_irq.h>
  35 #include <bcm63xx_regs.h>
  36 #include <bcm63xx_io.h>
  37
  38 #define BCM63XX_NR_UARTS        2
  39
  40 static struct uart_port ports[BCM63XX_NR_UARTS];
  41
  42 /*
  43  * rx interrupt mask / stat
  44  *
  45  * mask:
  46  *  - rx fifo full
  47  *  - rx fifo above threshold
  48  *  - rx fifo not empty for too long
  49  */
  50 #define UART_RX_INT_MASK        (UART_IR_MASK(UART_IR_RXOVER) |         \
  51                                 UART_IR_MASK(UART_IR_RXTHRESH) |        \
  52                                 UART_IR_MASK(UART_IR_RXTIMEOUT))
  53
  54 #define UART_RX_INT_STAT        (UART_IR_STAT(UART_IR_RXOVER) |         \
  55                                 UART_IR_STAT(UART_IR_RXTHRESH) |        \
  56                                 UART_IR_STAT(UART_IR_RXTIMEOUT))
  57
  58 /*
  59  * tx interrupt mask / stat
  60  *
  61  * mask:
  62  * - tx fifo empty
  63  * - tx fifo below threshold
  64  */
  65 #define UART_TX_INT_MASK        (UART_IR_MASK(UART_IR_TXEMPTY) |        \
  66                                 UART_IR_MASK(UART_IR_TXTRESH))
  67
  68 #define UART_TX_INT_STAT        (UART_IR_STAT(UART_IR_TXEMPTY) |        \
  69                                 UART_IR_STAT(UART_IR_TXTRESH))
  70
  71 /*
  72  * external input interrupt
  73  *
  74  * mask: any edge on CTS, DCD
  75  */
  76 #define UART_EXTINP_INT_MASK    (UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \
  77                                  UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD))
  78
  79 /*
  80  * handy uart register accessor
  81  */
  82 static inline unsigned int bcm_uart_readl(struct uart_port *port,
  83                                          unsigned int offset)
  84 {
  85         return bcm_readl(port->membase + offset);
  86 }
  87
  88 static inline void bcm_uart_writel(struct uart_port *port,
  89                                   unsigned int value, unsigned int offset)
  90 {
  91         bcm_writel(value, port->membase + offset);
  92 }
  93
  94 /*
  95  * serial core request to check if uart tx fifo is empty
  96  */
  97 static unsigned int bcm_uart_tx_empty(struct uart_port *port)
  98 {
  99         unsigned int val;
 100
 101         val = bcm_uart_readl(port, UART_IR_REG);
 102         return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0;
 103 }
 104
 105 /*
 106  * serial core request to set RTS and DTR pin state and loopback mode
 107  */
 108 static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 109 {
 110         unsigned int val;
 111
 112         val = bcm_uart_readl(port, UART_MCTL_REG);
 113         val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK);
 114         /* invert of written value is reflected on the pin */
 115         if (!(mctrl & TIOCM_DTR))
 116                 val |= UART_MCTL_DTR_MASK;
 117         if (!(mctrl & TIOCM_RTS))
 118                 val |= UART_MCTL_RTS_MASK;
 119         bcm_uart_writel(port, val, UART_MCTL_REG);
 120
 121         val = bcm_uart_readl(port, UART_CTL_REG);
 122         if (mctrl & TIOCM_LOOP)
 123                 val |= UART_CTL_LOOPBACK_MASK;
 124         else
 125                 val &= ~UART_CTL_LOOPBACK_MASK;
 126         bcm_uart_writel(port, val, UART_CTL_REG);
 127 }
 128
 129 /*
 130  * serial core request to return RI, CTS, DCD and DSR pin state
 131  */
 132 static unsigned int bcm_uart_get_mctrl(struct uart_port *port)
 133 {
 134         unsigned int val, mctrl;
 135
 136         mctrl = 0;
 137         val = bcm_uart_readl(port, UART_EXTINP_REG);
 138         if (val & UART_EXTINP_RI_MASK)
 139                 mctrl |= TIOCM_RI;
 140         if (val & UART_EXTINP_CTS_MASK)
 141                 mctrl |= TIOCM_CTS;
 142         if (val & UART_EXTINP_DCD_MASK)
 143                 mctrl |= TIOCM_CD;
 144         if (val & UART_EXTINP_DSR_MASK)
 145                 mctrl |= TIOCM_DSR;
 146         return mctrl;
 147 }
 148
 149 /*
 150  * serial core request to disable tx ASAP (used for flow control)
 151  */
 152 static void bcm_uart_stop_tx(struct uart_port *port)
 153 {
 154         unsigned int val;
 155
 156         val = bcm_uart_readl(port, UART_CTL_REG);
 157         val &= ~(UART_CTL_TXEN_MASK);
 158         bcm_uart_writel(port, val, UART_CTL_REG);
 159
 160         val = bcm_uart_readl(port, UART_IR_REG);
 161         val &= ~UART_TX_INT_MASK;
 162         bcm_uart_writel(port, val, UART_IR_REG);
 163 }
 164
 165 /*
 166  * serial core request to (re)enable tx
 167  */
 168 static void bcm_uart_start_tx(struct uart_port *port)
 169 {
 170         unsigned int val;
 171
 172         val = bcm_uart_readl(port, UART_IR_REG);
 173         val |= UART_TX_INT_MASK;
 174         bcm_uart_writel(port, val, UART_IR_REG);
 175
 176         val = bcm_uart_readl(port, UART_CTL_REG);
 177         val |= UART_CTL_TXEN_MASK;
 178         bcm_uart_writel(port, val, UART_CTL_REG);
 179 }
 180
 181 /*
 182  * serial core request to stop rx, called before port shutdown
 183  */
 184 static void bcm_uart_stop_rx(struct uart_port *port)
 185 {
 186         unsigned int val;
 187
 188         val = bcm_uart_readl(port, UART_IR_REG);
 189         val &= ~UART_RX_INT_MASK;
 190         bcm_uart_writel(port, val, UART_IR_REG);
 191 }
 192
 193 /*
 194  * serial core request to enable modem status interrupt reporting
 195  */
 196 static void bcm_uart_enable_ms(struct uart_port *port)
 197 {
 198         unsigned int val;
 199
 200         val = bcm_uart_readl(port, UART_IR_REG);
 201         val |= UART_IR_MASK(UART_IR_EXTIP);
 202         bcm_uart_writel(port, val, UART_IR_REG);
 203 }
 204
 205 /*
 206  * serial core request to start/stop emitting break char
 207  */
 208 static void bcm_uart_break_ctl(struct uart_port *port, int ctl)
 209 {
 210         unsigned long flags;
 211         unsigned int val;
 212
 213         spin_lock_irqsave(&port->lock, flags);
 214
 215         val = bcm_uart_readl(port, UART_CTL_REG);
 216         if (ctl)
 217                 val |= UART_CTL_XMITBRK_MASK;
 218         else
 219                 val &= ~UART_CTL_XMITBRK_MASK;
 220         bcm_uart_writel(port, val, UART_CTL_REG);
 221
 222         spin_unlock_irqrestore(&port->lock, flags);
 223 }
 224
 225 /*
 226  * return port type in string format
 227  */
 228 static const char *bcm_uart_type(struct uart_port *port)
 229 {
 230         return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL;
 231 }
 232
 233 /*
 234  * read all chars in rx fifo and send them to core
 235  */
 236 static void bcm_uart_do_rx(struct uart_port *port)
 237 {
 238         struct tty_struct *tty;
 239         unsigned int max_count;
 240
 241         /* limit number of char read in interrupt, should not be
 242          * higher than fifo size anyway since we're much faster than
 243          * serial port */
 244         max_count = 32;
 245         tty = port->state->port.tty;
 246         do {
 247                 unsigned int iestat, c, cstat;
 248                 char flag;
 249
 250                 /* get overrun/fifo empty information from ier
 251                  * register */
 252                 iestat = bcm_uart_readl(port, UART_IR_REG);
 253                 if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
 254                         break;
 255
 256                 cstat = c = bcm_uart_readl(port, UART_FIFO_REG);
 257                 port->icount.rx++;
 258                 flag = TTY_NORMAL;
 259                 c &= 0xff;
 260
 261                 if (unlikely((cstat & UART_FIFO_ANYERR_MASK))) {
 262                         /* do stats first */
 263                         if (cstat & UART_FIFO_BRKDET_MASK) {
 264                                 port->icount.brk++;
 265                                 if (uart_handle_break(port))
 266                                         continue;
 267                         }
 268
 269                         if (cstat & UART_FIFO_PARERR_MASK)
 270                                 port->icount.parity++;
 271                         if (cstat & UART_FIFO_FRAMEERR_MASK)
 272                                 port->icount.frame++;
 273
 274                         /* update flag wrt read_status_mask */
 275                         cstat &= port->read_status_mask;
 276                         if (cstat & UART_FIFO_BRKDET_MASK)
 277                                 flag = TTY_BREAK;
 278                         if (cstat & UART_FIFO_FRAMEERR_MASK)
 279                                 flag = TTY_FRAME;
 280                         if (cstat & UART_FIFO_PARERR_MASK)
 281                                 flag = TTY_PARITY;
 282                 }
 283
 284                 if (uart_handle_sysrq_char(port, c))
 285                         continue;
 286
 287                 if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) {
 288                         port->icount.overrun++;
 289                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 290                 }
 291
 292                 if ((cstat & port->ignore_status_mask) == 0)
 293                         tty_insert_flip_char(tty, c, flag);
 294
 295         } while (--max_count);
 296
 297         tty_flip_buffer_push(tty);
 298 }
 299
 300 /*
 301  * fill tx fifo with chars to send, stop when fifo is about to be full
 302  * or when all chars have been sent.
 303  */
 304 static void bcm_uart_do_tx(struct uart_port *port)
 305 {
 306         struct circ_buf *xmit;
 307         unsigned int val, max_count;
 308
 309         if (port->x_char) {
 310                 bcm_uart_writel(port, port->x_char, UART_FIFO_REG);
 311                 port->icount.tx++;
 312                 port->x_char = 0;
 313                 return;
 314         }
 315
 316         if (uart_tx_stopped(port)) {
 317                 bcm_uart_stop_tx(port);
 318                 return;
 319         }
 320
 321         xmit = &port->state->xmit;
 322         if (uart_circ_empty(xmit))
 323                 goto txq_empty;
 324
 325         val = bcm_uart_readl(port, UART_MCTL_REG);
 326         val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT;
 327         max_count = port->fifosize - val;
 328
 329         while (max_count--) {
 330                 unsigned int c;
 331
 332                 c = xmit->buf[xmit->tail];
 333                 bcm_uart_writel(port, c, UART_FIFO_REG);
 334                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 335                 port->icount.tx++;
 336                 if (uart_circ_empty(xmit))
 337                         break;
 338         }
 339
 340         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 341                 uart_write_wakeup(port);
 342
 343         if (uart_circ_empty(xmit))
 344                 goto txq_empty;
 345         return;
 346
 347 txq_empty:
 348         /* nothing to send, disable transmit interrupt */
 349         val = bcm_uart_readl(port, UART_IR_REG);
 350         val &= ~UART_TX_INT_MASK;
 351         bcm_uart_writel(port, val, UART_IR_REG);
 352         return;
 353 }
 354
 355 /*
 356  * process uart interrupt
 357  */
 358 static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id)
 359 {
 360         struct uart_port *port;
 361         unsigned int irqstat;
 362
 363         port = dev_id;
 364         spin_lock(&port->lock);
 365
 366         irqstat = bcm_uart_readl(port, UART_IR_REG);
 367         if (irqstat & UART_RX_INT_STAT)
 368                 bcm_uart_do_rx(port);
 369
 370         if (irqstat & UART_TX_INT_STAT)
 371                 bcm_uart_do_tx(port);
 372
 373         if (irqstat & UART_IR_MASK(UART_IR_EXTIP)) {
 374                 unsigned int estat;
 375
 376                 estat = bcm_uart_readl(port, UART_EXTINP_REG);
 377                 if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS))
 378                         uart_handle_cts_change(port,
 379                                                estat & UART_EXTINP_CTS_MASK);
 380                 if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD))
 381                         uart_handle_dcd_change(port,
 382                                                estat & UART_EXTINP_DCD_MASK);
 383         }
 384
 385         spin_unlock(&port->lock);
 386         return IRQ_HANDLED;
 387 }
 388
 389 /*
 390  * enable rx & tx operation on uart
 391  */
 392 static void bcm_uart_enable(struct uart_port *port)
 393 {
 394         unsigned int val;
 395
 396         val = bcm_uart_readl(port, UART_CTL_REG);
 397         val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 398         bcm_uart_writel(port, val, UART_CTL_REG);
 399 }
 400
 401 /*
 402  * disable rx & tx operation on uart
 403  */
 404 static void bcm_uart_disable(struct uart_port *port)
 405 {
 406         unsigned int val;
 407
 408         val = bcm_uart_readl(port, UART_CTL_REG);
 409         val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK |
 410                  UART_CTL_RXEN_MASK);
 411         bcm_uart_writel(port, val, UART_CTL_REG);
 412 }
 413
 414 /*
 415  * clear all unread data in rx fifo and unsent data in tx fifo
 416  */
 417 static void bcm_uart_flush(struct uart_port *port)
 418 {
 419         unsigned int val;
 420
 421         /* empty rx and tx fifo */
 422         val = bcm_uart_readl(port, UART_CTL_REG);
 423         val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK;
 424         bcm_uart_writel(port, val, UART_CTL_REG);
 425
 426         /* read any pending char to make sure all irq status are
 427          * cleared */
 428         (void)bcm_uart_readl(port, UART_FIFO_REG);
 429 }
 430
 431 /*
 432  * serial core request to initialize uart and start rx operation
 433  */
 434 static int bcm_uart_startup(struct uart_port *port)
 435 {
 436         unsigned int val;
 437         int ret;
 438
 439         /* mask all irq and flush port */
 440         bcm_uart_disable(port);
 441         bcm_uart_writel(port, 0, UART_IR_REG);
 442         bcm_uart_flush(port);
 443
 444         /* clear any pending external input interrupt */
 445         (void)bcm_uart_readl(port, UART_EXTINP_REG);
 446
 447         /* set rx/tx fifo thresh to fifo half size */
 448         val = bcm_uart_readl(port, UART_MCTL_REG);
 449         val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK);
 450         val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;
 451         val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;
 452         bcm_uart_writel(port, val, UART_MCTL_REG);
 453
 454         /* set rx fifo timeout to 1 char time */
 455         val = bcm_uart_readl(port, UART_CTL_REG);
 456         val &= ~UART_CTL_RXTMOUTCNT_MASK;
 457         val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT;
 458         bcm_uart_writel(port, val, UART_CTL_REG);
 459
 460         /* report any edge on dcd and cts */
 461         val = UART_EXTINP_INT_MASK;
 462         val |= UART_EXTINP_DCD_NOSENSE_MASK;
 463         val |= UART_EXTINP_CTS_NOSENSE_MASK;
 464         bcm_uart_writel(port, val, UART_EXTINP_REG);
 465
 466         /* register irq and enable rx interrupts */
 467         ret = request_irq(port->irq, bcm_uart_interrupt, 0,
 468                           bcm_uart_type(port), port);
 469         if (ret)
 470                 return ret;
 471         bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG);
 472         bcm_uart_enable(port);
 473         return 0;
 474 }
 475
 476 /*
 477  * serial core request to flush & disable uart
 478  */
 479 static void bcm_uart_shutdown(struct uart_port *port)
 480 {
 481         unsigned long flags;
 482
 483         spin_lock_irqsave(&port->lock, flags);
 484         bcm_uart_writel(port, 0, UART_IR_REG);
 485         spin_unlock_irqrestore(&port->lock, flags);
 486
 487         bcm_uart_disable(port);
 488         bcm_uart_flush(port);
 489         free_irq(port->irq, port);
 490 }
 491
 492 /*
 493  * serial core request to change current uart setting
 494  */
 495 static void bcm_uart_set_termios(struct uart_port *port,
 496                                  struct ktermios *new,
 497                                  struct ktermios *old)
 498 {
 499         unsigned int ctl, baud, quot, ier;
 500         unsigned long flags;
 501
 502         spin_lock_irqsave(&port->lock, flags);
 503
 504         /* disable uart while changing speed */
 505         bcm_uart_disable(port);
 506         bcm_uart_flush(port);
 507
 508         /* update Control register */
 509         ctl = bcm_uart_readl(port, UART_CTL_REG);
 510         ctl &= ~UART_CTL_BITSPERSYM_MASK;
 511
 512         switch (new->c_cflag & CSIZE) {
 513         case CS5:
 514                 ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT);
 515                 break;
 516         case CS6:
 517                 ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT);
 518                 break;
 519         case CS7:
 520                 ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT);
 521                 break;
 522         default:
 523                 ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT);
 524                 break;
 525         }
 526
 527         ctl &= ~UART_CTL_STOPBITS_MASK;
 528         if (new->c_cflag & CSTOPB)
 529                 ctl |= UART_CTL_STOPBITS_2;
 530         else
 531                 ctl |= UART_CTL_STOPBITS_1;
 532
 533         ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
 534         if (new->c_cflag & PARENB)
 535                 ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
 536         ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
 537         if (new->c_cflag & PARODD)
 538                 ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
 539         bcm_uart_writel(port, ctl, UART_CTL_REG);
 540
 541         /* update Baudword register */
 542         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
 543         quot = uart_get_divisor(port, baud) - 1;
 544         bcm_uart_writel(port, quot, UART_BAUD_REG);
 545
 546         /* update Interrupt register */
 547         ier = bcm_uart_readl(port, UART_IR_REG);
 548
 549         ier &= ~UART_IR_MASK(UART_IR_EXTIP);
 550         if (UART_ENABLE_MS(port, new->c_cflag))
 551                 ier |= UART_IR_MASK(UART_IR_EXTIP);
 552
 553         bcm_uart_writel(port, ier, UART_IR_REG);
 554
 555         /* update read/ignore mask */
 556         port->read_status_mask = UART_FIFO_VALID_MASK;
 557         if (new->c_iflag & INPCK) {
 558                 port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
 559                 port->read_status_mask |= UART_FIFO_PARERR_MASK;
 560         }
 561         if (new->c_iflag & (BRKINT))
 562                 port->read_status_mask |= UART_FIFO_BRKDET_MASK;
 563
 564         port->ignore_status_mask = 0;
 565         if (new->c_iflag & IGNPAR)
 566                 port->ignore_status_mask |= UART_FIFO_PARERR_MASK;
 567         if (new->c_iflag & IGNBRK)
 568                 port->ignore_status_mask |= UART_FIFO_BRKDET_MASK;
 569         if (!(new->c_cflag & CREAD))
 570                 port->ignore_status_mask |= UART_FIFO_VALID_MASK;
 571
 572         uart_update_timeout(port, new->c_cflag, baud);
 573         bcm_uart_enable(port);
 574         spin_unlock_irqrestore(&port->lock, flags);
 575 }
 576
 577 /*
 578  * serial core request to claim uart iomem
 579  */
 580 static int bcm_uart_request_port(struct uart_port *port)
 581 {
 582         unsigned int size;
 583
 584         size = RSET_UART_SIZE;
 585         if (!request_mem_region(port->mapbase, size, "bcm63xx")) {
 586                 dev_err(port->dev, "Memory region busy\n");
 587                 return -EBUSY;
 588         }
 589
 590         port->membase = ioremap(port->mapbase, size);
 591         if (!port->membase) {
 592                 dev_err(port->dev, "Unable to map registers\n");
 593                 release_mem_region(port->mapbase, size);
 594                 return -EBUSY;
 595         }
 596         return 0;
 597 }
 598
 599 /*
 600  * serial core request to release uart iomem
 601  */
 602 static void bcm_uart_release_port(struct uart_port *port)
 603 {
 604         release_mem_region(port->mapbase, RSET_UART_SIZE);
 605         iounmap(port->membase);
 606 }
 607
 608 /*
 609  * serial core request to do any port required autoconfiguration
 610  */
 611 static void bcm_uart_config_port(struct uart_port *port, int flags)
 612 {
 613         if (flags & UART_CONFIG_TYPE) {
 614                 if (bcm_uart_request_port(port))
 615                         return;
 616                 port->type = PORT_BCM63XX;
 617         }
 618 }
 619
 620 /*
 621  * serial core request to check that port information in serinfo are
 622  * suitable
 623  */
 624 static int bcm_uart_verify_port(struct uart_port *port,
 625                                 struct serial_struct *serinfo)
 626 {
 627         if (port->type != PORT_BCM63XX)
 628                 return -EINVAL;
 629         if (port->irq != serinfo->irq)
 630                 return -EINVAL;
 631         if (port->iotype != serinfo->io_type)
 632                 return -EINVAL;
 633         if (port->mapbase != (unsigned long)serinfo->iomem_base)
 634                 return -EINVAL;
 635         return 0;
 636 }
 637
 638 /* serial core callbacks */
 639 static struct uart_ops bcm_uart_ops = {
 640         .tx_empty       = bcm_uart_tx_empty,
 641         .get_mctrl      = bcm_uart_get_mctrl,
 642         .set_mctrl      = bcm_uart_set_mctrl,
 643         .start_tx       = bcm_uart_start_tx,
 644         .stop_tx        = bcm_uart_stop_tx,
 645         .stop_rx        = bcm_uart_stop_rx,
 646         .enable_ms      = bcm_uart_enable_ms,
 647         .break_ctl      = bcm_uart_break_ctl,
 648         .startup        = bcm_uart_startup,
 649         .shutdown       = bcm_uart_shutdown,
 650         .set_termios    = bcm_uart_set_termios,
 651         .type           = bcm_uart_type,
 652         .release_port   = bcm_uart_release_port,
 653         .request_port   = bcm_uart_request_port,
 654         .config_port    = bcm_uart_config_port,
 655         .verify_port    = bcm_uart_verify_port,
 656 };
 657
 658
 659
 660 #ifdef CONFIG_SERIAL_BCM63XX_CONSOLE
 661 static inline void wait_for_xmitr(struct uart_port *port)
 662 {
 663         unsigned int tmout;
 664
 665         /* Wait up to 10ms for the character(s) to be sent. */
 666         tmout = 10000;
 667         while (--tmout) {
 668                 unsigned int val;
 669
 670                 val = bcm_uart_readl(port, UART_IR_REG);
 671                 if (val & UART_IR_STAT(UART_IR_TXEMPTY))
 672                         break;
 673                 udelay(1);
 674         }
 675
 676         /* Wait up to 1s for flow control if necessary */
 677         if (port->flags & UPF_CONS_FLOW) {
 678                 tmout = 1000000;
 679                 while (--tmout) {
 680                         unsigned int val;
 681
 682                         val = bcm_uart_readl(port, UART_EXTINP_REG);
 683                         if (val & UART_EXTINP_CTS_MASK)
 684                                 break;
 685                         udelay(1);
 686                 }
 687         }
 688 }
 689
 690 /*
 691  * output given char
 692  */
 693 static void bcm_console_putchar(struct uart_port *port, int ch)
 694 {
 695         wait_for_xmitr(port);
 696         bcm_uart_writel(port, ch, UART_FIFO_REG);
 697 }
 698
 699 /*
 700  * console core request to output given string
 701  */
 702 static void bcm_console_write(struct console *co, const char *s,
 703                               unsigned int count)
 704 {
 705         struct uart_port *port;
 706         unsigned long flags;
 707         int locked;
 708
 709         port = &ports[co->index];
 710
 711         local_irq_save(flags);
 712         if (port->sysrq) {
 713                 /* bcm_uart_interrupt() already took the lock */
 714                 locked = 0;
 715         } else if (oops_in_progress) {
 716                 locked = spin_trylock(&port->lock);
 717         } else {
 718                 spin_lock(&port->lock);
 719                 locked = 1;
 720         }
 721
 722         /* call helper to deal with \r\n */
 723         uart_console_write(port, s, count, bcm_console_putchar);
 724
 725         /* and wait for char to be transmitted */
 726         wait_for_xmitr(port);
 727
 728         if (locked)
 729                 spin_unlock(&port->lock);
 730         local_irq_restore(flags);
 731 }
 732
 733 /*
 734  * console core request to setup given console, find matching uart
 735  * port and setup it.
 736  */
 737 static int bcm_console_setup(struct console *co, char *options)
 738 {
 739         struct uart_port *port;
 740         int baud = 9600;
 741         int bits = 8;
 742         int parity = 'n';
 743         int flow = 'n';
 744
 745         if (co->index < 0 || co->index >= BCM63XX_NR_UARTS)
 746                 return -EINVAL;
 747         port = &ports[co->index];
 748         if (!port->membase)
 749                 return -ENODEV;
 750         if (options)
 751                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 752
 753         return uart_set_options(port, co, baud, parity, bits, flow);
 754 }
 755
 756 static struct uart_driver bcm_uart_driver;
 757
 758 static struct console bcm63xx_console = {
 759         .name           = "ttyS",
 760         .write          = bcm_console_write,
 761         .device         = uart_console_device,
 762         .setup          = bcm_console_setup,
 763         .flags          = CON_PRINTBUFFER,
 764         .index          = -1,
 765         .data           = &bcm_uart_driver,
 766 };
 767
 768 static int __init bcm63xx_console_init(void)
 769 {
 770         register_console(&bcm63xx_console);
 771         return 0;
 772 }
 773
 774 console_initcall(bcm63xx_console_init);
 775
 776 #define BCM63XX_CONSOLE (&bcm63xx_console)
 777 #else
 778 #define BCM63XX_CONSOLE NULL
 779 #endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */
 780
 781 static struct uart_driver bcm_uart_driver = {
 782         .owner          = THIS_MODULE,
 783         .driver_name    = "bcm63xx_uart",
 784         .dev_name       = "ttyS",
 785         .major          = TTY_MAJOR,
 786         .minor          = 64,
 787         .nr             = BCM63XX_NR_UARTS,
 788         .cons           = BCM63XX_CONSOLE,
 789 };
 790
 791 /*
 792  * platform driver probe/remove callback
 793  */
 794 static int __devinit bcm_uart_probe(struct platform_device *pdev)
 795 {
 796         struct resource *res_mem, *res_irq;
 797         struct uart_port *port;
 798         struct clk *clk;
 799         int ret;
 800
 801         if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
 802                 return -EINVAL;
 803
 804         if (ports[pdev->id].membase)
 805                 return -EBUSY;
 806
 807         res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 808         if (!res_mem)
 809                 return -ENODEV;
 810
 811         res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 812         if (!res_irq)
 813                 return -ENODEV;
 814
 815         clk = clk_get(&pdev->dev, "periph");
 816         if (IS_ERR(clk))
 817                 return -ENODEV;
 818
 819         port = &ports[pdev->id];
 820         memset(port, 0, sizeof(*port));
 821         port->iotype = UPIO_MEM;
 822         port->mapbase = res_mem->start;
 823         port->irq = res_irq->start;
 824         port->ops = &bcm_uart_ops;
 825         port->flags = UPF_BOOT_AUTOCONF;
 826         port->dev = &pdev->dev;
 827         port->fifosize = 16;
 828         port->uartclk = clk_get_rate(clk) / 2;
 829         port->line = pdev->id;
 830         clk_put(clk);
 831
 832         ret = uart_add_one_port(&bcm_uart_driver, port);
 833         if (ret) {
 834                 ports[pdev->id].membase = 0;
 835                 return ret;
 836         }
 837         platform_set_drvdata(pdev, port);
 838         return 0;
 839 }
 840
 841 static int __devexit bcm_uart_remove(struct platform_device *pdev)
 842 {
 843         struct uart_port *port;
 844
 845         port = platform_get_drvdata(pdev);
 846         uart_remove_one_port(&bcm_uart_driver, port);
 847         platform_set_drvdata(pdev, NULL);
 848         /* mark port as free */
 849         ports[pdev->id].membase = 0;
 850         return 0;
 851 }
 852
 853 /*
 854  * platform driver stuff
 855  */
 856 static struct platform_driver bcm_uart_platform_driver = {
 857         .probe  = bcm_uart_probe,
 858         .remove = __devexit_p(bcm_uart_remove),
 859         .driver = {
 860                 .owner = THIS_MODULE,
 861                 .name  = "bcm63xx_uart",
 862         },
 863 };
 864
 865 static int __init bcm_uart_init(void)
 866 {
 867         int ret;
 868
 869         ret = uart_register_driver(&bcm_uart_driver);
 870         if (ret)
 871                 return ret;
 872
 873         ret = platform_driver_register(&bcm_uart_platform_driver);
 874         if (ret)
 875                 uart_unregister_driver(&bcm_uart_driver);
 876
 877         return ret;
 878 }
 879
 880 static void __exit bcm_uart_exit(void)
 881 {
 882         platform_driver_unregister(&bcm_uart_platform_driver);
 883         uart_unregister_driver(&bcm_uart_driver);
 884 }
 885
 886 module_init(bcm_uart_init);
 887 module_exit(bcm_uart_exit);
 888
 889 MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
 890 MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver");
 891 MODULE_LICENSE("GPL");