drivers/spi/spi-txx9.c

   1 /*
   2  * TXx9 SPI controller driver.
   3  *
   4  * Based on linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
   5  * Copyright (C) 2000-2001 Toshiba Corporation
   6  *
   7  * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
   8  * terms of the GNU General Public License version 2. This program is
   9  * licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  *
  12  * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
  13  *
  14  * Convert to generic SPI framework - Atsushi Nemoto (anemo@mba.ocn.ne.jp)
  15  */
  16 #include <linux/init.h>
  17 #include <linux/delay.h>
  18 #include <linux/errno.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/sched.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/spi/spi.h>
  25 #include <linux/err.h>
  26 #include <linux/clk.h>
  27 #include <linux/io.h>
  28 #include <linux/module.h>
  29 #include <asm/gpio.h>
  30
  31
  32 #define SPI_FIFO_SIZE 4
  33 #define SPI_MAX_DIVIDER 0xff    /* Max. value for SPCR1.SER */
  34 #define SPI_MIN_DIVIDER 1       /* Min. value for SPCR1.SER */
  35
  36 #define TXx9_SPMCR              0x00
  37 #define TXx9_SPCR0              0x04
  38 #define TXx9_SPCR1              0x08
  39 #define TXx9_SPFS               0x0c
  40 #define TXx9_SPSR               0x14
  41 #define TXx9_SPDR               0x18
  42
  43 /* SPMCR : SPI Master Control */
  44 #define TXx9_SPMCR_OPMODE       0xc0
  45 #define TXx9_SPMCR_CONFIG       0x40
  46 #define TXx9_SPMCR_ACTIVE       0x80
  47 #define TXx9_SPMCR_SPSTP        0x02
  48 #define TXx9_SPMCR_BCLR         0x01
  49
  50 /* SPCR0 : SPI Control 0 */
  51 #define TXx9_SPCR0_TXIFL_MASK   0xc000
  52 #define TXx9_SPCR0_RXIFL_MASK   0x3000
  53 #define TXx9_SPCR0_SIDIE        0x0800
  54 #define TXx9_SPCR0_SOEIE        0x0400
  55 #define TXx9_SPCR0_RBSIE        0x0200
  56 #define TXx9_SPCR0_TBSIE        0x0100
  57 #define TXx9_SPCR0_IFSPSE       0x0010
  58 #define TXx9_SPCR0_SBOS         0x0004
  59 #define TXx9_SPCR0_SPHA         0x0002
  60 #define TXx9_SPCR0_SPOL         0x0001
  61
  62 /* SPSR : SPI Status */
  63 #define TXx9_SPSR_TBSI          0x8000
  64 #define TXx9_SPSR_RBSI          0x4000
  65 #define TXx9_SPSR_TBS_MASK      0x3800
  66 #define TXx9_SPSR_RBS_MASK      0x0700
  67 #define TXx9_SPSR_SPOE          0x0080
  68 #define TXx9_SPSR_IFSD          0x0008
  69 #define TXx9_SPSR_SIDLE         0x0004
  70 #define TXx9_SPSR_STRDY         0x0002
  71 #define TXx9_SPSR_SRRDY         0x0001
  72
  73
  74 struct txx9spi {
  75         struct workqueue_struct *workqueue;
  76         struct work_struct work;
  77         spinlock_t lock;        /* protect 'queue' */
  78         struct list_head queue;
  79         wait_queue_head_t waitq;
  80         void __iomem *membase;
  81         int baseclk;
  82         struct clk *clk;
  83         u32 max_speed_hz, min_speed_hz;
  84         int last_chipselect;
  85         int last_chipselect_val;
  86 };
  87
  88 static u32 txx9spi_rd(struct txx9spi *c, int reg)
  89 {
  90         return __raw_readl(c->membase + reg);
  91 }
  92 static void txx9spi_wr(struct txx9spi *c, u32 val, int reg)
  93 {
  94         __raw_writel(val, c->membase + reg);
  95 }
  96
  97 static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c,
  98                 int on, unsigned int cs_delay)
  99 {
 100         int val = (spi->mode & SPI_CS_HIGH) ? on : !on;
 101         if (on) {
 102                 /* deselect the chip with cs_change hint in last transfer */
 103                 if (c->last_chipselect >= 0)
 104                         gpio_set_value(c->last_chipselect,
 105                                         !c->last_chipselect_val);
 106                 c->last_chipselect = spi->chip_select;
 107                 c->last_chipselect_val = val;
 108         } else {
 109                 c->last_chipselect = -1;
 110                 ndelay(cs_delay);       /* CS Hold Time */
 111         }
 112         gpio_set_value(spi->chip_select, val);
 113         ndelay(cs_delay);       /* CS Setup Time / CS Recovery Time */
 114 }
 115
 116 static int txx9spi_setup(struct spi_device *spi)
 117 {
 118         struct txx9spi *c = spi_master_get_devdata(spi->master);
 119         u8 bits_per_word;
 120
 121         if (!spi->max_speed_hz
 122                         || spi->max_speed_hz > c->max_speed_hz
 123                         || spi->max_speed_hz < c->min_speed_hz)
 124                 return -EINVAL;
 125
 126         bits_per_word = spi->bits_per_word;
 127         if (bits_per_word != 8 && bits_per_word != 16)
 128                 return -EINVAL;
 129
 130         if (gpio_direction_output(spi->chip_select,
 131                         !(spi->mode & SPI_CS_HIGH))) {
 132                 dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n");
 133                 return -EINVAL;
 134         }
 135
 136         /* deselect chip */
 137         spin_lock(&c->lock);
 138         txx9spi_cs_func(spi, c, 0, (NSEC_PER_SEC / 2) / spi->max_speed_hz);
 139         spin_unlock(&c->lock);
 140
 141         return 0;
 142 }
 143
 144 static irqreturn_t txx9spi_interrupt(int irq, void *dev_id)
 145 {
 146         struct txx9spi *c = dev_id;
 147
 148         /* disable rx intr */
 149         txx9spi_wr(c, txx9spi_rd(c, TXx9_SPCR0) & ~TXx9_SPCR0_RBSIE,
 150                         TXx9_SPCR0);
 151         wake_up(&c->waitq);
 152         return IRQ_HANDLED;
 153 }
 154
 155 static void txx9spi_work_one(struct txx9spi *c, struct spi_message *m)
 156 {
 157         struct spi_device *spi = m->spi;
 158         struct spi_transfer *t;
 159         unsigned int cs_delay;
 160         unsigned int cs_change = 1;
 161         int status = 0;
 162         u32 mcr;
 163         u32 prev_speed_hz = 0;
 164         u8 prev_bits_per_word = 0;
 165
 166         /* CS setup/hold/recovery time in nsec */
 167         cs_delay = 100 + (NSEC_PER_SEC / 2) / spi->max_speed_hz;
 168
 169         mcr = txx9spi_rd(c, TXx9_SPMCR);
 170         if (unlikely((mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE)) {
 171                 dev_err(&spi->dev, "Bad mode.\n");
 172                 status = -EIO;
 173                 goto exit;
 174         }
 175         mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR);
 176
 177         /* enter config mode */
 178         txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
 179         txx9spi_wr(c, TXx9_SPCR0_SBOS
 180                         | ((spi->mode & SPI_CPOL) ? TXx9_SPCR0_SPOL : 0)
 181                         | ((spi->mode & SPI_CPHA) ? TXx9_SPCR0_SPHA : 0)
 182                         | 0x08,
 183                         TXx9_SPCR0);
 184
 185         list_for_each_entry (t, &m->transfers, transfer_list) {
 186                 const void *txbuf = t->tx_buf;
 187                 void *rxbuf = t->rx_buf;
 188                 u32 data;
 189                 unsigned int len = t->len;
 190                 unsigned int wsize;
 191                 u32 speed_hz = t->speed_hz ? : spi->max_speed_hz;
 192                 u8 bits_per_word = t->bits_per_word ? : spi->bits_per_word;
 193
 194                 bits_per_word = bits_per_word ? : 8;
 195                 wsize = bits_per_word >> 3; /* in bytes */
 196
 197                 if (prev_speed_hz != speed_hz
 198                                 || prev_bits_per_word != bits_per_word) {
 199                         int n = DIV_ROUND_UP(c->baseclk, speed_hz) - 1;
 200                         n = clamp(n, SPI_MIN_DIVIDER, SPI_MAX_DIVIDER);
 201                         /* enter config mode */
 202                         txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR,
 203                                         TXx9_SPMCR);
 204                         txx9spi_wr(c, (n << 8) | bits_per_word, TXx9_SPCR1);
 205                         /* enter active mode */
 206                         txx9spi_wr(c, mcr | TXx9_SPMCR_ACTIVE, TXx9_SPMCR);
 207
 208                         prev_speed_hz = speed_hz;
 209                         prev_bits_per_word = bits_per_word;
 210                 }
 211
 212                 if (cs_change)
 213                         txx9spi_cs_func(spi, c, 1, cs_delay);
 214                 cs_change = t->cs_change;
 215                 while (len) {
 216                         unsigned int count = SPI_FIFO_SIZE;
 217                         int i;
 218                         u32 cr0;
 219
 220                         if (len < count * wsize)
 221                                 count = len / wsize;
 222                         /* now tx must be idle... */
 223                         while (!(txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_SIDLE))
 224                                 cpu_relax();
 225                         cr0 = txx9spi_rd(c, TXx9_SPCR0);
 226                         cr0 &= ~TXx9_SPCR0_RXIFL_MASK;
 227                         cr0 |= (count - 1) << 12;
 228                         /* enable rx intr */
 229                         cr0 |= TXx9_SPCR0_RBSIE;
 230                         txx9spi_wr(c, cr0, TXx9_SPCR0);
 231                         /* send */
 232                         for (i = 0; i < count; i++) {
 233                                 if (txbuf) {
 234                                         data = (wsize == 1)
 235                                                 ? *(const u8 *)txbuf
 236                                                 : *(const u16 *)txbuf;
 237                                         txx9spi_wr(c, data, TXx9_SPDR);
 238                                         txbuf += wsize;
 239                                 } else
 240                                         txx9spi_wr(c, 0, TXx9_SPDR);
 241                         }
 242                         /* wait all rx data */
 243                         wait_event(c->waitq,
 244                                 txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_RBSI);
 245                         /* receive */
 246                         for (i = 0; i < count; i++) {
 247                                 data = txx9spi_rd(c, TXx9_SPDR);
 248                                 if (rxbuf) {
 249                                         if (wsize == 1)
 250                                                 *(u8 *)rxbuf = data;
 251                                         else
 252                                                 *(u16 *)rxbuf = data;
 253                                         rxbuf += wsize;
 254                                 }
 255                         }
 256                         len -= count * wsize;
 257                 }
 258                 m->actual_length += t->len;
 259                 if (t->delay_usecs)
 260                         udelay(t->delay_usecs);
 261
 262                 if (!cs_change)
 263                         continue;
 264                 if (t->transfer_list.next == &m->transfers)
 265                         break;
 266                 /* sometimes a short mid-message deselect of the chip
 267                  * may be needed to terminate a mode or command
 268                  */
 269                 txx9spi_cs_func(spi, c, 0, cs_delay);
 270         }
 271
 272 exit:
 273         m->status = status;
 274         m->complete(m->context);
 275
 276         /* normally deactivate chipselect ... unless no error and
 277          * cs_change has hinted that the next message will probably
 278          * be for this chip too.
 279          */
 280         if (!(status == 0 && cs_change))
 281                 txx9spi_cs_func(spi, c, 0, cs_delay);
 282
 283         /* enter config mode */
 284         txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
 285 }
 286
 287 static void txx9spi_work(struct work_struct *work)
 288 {
 289         struct txx9spi *c = container_of(work, struct txx9spi, work);
 290         unsigned long flags;
 291
 292         spin_lock_irqsave(&c->lock, flags);
 293         while (!list_empty(&c->queue)) {
 294                 struct spi_message *m;
 295
 296                 m = container_of(c->queue.next, struct spi_message, queue);
 297                 list_del_init(&m->queue);
 298                 spin_unlock_irqrestore(&c->lock, flags);
 299
 300                 txx9spi_work_one(c, m);
 301
 302                 spin_lock_irqsave(&c->lock, flags);
 303         }
 304         spin_unlock_irqrestore(&c->lock, flags);
 305 }
 306
 307 static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m)
 308 {
 309         struct spi_master *master = spi->master;
 310         struct txx9spi *c = spi_master_get_devdata(master);
 311         struct spi_transfer *t;
 312         unsigned long flags;
 313
 314         m->actual_length = 0;
 315
 316         /* check each transfer's parameters */
 317         list_for_each_entry (t, &m->transfers, transfer_list) {
 318                 u32 speed_hz = t->speed_hz ? : spi->max_speed_hz;
 319                 u8 bits_per_word = t->bits_per_word ? : spi->bits_per_word;
 320
 321                 bits_per_word = bits_per_word ? : 8;
 322                 if (!t->tx_buf && !t->rx_buf && t->len)
 323                         return -EINVAL;
 324                 if (bits_per_word != 8 && bits_per_word != 16)
 325                         return -EINVAL;
 326                 if (t->len & ((bits_per_word >> 3) - 1))
 327                         return -EINVAL;
 328                 if (speed_hz < c->min_speed_hz || speed_hz > c->max_speed_hz)
 329                         return -EINVAL;
 330         }
 331
 332         spin_lock_irqsave(&c->lock, flags);
 333         list_add_tail(&m->queue, &c->queue);
 334         queue_work(c->workqueue, &c->work);
 335         spin_unlock_irqrestore(&c->lock, flags);
 336
 337         return 0;
 338 }
 339
 340 static int __init txx9spi_probe(struct platform_device *dev)
 341 {
 342         struct spi_master *master;
 343         struct txx9spi *c;
 344         struct resource *res;
 345         int ret = -ENODEV;
 346         u32 mcr;
 347         int irq;
 348
 349         master = spi_alloc_master(&dev->dev, sizeof(*c));
 350         if (!master)
 351                 return ret;
 352         c = spi_master_get_devdata(master);
 353         platform_set_drvdata(dev, master);
 354
 355         INIT_WORK(&c->work, txx9spi_work);
 356         spin_lock_init(&c->lock);
 357         INIT_LIST_HEAD(&c->queue);
 358         init_waitqueue_head(&c->waitq);
 359
 360         c->clk = clk_get(&dev->dev, "spi-baseclk");
 361         if (IS_ERR(c->clk)) {
 362                 ret = PTR_ERR(c->clk);
 363                 c->clk = NULL;
 364                 goto exit;
 365         }
 366         ret = clk_enable(c->clk);
 367         if (ret) {
 368                 clk_put(c->clk);
 369                 c->clk = NULL;
 370                 goto exit;
 371         }
 372         c->baseclk = clk_get_rate(c->clk);
 373         c->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1);
 374         c->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1);
 375
 376         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
 377         if (!res)
 378                 goto exit_busy;
 379         if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res),
 380                                      "spi_txx9"))
 381                 goto exit_busy;
 382         c->membase = devm_ioremap(&dev->dev, res->start, resource_size(res));
 383         if (!c->membase)
 384                 goto exit_busy;
 385
 386         /* enter config mode */
 387         mcr = txx9spi_rd(c, TXx9_SPMCR);
 388         mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR);
 389         txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
 390
 391         irq = platform_get_irq(dev, 0);
 392         if (irq < 0)
 393                 goto exit_busy;
 394         ret = devm_request_irq(&dev->dev, irq, txx9spi_interrupt, 0,
 395                                "spi_txx9", c);
 396         if (ret)
 397                 goto exit;
 398
 399         c->workqueue = create_singlethread_workqueue(
 400                                 dev_name(master->dev.parent));
 401         if (!c->workqueue)
 402                 goto exit_busy;
 403         c->last_chipselect = -1;
 404
 405         dev_info(&dev->dev, "at %#llx, irq %d, %dMHz\n",
 406                  (unsigned long long)res->start, irq,
 407                  (c->baseclk + 500000) / 1000000);
 408
 409         /* the spi->mode bits understood by this driver: */
 410         master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
 411
 412         master->bus_num = dev->id;
 413         master->setup = txx9spi_setup;
 414         master->transfer = txx9spi_transfer;
 415         master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */
 416
 417         ret = spi_register_master(master);
 418         if (ret)
 419                 goto exit;
 420         return 0;
 421 exit_busy:
 422         ret = -EBUSY;
 423 exit:
 424         if (c->workqueue)
 425                 destroy_workqueue(c->workqueue);
 426         if (c->clk) {
 427                 clk_disable(c->clk);
 428                 clk_put(c->clk);
 429         }
 430         platform_set_drvdata(dev, NULL);
 431         spi_master_put(master);
 432         return ret;
 433 }
 434
 435 static int __exit txx9spi_remove(struct platform_device *dev)
 436 {
 437         struct spi_master *master = spi_master_get(platform_get_drvdata(dev));
 438         struct txx9spi *c = spi_master_get_devdata(master);
 439
 440         spi_unregister_master(master);
 441         platform_set_drvdata(dev, NULL);
 442         destroy_workqueue(c->workqueue);
 443         clk_disable(c->clk);
 444         clk_put(c->clk);
 445         spi_master_put(master);
 446         return 0;
 447 }
 448
 449 /* work with hotplug and coldplug */
 450 MODULE_ALIAS("platform:spi_txx9");
 451
 452 static struct platform_driver txx9spi_driver = {
 453         .remove = __exit_p(txx9spi_remove),
 454         .driver = {
 455                 .name = "spi_txx9",
 456                 .owner = THIS_MODULE,
 457         },
 458 };
 459
 460 static int __init txx9spi_init(void)
 461 {
 462         return platform_driver_probe(&txx9spi_driver, txx9spi_probe);
 463 }
 464 subsys_initcall(txx9spi_init);
 465
 466 static void __exit txx9spi_exit(void)
 467 {
 468         platform_driver_unregister(&txx9spi_driver);
 469 }
 470 module_exit(txx9spi_exit);
 471
 472 MODULE_DESCRIPTION("TXx9 SPI Driver");
 473 MODULE_LICENSE("GPL");