2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
10 * based on a lot of other RTC drivers.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/i2c.h>
18 #include <linux/bcd.h>
19 #include <linux/rtc.h>
20 #include <linux/delay.h>
22 #define DRV_VERSION "1.0.7"
24 /* Addresses to scan: none. This chip is located at
25 * 0x6f and uses a two bytes register addressing.
26 * Two bytes need to be written to read a single register,
27 * while most other chips just require one and take the second
28 * one as the data to be written. To prevent corrupting
29 * unknown chips, the user must explicitely set the probe parameter.
32 static unsigned short normal_i2c
[] = { I2C_CLIENT_END
};
34 /* Insmod parameters */
37 /* offsets into CCR area */
48 #define X1205_REG_SR 0x3F /* status register */
49 #define X1205_REG_Y2K 0x37
50 #define X1205_REG_DW 0x36
51 #define X1205_REG_YR 0x35
52 #define X1205_REG_MO 0x34
53 #define X1205_REG_DT 0x33
54 #define X1205_REG_HR 0x32
55 #define X1205_REG_MN 0x31
56 #define X1205_REG_SC 0x30
57 #define X1205_REG_DTR 0x13
58 #define X1205_REG_ATR 0x12
59 #define X1205_REG_INT 0x11
60 #define X1205_REG_0 0x10
61 #define X1205_REG_Y2K1 0x0F
62 #define X1205_REG_DWA1 0x0E
63 #define X1205_REG_YRA1 0x0D
64 #define X1205_REG_MOA1 0x0C
65 #define X1205_REG_DTA1 0x0B
66 #define X1205_REG_HRA1 0x0A
67 #define X1205_REG_MNA1 0x09
68 #define X1205_REG_SCA1 0x08
69 #define X1205_REG_Y2K0 0x07
70 #define X1205_REG_DWA0 0x06
71 #define X1205_REG_YRA0 0x05
72 #define X1205_REG_MOA0 0x04
73 #define X1205_REG_DTA0 0x03
74 #define X1205_REG_HRA0 0x02
75 #define X1205_REG_MNA0 0x01
76 #define X1205_REG_SCA0 0x00
78 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
79 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
81 #define X1205_SR_RTCF 0x01 /* Clock failure */
82 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
83 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
85 #define X1205_DTR_DTR0 0x01
86 #define X1205_DTR_DTR1 0x02
87 #define X1205_DTR_DTR2 0x04
89 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
92 static int x1205_attach(struct i2c_adapter
*adapter
);
93 static int x1205_detach(struct i2c_client
*client
);
94 static int x1205_probe(struct i2c_adapter
*adapter
, int address
, int kind
);
96 static struct i2c_driver x1205_driver
= {
100 .id
= I2C_DRIVERID_X1205
,
101 .attach_adapter
= &x1205_attach
,
102 .detach_client
= &x1205_detach
,
106 * In the routines that deal directly with the x1205 hardware, we use
107 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
108 * Epoch is initialized as 2000. Time is set to UTC.
110 static int x1205_get_datetime(struct i2c_client
*client
, struct rtc_time
*tm
,
111 unsigned char reg_base
)
113 unsigned char dt_addr
[2] = { 0, reg_base
};
115 unsigned char buf
[8];
117 struct i2c_msg msgs
[] = {
118 { client
->addr
, 0, 2, dt_addr
}, /* setup read ptr */
119 { client
->addr
, I2C_M_RD
, 8, buf
}, /* read date */
122 /* read date registers */
123 if ((i2c_transfer(client
->adapter
, &msgs
[0], 2)) != 2) {
124 dev_err(&client
->dev
, "%s: read error\n", __FUNCTION__
);
128 dev_dbg(&client
->dev
,
129 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
130 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
132 buf
[0], buf
[1], buf
[2], buf
[3],
133 buf
[4], buf
[5], buf
[6], buf
[7]);
135 tm
->tm_sec
= BCD2BIN(buf
[CCR_SEC
]);
136 tm
->tm_min
= BCD2BIN(buf
[CCR_MIN
]);
137 tm
->tm_hour
= BCD2BIN(buf
[CCR_HOUR
] & 0x3F); /* hr is 0-23 */
138 tm
->tm_mday
= BCD2BIN(buf
[CCR_MDAY
]);
139 tm
->tm_mon
= BCD2BIN(buf
[CCR_MONTH
]) - 1; /* mon is 0-11 */
140 tm
->tm_year
= BCD2BIN(buf
[CCR_YEAR
])
141 + (BCD2BIN(buf
[CCR_Y2K
]) * 100) - 1900;
142 tm
->tm_wday
= buf
[CCR_WDAY
];
144 dev_dbg(&client
->dev
, "%s: tm is secs=%d, mins=%d, hours=%d, "
145 "mday=%d, mon=%d, year=%d, wday=%d\n",
147 tm
->tm_sec
, tm
->tm_min
, tm
->tm_hour
,
148 tm
->tm_mday
, tm
->tm_mon
, tm
->tm_year
, tm
->tm_wday
);
153 static int x1205_get_status(struct i2c_client
*client
, unsigned char *sr
)
155 static unsigned char sr_addr
[2] = { 0, X1205_REG_SR
};
157 struct i2c_msg msgs
[] = {
158 { client
->addr
, 0, 2, sr_addr
}, /* setup read ptr */
159 { client
->addr
, I2C_M_RD
, 1, sr
}, /* read status */
162 /* read status register */
163 if ((i2c_transfer(client
->adapter
, &msgs
[0], 2)) != 2) {
164 dev_err(&client
->dev
, "%s: read error\n", __FUNCTION__
);
171 static int x1205_set_datetime(struct i2c_client
*client
, struct rtc_time
*tm
,
172 int datetoo
, u8 reg_base
)
175 unsigned char buf
[8];
177 static const unsigned char wel
[3] = { 0, X1205_REG_SR
,
180 static const unsigned char rwel
[3] = { 0, X1205_REG_SR
,
181 X1205_SR_WEL
| X1205_SR_RWEL
};
183 static const unsigned char diswe
[3] = { 0, X1205_REG_SR
, 0 };
185 dev_dbg(&client
->dev
,
186 "%s: secs=%d, mins=%d, hours=%d\n",
188 tm
->tm_sec
, tm
->tm_min
, tm
->tm_hour
);
190 buf
[CCR_SEC
] = BIN2BCD(tm
->tm_sec
);
191 buf
[CCR_MIN
] = BIN2BCD(tm
->tm_min
);
193 /* set hour and 24hr bit */
194 buf
[CCR_HOUR
] = BIN2BCD(tm
->tm_hour
) | X1205_HR_MIL
;
196 /* should we also set the date? */
198 dev_dbg(&client
->dev
,
199 "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
201 tm
->tm_mday
, tm
->tm_mon
, tm
->tm_year
, tm
->tm_wday
);
203 buf
[CCR_MDAY
] = BIN2BCD(tm
->tm_mday
);
206 buf
[CCR_MONTH
] = BIN2BCD(tm
->tm_mon
+ 1);
208 /* year, since the rtc epoch*/
209 buf
[CCR_YEAR
] = BIN2BCD(tm
->tm_year
% 100);
210 buf
[CCR_WDAY
] = tm
->tm_wday
& 0x07;
211 buf
[CCR_Y2K
] = BIN2BCD(tm
->tm_year
/ 100);
214 /* this sequence is required to unlock the chip */
215 if ((xfer
= i2c_master_send(client
, wel
, 3)) != 3) {
216 dev_err(&client
->dev
, "%s: wel - %d\n", __FUNCTION__
, xfer
);
220 if ((xfer
= i2c_master_send(client
, rwel
, 3)) != 3) {
221 dev_err(&client
->dev
, "%s: rwel - %d\n", __FUNCTION__
, xfer
);
225 /* write register's data */
226 for (i
= 0; i
< (datetoo
? 8 : 3); i
++) {
227 unsigned char rdata
[3] = { 0, reg_base
+ i
, buf
[i
] };
229 xfer
= i2c_master_send(client
, rdata
, 3);
231 dev_err(&client
->dev
,
232 "%s: xfer=%d addr=%02x, data=%02x\n",
234 xfer
, rdata
[1], rdata
[2]);
239 /* disable further writes */
240 if ((xfer
= i2c_master_send(client
, diswe
, 3)) != 3) {
241 dev_err(&client
->dev
, "%s: diswe - %d\n", __FUNCTION__
, xfer
);
248 static int x1205_fix_osc(struct i2c_client
*client
)
253 tm
.tm_hour
= tm
.tm_min
= tm
.tm_sec
= 0;
255 if ((err
= x1205_set_datetime(client
, &tm
, 0, X1205_CCR_BASE
)) < 0)
256 dev_err(&client
->dev
,
257 "unable to restart the oscillator\n");
262 static int x1205_get_dtrim(struct i2c_client
*client
, int *trim
)
265 static unsigned char dtr_addr
[2] = { 0, X1205_REG_DTR
};
267 struct i2c_msg msgs
[] = {
268 { client
->addr
, 0, 2, dtr_addr
}, /* setup read ptr */
269 { client
->addr
, I2C_M_RD
, 1, &dtr
}, /* read dtr */
272 /* read dtr register */
273 if ((i2c_transfer(client
->adapter
, &msgs
[0], 2)) != 2) {
274 dev_err(&client
->dev
, "%s: read error\n", __FUNCTION__
);
278 dev_dbg(&client
->dev
, "%s: raw dtr=%x\n", __FUNCTION__
, dtr
);
282 if (dtr
& X1205_DTR_DTR0
)
285 if (dtr
& X1205_DTR_DTR1
)
288 if (dtr
& X1205_DTR_DTR2
)
294 static int x1205_get_atrim(struct i2c_client
*client
, int *trim
)
297 static unsigned char atr_addr
[2] = { 0, X1205_REG_ATR
};
299 struct i2c_msg msgs
[] = {
300 { client
->addr
, 0, 2, atr_addr
}, /* setup read ptr */
301 { client
->addr
, I2C_M_RD
, 1, &atr
}, /* read atr */
304 /* read atr register */
305 if ((i2c_transfer(client
->adapter
, &msgs
[0], 2)) != 2) {
306 dev_err(&client
->dev
, "%s: read error\n", __FUNCTION__
);
310 dev_dbg(&client
->dev
, "%s: raw atr=%x\n", __FUNCTION__
, atr
);
312 /* atr is a two's complement value on 6 bits,
313 * perform sign extension. The formula is
314 * Catr = (atr * 0.25pF) + 11.00pF.
319 dev_dbg(&client
->dev
, "%s: raw atr=%x (%d)\n", __FUNCTION__
, atr
, atr
);
321 *trim
= (atr
* 250) + 11000;
323 dev_dbg(&client
->dev
, "%s: real=%d\n", __FUNCTION__
, *trim
);
330 unsigned char reg
, mask
, min
, max
;
333 static int x1205_validate_client(struct i2c_client
*client
)
337 /* Probe array. We will read the register at the specified
338 * address and check if the given bits are zero.
340 static const unsigned char probe_zero_pattern
[] = {
349 static const struct x1205_limit probe_limits_pattern
[] = {
350 /* register, mask, min, max */
351 { X1205_REG_Y2K
, 0xFF, 19, 20 },
352 { X1205_REG_DW
, 0xFF, 0, 6 },
353 { X1205_REG_YR
, 0xFF, 0, 99 },
354 { X1205_REG_MO
, 0xFF, 0, 12 },
355 { X1205_REG_DT
, 0xFF, 0, 31 },
356 { X1205_REG_HR
, 0x7F, 0, 23 },
357 { X1205_REG_MN
, 0xFF, 0, 59 },
358 { X1205_REG_SC
, 0xFF, 0, 59 },
359 { X1205_REG_Y2K1
, 0xFF, 19, 20 },
360 { X1205_REG_Y2K0
, 0xFF, 19, 20 },
363 /* check that registers have bits a 0 where expected */
364 for (i
= 0; i
< ARRAY_SIZE(probe_zero_pattern
); i
+= 2) {
367 unsigned char addr
[2] = { 0, probe_zero_pattern
[i
] };
369 struct i2c_msg msgs
[2] = {
370 { client
->addr
, 0, 2, addr
},
371 { client
->addr
, I2C_M_RD
, 1, &buf
},
374 if ((xfer
= i2c_transfer(client
->adapter
, msgs
, 2)) != 2) {
375 dev_err(&client
->adapter
->dev
,
376 "%s: could not read register %x\n",
377 __FUNCTION__
, probe_zero_pattern
[i
]);
382 if ((buf
& probe_zero_pattern
[i
+1]) != 0) {
383 dev_err(&client
->adapter
->dev
,
384 "%s: register=%02x, zero pattern=%d, value=%x\n",
385 __FUNCTION__
, probe_zero_pattern
[i
], i
, buf
);
391 /* check limits (only registers with bcd values) */
392 for (i
= 0; i
< ARRAY_SIZE(probe_limits_pattern
); i
++) {
393 unsigned char reg
, value
;
395 unsigned char addr
[2] = { 0, probe_limits_pattern
[i
].reg
};
397 struct i2c_msg msgs
[2] = {
398 { client
->addr
, 0, 2, addr
},
399 { client
->addr
, I2C_M_RD
, 1, ®
},
402 if ((xfer
= i2c_transfer(client
->adapter
, msgs
, 2)) != 2) {
403 dev_err(&client
->adapter
->dev
,
404 "%s: could not read register %x\n",
405 __FUNCTION__
, probe_limits_pattern
[i
].reg
);
410 value
= BCD2BIN(reg
& probe_limits_pattern
[i
].mask
);
412 if (value
> probe_limits_pattern
[i
].max
||
413 value
< probe_limits_pattern
[i
].min
) {
414 dev_dbg(&client
->adapter
->dev
,
415 "%s: register=%x, lim pattern=%d, value=%d\n",
416 __FUNCTION__
, probe_limits_pattern
[i
].reg
,
426 static int x1205_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
428 return x1205_get_datetime(to_i2c_client(dev
),
429 &alrm
->time
, X1205_ALM0_BASE
);
432 static int x1205_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
434 return x1205_set_datetime(to_i2c_client(dev
),
435 &alrm
->time
, 1, X1205_ALM0_BASE
);
438 static int x1205_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
440 return x1205_get_datetime(to_i2c_client(dev
),
444 static int x1205_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
446 return x1205_set_datetime(to_i2c_client(dev
),
447 tm
, 1, X1205_CCR_BASE
);
450 static int x1205_rtc_proc(struct device
*dev
, struct seq_file
*seq
)
452 int err
, dtrim
, atrim
;
454 if ((err
= x1205_get_dtrim(to_i2c_client(dev
), &dtrim
)) == 0)
455 seq_printf(seq
, "digital_trim\t: %d ppm\n", dtrim
);
457 if ((err
= x1205_get_atrim(to_i2c_client(dev
), &atrim
)) == 0)
458 seq_printf(seq
, "analog_trim\t: %d.%02d pF\n",
459 atrim
/ 1000, atrim
% 1000);
463 static const struct rtc_class_ops x1205_rtc_ops
= {
464 .proc
= x1205_rtc_proc
,
465 .read_time
= x1205_rtc_read_time
,
466 .set_time
= x1205_rtc_set_time
,
467 .read_alarm
= x1205_rtc_read_alarm
,
468 .set_alarm
= x1205_rtc_set_alarm
,
471 static ssize_t
x1205_sysfs_show_atrim(struct device
*dev
,
472 struct device_attribute
*attr
, char *buf
)
476 err
= x1205_get_atrim(to_i2c_client(dev
), &atrim
);
480 return sprintf(buf
, "%d.%02d pF\n", atrim
/ 1000, atrim
% 1000);
482 static DEVICE_ATTR(atrim
, S_IRUGO
, x1205_sysfs_show_atrim
, NULL
);
484 static ssize_t
x1205_sysfs_show_dtrim(struct device
*dev
,
485 struct device_attribute
*attr
, char *buf
)
489 err
= x1205_get_dtrim(to_i2c_client(dev
), &dtrim
);
493 return sprintf(buf
, "%d ppm\n", dtrim
);
495 static DEVICE_ATTR(dtrim
, S_IRUGO
, x1205_sysfs_show_dtrim
, NULL
);
497 static int x1205_attach(struct i2c_adapter
*adapter
)
499 return i2c_probe(adapter
, &addr_data
, x1205_probe
);
502 static int x1205_probe(struct i2c_adapter
*adapter
, int address
, int kind
)
506 struct i2c_client
*client
;
507 struct rtc_device
*rtc
;
509 dev_dbg(&adapter
->dev
, "%s\n", __FUNCTION__
);
511 if (!i2c_check_functionality(adapter
, I2C_FUNC_I2C
)) {
516 if (!(client
= kzalloc(sizeof(struct i2c_client
), GFP_KERNEL
))) {
522 client
->addr
= address
;
523 client
->driver
= &x1205_driver
;
524 client
->adapter
= adapter
;
526 strlcpy(client
->name
, x1205_driver
.driver
.name
, I2C_NAME_SIZE
);
528 /* Verify the chip is really an X1205 */
530 if (x1205_validate_client(client
) < 0) {
536 /* Inform the i2c layer */
537 if ((err
= i2c_attach_client(client
)))
540 dev_info(&client
->dev
, "chip found, driver version " DRV_VERSION
"\n");
542 rtc
= rtc_device_register(x1205_driver
.driver
.name
, &client
->dev
,
543 &x1205_rtc_ops
, THIS_MODULE
);
550 i2c_set_clientdata(client
, rtc
);
552 /* Check for power failures and eventualy enable the osc */
553 if ((err
= x1205_get_status(client
, &sr
)) == 0) {
554 if (sr
& X1205_SR_RTCF
) {
555 dev_err(&client
->dev
,
556 "power failure detected, "
557 "please set the clock\n");
559 x1205_fix_osc(client
);
563 dev_err(&client
->dev
, "couldn't read status\n");
565 device_create_file(&client
->dev
, &dev_attr_atrim
);
566 device_create_file(&client
->dev
, &dev_attr_dtrim
);
571 i2c_detach_client(client
);
580 static int x1205_detach(struct i2c_client
*client
)
583 struct rtc_device
*rtc
= i2c_get_clientdata(client
);
586 rtc_device_unregister(rtc
);
588 if ((err
= i2c_detach_client(client
)))
596 static int __init
x1205_init(void)
598 return i2c_add_driver(&x1205_driver
);
601 static void __exit
x1205_exit(void)
603 i2c_del_driver(&x1205_driver
);
607 "Karen Spearel <kas111 at gmail dot com>, "
608 "Alessandro Zummo <a.zummo@towertech.it>");
609 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
610 MODULE_LICENSE("GPL");
611 MODULE_VERSION(DRV_VERSION
);
613 module_init(x1205_init
);
614 module_exit(x1205_exit
);