OMAP2430: hwmod data: Add watchdog timer
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-omap2 / omap_hwmod_2430_data.c
blob7ec927aa23dee2972b51c71c1cf9fc39168e855b
1 /*
2 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
4 * Copyright (C) 2009-2010 Nokia Corporation
5 * Paul Walmsley
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
14 #include <plat/omap_hwmod.h>
15 #include <mach/irqs.h>
16 #include <plat/cpu.h>
17 #include <plat/dma.h>
19 #include "omap_hwmod_common_data.h"
21 #include "prm-regbits-24xx.h"
22 #include "cm-regbits-24xx.h"
25 * OMAP2430 hardware module integration data
27 * ALl of the data in this section should be autogeneratable from the
28 * TI hardware database or other technical documentation. Data that
29 * is driver-specific or driver-kernel integration-specific belongs
30 * elsewhere.
33 static struct omap_hwmod omap2430_mpu_hwmod;
34 static struct omap_hwmod omap2430_iva_hwmod;
35 static struct omap_hwmod omap2430_l3_main_hwmod;
36 static struct omap_hwmod omap2430_l4_core_hwmod;
37 static struct omap_hwmod omap2430_wd_timer2_hwmod;
39 /* L3 -> L4_CORE interface */
40 static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
41 .master = &omap2430_l3_main_hwmod,
42 .slave = &omap2430_l4_core_hwmod,
43 .user = OCP_USER_MPU | OCP_USER_SDMA,
46 /* MPU -> L3 interface */
47 static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
48 .master = &omap2430_mpu_hwmod,
49 .slave = &omap2430_l3_main_hwmod,
50 .user = OCP_USER_MPU,
53 /* Slave interfaces on the L3 interconnect */
54 static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
55 &omap2430_mpu__l3_main,
58 /* Master interfaces on the L3 interconnect */
59 static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
60 &omap2430_l3_main__l4_core,
63 /* L3 */
64 static struct omap_hwmod omap2430_l3_main_hwmod = {
65 .name = "l3_main",
66 .class = &l3_hwmod_class,
67 .masters = omap2430_l3_main_masters,
68 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
69 .slaves = omap2430_l3_main_slaves,
70 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
71 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
72 .flags = HWMOD_NO_IDLEST,
75 static struct omap_hwmod omap2430_l4_wkup_hwmod;
77 /* L4_CORE -> L4_WKUP interface */
78 static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
79 .master = &omap2430_l4_core_hwmod,
80 .slave = &omap2430_l4_wkup_hwmod,
81 .user = OCP_USER_MPU | OCP_USER_SDMA,
84 /* Slave interfaces on the L4_CORE interconnect */
85 static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
86 &omap2430_l3_main__l4_core,
89 /* Master interfaces on the L4_CORE interconnect */
90 static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
91 &omap2430_l4_core__l4_wkup,
94 /* L4 CORE */
95 static struct omap_hwmod omap2430_l4_core_hwmod = {
96 .name = "l4_core",
97 .class = &l4_hwmod_class,
98 .masters = omap2430_l4_core_masters,
99 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
100 .slaves = omap2430_l4_core_slaves,
101 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
102 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
103 .flags = HWMOD_NO_IDLEST,
106 /* Slave interfaces on the L4_WKUP interconnect */
107 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
108 &omap2430_l4_core__l4_wkup,
111 /* Master interfaces on the L4_WKUP interconnect */
112 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
115 /* L4 WKUP */
116 static struct omap_hwmod omap2430_l4_wkup_hwmod = {
117 .name = "l4_wkup",
118 .class = &l4_hwmod_class,
119 .masters = omap2430_l4_wkup_masters,
120 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
121 .slaves = omap2430_l4_wkup_slaves,
122 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
123 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
124 .flags = HWMOD_NO_IDLEST,
127 /* Master interfaces on the MPU device */
128 static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
129 &omap2430_mpu__l3_main,
132 /* MPU */
133 static struct omap_hwmod omap2430_mpu_hwmod = {
134 .name = "mpu",
135 .class = &mpu_hwmod_class,
136 .main_clk = "mpu_ck",
137 .masters = omap2430_mpu_masters,
138 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
139 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
143 * IVA2_1 interface data
146 /* IVA2 <- L3 interface */
147 static struct omap_hwmod_ocp_if omap2430_l3__iva = {
148 .master = &omap2430_l3_main_hwmod,
149 .slave = &omap2430_iva_hwmod,
150 .clk = "dsp_fck",
151 .user = OCP_USER_MPU | OCP_USER_SDMA,
154 static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
155 &omap2430_l3__iva,
159 * IVA2 (IVA2)
162 static struct omap_hwmod omap2430_iva_hwmod = {
163 .name = "iva",
164 .class = &iva_hwmod_class,
165 .masters = omap2430_iva_masters,
166 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters),
167 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
170 /* l4_wkup -> wd_timer2 */
171 static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
173 .pa_start = 0x49016000,
174 .pa_end = 0x4901607f,
175 .flags = ADDR_TYPE_RT
179 static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
180 .master = &omap2430_l4_wkup_hwmod,
181 .slave = &omap2430_wd_timer2_hwmod,
182 .clk = "mpu_wdt_ick",
183 .addr = omap2430_wd_timer2_addrs,
184 .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs),
185 .user = OCP_USER_MPU | OCP_USER_SDMA,
189 * 'wd_timer' class
190 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
191 * overflow condition
194 static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = {
195 .rev_offs = 0x0,
196 .sysc_offs = 0x0010,
197 .syss_offs = 0x0014,
198 .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
199 SYSC_HAS_AUTOIDLE),
200 .sysc_fields = &omap_hwmod_sysc_type1,
203 static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = {
204 .name = "wd_timer",
205 .sysc = &omap2430_wd_timer_sysc,
208 /* wd_timer2 */
209 static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
210 &omap2430_l4_wkup__wd_timer2,
213 static struct omap_hwmod omap2430_wd_timer2_hwmod = {
214 .name = "wd_timer2",
215 .class = &omap2430_wd_timer_hwmod_class,
216 .main_clk = "mpu_wdt_fck",
217 .prcm = {
218 .omap2 = {
219 .prcm_reg_id = 1,
220 .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
221 .module_offs = WKUP_MOD,
222 .idlest_reg_id = 1,
223 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
226 .slaves = omap2430_wd_timer2_slaves,
227 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
228 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
231 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
232 &omap2430_l3_main_hwmod,
233 &omap2430_l4_core_hwmod,
234 &omap2430_l4_wkup_hwmod,
235 &omap2430_mpu_hwmod,
236 &omap2430_iva_hwmod,
237 &omap2430_wd_timer2_hwmod,
238 NULL,
241 int __init omap2430_hwmod_init(void)
243 return omap_hwmod_init(omap2430_hwmods);