Merge /spare/repo/linux-2.6/
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-frv / registers.h
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1 /* registers.h: register frame declarations
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
13 * notes:
15 * (1) that the members of all these structures are carefully aligned to permit
16 * usage of STD/STDF instructions
18 * (2) if you change these structures, you must change the code in
19 * arch/frvnommu/kernel/{break.S,entry.S,switch_to.S,gdb-stub.c}
22 * the kernel stack space block looks like this:
24 * +0x2000 +----------------------
25 * | union {
26 * | struct user_context
27 * | struct pt_regs [user exception]
28 * | }
29 * +---------------------- <-- __kernel_frame0_ptr (maybe GR28)
30 * |
31 * | kernel stack
32 * |
33 * |......................
34 * | struct pt_regs [kernel exception]
35 * |...................... <-- __kernel_frame0_ptr (maybe GR28)
36 * |
37 * | kernel stack
38 * |
39 * |...................... <-- stack pointer (GR1)
40 * |
41 * | unused stack space
42 * |
43 * +----------------------
44 * | struct thread_info
45 * +0x0000 +---------------------- <-- __current_thread_info (GR15);
47 * note that GR28 points to the current exception frame
50 #ifndef _ASM_REGISTERS_H
51 #define _ASM_REGISTERS_H
53 #ifndef __ASSEMBLY__
54 #define __OFFSET(X) (X)
55 #define __OFFSETC(X,N) xxxxxxxxxxxxxxxxxxxxxxxx
56 #else
57 #define __OFFSET(X) ((X)*4)
58 #define __OFFSETC(X,N) ((X)*4+(N))
59 #endif
61 /*****************************************************************************/
63 * Exception/Interrupt frame
64 * - held on kernel stack
65 * - 8-byte aligned on stack (old SP is saved in frame)
66 * - GR0 is fixed 0, so we don't save it
68 #ifndef __ASSEMBLY__
70 struct pt_regs {
71 unsigned long psr; /* Processor Status Register */
72 unsigned long isr; /* Integer Status Register */
73 unsigned long ccr; /* Condition Code Register */
74 unsigned long cccr; /* Condition Code for Conditional Insns Register */
75 unsigned long lr; /* Link Register */
76 unsigned long lcr; /* Loop Count Register */
77 unsigned long pc; /* Program Counter Register */
78 unsigned long __status; /* exception status */
79 unsigned long syscallno; /* syscall number or -1 */
80 unsigned long orig_gr8; /* original syscall arg #1 */
81 unsigned long gner0;
82 unsigned long gner1;
83 unsigned long long iacc0;
84 unsigned long tbr; /* GR0 is fixed zero, so we use this for TBR */
85 unsigned long sp; /* GR1: USP/KSP */
86 unsigned long fp; /* GR2: FP */
87 unsigned long gr3;
88 unsigned long gr4;
89 unsigned long gr5;
90 unsigned long gr6;
91 unsigned long gr7; /* syscall number */
92 unsigned long gr8; /* 1st syscall param; syscall return */
93 unsigned long gr9; /* 2nd syscall param */
94 unsigned long gr10; /* 3rd syscall param */
95 unsigned long gr11; /* 4th syscall param */
96 unsigned long gr12; /* 5th syscall param */
97 unsigned long gr13; /* 6th syscall param */
98 unsigned long gr14;
99 unsigned long gr15;
100 unsigned long gr16; /* GP pointer */
101 unsigned long gr17; /* small data */
102 unsigned long gr18; /* PIC/PID */
103 unsigned long gr19;
104 unsigned long gr20;
105 unsigned long gr21;
106 unsigned long gr22;
107 unsigned long gr23;
108 unsigned long gr24;
109 unsigned long gr25;
110 unsigned long gr26;
111 unsigned long gr27;
112 struct pt_regs *next_frame; /* GR28 - next exception frame */
113 unsigned long gr29; /* GR29 - OS reserved */
114 unsigned long gr30; /* GR30 - OS reserved */
115 unsigned long gr31; /* GR31 - OS reserved */
116 } __attribute__((aligned(8)));
118 #endif
120 #define REG_PSR __OFFSET( 0) /* Processor Status Register */
121 #define REG_ISR __OFFSET( 1) /* Integer Status Register */
122 #define REG_CCR __OFFSET( 2) /* Condition Code Register */
123 #define REG_CCCR __OFFSET( 3) /* Condition Code for Conditional Insns Register */
124 #define REG_LR __OFFSET( 4) /* Link Register */
125 #define REG_LCR __OFFSET( 5) /* Loop Count Register */
126 #define REG_PC __OFFSET( 6) /* Program Counter */
128 #define REG__STATUS __OFFSET( 7) /* exception status */
129 #define REG__STATUS_STEP 0x00000001 /* - reenable single stepping on return */
130 #define REG__STATUS_STEPPED 0x00000002 /* - single step caused exception */
131 #define REG__STATUS_BROKE 0x00000004 /* - BREAK insn caused exception */
132 #define REG__STATUS_SYSC_ENTRY 0x40000000 /* - T on syscall entry (ptrace.c only) */
133 #define REG__STATUS_SYSC_EXIT 0x80000000 /* - T on syscall exit (ptrace.c only) */
135 #define REG_SYSCALLNO __OFFSET( 8) /* syscall number or -1 */
136 #define REG_ORIG_GR8 __OFFSET( 9) /* saved GR8 for signal handling */
137 #define REG_GNER0 __OFFSET(10)
138 #define REG_GNER1 __OFFSET(11)
139 #define REG_IACC0 __OFFSET(12)
141 #define REG_TBR __OFFSET(14) /* Trap Vector Register */
142 #define REG_GR(R) __OFFSET((14+(R)))
143 #define REG__END REG_GR(32)
145 #define REG_SP REG_GR(1)
146 #define REG_FP REG_GR(2)
147 #define REG_PREV_FRAME REG_GR(28) /* previous exception frame pointer (old gr28 value) */
148 #define REG_CURR_TASK REG_GR(29) /* current task */
150 /*****************************************************************************/
152 * extension tacked in front of the exception frame in debug mode
154 #ifndef __ASSEMBLY__
156 struct pt_debug_regs
158 unsigned long bpsr;
159 unsigned long dcr;
160 unsigned long brr;
161 unsigned long nmar;
162 struct pt_regs normal_regs;
163 } __attribute__((aligned(8)));
165 #endif
167 #define REG_NMAR __OFFSET(-1)
168 #define REG_BRR __OFFSET(-2)
169 #define REG_DCR __OFFSET(-3)
170 #define REG_BPSR __OFFSET(-4)
171 #define REG__DEBUG_XTRA __OFFSET(4)
173 /*****************************************************************************/
175 * userspace registers
177 #ifndef __ASSEMBLY__
179 struct user_int_regs
181 /* integer registers
182 * - up to gr[31] mirror pt_regs
183 * - total size must be multiple of 8 bytes
185 unsigned long psr; /* Processor Status Register */
186 unsigned long isr; /* Integer Status Register */
187 unsigned long ccr; /* Condition Code Register */
188 unsigned long cccr; /* Condition Code for Conditional Insns Register */
189 unsigned long lr; /* Link Register */
190 unsigned long lcr; /* Loop Count Register */
191 unsigned long pc; /* Program Counter Register */
192 unsigned long __status; /* exception status */
193 unsigned long syscallno; /* syscall number or -1 */
194 unsigned long orig_gr8; /* original syscall arg #1 */
195 unsigned long gner[2];
196 unsigned long long iacc[1];
198 union {
199 unsigned long tbr;
200 unsigned long gr[64];
204 struct user_fpmedia_regs
206 /* FP/Media registers */
207 unsigned long fr[64];
208 unsigned long fner[2];
209 unsigned long msr[2];
210 unsigned long acc[8];
211 unsigned char accg[8];
212 unsigned long fsr[1];
215 struct user_context
217 struct user_int_regs i;
218 struct user_fpmedia_regs f;
220 /* we provide a context extension so that we can save the regs for CPUs that
221 * implement many more of Fujitsu's lavish register spec
223 void *extension;
224 } __attribute__((aligned(8)));
226 #endif
228 #define NR_USER_INT_REGS (14 + 64)
229 #define NR_USER_FPMEDIA_REGS (64 + 2 + 2 + 8 + 8/4 + 1)
230 #define NR_USER_CONTEXT (NR_USER_INT_REGS + NR_USER_FPMEDIA_REGS + 1)
232 #define USER_CONTEXT_SIZE (((NR_USER_CONTEXT + 1) & ~1) * 4)
234 #define __THREAD_FRAME __OFFSET(0)
235 #define __THREAD_CURR __OFFSET(1)
236 #define __THREAD_SP __OFFSET(2)
237 #define __THREAD_FP __OFFSET(3)
238 #define __THREAD_LR __OFFSET(4)
239 #define __THREAD_PC __OFFSET(5)
240 #define __THREAD_GR(R) __OFFSET(6 + (R) - 16)
241 #define __THREAD_FRAME0 __OFFSET(19)
242 #define __THREAD_USER __OFFSET(19)
244 #define __USER_INT __OFFSET(0)
245 #define __INT_GR(R) __OFFSET(14 + (R))
247 #define __USER_FPMEDIA __OFFSET(NR_USER_INT_REGS)
248 #define __FPMEDIA_FR(R) __OFFSET(NR_USER_INT_REGS + (R))
249 #define __FPMEDIA_FNER(R) __OFFSET(NR_USER_INT_REGS + 64 + (R))
250 #define __FPMEDIA_MSR(R) __OFFSET(NR_USER_INT_REGS + 66 + (R))
251 #define __FPMEDIA_ACC(R) __OFFSET(NR_USER_INT_REGS + 68 + (R))
252 #define __FPMEDIA_ACCG(R) __OFFSETC(NR_USER_INT_REGS + 76, (R))
253 #define __FPMEDIA_FSR(R) __OFFSET(NR_USER_INT_REGS + 78 + (R))
255 #endif /* _ASM_REGISTERS_H */