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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / cx25821 / cx25821-video-upstream.c
blob7a3dad91eba8f423c5663f7a618df452188101cf
1 /*
2 * Driver for the Conexant CX25821 PCIe bridge
3 *
4 * Copyright (C) 2009 Conexant Systems Inc.
5 * Authors <hiep.huynh@conexant.com>, <shu.lin@conexant.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #include "cx25821-video.h"
24 #include "cx25821-video-upstream.h"
25
26 #include <linux/fs.h>
27 #include <linux/errno.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/syscalls.h>
32 #include <linux/file.h>
33 #include <linux/fcntl.h>
34 #include <linux/slab.h>
35 #include <linux/uaccess.h>
36
37 MODULE_DESCRIPTION("v4l2 driver module for cx25821 based TV cards");
38 MODULE_AUTHOR("Hiep Huynh <hiep.huynh@conexant.com>");
39 MODULE_LICENSE("GPL");
40
41 static int _intr_msk =
42 FLD_VID_SRC_RISC1 | FLD_VID_SRC_UF | FLD_VID_SRC_SYNC | FLD_VID_SRC_OPC_ERR;
43
44 int cx25821_sram_channel_setup_upstream(struct cx25821_dev *dev,
45 struct sram_channel *ch,
46 unsigned int bpl, u32 risc)
47 {
48 unsigned int i, lines;
49 u32 cdt;
50
51 if (ch->cmds_start == 0) {
52 cx_write(ch->ptr1_reg, 0);
53 cx_write(ch->ptr2_reg, 0);
54 cx_write(ch->cnt2_reg, 0);
55 cx_write(ch->cnt1_reg, 0);
56 return 0;
57 }
58
59 bpl = (bpl + 7) & ~7; /* alignment */
60 cdt = ch->cdt;
61 lines = ch->fifo_size / bpl;
62
63 if (lines > 4)
64 lines = 4;
65
66 BUG_ON(lines < 2);
67
68 /* write CDT */
69 for (i = 0; i < lines; i++) {
70 cx_write(cdt + 16 * i, ch->fifo_start + bpl * i);
71 cx_write(cdt + 16 * i + 4, 0);
72 cx_write(cdt + 16 * i + 8, 0);
73 cx_write(cdt + 16 * i + 12, 0);
74 }
75
76 /* write CMDS */
77 cx_write(ch->cmds_start + 0, risc);
78
79 cx_write(ch->cmds_start + 4, 0);
80 cx_write(ch->cmds_start + 8, cdt);
81 cx_write(ch->cmds_start + 12, (lines * 16) >> 3);
82 cx_write(ch->cmds_start + 16, ch->ctrl_start);
83
84 cx_write(ch->cmds_start + 20, VID_IQ_SIZE_DW);
85
86 for (i = 24; i < 80; i += 4)
87 cx_write(ch->cmds_start + i, 0);
88
89 /* fill registers */
90 cx_write(ch->ptr1_reg, ch->fifo_start);
91 cx_write(ch->ptr2_reg, cdt);
92 cx_write(ch->cnt2_reg, (lines * 16) >> 3);
93 cx_write(ch->cnt1_reg, (bpl >> 3) - 1);
94
95 return 0;
96 }
97
98 static __le32 *cx25821_update_riscprogram(struct cx25821_dev *dev,
99 __le32 *rp, unsigned int offset,
100 unsigned int bpl, u32 sync_line,
101 unsigned int lines, int fifo_enable,
102 int field_type)
103 {
104 unsigned int line, i;
105 int dist_betwn_starts = bpl * 2;
106
107 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
108
109 if (USE_RISC_NOOP_VIDEO) {
110 for (i = 0; i < NUM_NO_OPS; i++)
111 *(rp++) = cpu_to_le32(RISC_NOOP);
112 }
113
114 /* scan lines */
115 for (line = 0; line < lines; line++) {
116 *(rp++) = cpu_to_le32(RISC_READ | RISC_SOL | RISC_EOL | bpl);
117 *(rp++) = cpu_to_le32(dev->_data_buf_phys_addr + offset);
118 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
119
120 if ((lines <= NTSC_FIELD_HEIGHT)
121 || (line < (NTSC_FIELD_HEIGHT - 1)) || !(dev->_isNTSC)) {
122 offset += dist_betwn_starts;
123 }
124 }
125
126 return rp;
127 }
128
129 static __le32 *cx25821_risc_field_upstream(struct cx25821_dev *dev, __le32 * rp,
130 dma_addr_t databuf_phys_addr,
131 unsigned int offset, u32 sync_line,
132 unsigned int bpl, unsigned int lines,
133 int fifo_enable, int field_type)
134 {
135 unsigned int line, i;
136 struct sram_channel *sram_ch =
137 &dev->sram_channels[dev->_channel_upstream_select];
138 int dist_betwn_starts = bpl * 2;
139
140 /* sync instruction */
141 if (sync_line != NO_SYNC_LINE)
142 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
143
144 if (USE_RISC_NOOP_VIDEO) {
145 for (i = 0; i < NUM_NO_OPS; i++)
146 *(rp++) = cpu_to_le32(RISC_NOOP);
147 }
148
149 /* scan lines */
150 for (line = 0; line < lines; line++) {
151 *(rp++) = cpu_to_le32(RISC_READ | RISC_SOL | RISC_EOL | bpl);
152 *(rp++) = cpu_to_le32(databuf_phys_addr + offset);
153 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
154
155 if ((lines <= NTSC_FIELD_HEIGHT)
156 || (line < (NTSC_FIELD_HEIGHT - 1)) || !(dev->_isNTSC))
157 /* to skip the other field line */
158 offset += dist_betwn_starts;
159
160 /* check if we need to enable the FIFO after the first 4 lines
161 * For the upstream video channel, the risc engine will enable
162 * the FIFO. */
163 if (fifo_enable && line == 3) {
164 *(rp++) = RISC_WRITECR;
165 *(rp++) = sram_ch->dma_ctl;
166 *(rp++) = FLD_VID_FIFO_EN;
167 *(rp++) = 0x00000001;
168 }
169 }
170
171 return rp;
172 }
173
174 int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
175 struct pci_dev *pci,
176 unsigned int top_offset,
177 unsigned int bpl, unsigned int lines)
178 {
179 __le32 *rp;
180 int fifo_enable = 0;
181 /* get line count for single field */
182 int singlefield_lines = lines >> 1;
183 int odd_num_lines = singlefield_lines;
184 int frame = 0;
185 int frame_size = 0;
186 int databuf_offset = 0;
187 int risc_program_size = 0;
188 int risc_flag = RISC_CNT_RESET;
189 unsigned int bottom_offset = bpl;
190 dma_addr_t risc_phys_jump_addr;
191
192 if (dev->_isNTSC) {
193 odd_num_lines = singlefield_lines + 1;
194 risc_program_size = FRAME1_VID_PROG_SIZE;
195 frame_size =
196 (bpl ==
197 Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 :
198 FRAME_SIZE_NTSC_Y422;
199 } else {
200 risc_program_size = PAL_VID_PROG_SIZE;
201 frame_size =
202 (bpl ==
203 Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
204 }
205
206 /* Virtual address of Risc buffer program */
207 rp = dev->_dma_virt_addr;
208
209 for (frame = 0; frame < NUM_FRAMES; frame++) {
210 databuf_offset = frame_size * frame;
211
212 if (UNSET != top_offset) {
213 fifo_enable = (frame == 0) ? FIFO_ENABLE : FIFO_DISABLE;
214 rp = cx25821_risc_field_upstream(dev, rp,
215 dev->
216 _data_buf_phys_addr +
217 databuf_offset,
218 top_offset, 0, bpl,
219 odd_num_lines,
220 fifo_enable,
221 ODD_FIELD);
222 }
223
224 fifo_enable = FIFO_DISABLE;
225
226 /* Even Field */
227 rp = cx25821_risc_field_upstream(dev, rp,
228 dev->_data_buf_phys_addr +
229 databuf_offset, bottom_offset,
230 0x200, bpl, singlefield_lines,
231 fifo_enable, EVEN_FIELD);
232
233 if (frame == 0) {
234 risc_flag = RISC_CNT_RESET;
235 risc_phys_jump_addr =
236 dev->_dma_phys_start_addr + risc_program_size;
237 } else {
238 risc_phys_jump_addr = dev->_dma_phys_start_addr;
239 risc_flag = RISC_CNT_INC;
240 }
241
242 /* Loop to 2ndFrameRISC or to Start of Risc
243 * program & generate IRQ
244 */
245 *(rp++) = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | risc_flag);
246 *(rp++) = cpu_to_le32(risc_phys_jump_addr);
247 *(rp++) = cpu_to_le32(0);
248 }
249
250 return 0;
251 }
252
253 void cx25821_stop_upstream_video_ch1(struct cx25821_dev *dev)
254 {
255 struct sram_channel *sram_ch =
256 &dev->sram_channels[VID_UPSTREAM_SRAM_CHANNEL_I];
257 u32 tmp = 0;
258
259 if (!dev->_is_running) {
260 printk
261 (KERN_INFO "cx25821: No video file is currently running so return!\n");
262 return;
263 }
264 /* Disable RISC interrupts */
265 tmp = cx_read(sram_ch->int_msk);
266 cx_write(sram_ch->int_msk, tmp & ~_intr_msk);
267
268 /* Turn OFF risc and fifo enable */
269 tmp = cx_read(sram_ch->dma_ctl);
270 cx_write(sram_ch->dma_ctl, tmp & ~(FLD_VID_FIFO_EN | FLD_VID_RISC_EN));
271
272 /* Clear data buffer memory */
273 if (dev->_data_buf_virt_addr)
274 memset(dev->_data_buf_virt_addr, 0, dev->_data_buf_size);
275
276 dev->_is_running = 0;
277 dev->_is_first_frame = 0;
278 dev->_frame_count = 0;
279 dev->_file_status = END_OF_FILE;
280
281 if (dev->_irq_queues) {
282 kfree(dev->_irq_queues);
283 dev->_irq_queues = NULL;
284 }
285
286 if (dev->_filename != NULL)
287 kfree(dev->_filename);
288
289 tmp = cx_read(VID_CH_MODE_SEL);
290 cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00);
291 }
292
293 void cx25821_free_mem_upstream_ch1(struct cx25821_dev *dev)
294 {
295 if (dev->_is_running)
296 cx25821_stop_upstream_video_ch1(dev);
297
298 if (dev->_dma_virt_addr) {
299 pci_free_consistent(dev->pci, dev->_risc_size,
300 dev->_dma_virt_addr, dev->_dma_phys_addr);
301 dev->_dma_virt_addr = NULL;
302 }
303
304 if (dev->_data_buf_virt_addr) {
305 pci_free_consistent(dev->pci, dev->_data_buf_size,
306 dev->_data_buf_virt_addr,
307 dev->_data_buf_phys_addr);
308 dev->_data_buf_virt_addr = NULL;
309 }
310 }
311
312 int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
313 {
314 struct file *myfile;
315 int frame_index_temp = dev->_frame_index;
316 int i = 0;
317 int line_size =
318 (dev->_pixel_format ==
319 PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
320 int frame_size = 0;
321 int frame_offset = 0;
322 ssize_t vfs_read_retval = 0;
323 char mybuf[line_size];
324 loff_t file_offset;
325 loff_t pos;
326 mm_segment_t old_fs;
327
328 if (dev->_file_status == END_OF_FILE)
329 return 0;
330
331 if (dev->_isNTSC) {
332 frame_size =
333 (line_size ==
334 Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 :
335 FRAME_SIZE_NTSC_Y422;
336 } else {
337 frame_size =
338 (line_size ==
339 Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
340 }
341
342 frame_offset = (frame_index_temp > 0) ? frame_size : 0;
343 file_offset = dev->_frame_count * frame_size;
344
345 myfile = filp_open(dev->_filename, O_RDONLY | O_LARGEFILE, 0);
346
347 if (IS_ERR(myfile)) {
348 const int open_errno = -PTR_ERR(myfile);
349 printk(KERN_ERR "%s(): ERROR opening file(%s) with errno = %d!\n",
350 __func__, dev->_filename, open_errno);
351 return PTR_ERR(myfile);
352 } else {
353 if (!(myfile->f_op)) {
354 printk(KERN_ERR "%s: File has no file operations registered!",
355 __func__);
356 filp_close(myfile, NULL);
357 return -EIO;
358 }
359
360 if (!myfile->f_op->read) {
361 printk(KERN_ERR "%s: File has no READ operations registered!",
362 __func__);
363 filp_close(myfile, NULL);
364 return -EIO;
365 }
366
367 pos = myfile->f_pos;
368 old_fs = get_fs();
369 set_fs(KERNEL_DS);
370
371 for (i = 0; i < dev->_lines_count; i++) {
372 pos = file_offset;
373
374 vfs_read_retval =
375 vfs_read(myfile, mybuf, line_size, &pos);
376
377 if (vfs_read_retval > 0 && vfs_read_retval == line_size
378 && dev->_data_buf_virt_addr != NULL) {
379 memcpy((void *)(dev->_data_buf_virt_addr +
380 frame_offset / 4), mybuf,
381 vfs_read_retval);
382 }
383
384 file_offset += vfs_read_retval;
385 frame_offset += vfs_read_retval;
386
387 if (vfs_read_retval < line_size) {
388 printk(KERN_INFO
389 "Done: exit %s() since no more bytes to read from Video file.\n",
390 __func__);
391 break;
392 }
393 }
394
395 if (i > 0)
396 dev->_frame_count++;
397
398 dev->_file_status =
399 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE;
400
401 set_fs(old_fs);
402 filp_close(myfile, NULL);
403 }
404
405 return 0;
406 }
407
408 static void cx25821_vidups_handler(struct work_struct *work)
409 {
410 struct cx25821_dev *dev =
411 container_of(work, struct cx25821_dev, _irq_work_entry);
412
413 if (!dev) {
414 printk(KERN_ERR "ERROR %s(): since container_of(work_struct) FAILED!\n",
415 __func__);
416 return;
417 }
418
419 cx25821_get_frame(dev,
420 &dev->sram_channels[dev->_channel_upstream_select]);
421 }
422
423 int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch)
424 {
425 struct file *myfile;
426 int i = 0, j = 0;
427 int line_size =
428 (dev->_pixel_format ==
429 PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
430 ssize_t vfs_read_retval = 0;
431 char mybuf[line_size];
432 loff_t pos;
433 loff_t offset = (unsigned long)0;
434 mm_segment_t old_fs;
435
436 myfile = filp_open(dev->_filename, O_RDONLY | O_LARGEFILE, 0);
437
438 if (IS_ERR(myfile)) {
439 const int open_errno = -PTR_ERR(myfile);
440 printk(KERN_ERR "%s(): ERROR opening file(%s) with errno = %d!\n",
441 __func__, dev->_filename, open_errno);
442 return PTR_ERR(myfile);
443 } else {
444 if (!(myfile->f_op)) {
445 printk(KERN_ERR "%s: File has no file operations registered!",
446 __func__);
447 filp_close(myfile, NULL);
448 return -EIO;
449 }
450
451 if (!myfile->f_op->read) {
452 printk
453 (KERN_ERR "%s: File has no READ operations registered! Returning.",
454 __func__);
455 filp_close(myfile, NULL);
456 return -EIO;
457 }
458
459 pos = myfile->f_pos;
460 old_fs = get_fs();
461 set_fs(KERNEL_DS);
462
463 for (j = 0; j < NUM_FRAMES; j++) {
464 for (i = 0; i < dev->_lines_count; i++) {
465 pos = offset;
466
467 vfs_read_retval =
468 vfs_read(myfile, mybuf, line_size, &pos);
469
470 if (vfs_read_retval > 0
471 && vfs_read_retval == line_size
472 && dev->_data_buf_virt_addr != NULL) {
473 memcpy((void *)(dev->
474 _data_buf_virt_addr +
475 offset / 4), mybuf,
476 vfs_read_retval);
477 }
478
479 offset += vfs_read_retval;
480
481 if (vfs_read_retval < line_size) {
482 printk(KERN_INFO
483 "Done: exit %s() since no more bytes to read from Video file.\n",
484 __func__);
485 break;
486 }
487 }
488
489 if (i > 0)
490 dev->_frame_count++;
491
492 if (vfs_read_retval < line_size)
493 break;
494 }
495
496 dev->_file_status =
497 (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE;
498
499 set_fs(old_fs);
500 myfile->f_pos = 0;
501 filp_close(myfile, NULL);
502 }
503
504 return 0;
505 }
506
507 int cx25821_upstream_buffer_prepare(struct cx25821_dev *dev,
508 struct sram_channel *sram_ch, int bpl)
509 {
510 int ret = 0;
511 dma_addr_t dma_addr;
512 dma_addr_t data_dma_addr;
513
514 if (dev->_dma_virt_addr != NULL) {
515 pci_free_consistent(dev->pci, dev->upstream_riscbuf_size,
516 dev->_dma_virt_addr, dev->_dma_phys_addr);
517 }
518
519 dev->_dma_virt_addr =
520 pci_alloc_consistent(dev->pci, dev->upstream_riscbuf_size,
521 &dma_addr);
522 dev->_dma_virt_start_addr = dev->_dma_virt_addr;
523 dev->_dma_phys_start_addr = dma_addr;
524 dev->_dma_phys_addr = dma_addr;
525 dev->_risc_size = dev->upstream_riscbuf_size;
526
527 if (!dev->_dma_virt_addr) {
528 printk
529 (KERN_ERR "cx25821: FAILED to allocate memory for Risc buffer! Returning.\n");
530 return -ENOMEM;
531 }
532
533 /* Clear memory at address */
534 memset(dev->_dma_virt_addr, 0, dev->_risc_size);
535
536 if (dev->_data_buf_virt_addr != NULL) {
537 pci_free_consistent(dev->pci, dev->upstream_databuf_size,
538 dev->_data_buf_virt_addr,
539 dev->_data_buf_phys_addr);
540 }
541 /* For Video Data buffer allocation */
542 dev->_data_buf_virt_addr =
543 pci_alloc_consistent(dev->pci, dev->upstream_databuf_size,
544 &data_dma_addr);
545 dev->_data_buf_phys_addr = data_dma_addr;
546 dev->_data_buf_size = dev->upstream_databuf_size;
547
548 if (!dev->_data_buf_virt_addr) {
549 printk
550 (KERN_ERR "cx25821: FAILED to allocate memory for data buffer! Returning.\n");
551 return -ENOMEM;
552 }
553
554 /* Clear memory at address */
555 memset(dev->_data_buf_virt_addr, 0, dev->_data_buf_size);
556
557 ret = cx25821_openfile(dev, sram_ch);
558 if (ret < 0)
559 return ret;
560
561 /* Create RISC programs */
562 ret =
563 cx25821_risc_buffer_upstream(dev, dev->pci, 0, bpl,
564 dev->_lines_count);
565 if (ret < 0) {
566 printk(KERN_INFO
567 "cx25821: Failed creating Video Upstream Risc programs!\n");
568 goto error;
569 }
570
571 return 0;
572
573 error:
574 return ret;
575 }
576
577 int cx25821_video_upstream_irq(struct cx25821_dev *dev, int chan_num,
578 u32 status)
579 {
580 u32 int_msk_tmp;
581 struct sram_channel *channel = &dev->sram_channels[chan_num];
582 int singlefield_lines = NTSC_FIELD_HEIGHT;
583 int line_size_in_bytes = Y422_LINE_SZ;
584 int odd_risc_prog_size = 0;
585 dma_addr_t risc_phys_jump_addr;
586 __le32 *rp;
587
588 if (status & FLD_VID_SRC_RISC1) {
589 /* We should only process one program per call */
590 u32 prog_cnt = cx_read(channel->gpcnt);
591
592 /* Since we've identified our IRQ, clear our bits from the
593 * interrupt mask and interrupt status registers */
594 int_msk_tmp = cx_read(channel->int_msk);
595 cx_write(channel->int_msk, int_msk_tmp & ~_intr_msk);
596 cx_write(channel->int_stat, _intr_msk);
597
598 spin_lock(&dev->slock);
599
600 dev->_frame_index = prog_cnt;
601
602 queue_work(dev->_irq_queues, &dev->_irq_work_entry);
603
604 if (dev->_is_first_frame) {
605 dev->_is_first_frame = 0;
606
607 if (dev->_isNTSC) {
608 singlefield_lines += 1;
609 odd_risc_prog_size = ODD_FLD_NTSC_PROG_SIZE;
610 } else {
611 singlefield_lines = PAL_FIELD_HEIGHT;
612 odd_risc_prog_size = ODD_FLD_PAL_PROG_SIZE;
613 }
614
615 if (dev->_dma_virt_start_addr != NULL) {
616 line_size_in_bytes =
617 (dev->_pixel_format ==
618 PIXEL_FRMT_411) ? Y411_LINE_SZ :
619 Y422_LINE_SZ;
620 risc_phys_jump_addr =
621 dev->_dma_phys_start_addr +
622 odd_risc_prog_size;
623
624 rp = cx25821_update_riscprogram(dev,
625 dev->
626 _dma_virt_start_addr,
627 TOP_OFFSET,
628 line_size_in_bytes,
629 0x0,
630 singlefield_lines,
631 FIFO_DISABLE,
632 ODD_FIELD);
633
634 /* Jump to Even Risc program of 1st Frame */
635 *(rp++) = cpu_to_le32(RISC_JUMP);
636 *(rp++) = cpu_to_le32(risc_phys_jump_addr);
637 *(rp++) = cpu_to_le32(0);
638 }
639 }
640
641 spin_unlock(&dev->slock);
642 } else {
643 if (status & FLD_VID_SRC_UF)
644 printk
645 (KERN_ERR "%s: Video Received Underflow Error Interrupt!\n",
646 __func__);
647
648 if (status & FLD_VID_SRC_SYNC)
649 printk(KERN_ERR "%s: Video Received Sync Error Interrupt!\n",
650 __func__);
651
652 if (status & FLD_VID_SRC_OPC_ERR)
653 printk(KERN_ERR "%s: Video Received OpCode Error Interrupt!\n",
654 __func__);
655 }
656
657 if (dev->_file_status == END_OF_FILE) {
658 printk(KERN_ERR "cx25821: EOF Channel 1 Framecount = %d\n",
659 dev->_frame_count);
660 return -1;
661 }
662 /* ElSE, set the interrupt mask register, re-enable irq. */
663 int_msk_tmp = cx_read(channel->int_msk);
664 cx_write(channel->int_msk, int_msk_tmp |= _intr_msk);
665
666 return 0;
667 }
668
669 static irqreturn_t cx25821_upstream_irq(int irq, void *dev_id)
670 {
671 struct cx25821_dev *dev = dev_id;
672 u32 msk_stat, vid_status;
673 int handled = 0;
674 int channel_num = 0;
675 struct sram_channel *sram_ch;
676
677 if (!dev)
678 return -1;
679
680 channel_num = VID_UPSTREAM_SRAM_CHANNEL_I;
681
682 sram_ch = &dev->sram_channels[channel_num];
683
684 msk_stat = cx_read(sram_ch->int_mstat);
685 vid_status = cx_read(sram_ch->int_stat);
686
687 /* Only deal with our interrupt */
688 if (vid_status) {
689 handled =
690 cx25821_video_upstream_irq(dev, channel_num, vid_status);
691 }
692
693 if (handled < 0)
694 cx25821_stop_upstream_video_ch1(dev);
695 else
696 handled += handled;
697
698 return IRQ_RETVAL(handled);
699 }
700
701 void cx25821_set_pixelengine(struct cx25821_dev *dev, struct sram_channel *ch,
702 int pix_format)
703 {
704 int width = WIDTH_D1;
705 int height = dev->_lines_count;
706 int num_lines, odd_num_lines;
707 u32 value;
708 int vip_mode = OUTPUT_FRMT_656;
709
710 value = ((pix_format & 0x3) << 12) | (vip_mode & 0x7);
711 value &= 0xFFFFFFEF;
712 value |= dev->_isNTSC ? 0 : 0x10;
713 cx_write(ch->vid_fmt_ctl, value);
714
715 /* set number of active pixels in each line.
716 * Default is 720 pixels in both NTSC and PAL format */
717 cx_write(ch->vid_active_ctl1, width);
718
719 num_lines = (height / 2) & 0x3FF;
720 odd_num_lines = num_lines;
721
722 if (dev->_isNTSC)
723 odd_num_lines += 1;
724
725 value = (num_lines << 16) | odd_num_lines;
726
727 /* set number of active lines in field 0 (top) and field 1 (bottom) */
728 cx_write(ch->vid_active_ctl2, value);
729
730 cx_write(ch->vid_cdt_size, VID_CDT_SIZE >> 3);
731 }
732
733 int cx25821_start_video_dma_upstream(struct cx25821_dev *dev,
734 struct sram_channel *sram_ch)
735 {
736 u32 tmp = 0;
737 int err = 0;
738
739 /* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for
740 * channel A-C
741 */
742 tmp = cx_read(VID_CH_MODE_SEL);
743 cx_write(VID_CH_MODE_SEL, tmp | 0x1B0001FF);
744
745 /* Set the physical start address of the RISC program in the initial
746 * program counter(IPC) member of the cmds.
747 */
748 cx_write(sram_ch->cmds_start + 0, dev->_dma_phys_addr);
749 /* Risc IPC High 64 bits 63-32 */
750 cx_write(sram_ch->cmds_start + 4, 0);
751
752 /* reset counter */
753 cx_write(sram_ch->gpcnt_ctl, 3);
754
755 /* Clear our bits from the interrupt status register. */
756 cx_write(sram_ch->int_stat, _intr_msk);
757
758 /* Set the interrupt mask register, enable irq. */
759 cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << sram_ch->irq_bit));
760 tmp = cx_read(sram_ch->int_msk);
761 cx_write(sram_ch->int_msk, tmp |= _intr_msk);
762
763 err =
764 request_irq(dev->pci->irq, cx25821_upstream_irq,
765 IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
766 if (err < 0) {
767 printk(KERN_ERR "%s: can't get upstream IRQ %d\n", dev->name,
768 dev->pci->irq);
769 goto fail_irq;
770 }
771
772 /* Start the DMA engine */
773 tmp = cx_read(sram_ch->dma_ctl);
774 cx_set(sram_ch->dma_ctl, tmp | FLD_VID_RISC_EN);
775
776 dev->_is_running = 1;
777 dev->_is_first_frame = 1;
778
779 return 0;
780
781 fail_irq:
782 cx25821_dev_unregister(dev);
783 return err;
784 }
785
786 int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
787 int pixel_format)
788 {
789 struct sram_channel *sram_ch;
790 u32 tmp;
791 int retval = 0;
792 int err = 0;
793 int data_frame_size = 0;
794 int risc_buffer_size = 0;
795 int str_length = 0;
796
797 if (dev->_is_running) {
798 printk(KERN_INFO "Video Channel is still running so return!\n");
799 return 0;
800 }
801
802 dev->_channel_upstream_select = channel_select;
803 sram_ch = &dev->sram_channels[channel_select];
804
805 INIT_WORK(&dev->_irq_work_entry, cx25821_vidups_handler);
806 dev->_irq_queues = create_singlethread_workqueue("cx25821_workqueue");
807
808 if (!dev->_irq_queues) {
809 printk
810 (KERN_ERR "cx25821: create_singlethread_workqueue() for Video FAILED!\n");
811 return -ENOMEM;
812 }
813 /* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for
814 * channel A-C
815 */
816 tmp = cx_read(VID_CH_MODE_SEL);
817 cx_write(VID_CH_MODE_SEL, tmp | 0x1B0001FF);
818
819 dev->_is_running = 0;
820 dev->_frame_count = 0;
821 dev->_file_status = RESET_STATUS;
822 dev->_lines_count = dev->_isNTSC ? 480 : 576;
823 dev->_pixel_format = pixel_format;
824 dev->_line_size =
825 (dev->_pixel_format ==
826 PIXEL_FRMT_422) ? (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
827 data_frame_size = dev->_isNTSC ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ;
828 risc_buffer_size =
829 dev->_isNTSC ? NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE;
830
831 if (dev->input_filename) {
832 str_length = strlen(dev->input_filename);
833 dev->_filename = kmalloc(str_length + 1, GFP_KERNEL);
834
835 if (!dev->_filename)
836 goto error;
837
838 memcpy(dev->_filename, dev->input_filename, str_length + 1);
839 } else {
840 str_length = strlen(dev->_defaultname);
841 dev->_filename = kmalloc(str_length + 1, GFP_KERNEL);
842
843 if (!dev->_filename)
844 goto error;
845
846 memcpy(dev->_filename, dev->_defaultname, str_length + 1);
847 }
848
849 /* Default if filename is empty string */
850 if (strcmp(dev->input_filename, "") == 0) {
851 if (dev->_isNTSC) {
852 dev->_filename =
853 (dev->_pixel_format ==
854 PIXEL_FRMT_411) ? "/root/vid411.yuv" :
855 "/root/vidtest.yuv";
856 } else {
857 dev->_filename =
858 (dev->_pixel_format ==
859 PIXEL_FRMT_411) ? "/root/pal411.yuv" :
860 "/root/pal422.yuv";
861 }
862 }
863
864 dev->_is_running = 0;
865 dev->_frame_count = 0;
866 dev->_file_status = RESET_STATUS;
867 dev->_lines_count = dev->_isNTSC ? 480 : 576;
868 dev->_pixel_format = pixel_format;
869 dev->_line_size =
870 (dev->_pixel_format ==
871 PIXEL_FRMT_422) ? (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
872
873 retval =
874 cx25821_sram_channel_setup_upstream(dev, sram_ch, dev->_line_size,
875 0);
876
877 /* setup fifo + format */
878 cx25821_set_pixelengine(dev, sram_ch, dev->_pixel_format);
879
880 dev->upstream_riscbuf_size = risc_buffer_size * 2;
881 dev->upstream_databuf_size = data_frame_size * 2;
882
883 /* Allocating buffers and prepare RISC program */
884 retval = cx25821_upstream_buffer_prepare(dev, sram_ch, dev->_line_size);
885 if (retval < 0) {
886 printk(KERN_ERR
887 "%s: Failed to set up Video upstream buffers!\n",
888 dev->name);
889 goto error;
890 }
891
892 cx25821_start_video_dma_upstream(dev, sram_ch);
893
894 return 0;
895
896 error:
897 cx25821_dev_unregister(dev);
898
899 return err;
900 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree