arch/mips/rb532/devices.c

   1 /*
   2  *  RouterBoard 500 Platform devices
   3  *
   4  *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
   5  *  Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License as published by
   9  *  the Free Software Foundation; either version 2 of the License, or
  10  *  (at your option) any later version.
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  *  GNU General Public License for more details.
  16  */
  17 #include <linux/kernel.h>
  18 #include <linux/init.h>
  19 #include <linux/ctype.h>
  20 #include <linux/string.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mtd/nand.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/partitions.h>
  25 #include <linux/gpio_keys.h>
  26 #include <linux/input.h>
  27 #include <linux/serial_8250.h>
  28
  29 #include <asm/bootinfo.h>
  30
  31 #include <asm/mach-rc32434/rc32434.h>
  32 #include <asm/mach-rc32434/dma.h>
  33 #include <asm/mach-rc32434/dma_v.h>
  34 #include <asm/mach-rc32434/eth.h>
  35 #include <asm/mach-rc32434/rb.h>
  36 #include <asm/mach-rc32434/integ.h>
  37 #include <asm/mach-rc32434/gpio.h>
  38 #include <asm/mach-rc32434/irq.h>
  39
  40 #define ETH0_RX_DMA_ADDR  (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
  41 #define ETH0_TX_DMA_ADDR  (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
  42
  43 extern unsigned int idt_cpu_freq;
  44
  45 static struct resource korina_dev0_res[] = {
  46         {
  47                 .name = "korina_regs",
  48                 .start = ETH0_BASE_ADDR,
  49                 .end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
  50                 .flags = IORESOURCE_MEM,
  51          }, {
  52                 .name = "korina_rx",
  53                 .start = ETH0_DMA_RX_IRQ,
  54                 .end = ETH0_DMA_RX_IRQ,
  55                 .flags = IORESOURCE_IRQ
  56         }, {
  57                 .name = "korina_tx",
  58                 .start = ETH0_DMA_TX_IRQ,
  59                 .end = ETH0_DMA_TX_IRQ,
  60                 .flags = IORESOURCE_IRQ
  61         }, {
  62                 .name = "korina_ovr",
  63                 .start = ETH0_RX_OVR_IRQ,
  64                 .end = ETH0_RX_OVR_IRQ,
  65                 .flags = IORESOURCE_IRQ
  66         }, {
  67                 .name = "korina_und",
  68                 .start = ETH0_TX_UND_IRQ,
  69                 .end = ETH0_TX_UND_IRQ,
  70                 .flags = IORESOURCE_IRQ
  71         }, {
  72                 .name = "korina_dma_rx",
  73                 .start = ETH0_RX_DMA_ADDR,
  74                 .end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
  75                 .flags = IORESOURCE_MEM,
  76          }, {
  77                 .name = "korina_dma_tx",
  78                 .start = ETH0_TX_DMA_ADDR,
  79                 .end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
  80                 .flags = IORESOURCE_MEM,
  81          }
  82 };
  83
  84 static struct korina_device korina_dev0_data = {
  85         .name = "korina0",
  86         .mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
  87 };
  88
  89 static struct platform_device korina_dev0 = {
  90         .id = -1,
  91         .name = "korina",
  92         .dev.platform_data = &korina_dev0_data,
  93         .resource = korina_dev0_res,
  94         .num_resources = ARRAY_SIZE(korina_dev0_res),
  95 };
  96
  97 static struct resource cf_slot0_res[] = {
  98         {
  99                 .name = "cf_membase",
 100                 .flags = IORESOURCE_MEM
 101         }, {
 102                 .name = "cf_irq",
 103                 .start = (8 + 4 * 32 + CF_GPIO_NUM),    /* 149 */
 104                 .end = (8 + 4 * 32 + CF_GPIO_NUM),
 105                 .flags = IORESOURCE_IRQ
 106         }
 107 };
 108
 109 static struct cf_device cf_slot0_data = {
 110         .gpio_pin = CF_GPIO_NUM
 111 };
 112
 113 static struct platform_device cf_slot0 = {
 114         .id = -1,
 115         .name = "pata-rb532-cf",
 116         .dev.platform_data = &cf_slot0_data,
 117         .resource = cf_slot0_res,
 118         .num_resources = ARRAY_SIZE(cf_slot0_res),
 119 };
 120
 121 /* Resources and device for NAND */
 122 static int rb532_dev_ready(struct mtd_info *mtd)
 123 {
 124         return gpio_get_value(GPIO_RDY);
 125 }
 126
 127 static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 128 {
 129         struct nand_chip *chip = mtd->priv;
 130         unsigned char orbits, nandbits;
 131
 132         if (ctrl & NAND_CTRL_CHANGE) {
 133                 orbits = (ctrl & NAND_CLE) << 1;
 134                 orbits |= (ctrl & NAND_ALE) >> 1;
 135
 136                 nandbits = (~ctrl & NAND_CLE) << 1;
 137                 nandbits |= (~ctrl & NAND_ALE) >> 1;
 138
 139                 set_latch_u5(orbits, nandbits);
 140         }
 141         if (cmd != NAND_CMD_NONE)
 142                 writeb(cmd, chip->IO_ADDR_W);
 143 }
 144
 145 static struct resource nand_slot0_res[] = {
 146         [0] = {
 147                 .name = "nand_membase",
 148                 .flags = IORESOURCE_MEM
 149         }
 150 };
 151
 152 static struct platform_nand_data rb532_nand_data = {
 153         .ctrl.dev_ready = rb532_dev_ready,
 154         .ctrl.cmd_ctrl  = rb532_cmd_ctrl,
 155 };
 156
 157 static struct platform_device nand_slot0 = {
 158         .name = "gen_nand",
 159         .id = -1,
 160         .resource = nand_slot0_res,
 161         .num_resources = ARRAY_SIZE(nand_slot0_res),
 162         .dev.platform_data = &rb532_nand_data,
 163 };
 164
 165 static struct mtd_partition rb532_partition_info[] = {
 166         {
 167                 .name = "Routerboard NAND boot",
 168                 .offset = 0,
 169                 .size = 4 * 1024 * 1024,
 170         }, {
 171                 .name = "rootfs",
 172                 .offset = MTDPART_OFS_NXTBLK,
 173                 .size = MTDPART_SIZ_FULL,
 174         }
 175 };
 176
 177 static struct platform_device rb532_led = {
 178         .name = "rb532-led",
 179         .id = -1,
 180 };
 181
 182 static struct gpio_keys_button rb532_gpio_btn[] = {
 183         {
 184                 .gpio = 1,
 185                 .code = BTN_0,
 186                 .desc = "S1",
 187                 .active_low = 1,
 188         }
 189 };
 190
 191 static struct gpio_keys_platform_data rb532_gpio_btn_data = {
 192         .buttons = rb532_gpio_btn,
 193         .nbuttons = ARRAY_SIZE(rb532_gpio_btn),
 194 };
 195
 196 static struct platform_device rb532_button = {
 197         .name   = "gpio-keys",
 198         .id     = -1,
 199         .dev    = {
 200                 .platform_data = &rb532_gpio_btn_data,
 201         }
 202 };
 203
 204 static struct resource rb532_wdt_res[] = {
 205         {
 206                 .name = "rb532_wdt_res",
 207                 .start = INTEG0_BASE_ADDR,
 208                 .end = INTEG0_BASE_ADDR + sizeof(struct integ),
 209                 .flags = IORESOURCE_MEM,
 210         }
 211 };
 212
 213 static struct platform_device rb532_wdt = {
 214         .name           = "rc32434_wdt",
 215         .id             = -1,
 216         .resource       = rb532_wdt_res,
 217         .num_resources  = ARRAY_SIZE(rb532_wdt_res),
 218 };
 219
 220 static struct plat_serial8250_port rb532_uart_res[] = {
 221         {
 222                 .membase        = (char *)KSEG1ADDR(REGBASE + UART0BASE),
 223                 .irq            = UART0_IRQ,
 224                 .regshift       = 2,
 225                 .iotype         = UPIO_MEM,
 226                 .flags          = UPF_BOOT_AUTOCONF,
 227         },
 228         {
 229                 .flags          = 0,
 230         }
 231 };
 232
 233 static struct platform_device rb532_uart = {
 234         .name              = "serial8250",
 235         .id                = PLAT8250_DEV_PLATFORM,
 236         .dev.platform_data = &rb532_uart_res,
 237 };
 238
 239 static struct platform_device *rb532_devs[] = {
 240         &korina_dev0,
 241         &nand_slot0,
 242         &cf_slot0,
 243         &rb532_led,
 244         &rb532_button,
 245         &rb532_uart,
 246         &rb532_wdt
 247 };
 248
 249 static void __init parse_mac_addr(char *macstr)
 250 {
 251         int i, j;
 252         unsigned char result, value;
 253
 254         for (i = 0; i < 6; i++) {
 255                 result = 0;
 256
 257                 if (i != 5 && *(macstr + 2) != ':')
 258                         return;
 259
 260                 for (j = 0; j < 2; j++) {
 261                         if (isxdigit(*macstr)
 262                             && (value =
 263                                 isdigit(*macstr) ? *macstr -
 264                                 '0' : toupper(*macstr) - 'A' + 10) < 16) {
 265                                 result = result * 16 + value;
 266                                 macstr++;
 267                         } else
 268                                 return;
 269                 }
 270
 271                 macstr++;
 272                 korina_dev0_data.mac[i] = result;
 273         }
 274 }
 275
 276
 277 /* NAND definitions */
 278 #define NAND_CHIP_DELAY 25
 279
 280 static void __init rb532_nand_setup(void)
 281 {
 282         switch (mips_machtype) {
 283         case MACH_MIKROTIK_RB532A:
 284                 set_latch_u5(LO_FOFF | LO_CEX,
 285                                 LO_ULED | LO_ALE | LO_CLE | LO_WPX);
 286                 break;
 287         default:
 288                 set_latch_u5(LO_WPX | LO_FOFF | LO_CEX,
 289                                 LO_ULED | LO_ALE | LO_CLE);
 290                 break;
 291         }
 292
 293         /* Setup NAND specific settings */
 294         rb532_nand_data.chip.nr_chips = 1;
 295         rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
 296         rb532_nand_data.chip.partitions = rb532_partition_info;
 297         rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
 298         rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
 299 }
 300
 301
 302 static int __init plat_setup_devices(void)
 303 {
 304         /* Look for the CF card reader */
 305         if (!readl(IDT434_REG_BASE + DEV1MASK))
 306                 rb532_devs[2] = NULL;   /* disable cf_slot0 at index 2 */
 307         else {
 308                 cf_slot0_res[0].start =
 309                     readl(IDT434_REG_BASE + DEV1BASE);
 310                 cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
 311         }
 312
 313         /* Read the NAND resources from the device controller */
 314         nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
 315         nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
 316
 317         /* Initialise the NAND device */
 318         rb532_nand_setup();
 319
 320         /* set the uart clock to the current cpu frequency */
 321         rb532_uart_res[0].uartclk = idt_cpu_freq;
 322
 323         return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
 324 }
 325
 326 static int __init setup_kmac(char *s)
 327 {
 328         printk(KERN_INFO "korina mac = %s\n", s);
 329         parse_mac_addr(s);
 330         return 0;
 331 }
 332
 333 __setup("kmac=", setup_kmac);
 334
 335 arch_initcall(plat_setup_devices);