ARM: 5687/1: fix an oops with highmem
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / dma / dmatest.c
blobd93017fc7872d1f0fe3904ff85870ff8aee1156a
1 /*
2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/delay.h>
11 #include <linux/dmaengine.h>
12 #include <linux/init.h>
13 #include <linux/kthread.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/random.h>
17 #include <linux/wait.h>
19 static unsigned int test_buf_size = 16384;
20 module_param(test_buf_size, uint, S_IRUGO);
21 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
23 static char test_channel[20];
24 module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
25 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
27 static char test_device[20];
28 module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
29 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
31 static unsigned int threads_per_chan = 1;
32 module_param(threads_per_chan, uint, S_IRUGO);
33 MODULE_PARM_DESC(threads_per_chan,
34 "Number of threads to start per channel (default: 1)");
36 static unsigned int max_channels;
37 module_param(max_channels, uint, S_IRUGO);
38 MODULE_PARM_DESC(max_channels,
39 "Maximum number of channels to use (default: all)");
41 static unsigned int iterations;
42 module_param(iterations, uint, S_IRUGO);
43 MODULE_PARM_DESC(iterations,
44 "Iterations before stopping test (default: infinite)");
46 static unsigned int xor_sources = 3;
47 module_param(xor_sources, uint, S_IRUGO);
48 MODULE_PARM_DESC(xor_sources,
49 "Number of xor source buffers (default: 3)");
52 * Initialization patterns. All bytes in the source buffer has bit 7
53 * set, all bytes in the destination buffer has bit 7 cleared.
55 * Bit 6 is set for all bytes which are to be copied by the DMA
56 * engine. Bit 5 is set for all bytes which are to be overwritten by
57 * the DMA engine.
59 * The remaining bits are the inverse of a counter which increments by
60 * one for each byte address.
62 #define PATTERN_SRC 0x80
63 #define PATTERN_DST 0x00
64 #define PATTERN_COPY 0x40
65 #define PATTERN_OVERWRITE 0x20
66 #define PATTERN_COUNT_MASK 0x1f
68 struct dmatest_thread {
69 struct list_head node;
70 struct task_struct *task;
71 struct dma_chan *chan;
72 u8 **srcs;
73 u8 **dsts;
74 enum dma_transaction_type type;
77 struct dmatest_chan {
78 struct list_head node;
79 struct dma_chan *chan;
80 struct list_head threads;
84 * These are protected by dma_list_mutex since they're only used by
85 * the DMA filter function callback
87 static LIST_HEAD(dmatest_channels);
88 static unsigned int nr_channels;
90 static bool dmatest_match_channel(struct dma_chan *chan)
92 if (test_channel[0] == '\0')
93 return true;
94 return strcmp(dma_chan_name(chan), test_channel) == 0;
97 static bool dmatest_match_device(struct dma_device *device)
99 if (test_device[0] == '\0')
100 return true;
101 return strcmp(dev_name(device->dev), test_device) == 0;
104 static unsigned long dmatest_random(void)
106 unsigned long buf;
108 get_random_bytes(&buf, sizeof(buf));
109 return buf;
112 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
114 unsigned int i;
115 u8 *buf;
117 for (; (buf = *bufs); bufs++) {
118 for (i = 0; i < start; i++)
119 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
120 for ( ; i < start + len; i++)
121 buf[i] = PATTERN_SRC | PATTERN_COPY
122 | (~i & PATTERN_COUNT_MASK);
123 for ( ; i < test_buf_size; i++)
124 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
125 buf++;
129 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
131 unsigned int i;
132 u8 *buf;
134 for (; (buf = *bufs); bufs++) {
135 for (i = 0; i < start; i++)
136 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
137 for ( ; i < start + len; i++)
138 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
139 | (~i & PATTERN_COUNT_MASK);
140 for ( ; i < test_buf_size; i++)
141 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
145 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
146 unsigned int counter, bool is_srcbuf)
148 u8 diff = actual ^ pattern;
149 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
150 const char *thread_name = current->comm;
152 if (is_srcbuf)
153 pr_warning("%s: srcbuf[0x%x] overwritten!"
154 " Expected %02x, got %02x\n",
155 thread_name, index, expected, actual);
156 else if ((pattern & PATTERN_COPY)
157 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
158 pr_warning("%s: dstbuf[0x%x] not copied!"
159 " Expected %02x, got %02x\n",
160 thread_name, index, expected, actual);
161 else if (diff & PATTERN_SRC)
162 pr_warning("%s: dstbuf[0x%x] was copied!"
163 " Expected %02x, got %02x\n",
164 thread_name, index, expected, actual);
165 else
166 pr_warning("%s: dstbuf[0x%x] mismatch!"
167 " Expected %02x, got %02x\n",
168 thread_name, index, expected, actual);
171 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
172 unsigned int end, unsigned int counter, u8 pattern,
173 bool is_srcbuf)
175 unsigned int i;
176 unsigned int error_count = 0;
177 u8 actual;
178 u8 expected;
179 u8 *buf;
180 unsigned int counter_orig = counter;
182 for (; (buf = *bufs); bufs++) {
183 counter = counter_orig;
184 for (i = start; i < end; i++) {
185 actual = buf[i];
186 expected = pattern | (~counter & PATTERN_COUNT_MASK);
187 if (actual != expected) {
188 if (error_count < 32)
189 dmatest_mismatch(actual, pattern, i,
190 counter, is_srcbuf);
191 error_count++;
193 counter++;
197 if (error_count > 32)
198 pr_warning("%s: %u errors suppressed\n",
199 current->comm, error_count - 32);
201 return error_count;
204 static void dmatest_callback(void *completion)
206 complete(completion);
210 * This function repeatedly tests DMA transfers of various lengths and
211 * offsets for a given operation type until it is told to exit by
212 * kthread_stop(). There may be multiple threads running this function
213 * in parallel for a single channel, and there may be multiple channels
214 * being tested in parallel.
216 * Before each test, the source and destination buffer is initialized
217 * with a known pattern. This pattern is different depending on
218 * whether it's in an area which is supposed to be copied or
219 * overwritten, and different in the source and destination buffers.
220 * So if the DMA engine doesn't copy exactly what we tell it to copy,
221 * we'll notice.
223 static int dmatest_func(void *data)
225 struct dmatest_thread *thread = data;
226 struct dma_chan *chan;
227 const char *thread_name;
228 unsigned int src_off, dst_off, len;
229 unsigned int error_count;
230 unsigned int failed_tests = 0;
231 unsigned int total_tests = 0;
232 dma_cookie_t cookie;
233 enum dma_status status;
234 enum dma_ctrl_flags flags;
235 int ret;
236 int src_cnt;
237 int dst_cnt;
238 int i;
240 thread_name = current->comm;
242 ret = -ENOMEM;
244 smp_rmb();
245 chan = thread->chan;
246 if (thread->type == DMA_MEMCPY)
247 src_cnt = dst_cnt = 1;
248 else if (thread->type == DMA_XOR) {
249 src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
250 dst_cnt = 1;
251 } else
252 goto err_srcs;
254 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
255 if (!thread->srcs)
256 goto err_srcs;
257 for (i = 0; i < src_cnt; i++) {
258 thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
259 if (!thread->srcs[i])
260 goto err_srcbuf;
262 thread->srcs[i] = NULL;
264 thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
265 if (!thread->dsts)
266 goto err_dsts;
267 for (i = 0; i < dst_cnt; i++) {
268 thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
269 if (!thread->dsts[i])
270 goto err_dstbuf;
272 thread->dsts[i] = NULL;
274 set_user_nice(current, 10);
276 flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
278 while (!kthread_should_stop()
279 && !(iterations && total_tests >= iterations)) {
280 struct dma_device *dev = chan->device;
281 struct dma_async_tx_descriptor *tx = NULL;
282 dma_addr_t dma_srcs[src_cnt];
283 dma_addr_t dma_dsts[dst_cnt];
284 struct completion cmp;
285 unsigned long tmo = msecs_to_jiffies(3000);
287 total_tests++;
289 len = dmatest_random() % test_buf_size + 1;
290 src_off = dmatest_random() % (test_buf_size - len + 1);
291 dst_off = dmatest_random() % (test_buf_size - len + 1);
293 dmatest_init_srcs(thread->srcs, src_off, len);
294 dmatest_init_dsts(thread->dsts, dst_off, len);
296 for (i = 0; i < src_cnt; i++) {
297 u8 *buf = thread->srcs[i] + src_off;
299 dma_srcs[i] = dma_map_single(dev->dev, buf, len,
300 DMA_TO_DEVICE);
302 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
303 for (i = 0; i < dst_cnt; i++) {
304 dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
305 test_buf_size,
306 DMA_BIDIRECTIONAL);
309 if (thread->type == DMA_MEMCPY)
310 tx = dev->device_prep_dma_memcpy(chan,
311 dma_dsts[0] + dst_off,
312 dma_srcs[0], len,
313 flags);
314 else if (thread->type == DMA_XOR)
315 tx = dev->device_prep_dma_xor(chan,
316 dma_dsts[0] + dst_off,
317 dma_srcs, xor_sources,
318 len, flags);
320 if (!tx) {
321 for (i = 0; i < src_cnt; i++)
322 dma_unmap_single(dev->dev, dma_srcs[i], len,
323 DMA_TO_DEVICE);
324 for (i = 0; i < dst_cnt; i++)
325 dma_unmap_single(dev->dev, dma_dsts[i],
326 test_buf_size,
327 DMA_BIDIRECTIONAL);
328 pr_warning("%s: #%u: prep error with src_off=0x%x "
329 "dst_off=0x%x len=0x%x\n",
330 thread_name, total_tests - 1,
331 src_off, dst_off, len);
332 msleep(100);
333 failed_tests++;
334 continue;
337 init_completion(&cmp);
338 tx->callback = dmatest_callback;
339 tx->callback_param = &cmp;
340 cookie = tx->tx_submit(tx);
342 if (dma_submit_error(cookie)) {
343 pr_warning("%s: #%u: submit error %d with src_off=0x%x "
344 "dst_off=0x%x len=0x%x\n",
345 thread_name, total_tests - 1, cookie,
346 src_off, dst_off, len);
347 msleep(100);
348 failed_tests++;
349 continue;
351 dma_async_issue_pending(chan);
353 tmo = wait_for_completion_timeout(&cmp, tmo);
354 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
356 if (tmo == 0) {
357 pr_warning("%s: #%u: test timed out\n",
358 thread_name, total_tests - 1);
359 failed_tests++;
360 continue;
361 } else if (status != DMA_SUCCESS) {
362 pr_warning("%s: #%u: got completion callback,"
363 " but status is \'%s\'\n",
364 thread_name, total_tests - 1,
365 status == DMA_ERROR ? "error" : "in progress");
366 failed_tests++;
367 continue;
370 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
371 for (i = 0; i < dst_cnt; i++)
372 dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
373 DMA_BIDIRECTIONAL);
375 error_count = 0;
377 pr_debug("%s: verifying source buffer...\n", thread_name);
378 error_count += dmatest_verify(thread->srcs, 0, src_off,
379 0, PATTERN_SRC, true);
380 error_count += dmatest_verify(thread->srcs, src_off,
381 src_off + len, src_off,
382 PATTERN_SRC | PATTERN_COPY, true);
383 error_count += dmatest_verify(thread->srcs, src_off + len,
384 test_buf_size, src_off + len,
385 PATTERN_SRC, true);
387 pr_debug("%s: verifying dest buffer...\n",
388 thread->task->comm);
389 error_count += dmatest_verify(thread->dsts, 0, dst_off,
390 0, PATTERN_DST, false);
391 error_count += dmatest_verify(thread->dsts, dst_off,
392 dst_off + len, src_off,
393 PATTERN_SRC | PATTERN_COPY, false);
394 error_count += dmatest_verify(thread->dsts, dst_off + len,
395 test_buf_size, dst_off + len,
396 PATTERN_DST, false);
398 if (error_count) {
399 pr_warning("%s: #%u: %u errors with "
400 "src_off=0x%x dst_off=0x%x len=0x%x\n",
401 thread_name, total_tests - 1, error_count,
402 src_off, dst_off, len);
403 failed_tests++;
404 } else {
405 pr_debug("%s: #%u: No errors with "
406 "src_off=0x%x dst_off=0x%x len=0x%x\n",
407 thread_name, total_tests - 1,
408 src_off, dst_off, len);
412 ret = 0;
413 for (i = 0; thread->dsts[i]; i++)
414 kfree(thread->dsts[i]);
415 err_dstbuf:
416 kfree(thread->dsts);
417 err_dsts:
418 for (i = 0; thread->srcs[i]; i++)
419 kfree(thread->srcs[i]);
420 err_srcbuf:
421 kfree(thread->srcs);
422 err_srcs:
423 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
424 thread_name, total_tests, failed_tests, ret);
426 if (iterations > 0)
427 while (!kthread_should_stop()) {
428 DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
429 interruptible_sleep_on(&wait_dmatest_exit);
432 return ret;
435 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
437 struct dmatest_thread *thread;
438 struct dmatest_thread *_thread;
439 int ret;
441 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
442 ret = kthread_stop(thread->task);
443 pr_debug("dmatest: thread %s exited with status %d\n",
444 thread->task->comm, ret);
445 list_del(&thread->node);
446 kfree(thread);
448 kfree(dtc);
451 static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
453 struct dmatest_thread *thread;
454 struct dma_chan *chan = dtc->chan;
455 char *op;
456 unsigned int i;
458 if (type == DMA_MEMCPY)
459 op = "copy";
460 else if (type == DMA_XOR)
461 op = "xor";
462 else
463 return -EINVAL;
465 for (i = 0; i < threads_per_chan; i++) {
466 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
467 if (!thread) {
468 pr_warning("dmatest: No memory for %s-%s%u\n",
469 dma_chan_name(chan), op, i);
471 break;
473 thread->chan = dtc->chan;
474 thread->type = type;
475 smp_wmb();
476 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
477 dma_chan_name(chan), op, i);
478 if (IS_ERR(thread->task)) {
479 pr_warning("dmatest: Failed to run thread %s-%s%u\n",
480 dma_chan_name(chan), op, i);
481 kfree(thread);
482 break;
485 /* srcbuf and dstbuf are allocated by the thread itself */
487 list_add_tail(&thread->node, &dtc->threads);
490 return i;
493 static int dmatest_add_channel(struct dma_chan *chan)
495 struct dmatest_chan *dtc;
496 struct dma_device *dma_dev = chan->device;
497 unsigned int thread_count = 0;
498 unsigned int cnt;
500 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
501 if (!dtc) {
502 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
503 return -ENOMEM;
506 dtc->chan = chan;
507 INIT_LIST_HEAD(&dtc->threads);
509 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
510 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
511 thread_count += cnt > 0 ? cnt : 0;
513 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
514 cnt = dmatest_add_threads(dtc, DMA_XOR);
515 thread_count += cnt > 0 ? cnt : 0;
518 pr_info("dmatest: Started %u threads using %s\n",
519 thread_count, dma_chan_name(chan));
521 list_add_tail(&dtc->node, &dmatest_channels);
522 nr_channels++;
524 return 0;
527 static bool filter(struct dma_chan *chan, void *param)
529 if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
530 return false;
531 else
532 return true;
535 static int __init dmatest_init(void)
537 dma_cap_mask_t mask;
538 struct dma_chan *chan;
539 int err = 0;
541 dma_cap_zero(mask);
542 dma_cap_set(DMA_MEMCPY, mask);
543 for (;;) {
544 chan = dma_request_channel(mask, filter, NULL);
545 if (chan) {
546 err = dmatest_add_channel(chan);
547 if (err) {
548 dma_release_channel(chan);
549 break; /* add_channel failed, punt */
551 } else
552 break; /* no more channels available */
553 if (max_channels && nr_channels >= max_channels)
554 break; /* we have all we need */
557 return err;
559 /* when compiled-in wait for drivers to load first */
560 late_initcall(dmatest_init);
562 static void __exit dmatest_exit(void)
564 struct dmatest_chan *dtc, *_dtc;
565 struct dma_chan *chan;
567 list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
568 list_del(&dtc->node);
569 chan = dtc->chan;
570 dmatest_cleanup_channel(dtc);
571 pr_debug("dmatest: dropped channel %s\n",
572 dma_chan_name(chan));
573 dma_release_channel(chan);
576 module_exit(dmatest_exit);
578 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
579 MODULE_LICENSE("GPL v2");