davinci: DA850/OMAP-L138: avoid using separate initcall for initializing regulator
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / dma / dmatest.c
bloba32a4cf7b1e049ab537db5c065f4f6a474dca2d2
1 /*
2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/delay.h>
11 #include <linux/dmaengine.h>
12 #include <linux/init.h>
13 #include <linux/kthread.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/random.h>
17 #include <linux/wait.h>
19 static unsigned int test_buf_size = 16384;
20 module_param(test_buf_size, uint, S_IRUGO);
21 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
23 static char test_channel[20];
24 module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
25 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
27 static char test_device[20];
28 module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
29 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
31 static unsigned int threads_per_chan = 1;
32 module_param(threads_per_chan, uint, S_IRUGO);
33 MODULE_PARM_DESC(threads_per_chan,
34 "Number of threads to start per channel (default: 1)");
36 static unsigned int max_channels;
37 module_param(max_channels, uint, S_IRUGO);
38 MODULE_PARM_DESC(max_channels,
39 "Maximum number of channels to use (default: all)");
41 static unsigned int iterations;
42 module_param(iterations, uint, S_IRUGO);
43 MODULE_PARM_DESC(iterations,
44 "Iterations before stopping test (default: infinite)");
46 static unsigned int xor_sources = 3;
47 module_param(xor_sources, uint, S_IRUGO);
48 MODULE_PARM_DESC(xor_sources,
49 "Number of xor source buffers (default: 3)");
51 static unsigned int pq_sources = 3;
52 module_param(pq_sources, uint, S_IRUGO);
53 MODULE_PARM_DESC(pq_sources,
54 "Number of p+q source buffers (default: 3)");
57 * Initialization patterns. All bytes in the source buffer has bit 7
58 * set, all bytes in the destination buffer has bit 7 cleared.
60 * Bit 6 is set for all bytes which are to be copied by the DMA
61 * engine. Bit 5 is set for all bytes which are to be overwritten by
62 * the DMA engine.
64 * The remaining bits are the inverse of a counter which increments by
65 * one for each byte address.
67 #define PATTERN_SRC 0x80
68 #define PATTERN_DST 0x00
69 #define PATTERN_COPY 0x40
70 #define PATTERN_OVERWRITE 0x20
71 #define PATTERN_COUNT_MASK 0x1f
73 struct dmatest_thread {
74 struct list_head node;
75 struct task_struct *task;
76 struct dma_chan *chan;
77 u8 **srcs;
78 u8 **dsts;
79 enum dma_transaction_type type;
82 struct dmatest_chan {
83 struct list_head node;
84 struct dma_chan *chan;
85 struct list_head threads;
89 * These are protected by dma_list_mutex since they're only used by
90 * the DMA filter function callback
92 static LIST_HEAD(dmatest_channels);
93 static unsigned int nr_channels;
95 static bool dmatest_match_channel(struct dma_chan *chan)
97 if (test_channel[0] == '\0')
98 return true;
99 return strcmp(dma_chan_name(chan), test_channel) == 0;
102 static bool dmatest_match_device(struct dma_device *device)
104 if (test_device[0] == '\0')
105 return true;
106 return strcmp(dev_name(device->dev), test_device) == 0;
109 static unsigned long dmatest_random(void)
111 unsigned long buf;
113 get_random_bytes(&buf, sizeof(buf));
114 return buf;
117 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
119 unsigned int i;
120 u8 *buf;
122 for (; (buf = *bufs); bufs++) {
123 for (i = 0; i < start; i++)
124 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
125 for ( ; i < start + len; i++)
126 buf[i] = PATTERN_SRC | PATTERN_COPY
127 | (~i & PATTERN_COUNT_MASK);
128 for ( ; i < test_buf_size; i++)
129 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
130 buf++;
134 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
136 unsigned int i;
137 u8 *buf;
139 for (; (buf = *bufs); bufs++) {
140 for (i = 0; i < start; i++)
141 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
142 for ( ; i < start + len; i++)
143 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
144 | (~i & PATTERN_COUNT_MASK);
145 for ( ; i < test_buf_size; i++)
146 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
150 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
151 unsigned int counter, bool is_srcbuf)
153 u8 diff = actual ^ pattern;
154 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
155 const char *thread_name = current->comm;
157 if (is_srcbuf)
158 pr_warning("%s: srcbuf[0x%x] overwritten!"
159 " Expected %02x, got %02x\n",
160 thread_name, index, expected, actual);
161 else if ((pattern & PATTERN_COPY)
162 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
163 pr_warning("%s: dstbuf[0x%x] not copied!"
164 " Expected %02x, got %02x\n",
165 thread_name, index, expected, actual);
166 else if (diff & PATTERN_SRC)
167 pr_warning("%s: dstbuf[0x%x] was copied!"
168 " Expected %02x, got %02x\n",
169 thread_name, index, expected, actual);
170 else
171 pr_warning("%s: dstbuf[0x%x] mismatch!"
172 " Expected %02x, got %02x\n",
173 thread_name, index, expected, actual);
176 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
177 unsigned int end, unsigned int counter, u8 pattern,
178 bool is_srcbuf)
180 unsigned int i;
181 unsigned int error_count = 0;
182 u8 actual;
183 u8 expected;
184 u8 *buf;
185 unsigned int counter_orig = counter;
187 for (; (buf = *bufs); bufs++) {
188 counter = counter_orig;
189 for (i = start; i < end; i++) {
190 actual = buf[i];
191 expected = pattern | (~counter & PATTERN_COUNT_MASK);
192 if (actual != expected) {
193 if (error_count < 32)
194 dmatest_mismatch(actual, pattern, i,
195 counter, is_srcbuf);
196 error_count++;
198 counter++;
202 if (error_count > 32)
203 pr_warning("%s: %u errors suppressed\n",
204 current->comm, error_count - 32);
206 return error_count;
209 static void dmatest_callback(void *completion)
211 complete(completion);
215 * This function repeatedly tests DMA transfers of various lengths and
216 * offsets for a given operation type until it is told to exit by
217 * kthread_stop(). There may be multiple threads running this function
218 * in parallel for a single channel, and there may be multiple channels
219 * being tested in parallel.
221 * Before each test, the source and destination buffer is initialized
222 * with a known pattern. This pattern is different depending on
223 * whether it's in an area which is supposed to be copied or
224 * overwritten, and different in the source and destination buffers.
225 * So if the DMA engine doesn't copy exactly what we tell it to copy,
226 * we'll notice.
228 static int dmatest_func(void *data)
230 struct dmatest_thread *thread = data;
231 struct dma_chan *chan;
232 const char *thread_name;
233 unsigned int src_off, dst_off, len;
234 unsigned int error_count;
235 unsigned int failed_tests = 0;
236 unsigned int total_tests = 0;
237 dma_cookie_t cookie;
238 enum dma_status status;
239 enum dma_ctrl_flags flags;
240 u8 pq_coefs[pq_sources];
241 int ret;
242 int src_cnt;
243 int dst_cnt;
244 int i;
246 thread_name = current->comm;
248 ret = -ENOMEM;
250 smp_rmb();
251 chan = thread->chan;
252 if (thread->type == DMA_MEMCPY)
253 src_cnt = dst_cnt = 1;
254 else if (thread->type == DMA_XOR) {
255 src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
256 dst_cnt = 1;
257 } else if (thread->type == DMA_PQ) {
258 src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
259 dst_cnt = 2;
260 for (i = 0; i < pq_sources; i++)
261 pq_coefs[i] = 1;
262 } else
263 goto err_srcs;
265 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
266 if (!thread->srcs)
267 goto err_srcs;
268 for (i = 0; i < src_cnt; i++) {
269 thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
270 if (!thread->srcs[i])
271 goto err_srcbuf;
273 thread->srcs[i] = NULL;
275 thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
276 if (!thread->dsts)
277 goto err_dsts;
278 for (i = 0; i < dst_cnt; i++) {
279 thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
280 if (!thread->dsts[i])
281 goto err_dstbuf;
283 thread->dsts[i] = NULL;
285 set_user_nice(current, 10);
287 flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
289 while (!kthread_should_stop()
290 && !(iterations && total_tests >= iterations)) {
291 struct dma_device *dev = chan->device;
292 struct dma_async_tx_descriptor *tx = NULL;
293 dma_addr_t dma_srcs[src_cnt];
294 dma_addr_t dma_dsts[dst_cnt];
295 struct completion cmp;
296 unsigned long tmo = msecs_to_jiffies(3000);
297 u8 align = 0;
299 total_tests++;
301 len = dmatest_random() % test_buf_size + 1;
302 src_off = dmatest_random() % (test_buf_size - len + 1);
303 dst_off = dmatest_random() % (test_buf_size - len + 1);
305 /* honor alignment restrictions */
306 if (thread->type == DMA_MEMCPY)
307 align = dev->copy_align;
308 else if (thread->type == DMA_XOR)
309 align = dev->xor_align;
310 else if (thread->type == DMA_PQ)
311 align = dev->pq_align;
313 len = (len >> align) << align;
314 src_off = (src_off >> align) << align;
315 dst_off = (dst_off >> align) << align;
317 dmatest_init_srcs(thread->srcs, src_off, len);
318 dmatest_init_dsts(thread->dsts, dst_off, len);
320 for (i = 0; i < src_cnt; i++) {
321 u8 *buf = thread->srcs[i] + src_off;
323 dma_srcs[i] = dma_map_single(dev->dev, buf, len,
324 DMA_TO_DEVICE);
326 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
327 for (i = 0; i < dst_cnt; i++) {
328 dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
329 test_buf_size,
330 DMA_BIDIRECTIONAL);
334 if (thread->type == DMA_MEMCPY)
335 tx = dev->device_prep_dma_memcpy(chan,
336 dma_dsts[0] + dst_off,
337 dma_srcs[0], len,
338 flags);
339 else if (thread->type == DMA_XOR)
340 tx = dev->device_prep_dma_xor(chan,
341 dma_dsts[0] + dst_off,
342 dma_srcs, xor_sources,
343 len, flags);
344 else if (thread->type == DMA_PQ) {
345 dma_addr_t dma_pq[dst_cnt];
347 for (i = 0; i < dst_cnt; i++)
348 dma_pq[i] = dma_dsts[i] + dst_off;
349 tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
350 pq_sources, pq_coefs,
351 len, flags);
354 if (!tx) {
355 for (i = 0; i < src_cnt; i++)
356 dma_unmap_single(dev->dev, dma_srcs[i], len,
357 DMA_TO_DEVICE);
358 for (i = 0; i < dst_cnt; i++)
359 dma_unmap_single(dev->dev, dma_dsts[i],
360 test_buf_size,
361 DMA_BIDIRECTIONAL);
362 pr_warning("%s: #%u: prep error with src_off=0x%x "
363 "dst_off=0x%x len=0x%x\n",
364 thread_name, total_tests - 1,
365 src_off, dst_off, len);
366 msleep(100);
367 failed_tests++;
368 continue;
371 init_completion(&cmp);
372 tx->callback = dmatest_callback;
373 tx->callback_param = &cmp;
374 cookie = tx->tx_submit(tx);
376 if (dma_submit_error(cookie)) {
377 pr_warning("%s: #%u: submit error %d with src_off=0x%x "
378 "dst_off=0x%x len=0x%x\n",
379 thread_name, total_tests - 1, cookie,
380 src_off, dst_off, len);
381 msleep(100);
382 failed_tests++;
383 continue;
385 dma_async_issue_pending(chan);
387 tmo = wait_for_completion_timeout(&cmp, tmo);
388 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
390 if (tmo == 0) {
391 pr_warning("%s: #%u: test timed out\n",
392 thread_name, total_tests - 1);
393 failed_tests++;
394 continue;
395 } else if (status != DMA_SUCCESS) {
396 pr_warning("%s: #%u: got completion callback,"
397 " but status is \'%s\'\n",
398 thread_name, total_tests - 1,
399 status == DMA_ERROR ? "error" : "in progress");
400 failed_tests++;
401 continue;
404 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
405 for (i = 0; i < dst_cnt; i++)
406 dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
407 DMA_BIDIRECTIONAL);
409 error_count = 0;
411 pr_debug("%s: verifying source buffer...\n", thread_name);
412 error_count += dmatest_verify(thread->srcs, 0, src_off,
413 0, PATTERN_SRC, true);
414 error_count += dmatest_verify(thread->srcs, src_off,
415 src_off + len, src_off,
416 PATTERN_SRC | PATTERN_COPY, true);
417 error_count += dmatest_verify(thread->srcs, src_off + len,
418 test_buf_size, src_off + len,
419 PATTERN_SRC, true);
421 pr_debug("%s: verifying dest buffer...\n",
422 thread->task->comm);
423 error_count += dmatest_verify(thread->dsts, 0, dst_off,
424 0, PATTERN_DST, false);
425 error_count += dmatest_verify(thread->dsts, dst_off,
426 dst_off + len, src_off,
427 PATTERN_SRC | PATTERN_COPY, false);
428 error_count += dmatest_verify(thread->dsts, dst_off + len,
429 test_buf_size, dst_off + len,
430 PATTERN_DST, false);
432 if (error_count) {
433 pr_warning("%s: #%u: %u errors with "
434 "src_off=0x%x dst_off=0x%x len=0x%x\n",
435 thread_name, total_tests - 1, error_count,
436 src_off, dst_off, len);
437 failed_tests++;
438 } else {
439 pr_debug("%s: #%u: No errors with "
440 "src_off=0x%x dst_off=0x%x len=0x%x\n",
441 thread_name, total_tests - 1,
442 src_off, dst_off, len);
446 ret = 0;
447 for (i = 0; thread->dsts[i]; i++)
448 kfree(thread->dsts[i]);
449 err_dstbuf:
450 kfree(thread->dsts);
451 err_dsts:
452 for (i = 0; thread->srcs[i]; i++)
453 kfree(thread->srcs[i]);
454 err_srcbuf:
455 kfree(thread->srcs);
456 err_srcs:
457 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
458 thread_name, total_tests, failed_tests, ret);
460 if (iterations > 0)
461 while (!kthread_should_stop()) {
462 DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
463 interruptible_sleep_on(&wait_dmatest_exit);
466 return ret;
469 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
471 struct dmatest_thread *thread;
472 struct dmatest_thread *_thread;
473 int ret;
475 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
476 ret = kthread_stop(thread->task);
477 pr_debug("dmatest: thread %s exited with status %d\n",
478 thread->task->comm, ret);
479 list_del(&thread->node);
480 kfree(thread);
482 kfree(dtc);
485 static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
487 struct dmatest_thread *thread;
488 struct dma_chan *chan = dtc->chan;
489 char *op;
490 unsigned int i;
492 if (type == DMA_MEMCPY)
493 op = "copy";
494 else if (type == DMA_XOR)
495 op = "xor";
496 else if (type == DMA_PQ)
497 op = "pq";
498 else
499 return -EINVAL;
501 for (i = 0; i < threads_per_chan; i++) {
502 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
503 if (!thread) {
504 pr_warning("dmatest: No memory for %s-%s%u\n",
505 dma_chan_name(chan), op, i);
507 break;
509 thread->chan = dtc->chan;
510 thread->type = type;
511 smp_wmb();
512 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
513 dma_chan_name(chan), op, i);
514 if (IS_ERR(thread->task)) {
515 pr_warning("dmatest: Failed to run thread %s-%s%u\n",
516 dma_chan_name(chan), op, i);
517 kfree(thread);
518 break;
521 /* srcbuf and dstbuf are allocated by the thread itself */
523 list_add_tail(&thread->node, &dtc->threads);
526 return i;
529 static int dmatest_add_channel(struct dma_chan *chan)
531 struct dmatest_chan *dtc;
532 struct dma_device *dma_dev = chan->device;
533 unsigned int thread_count = 0;
534 unsigned int cnt;
536 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
537 if (!dtc) {
538 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
539 return -ENOMEM;
542 dtc->chan = chan;
543 INIT_LIST_HEAD(&dtc->threads);
545 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
546 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
547 thread_count += cnt > 0 ? cnt : 0;
549 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
550 cnt = dmatest_add_threads(dtc, DMA_XOR);
551 thread_count += cnt > 0 ? cnt : 0;
553 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
554 cnt = dmatest_add_threads(dtc, DMA_PQ);
555 thread_count += cnt > 0 ?: 0;
558 pr_info("dmatest: Started %u threads using %s\n",
559 thread_count, dma_chan_name(chan));
561 list_add_tail(&dtc->node, &dmatest_channels);
562 nr_channels++;
564 return 0;
567 static bool filter(struct dma_chan *chan, void *param)
569 if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
570 return false;
571 else
572 return true;
575 static int __init dmatest_init(void)
577 dma_cap_mask_t mask;
578 struct dma_chan *chan;
579 int err = 0;
581 dma_cap_zero(mask);
582 dma_cap_set(DMA_MEMCPY, mask);
583 for (;;) {
584 chan = dma_request_channel(mask, filter, NULL);
585 if (chan) {
586 err = dmatest_add_channel(chan);
587 if (err) {
588 dma_release_channel(chan);
589 break; /* add_channel failed, punt */
591 } else
592 break; /* no more channels available */
593 if (max_channels && nr_channels >= max_channels)
594 break; /* we have all we need */
597 return err;
599 /* when compiled-in wait for drivers to load first */
600 late_initcall(dmatest_init);
602 static void __exit dmatest_exit(void)
604 struct dmatest_chan *dtc, *_dtc;
605 struct dma_chan *chan;
607 list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
608 list_del(&dtc->node);
609 chan = dtc->chan;
610 dmatest_cleanup_channel(dtc);
611 pr_debug("dmatest: dropped channel %s\n",
612 dma_chan_name(chan));
613 dma_release_channel(chan);
616 module_exit(dmatest_exit);
618 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
619 MODULE_LICENSE("GPL v2");