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drm/i915/sdvo: If we have an EDID confirm it matches the mode of the connection
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / i915 / intel_sdvo.c
blobd2dd90a9a10169e25df213e6ae00130b62446f26
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52
53
54 static const char *tv_format_names[] = {
55 "NTSC_M" , "NTSC_J" , "NTSC_443",
56 "PAL_B" , "PAL_D" , "PAL_G" ,
57 "PAL_H" , "PAL_I" , "PAL_M" ,
58 "PAL_N" , "PAL_NC" , "PAL_60" ,
59 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
60 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
61 "SECAM_60"
62 };
63
64 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
65
66 struct intel_sdvo {
67 struct intel_encoder base;
68
69 struct i2c_adapter *i2c;
70 u8 slave_addr;
71
72 struct i2c_adapter ddc;
73
74 /* Register for the SDVO device: SDVOB or SDVOC */
75 int sdvo_reg;
76
77 /* Active outputs controlled by this SDVO output */
78 uint16_t controlled_output;
79
80 /*
81 * Capabilities of the SDVO device returned by
82 * i830_sdvo_get_capabilities()
83 */
84 struct intel_sdvo_caps caps;
85
86 /* Pixel clock limitations reported by the SDVO device, in kHz */
87 int pixel_clock_min, pixel_clock_max;
88
89 /*
90 * For multiple function SDVO device,
91 * this is for current attached outputs.
92 */
93 uint16_t attached_output;
94
95 /**
96 * This is set if we're going to treat the device as TV-out.
97 *
98 * While we have these nice friendly flags for output types that ought
99 * to decide this for us, the S-Video output on our HDMI+S-Video card
100 * shows up as RGB1 (VGA).
101 */
102 bool is_tv;
103
104 /* This is for current tv format name */
105 int tv_format_index;
106
107 /**
108 * This is set if we treat the device as HDMI, instead of DVI.
109 */
110 bool is_hdmi;
111 bool has_hdmi_monitor;
112 bool has_hdmi_audio;
113
114 /**
115 * This is set if we detect output of sdvo device as LVDS and
116 * have a valid fixed mode to use with the panel.
117 */
118 bool is_lvds;
119
120 /**
121 * This is sdvo fixed pannel mode pointer
122 */
123 struct drm_display_mode *sdvo_lvds_fixed_mode;
124
125 /* DDC bus used by this SDVO encoder */
126 uint8_t ddc_bus;
127
128 /* Input timings for adjusted_mode */
129 struct intel_sdvo_dtd input_dtd;
130 };
131
132 struct intel_sdvo_connector {
133 struct intel_connector base;
134
135 /* Mark the type of connector */
136 uint16_t output_flag;
137
138 int force_audio;
139
140 /* This contains all current supported TV format */
141 u8 tv_format_supported[TV_FORMAT_NUM];
142 int format_supported_num;
143 struct drm_property *tv_format;
144
145 struct drm_property *force_audio_property;
146
147 /* add the property for the SDVO-TV */
148 struct drm_property *left;
149 struct drm_property *right;
150 struct drm_property *top;
151 struct drm_property *bottom;
152 struct drm_property *hpos;
153 struct drm_property *vpos;
154 struct drm_property *contrast;
155 struct drm_property *saturation;
156 struct drm_property *hue;
157 struct drm_property *sharpness;
158 struct drm_property *flicker_filter;
159 struct drm_property *flicker_filter_adaptive;
160 struct drm_property *flicker_filter_2d;
161 struct drm_property *tv_chroma_filter;
162 struct drm_property *tv_luma_filter;
163 struct drm_property *dot_crawl;
164
165 /* add the property for the SDVO-TV/LVDS */
166 struct drm_property *brightness;
167
168 /* Add variable to record current setting for the above property */
169 u32 left_margin, right_margin, top_margin, bottom_margin;
170
171 /* this is to get the range of margin.*/
172 u32 max_hscan, max_vscan;
173 u32 max_hpos, cur_hpos;
174 u32 max_vpos, cur_vpos;
175 u32 cur_brightness, max_brightness;
176 u32 cur_contrast, max_contrast;
177 u32 cur_saturation, max_saturation;
178 u32 cur_hue, max_hue;
179 u32 cur_sharpness, max_sharpness;
180 u32 cur_flicker_filter, max_flicker_filter;
181 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
182 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
183 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
184 u32 cur_tv_luma_filter, max_tv_luma_filter;
185 u32 cur_dot_crawl, max_dot_crawl;
186 };
187
188 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
189 {
190 return container_of(encoder, struct intel_sdvo, base.base);
191 }
192
193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194 {
195 return container_of(intel_attached_encoder(connector),
196 struct intel_sdvo, base);
197 }
198
199 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
200 {
201 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
202 }
203
204 static bool
205 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
206 static bool
207 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
208 struct intel_sdvo_connector *intel_sdvo_connector,
209 int type);
210 static bool
211 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
212 struct intel_sdvo_connector *intel_sdvo_connector);
213
214 /**
215 * Writes the SDVOB or SDVOC with the given value, but always writes both
216 * SDVOB and SDVOC to work around apparent hardware issues (according to
217 * comments in the BIOS).
218 */
219 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
220 {
221 struct drm_device *dev = intel_sdvo->base.base.dev;
222 struct drm_i915_private *dev_priv = dev->dev_private;
223 u32 bval = val, cval = val;
224 int i;
225
226 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
227 I915_WRITE(intel_sdvo->sdvo_reg, val);
228 I915_READ(intel_sdvo->sdvo_reg);
229 return;
230 }
231
232 if (intel_sdvo->sdvo_reg == SDVOB) {
233 cval = I915_READ(SDVOC);
234 } else {
235 bval = I915_READ(SDVOB);
236 }
237 /*
238 * Write the registers twice for luck. Sometimes,
239 * writing them only once doesn't appear to 'stick'.
240 * The BIOS does this too. Yay, magic
241 */
242 for (i = 0; i < 2; i++)
243 {
244 I915_WRITE(SDVOB, bval);
245 I915_READ(SDVOB);
246 I915_WRITE(SDVOC, cval);
247 I915_READ(SDVOC);
248 }
249 }
250
251 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
252 {
253 struct i2c_msg msgs[] = {
254 {
255 .addr = intel_sdvo->slave_addr,
256 .flags = 0,
257 .len = 1,
258 .buf = &addr,
259 },
260 {
261 .addr = intel_sdvo->slave_addr,
262 .flags = I2C_M_RD,
263 .len = 1,
264 .buf = ch,
265 }
266 };
267 int ret;
268
269 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
270 return true;
271
272 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
273 return false;
274 }
275
276 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
277 /** Mapping of command numbers to names, for debug output */
278 static const struct _sdvo_cmd_name {
279 u8 cmd;
280 const char *name;
281 } sdvo_cmd_names[] = {
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
325
326 /* Add the op code for SDVO enhancements */
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
371
372 /* HDMI op code */
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
393 };
394
395 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
396 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
397
398 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
399 const void *args, int args_len)
400 {
401 int i;
402
403 DRM_DEBUG_KMS("%s: W: %02X ",
404 SDVO_NAME(intel_sdvo), cmd);
405 for (i = 0; i < args_len; i++)
406 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
407 for (; i < 8; i++)
408 DRM_LOG_KMS(" ");
409 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
410 if (cmd == sdvo_cmd_names[i].cmd) {
411 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
412 break;
413 }
414 }
415 if (i == ARRAY_SIZE(sdvo_cmd_names))
416 DRM_LOG_KMS("(%02X)", cmd);
417 DRM_LOG_KMS("\n");
418 }
419
420 static const char *cmd_status_names[] = {
421 "Power on",
422 "Success",
423 "Not supported",
424 "Invalid arg",
425 "Pending",
426 "Target not specified",
427 "Scaling not supported"
428 };
429
430 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
431 const void *args, int args_len)
432 {
433 u8 buf[args_len*2 + 2], status;
434 struct i2c_msg msgs[args_len + 3];
435 int i, ret;
436
437 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
438
439 for (i = 0; i < args_len; i++) {
440 msgs[i].addr = intel_sdvo->slave_addr;
441 msgs[i].flags = 0;
442 msgs[i].len = 2;
443 msgs[i].buf = buf + 2 *i;
444 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
445 buf[2*i + 1] = ((u8*)args)[i];
446 }
447 msgs[i].addr = intel_sdvo->slave_addr;
448 msgs[i].flags = 0;
449 msgs[i].len = 2;
450 msgs[i].buf = buf + 2*i;
451 buf[2*i + 0] = SDVO_I2C_OPCODE;
452 buf[2*i + 1] = cmd;
453
454 /* the following two are to read the response */
455 status = SDVO_I2C_CMD_STATUS;
456 msgs[i+1].addr = intel_sdvo->slave_addr;
457 msgs[i+1].flags = 0;
458 msgs[i+1].len = 1;
459 msgs[i+1].buf = &status;
460
461 msgs[i+2].addr = intel_sdvo->slave_addr;
462 msgs[i+2].flags = I2C_M_RD;
463 msgs[i+2].len = 1;
464 msgs[i+2].buf = &status;
465
466 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
467 if (ret < 0) {
468 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
469 return false;
470 }
471 if (ret != i+3) {
472 /* failure in I2C transfer */
473 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
474 return false;
475 }
476
477 return true;
478 }
479
480 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
481 void *response, int response_len)
482 {
483 u8 retry = 5;
484 u8 status;
485 int i;
486
487 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
488
489 /*
490 * The documentation states that all commands will be
491 * processed within 15µs, and that we need only poll
492 * the status byte a maximum of 3 times in order for the
493 * command to be complete.
494 *
495 * Check 5 times in case the hardware failed to read the docs.
496 */
497 if (!intel_sdvo_read_byte(intel_sdvo,
498 SDVO_I2C_CMD_STATUS,
499 &status))
500 goto log_fail;
501
502 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
503 udelay(15);
504 if (!intel_sdvo_read_byte(intel_sdvo,
505 SDVO_I2C_CMD_STATUS,
506 &status))
507 goto log_fail;
508 }
509
510 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
511 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
512 else
513 DRM_LOG_KMS("(??? %d)", status);
514
515 if (status != SDVO_CMD_STATUS_SUCCESS)
516 goto log_fail;
517
518 /* Read the command response */
519 for (i = 0; i < response_len; i++) {
520 if (!intel_sdvo_read_byte(intel_sdvo,
521 SDVO_I2C_RETURN_0 + i,
522 &((u8 *)response)[i]))
523 goto log_fail;
524 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
525 }
526 DRM_LOG_KMS("\n");
527 return true;
528
529 log_fail:
530 DRM_LOG_KMS("... failed\n");
531 return false;
532 }
533
534 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
535 {
536 if (mode->clock >= 100000)
537 return 1;
538 else if (mode->clock >= 50000)
539 return 2;
540 else
541 return 4;
542 }
543
544 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
545 u8 ddc_bus)
546 {
547 /* This must be the immediately preceding write before the i2c xfer */
548 return intel_sdvo_write_cmd(intel_sdvo,
549 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
550 &ddc_bus, 1);
551 }
552
553 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
554 {
555 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
556 return false;
557
558 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
559 }
560
561 static bool
562 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
563 {
564 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
565 return false;
566
567 return intel_sdvo_read_response(intel_sdvo, value, len);
568 }
569
570 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
571 {
572 struct intel_sdvo_set_target_input_args targets = {0};
573 return intel_sdvo_set_value(intel_sdvo,
574 SDVO_CMD_SET_TARGET_INPUT,
575 &targets, sizeof(targets));
576 }
577
578 /**
579 * Return whether each input is trained.
580 *
581 * This function is making an assumption about the layout of the response,
582 * which should be checked against the docs.
583 */
584 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
585 {
586 struct intel_sdvo_get_trained_inputs_response response;
587
588 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
589 &response, sizeof(response)))
590 return false;
591
592 *input_1 = response.input0_trained;
593 *input_2 = response.input1_trained;
594 return true;
595 }
596
597 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
598 u16 outputs)
599 {
600 return intel_sdvo_set_value(intel_sdvo,
601 SDVO_CMD_SET_ACTIVE_OUTPUTS,
602 &outputs, sizeof(outputs));
603 }
604
605 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
606 int mode)
607 {
608 u8 state = SDVO_ENCODER_STATE_ON;
609
610 switch (mode) {
611 case DRM_MODE_DPMS_ON:
612 state = SDVO_ENCODER_STATE_ON;
613 break;
614 case DRM_MODE_DPMS_STANDBY:
615 state = SDVO_ENCODER_STATE_STANDBY;
616 break;
617 case DRM_MODE_DPMS_SUSPEND:
618 state = SDVO_ENCODER_STATE_SUSPEND;
619 break;
620 case DRM_MODE_DPMS_OFF:
621 state = SDVO_ENCODER_STATE_OFF;
622 break;
623 }
624
625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
627 }
628
629 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
630 int *clock_min,
631 int *clock_max)
632 {
633 struct intel_sdvo_pixel_clock_range clocks;
634
635 if (!intel_sdvo_get_value(intel_sdvo,
636 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
637 &clocks, sizeof(clocks)))
638 return false;
639
640 /* Convert the values from units of 10 kHz to kHz. */
641 *clock_min = clocks.min * 10;
642 *clock_max = clocks.max * 10;
643 return true;
644 }
645
646 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
647 u16 outputs)
648 {
649 return intel_sdvo_set_value(intel_sdvo,
650 SDVO_CMD_SET_TARGET_OUTPUT,
651 &outputs, sizeof(outputs));
652 }
653
654 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
655 struct intel_sdvo_dtd *dtd)
656 {
657 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
658 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
659 }
660
661 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
662 struct intel_sdvo_dtd *dtd)
663 {
664 return intel_sdvo_set_timing(intel_sdvo,
665 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
666 }
667
668 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
669 struct intel_sdvo_dtd *dtd)
670 {
671 return intel_sdvo_set_timing(intel_sdvo,
672 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
673 }
674
675 static bool
676 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
677 uint16_t clock,
678 uint16_t width,
679 uint16_t height)
680 {
681 struct intel_sdvo_preferred_input_timing_args args;
682
683 memset(&args, 0, sizeof(args));
684 args.clock = clock;
685 args.width = width;
686 args.height = height;
687 args.interlace = 0;
688
689 if (intel_sdvo->is_lvds &&
690 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
691 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
692 args.scaled = 1;
693
694 return intel_sdvo_set_value(intel_sdvo,
695 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
696 &args, sizeof(args));
697 }
698
699 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
700 struct intel_sdvo_dtd *dtd)
701 {
702 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
703 &dtd->part1, sizeof(dtd->part1)) &&
704 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
705 &dtd->part2, sizeof(dtd->part2));
706 }
707
708 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
709 {
710 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
711 }
712
713 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
714 const struct drm_display_mode *mode)
715 {
716 uint16_t width, height;
717 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
718 uint16_t h_sync_offset, v_sync_offset;
719
720 width = mode->crtc_hdisplay;
721 height = mode->crtc_vdisplay;
722
723 /* do some mode translations */
724 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
725 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
726
727 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
728 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
729
730 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
731 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
732
733 dtd->part1.clock = mode->clock / 10;
734 dtd->part1.h_active = width & 0xff;
735 dtd->part1.h_blank = h_blank_len & 0xff;
736 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
737 ((h_blank_len >> 8) & 0xf);
738 dtd->part1.v_active = height & 0xff;
739 dtd->part1.v_blank = v_blank_len & 0xff;
740 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
741 ((v_blank_len >> 8) & 0xf);
742
743 dtd->part2.h_sync_off = h_sync_offset & 0xff;
744 dtd->part2.h_sync_width = h_sync_len & 0xff;
745 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
746 (v_sync_len & 0xf);
747 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
748 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
749 ((v_sync_len & 0x30) >> 4);
750
751 dtd->part2.dtd_flags = 0x18;
752 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
753 dtd->part2.dtd_flags |= 0x2;
754 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
755 dtd->part2.dtd_flags |= 0x4;
756
757 dtd->part2.sdvo_flags = 0;
758 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
759 dtd->part2.reserved = 0;
760 }
761
762 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
763 const struct intel_sdvo_dtd *dtd)
764 {
765 mode->hdisplay = dtd->part1.h_active;
766 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
767 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
768 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
769 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
770 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
771 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
772 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
773
774 mode->vdisplay = dtd->part1.v_active;
775 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
776 mode->vsync_start = mode->vdisplay;
777 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
778 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
779 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
780 mode->vsync_end = mode->vsync_start +
781 (dtd->part2.v_sync_off_width & 0xf);
782 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
783 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
784 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
785
786 mode->clock = dtd->part1.clock * 10;
787
788 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
789 if (dtd->part2.dtd_flags & 0x2)
790 mode->flags |= DRM_MODE_FLAG_PHSYNC;
791 if (dtd->part2.dtd_flags & 0x4)
792 mode->flags |= DRM_MODE_FLAG_PVSYNC;
793 }
794
795 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
796 {
797 struct intel_sdvo_encode encode;
798
799 return intel_sdvo_get_value(intel_sdvo,
800 SDVO_CMD_GET_SUPP_ENCODE,
801 &encode, sizeof(encode));
802 }
803
804 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
805 uint8_t mode)
806 {
807 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
808 }
809
810 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
811 uint8_t mode)
812 {
813 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
814 }
815
816 #if 0
817 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
818 {
819 int i, j;
820 uint8_t set_buf_index[2];
821 uint8_t av_split;
822 uint8_t buf_size;
823 uint8_t buf[48];
824 uint8_t *pos;
825
826 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
827
828 for (i = 0; i <= av_split; i++) {
829 set_buf_index[0] = i; set_buf_index[1] = 0;
830 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
831 set_buf_index, 2);
832 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
833 intel_sdvo_read_response(encoder, &buf_size, 1);
834
835 pos = buf;
836 for (j = 0; j <= buf_size; j += 8) {
837 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
838 NULL, 0);
839 intel_sdvo_read_response(encoder, pos, 8);
840 pos += 8;
841 }
842 }
843 }
844 #endif
845
846 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
847 {
848 struct dip_infoframe avi_if = {
849 .type = DIP_TYPE_AVI,
850 .ver = DIP_VERSION_AVI,
851 .len = DIP_LEN_AVI,
852 };
853 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
854 uint8_t set_buf_index[2] = { 1, 0 };
855 uint64_t *data = (uint64_t *)&avi_if;
856 unsigned i;
857
858 intel_dip_infoframe_csum(&avi_if);
859
860 if (!intel_sdvo_set_value(intel_sdvo,
861 SDVO_CMD_SET_HBUF_INDEX,
862 set_buf_index, 2))
863 return false;
864
865 for (i = 0; i < sizeof(avi_if); i += 8) {
866 if (!intel_sdvo_set_value(intel_sdvo,
867 SDVO_CMD_SET_HBUF_DATA,
868 data, 8))
869 return false;
870 data++;
871 }
872
873 return intel_sdvo_set_value(intel_sdvo,
874 SDVO_CMD_SET_HBUF_TXRATE,
875 &tx_rate, 1);
876 }
877
878 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
879 {
880 struct intel_sdvo_tv_format format;
881 uint32_t format_map;
882
883 format_map = 1 << intel_sdvo->tv_format_index;
884 memset(&format, 0, sizeof(format));
885 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
886
887 BUILD_BUG_ON(sizeof(format) != 6);
888 return intel_sdvo_set_value(intel_sdvo,
889 SDVO_CMD_SET_TV_FORMAT,
890 &format, sizeof(format));
891 }
892
893 static bool
894 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
895 struct drm_display_mode *mode)
896 {
897 struct intel_sdvo_dtd output_dtd;
898
899 if (!intel_sdvo_set_target_output(intel_sdvo,
900 intel_sdvo->attached_output))
901 return false;
902
903 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
904 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
905 return false;
906
907 return true;
908 }
909
910 static bool
911 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
912 struct drm_display_mode *mode,
913 struct drm_display_mode *adjusted_mode)
914 {
915 /* Reset the input timing to the screen. Assume always input 0. */
916 if (!intel_sdvo_set_target_input(intel_sdvo))
917 return false;
918
919 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
920 mode->clock / 10,
921 mode->hdisplay,
922 mode->vdisplay))
923 return false;
924
925 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
926 &intel_sdvo->input_dtd))
927 return false;
928
929 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
930
931 drm_mode_set_crtcinfo(adjusted_mode, 0);
932 return true;
933 }
934
935 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
936 struct drm_display_mode *mode,
937 struct drm_display_mode *adjusted_mode)
938 {
939 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
940 int multiplier;
941
942 /* We need to construct preferred input timings based on our
943 * output timings. To do that, we have to set the output
944 * timings, even though this isn't really the right place in
945 * the sequence to do it. Oh well.
946 */
947 if (intel_sdvo->is_tv) {
948 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
949 return false;
950
951 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
952 mode,
953 adjusted_mode);
954 } else if (intel_sdvo->is_lvds) {
955 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
956 intel_sdvo->sdvo_lvds_fixed_mode))
957 return false;
958
959 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
960 mode,
961 adjusted_mode);
962 }
963
964 /* Make the CRTC code factor in the SDVO pixel multiplier. The
965 * SDVO device will factor out the multiplier during mode_set.
966 */
967 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
968 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
969
970 return true;
971 }
972
973 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
974 struct drm_display_mode *mode,
975 struct drm_display_mode *adjusted_mode)
976 {
977 struct drm_device *dev = encoder->dev;
978 struct drm_i915_private *dev_priv = dev->dev_private;
979 struct drm_crtc *crtc = encoder->crtc;
980 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
981 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
982 u32 sdvox;
983 struct intel_sdvo_in_out_map in_out;
984 struct intel_sdvo_dtd input_dtd;
985 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
986 int rate;
987
988 if (!mode)
989 return;
990
991 /* First, set the input mapping for the first input to our controlled
992 * output. This is only correct if we're a single-input device, in
993 * which case the first input is the output from the appropriate SDVO
994 * channel on the motherboard. In a two-input device, the first input
995 * will be SDVOB and the second SDVOC.
996 */
997 in_out.in0 = intel_sdvo->attached_output;
998 in_out.in1 = 0;
999
1000 intel_sdvo_set_value(intel_sdvo,
1001 SDVO_CMD_SET_IN_OUT_MAP,
1002 &in_out, sizeof(in_out));
1003
1004 /* Set the output timings to the screen */
1005 if (!intel_sdvo_set_target_output(intel_sdvo,
1006 intel_sdvo->attached_output))
1007 return;
1008
1009 /* We have tried to get input timing in mode_fixup, and filled into
1010 * adjusted_mode.
1011 */
1012 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1013 input_dtd = intel_sdvo->input_dtd;
1014 } else {
1015 /* Set the output timing to the screen */
1016 if (!intel_sdvo_set_target_output(intel_sdvo,
1017 intel_sdvo->attached_output))
1018 return;
1019
1020 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1021 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1022 }
1023
1024 /* Set the input timing to the screen. Assume always input 0. */
1025 if (!intel_sdvo_set_target_input(intel_sdvo))
1026 return;
1027
1028 if (intel_sdvo->has_hdmi_monitor) {
1029 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1030 intel_sdvo_set_colorimetry(intel_sdvo,
1031 SDVO_COLORIMETRY_RGB256);
1032 intel_sdvo_set_avi_infoframe(intel_sdvo);
1033 } else
1034 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1035
1036 if (intel_sdvo->is_tv &&
1037 !intel_sdvo_set_tv_format(intel_sdvo))
1038 return;
1039
1040 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1041
1042 switch (pixel_multiplier) {
1043 default:
1044 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1045 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1046 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1047 }
1048 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1049 return;
1050
1051 /* Set the SDVO control regs. */
1052 if (INTEL_INFO(dev)->gen >= 4) {
1053 sdvox = 0;
1054 if (INTEL_INFO(dev)->gen < 5)
1055 sdvox |= SDVO_BORDER_ENABLE;
1056 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1057 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1058 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1059 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1060 } else {
1061 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1062 switch (intel_sdvo->sdvo_reg) {
1063 case SDVOB:
1064 sdvox &= SDVOB_PRESERVE_MASK;
1065 break;
1066 case SDVOC:
1067 sdvox &= SDVOC_PRESERVE_MASK;
1068 break;
1069 }
1070 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1071 }
1072 if (intel_crtc->pipe == 1)
1073 sdvox |= SDVO_PIPE_B_SELECT;
1074 if (intel_sdvo->has_hdmi_audio)
1075 sdvox |= SDVO_AUDIO_ENABLE;
1076
1077 if (INTEL_INFO(dev)->gen >= 4) {
1078 /* done in crtc_mode_set as the dpll_md reg must be written early */
1079 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1080 /* done in crtc_mode_set as it lives inside the dpll register */
1081 } else {
1082 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1083 }
1084
1085 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1086 INTEL_INFO(dev)->gen < 5)
1087 sdvox |= SDVO_STALL_SELECT;
1088 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1089 }
1090
1091 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1092 {
1093 struct drm_device *dev = encoder->dev;
1094 struct drm_i915_private *dev_priv = dev->dev_private;
1095 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1096 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1097 u32 temp;
1098
1099 if (mode != DRM_MODE_DPMS_ON) {
1100 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1101 if (0)
1102 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1103
1104 if (mode == DRM_MODE_DPMS_OFF) {
1105 temp = I915_READ(intel_sdvo->sdvo_reg);
1106 if ((temp & SDVO_ENABLE) != 0) {
1107 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1108 }
1109 }
1110 } else {
1111 bool input1, input2;
1112 int i;
1113 u8 status;
1114
1115 temp = I915_READ(intel_sdvo->sdvo_reg);
1116 if ((temp & SDVO_ENABLE) == 0)
1117 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1118 for (i = 0; i < 2; i++)
1119 intel_wait_for_vblank(dev, intel_crtc->pipe);
1120
1121 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1122 /* Warn if the device reported failure to sync.
1123 * A lot of SDVO devices fail to notify of sync, but it's
1124 * a given it the status is a success, we succeeded.
1125 */
1126 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1127 DRM_DEBUG_KMS("First %s output reported failure to "
1128 "sync\n", SDVO_NAME(intel_sdvo));
1129 }
1130
1131 if (0)
1132 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1133 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1134 }
1135 return;
1136 }
1137
1138 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1139 struct drm_display_mode *mode)
1140 {
1141 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1142
1143 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1144 return MODE_NO_DBLESCAN;
1145
1146 if (intel_sdvo->pixel_clock_min > mode->clock)
1147 return MODE_CLOCK_LOW;
1148
1149 if (intel_sdvo->pixel_clock_max < mode->clock)
1150 return MODE_CLOCK_HIGH;
1151
1152 if (intel_sdvo->is_lvds) {
1153 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1154 return MODE_PANEL;
1155
1156 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1157 return MODE_PANEL;
1158 }
1159
1160 return MODE_OK;
1161 }
1162
1163 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1164 {
1165 if (!intel_sdvo_get_value(intel_sdvo,
1166 SDVO_CMD_GET_DEVICE_CAPS,
1167 caps, sizeof(*caps)))
1168 return false;
1169
1170 DRM_DEBUG_KMS("SDVO capabilities:\n"
1171 " vendor_id: %d\n"
1172 " device_id: %d\n"
1173 " device_rev_id: %d\n"
1174 " sdvo_version_major: %d\n"
1175 " sdvo_version_minor: %d\n"
1176 " sdvo_inputs_mask: %d\n"
1177 " smooth_scaling: %d\n"
1178 " sharp_scaling: %d\n"
1179 " up_scaling: %d\n"
1180 " down_scaling: %d\n"
1181 " stall_support: %d\n"
1182 " output_flags: %d\n",
1183 caps->vendor_id,
1184 caps->device_id,
1185 caps->device_rev_id,
1186 caps->sdvo_version_major,
1187 caps->sdvo_version_minor,
1188 caps->sdvo_inputs_mask,
1189 caps->smooth_scaling,
1190 caps->sharp_scaling,
1191 caps->up_scaling,
1192 caps->down_scaling,
1193 caps->stall_support,
1194 caps->output_flags);
1195
1196 return true;
1197 }
1198
1199 /* No use! */
1200 #if 0
1201 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1202 {
1203 struct drm_connector *connector = NULL;
1204 struct intel_sdvo *iout = NULL;
1205 struct intel_sdvo *sdvo;
1206
1207 /* find the sdvo connector */
1208 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1209 iout = to_intel_sdvo(connector);
1210
1211 if (iout->type != INTEL_OUTPUT_SDVO)
1212 continue;
1213
1214 sdvo = iout->dev_priv;
1215
1216 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1217 return connector;
1218
1219 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1220 return connector;
1221
1222 }
1223
1224 return NULL;
1225 }
1226
1227 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1228 {
1229 u8 response[2];
1230 u8 status;
1231 struct intel_sdvo *intel_sdvo;
1232 DRM_DEBUG_KMS("\n");
1233
1234 if (!connector)
1235 return 0;
1236
1237 intel_sdvo = to_intel_sdvo(connector);
1238
1239 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1240 &response, 2) && response[0];
1241 }
1242
1243 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1244 {
1245 u8 response[2];
1246 u8 status;
1247 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1248
1249 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1250 intel_sdvo_read_response(intel_sdvo, &response, 2);
1251
1252 if (on) {
1253 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1254 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1255
1256 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1257 } else {
1258 response[0] = 0;
1259 response[1] = 0;
1260 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1261 }
1262
1263 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1264 intel_sdvo_read_response(intel_sdvo, &response, 2);
1265 }
1266 #endif
1267
1268 static bool
1269 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1270 {
1271 int caps = 0;
1272
1273 if (intel_sdvo->caps.output_flags &
1274 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1275 caps++;
1276 if (intel_sdvo->caps.output_flags &
1277 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1278 caps++;
1279 if (intel_sdvo->caps.output_flags &
1280 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1281 caps++;
1282 if (intel_sdvo->caps.output_flags &
1283 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1284 caps++;
1285 if (intel_sdvo->caps.output_flags &
1286 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1287 caps++;
1288
1289 if (intel_sdvo->caps.output_flags &
1290 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1291 caps++;
1292
1293 if (intel_sdvo->caps.output_flags &
1294 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1295 caps++;
1296
1297 return (caps > 1);
1298 }
1299
1300 static struct edid *
1301 intel_sdvo_get_edid(struct drm_connector *connector)
1302 {
1303 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1304 return drm_get_edid(connector, &sdvo->ddc);
1305 }
1306
1307 /* Mac mini hack -- use the same DDC as the analog connector */
1308 static struct edid *
1309 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1310 {
1311 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1312
1313 return drm_get_edid(connector,
1314 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1315 }
1316
1317 enum drm_connector_status
1318 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1319 {
1320 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1321 enum drm_connector_status status;
1322 struct edid *edid;
1323
1324 edid = intel_sdvo_get_edid(connector);
1325
1326 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1327 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1328
1329 /*
1330 * Don't use the 1 as the argument of DDC bus switch to get
1331 * the EDID. It is used for SDVO SPD ROM.
1332 */
1333 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1334 intel_sdvo->ddc_bus = ddc;
1335 edid = intel_sdvo_get_edid(connector);
1336 if (edid)
1337 break;
1338 }
1339 /*
1340 * If we found the EDID on the other bus,
1341 * assume that is the correct DDC bus.
1342 */
1343 if (edid == NULL)
1344 intel_sdvo->ddc_bus = saved_ddc;
1345 }
1346
1347 /*
1348 * When there is no edid and no monitor is connected with VGA
1349 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1350 */
1351 if (edid == NULL)
1352 edid = intel_sdvo_get_analog_edid(connector);
1353
1354 status = connector_status_unknown;
1355 if (edid != NULL) {
1356 /* DDC bus is shared, match EDID to connector type */
1357 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1358 status = connector_status_connected;
1359 if (intel_sdvo->is_hdmi) {
1360 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1361 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1362 }
1363 } else
1364 status = connector_status_disconnected;
1365 connector->display_info.raw_edid = NULL;
1366 kfree(edid);
1367 }
1368
1369 if (status == connector_status_connected) {
1370 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1371 if (intel_sdvo_connector->force_audio)
1372 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1373 }
1374
1375 return status;
1376 }
1377
1378 static enum drm_connector_status
1379 intel_sdvo_detect(struct drm_connector *connector, bool force)
1380 {
1381 uint16_t response;
1382 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1383 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1384 enum drm_connector_status ret;
1385
1386 if (!intel_sdvo_write_cmd(intel_sdvo,
1387 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1388 return connector_status_unknown;
1389
1390 /* add 30ms delay when the output type might be TV */
1391 if (intel_sdvo->caps.output_flags &
1392 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1393 mdelay(30);
1394
1395 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1396 return connector_status_unknown;
1397
1398 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1399 response & 0xff, response >> 8,
1400 intel_sdvo_connector->output_flag);
1401
1402 if (response == 0)
1403 return connector_status_disconnected;
1404
1405 intel_sdvo->attached_output = response;
1406
1407 intel_sdvo->has_hdmi_monitor = false;
1408 intel_sdvo->has_hdmi_audio = false;
1409
1410 if ((intel_sdvo_connector->output_flag & response) == 0)
1411 ret = connector_status_disconnected;
1412 else if (IS_TMDS(intel_sdvo_connector))
1413 ret = intel_sdvo_hdmi_sink_detect(connector);
1414 else {
1415 struct edid *edid;
1416
1417 /* if we have an edid check it matches the connection */
1418 edid = intel_sdvo_get_edid(connector);
1419 if (edid == NULL)
1420 edid = intel_sdvo_get_analog_edid(connector);
1421 if (edid != NULL) {
1422 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1423 ret = connector_status_disconnected;
1424 else
1425 ret = connector_status_connected;
1426 connector->display_info.raw_edid = NULL;
1427 kfree(edid);
1428 } else
1429 ret = connector_status_connected;
1430 }
1431
1432 /* May update encoder flag for like clock for SDVO TV, etc.*/
1433 if (ret == connector_status_connected) {
1434 intel_sdvo->is_tv = false;
1435 intel_sdvo->is_lvds = false;
1436 intel_sdvo->base.needs_tv_clock = false;
1437
1438 if (response & SDVO_TV_MASK) {
1439 intel_sdvo->is_tv = true;
1440 intel_sdvo->base.needs_tv_clock = true;
1441 }
1442 if (response & SDVO_LVDS_MASK)
1443 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1444 }
1445
1446 return ret;
1447 }
1448
1449 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1450 {
1451 struct edid *edid;
1452
1453 /* set the bus switch and get the modes */
1454 edid = intel_sdvo_get_edid(connector);
1455
1456 /*
1457 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1458 * link between analog and digital outputs. So, if the regular SDVO
1459 * DDC fails, check to see if the analog output is disconnected, in
1460 * which case we'll look there for the digital DDC data.
1461 */
1462 if (edid == NULL)
1463 edid = intel_sdvo_get_analog_edid(connector);
1464
1465 if (edid != NULL) {
1466 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1467 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1468 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1469
1470 if (connector_is_digital == monitor_is_digital) {
1471 drm_mode_connector_update_edid_property(connector, edid);
1472 drm_add_edid_modes(connector, edid);
1473 }
1474
1475 connector->display_info.raw_edid = NULL;
1476 kfree(edid);
1477 }
1478 }
1479
1480 /*
1481 * Set of SDVO TV modes.
1482 * Note! This is in reply order (see loop in get_tv_modes).
1483 * XXX: all 60Hz refresh?
1484 */
1485 struct drm_display_mode sdvo_tv_modes[] = {
1486 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1487 416, 0, 200, 201, 232, 233, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1490 416, 0, 240, 241, 272, 273, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1493 496, 0, 300, 301, 332, 333, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1496 736, 0, 350, 351, 382, 383, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1499 736, 0, 400, 401, 432, 433, 0,
1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1502 736, 0, 480, 481, 512, 513, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1505 800, 0, 480, 481, 512, 513, 0,
1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1508 800, 0, 576, 577, 608, 609, 0,
1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1511 816, 0, 350, 351, 382, 383, 0,
1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1514 816, 0, 400, 401, 432, 433, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1517 816, 0, 480, 481, 512, 513, 0,
1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1520 816, 0, 540, 541, 572, 573, 0,
1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1523 816, 0, 576, 577, 608, 609, 0,
1524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1526 864, 0, 576, 577, 608, 609, 0,
1527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1529 896, 0, 600, 601, 632, 633, 0,
1530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1531 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1532 928, 0, 624, 625, 656, 657, 0,
1533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1534 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1535 1016, 0, 766, 767, 798, 799, 0,
1536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1537 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1538 1120, 0, 768, 769, 800, 801, 0,
1539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1540 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1541 1376, 0, 1024, 1025, 1056, 1057, 0,
1542 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1543 };
1544
1545 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1546 {
1547 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1548 struct intel_sdvo_sdtv_resolution_request tv_res;
1549 uint32_t reply = 0, format_map = 0;
1550 int i;
1551
1552 /* Read the list of supported input resolutions for the selected TV
1553 * format.
1554 */
1555 format_map = 1 << intel_sdvo->tv_format_index;
1556 memcpy(&tv_res, &format_map,
1557 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1558
1559 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1560 return;
1561
1562 BUILD_BUG_ON(sizeof(tv_res) != 3);
1563 if (!intel_sdvo_write_cmd(intel_sdvo,
1564 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1565 &tv_res, sizeof(tv_res)))
1566 return;
1567 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1568 return;
1569
1570 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1571 if (reply & (1 << i)) {
1572 struct drm_display_mode *nmode;
1573 nmode = drm_mode_duplicate(connector->dev,
1574 &sdvo_tv_modes[i]);
1575 if (nmode)
1576 drm_mode_probed_add(connector, nmode);
1577 }
1578 }
1579
1580 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1581 {
1582 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1583 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1584 struct drm_display_mode *newmode;
1585
1586 /*
1587 * Attempt to get the mode list from DDC.
1588 * Assume that the preferred modes are
1589 * arranged in priority order.
1590 */
1591 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1592 if (list_empty(&connector->probed_modes) == false)
1593 goto end;
1594
1595 /* Fetch modes from VBT */
1596 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1597 newmode = drm_mode_duplicate(connector->dev,
1598 dev_priv->sdvo_lvds_vbt_mode);
1599 if (newmode != NULL) {
1600 /* Guarantee the mode is preferred */
1601 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1602 DRM_MODE_TYPE_DRIVER);
1603 drm_mode_probed_add(connector, newmode);
1604 }
1605 }
1606
1607 end:
1608 list_for_each_entry(newmode, &connector->probed_modes, head) {
1609 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1610 intel_sdvo->sdvo_lvds_fixed_mode =
1611 drm_mode_duplicate(connector->dev, newmode);
1612
1613 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1614 0);
1615
1616 intel_sdvo->is_lvds = true;
1617 break;
1618 }
1619 }
1620
1621 }
1622
1623 static int intel_sdvo_get_modes(struct drm_connector *connector)
1624 {
1625 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1626
1627 if (IS_TV(intel_sdvo_connector))
1628 intel_sdvo_get_tv_modes(connector);
1629 else if (IS_LVDS(intel_sdvo_connector))
1630 intel_sdvo_get_lvds_modes(connector);
1631 else
1632 intel_sdvo_get_ddc_modes(connector);
1633
1634 return !list_empty(&connector->probed_modes);
1635 }
1636
1637 static void
1638 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1639 {
1640 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1641 struct drm_device *dev = connector->dev;
1642
1643 if (intel_sdvo_connector->left)
1644 drm_property_destroy(dev, intel_sdvo_connector->left);
1645 if (intel_sdvo_connector->right)
1646 drm_property_destroy(dev, intel_sdvo_connector->right);
1647 if (intel_sdvo_connector->top)
1648 drm_property_destroy(dev, intel_sdvo_connector->top);
1649 if (intel_sdvo_connector->bottom)
1650 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1651 if (intel_sdvo_connector->hpos)
1652 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1653 if (intel_sdvo_connector->vpos)
1654 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1655 if (intel_sdvo_connector->saturation)
1656 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1657 if (intel_sdvo_connector->contrast)
1658 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1659 if (intel_sdvo_connector->hue)
1660 drm_property_destroy(dev, intel_sdvo_connector->hue);
1661 if (intel_sdvo_connector->sharpness)
1662 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1663 if (intel_sdvo_connector->flicker_filter)
1664 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1665 if (intel_sdvo_connector->flicker_filter_2d)
1666 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1667 if (intel_sdvo_connector->flicker_filter_adaptive)
1668 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1669 if (intel_sdvo_connector->tv_luma_filter)
1670 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1671 if (intel_sdvo_connector->tv_chroma_filter)
1672 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1673 if (intel_sdvo_connector->dot_crawl)
1674 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1675 if (intel_sdvo_connector->brightness)
1676 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1677 }
1678
1679 static void intel_sdvo_destroy(struct drm_connector *connector)
1680 {
1681 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1682
1683 if (intel_sdvo_connector->tv_format)
1684 drm_property_destroy(connector->dev,
1685 intel_sdvo_connector->tv_format);
1686
1687 intel_sdvo_destroy_enhance_property(connector);
1688 drm_sysfs_connector_remove(connector);
1689 drm_connector_cleanup(connector);
1690 kfree(connector);
1691 }
1692
1693 static int
1694 intel_sdvo_set_property(struct drm_connector *connector,
1695 struct drm_property *property,
1696 uint64_t val)
1697 {
1698 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1699 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1700 uint16_t temp_value;
1701 uint8_t cmd;
1702 int ret;
1703
1704 ret = drm_connector_property_set_value(connector, property, val);
1705 if (ret)
1706 return ret;
1707
1708 if (property == intel_sdvo_connector->force_audio_property) {
1709 if (val == intel_sdvo_connector->force_audio)
1710 return 0;
1711
1712 intel_sdvo_connector->force_audio = val;
1713
1714 if (val > 0 && intel_sdvo->has_hdmi_audio)
1715 return 0;
1716 if (val < 0 && !intel_sdvo->has_hdmi_audio)
1717 return 0;
1718
1719 intel_sdvo->has_hdmi_audio = val > 0;
1720 goto done;
1721 }
1722
1723 #define CHECK_PROPERTY(name, NAME) \
1724 if (intel_sdvo_connector->name == property) { \
1725 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1726 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1727 cmd = SDVO_CMD_SET_##NAME; \
1728 intel_sdvo_connector->cur_##name = temp_value; \
1729 goto set_value; \
1730 }
1731
1732 if (property == intel_sdvo_connector->tv_format) {
1733 if (val >= TV_FORMAT_NUM)
1734 return -EINVAL;
1735
1736 if (intel_sdvo->tv_format_index ==
1737 intel_sdvo_connector->tv_format_supported[val])
1738 return 0;
1739
1740 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1741 goto done;
1742 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1743 temp_value = val;
1744 if (intel_sdvo_connector->left == property) {
1745 drm_connector_property_set_value(connector,
1746 intel_sdvo_connector->right, val);
1747 if (intel_sdvo_connector->left_margin == temp_value)
1748 return 0;
1749
1750 intel_sdvo_connector->left_margin = temp_value;
1751 intel_sdvo_connector->right_margin = temp_value;
1752 temp_value = intel_sdvo_connector->max_hscan -
1753 intel_sdvo_connector->left_margin;
1754 cmd = SDVO_CMD_SET_OVERSCAN_H;
1755 goto set_value;
1756 } else if (intel_sdvo_connector->right == property) {
1757 drm_connector_property_set_value(connector,
1758 intel_sdvo_connector->left, val);
1759 if (intel_sdvo_connector->right_margin == temp_value)
1760 return 0;
1761
1762 intel_sdvo_connector->left_margin = temp_value;
1763 intel_sdvo_connector->right_margin = temp_value;
1764 temp_value = intel_sdvo_connector->max_hscan -
1765 intel_sdvo_connector->left_margin;
1766 cmd = SDVO_CMD_SET_OVERSCAN_H;
1767 goto set_value;
1768 } else if (intel_sdvo_connector->top == property) {
1769 drm_connector_property_set_value(connector,
1770 intel_sdvo_connector->bottom, val);
1771 if (intel_sdvo_connector->top_margin == temp_value)
1772 return 0;
1773
1774 intel_sdvo_connector->top_margin = temp_value;
1775 intel_sdvo_connector->bottom_margin = temp_value;
1776 temp_value = intel_sdvo_connector->max_vscan -
1777 intel_sdvo_connector->top_margin;
1778 cmd = SDVO_CMD_SET_OVERSCAN_V;
1779 goto set_value;
1780 } else if (intel_sdvo_connector->bottom == property) {
1781 drm_connector_property_set_value(connector,
1782 intel_sdvo_connector->top, val);
1783 if (intel_sdvo_connector->bottom_margin == temp_value)
1784 return 0;
1785
1786 intel_sdvo_connector->top_margin = temp_value;
1787 intel_sdvo_connector->bottom_margin = temp_value;
1788 temp_value = intel_sdvo_connector->max_vscan -
1789 intel_sdvo_connector->top_margin;
1790 cmd = SDVO_CMD_SET_OVERSCAN_V;
1791 goto set_value;
1792 }
1793 CHECK_PROPERTY(hpos, HPOS)
1794 CHECK_PROPERTY(vpos, VPOS)
1795 CHECK_PROPERTY(saturation, SATURATION)
1796 CHECK_PROPERTY(contrast, CONTRAST)
1797 CHECK_PROPERTY(hue, HUE)
1798 CHECK_PROPERTY(brightness, BRIGHTNESS)
1799 CHECK_PROPERTY(sharpness, SHARPNESS)
1800 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1801 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1802 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1803 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1804 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1805 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1806 }
1807
1808 return -EINVAL; /* unknown property */
1809
1810 set_value:
1811 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1812 return -EIO;
1813
1814
1815 done:
1816 if (intel_sdvo->base.base.crtc) {
1817 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1818 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1819 crtc->y, crtc->fb);
1820 }
1821
1822 return 0;
1823 #undef CHECK_PROPERTY
1824 }
1825
1826 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1827 .dpms = intel_sdvo_dpms,
1828 .mode_fixup = intel_sdvo_mode_fixup,
1829 .prepare = intel_encoder_prepare,
1830 .mode_set = intel_sdvo_mode_set,
1831 .commit = intel_encoder_commit,
1832 };
1833
1834 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1835 .dpms = drm_helper_connector_dpms,
1836 .detect = intel_sdvo_detect,
1837 .fill_modes = drm_helper_probe_single_connector_modes,
1838 .set_property = intel_sdvo_set_property,
1839 .destroy = intel_sdvo_destroy,
1840 };
1841
1842 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1843 .get_modes = intel_sdvo_get_modes,
1844 .mode_valid = intel_sdvo_mode_valid,
1845 .best_encoder = intel_best_encoder,
1846 };
1847
1848 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1849 {
1850 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1851
1852 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1853 drm_mode_destroy(encoder->dev,
1854 intel_sdvo->sdvo_lvds_fixed_mode);
1855
1856 i2c_del_adapter(&intel_sdvo->ddc);
1857 intel_encoder_destroy(encoder);
1858 }
1859
1860 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1861 .destroy = intel_sdvo_enc_destroy,
1862 };
1863
1864 static void
1865 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1866 {
1867 uint16_t mask = 0;
1868 unsigned int num_bits;
1869
1870 /* Make a mask of outputs less than or equal to our own priority in the
1871 * list.
1872 */
1873 switch (sdvo->controlled_output) {
1874 case SDVO_OUTPUT_LVDS1:
1875 mask |= SDVO_OUTPUT_LVDS1;
1876 case SDVO_OUTPUT_LVDS0:
1877 mask |= SDVO_OUTPUT_LVDS0;
1878 case SDVO_OUTPUT_TMDS1:
1879 mask |= SDVO_OUTPUT_TMDS1;
1880 case SDVO_OUTPUT_TMDS0:
1881 mask |= SDVO_OUTPUT_TMDS0;
1882 case SDVO_OUTPUT_RGB1:
1883 mask |= SDVO_OUTPUT_RGB1;
1884 case SDVO_OUTPUT_RGB0:
1885 mask |= SDVO_OUTPUT_RGB0;
1886 break;
1887 }
1888
1889 /* Count bits to find what number we are in the priority list. */
1890 mask &= sdvo->caps.output_flags;
1891 num_bits = hweight16(mask);
1892 /* If more than 3 outputs, default to DDC bus 3 for now. */
1893 if (num_bits > 3)
1894 num_bits = 3;
1895
1896 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1897 sdvo->ddc_bus = 1 << num_bits;
1898 }
1899
1900 /**
1901 * Choose the appropriate DDC bus for control bus switch command for this
1902 * SDVO output based on the controlled output.
1903 *
1904 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1905 * outputs, then LVDS outputs.
1906 */
1907 static void
1908 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1909 struct intel_sdvo *sdvo, u32 reg)
1910 {
1911 struct sdvo_device_mapping *mapping;
1912
1913 if (IS_SDVOB(reg))
1914 mapping = &(dev_priv->sdvo_mappings[0]);
1915 else
1916 mapping = &(dev_priv->sdvo_mappings[1]);
1917
1918 if (mapping->initialized)
1919 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1920 else
1921 intel_sdvo_guess_ddc_bus(sdvo);
1922 }
1923
1924 static void
1925 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1926 struct intel_sdvo *sdvo, u32 reg)
1927 {
1928 struct sdvo_device_mapping *mapping;
1929 u8 pin, speed;
1930
1931 if (IS_SDVOB(reg))
1932 mapping = &dev_priv->sdvo_mappings[0];
1933 else
1934 mapping = &dev_priv->sdvo_mappings[1];
1935
1936 pin = GMBUS_PORT_DPB;
1937 speed = GMBUS_RATE_1MHZ >> 8;
1938 if (mapping->initialized) {
1939 pin = mapping->i2c_pin;
1940 speed = mapping->i2c_speed;
1941 }
1942
1943 if (pin < GMBUS_NUM_PORTS) {
1944 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1945 intel_gmbus_set_speed(sdvo->i2c, speed);
1946 intel_gmbus_force_bit(sdvo->i2c, true);
1947 } else
1948 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1949 }
1950
1951 static bool
1952 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1953 {
1954 return intel_sdvo_check_supp_encode(intel_sdvo);
1955 }
1956
1957 static u8
1958 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1959 {
1960 struct drm_i915_private *dev_priv = dev->dev_private;
1961 struct sdvo_device_mapping *my_mapping, *other_mapping;
1962
1963 if (IS_SDVOB(sdvo_reg)) {
1964 my_mapping = &dev_priv->sdvo_mappings[0];
1965 other_mapping = &dev_priv->sdvo_mappings[1];
1966 } else {
1967 my_mapping = &dev_priv->sdvo_mappings[1];
1968 other_mapping = &dev_priv->sdvo_mappings[0];
1969 }
1970
1971 /* If the BIOS described our SDVO device, take advantage of it. */
1972 if (my_mapping->slave_addr)
1973 return my_mapping->slave_addr;
1974
1975 /* If the BIOS only described a different SDVO device, use the
1976 * address that it isn't using.
1977 */
1978 if (other_mapping->slave_addr) {
1979 if (other_mapping->slave_addr == 0x70)
1980 return 0x72;
1981 else
1982 return 0x70;
1983 }
1984
1985 /* No SDVO device info is found for another DVO port,
1986 * so use mapping assumption we had before BIOS parsing.
1987 */
1988 if (IS_SDVOB(sdvo_reg))
1989 return 0x70;
1990 else
1991 return 0x72;
1992 }
1993
1994 static void
1995 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1996 struct intel_sdvo *encoder)
1997 {
1998 drm_connector_init(encoder->base.base.dev,
1999 &connector->base.base,
2000 &intel_sdvo_connector_funcs,
2001 connector->base.base.connector_type);
2002
2003 drm_connector_helper_add(&connector->base.base,
2004 &intel_sdvo_connector_helper_funcs);
2005
2006 connector->base.base.interlace_allowed = 0;
2007 connector->base.base.doublescan_allowed = 0;
2008 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2009
2010 intel_connector_attach_encoder(&connector->base, &encoder->base);
2011 drm_sysfs_connector_add(&connector->base.base);
2012 }
2013
2014 static void
2015 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2016 {
2017 struct drm_device *dev = connector->base.base.dev;
2018
2019 connector->force_audio_property =
2020 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2021 if (connector->force_audio_property) {
2022 connector->force_audio_property->values[0] = -1;
2023 connector->force_audio_property->values[1] = 1;
2024 drm_connector_attach_property(&connector->base.base,
2025 connector->force_audio_property, 0);
2026 }
2027 }
2028
2029 static bool
2030 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2031 {
2032 struct drm_encoder *encoder = &intel_sdvo->base.base;
2033 struct drm_connector *connector;
2034 struct intel_connector *intel_connector;
2035 struct intel_sdvo_connector *intel_sdvo_connector;
2036
2037 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2038 if (!intel_sdvo_connector)
2039 return false;
2040
2041 if (device == 0) {
2042 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2043 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2044 } else if (device == 1) {
2045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2047 }
2048
2049 intel_connector = &intel_sdvo_connector->base;
2050 connector = &intel_connector->base;
2051 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2052 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2053 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2054
2055 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2056 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2057 intel_sdvo->is_hdmi = true;
2058 }
2059 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2060 (1 << INTEL_ANALOG_CLONE_BIT));
2061
2062 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2063 if (intel_sdvo->is_hdmi)
2064 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2065
2066 return true;
2067 }
2068
2069 static bool
2070 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2071 {
2072 struct drm_encoder *encoder = &intel_sdvo->base.base;
2073 struct drm_connector *connector;
2074 struct intel_connector *intel_connector;
2075 struct intel_sdvo_connector *intel_sdvo_connector;
2076
2077 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2078 if (!intel_sdvo_connector)
2079 return false;
2080
2081 intel_connector = &intel_sdvo_connector->base;
2082 connector = &intel_connector->base;
2083 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2084 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2085
2086 intel_sdvo->controlled_output |= type;
2087 intel_sdvo_connector->output_flag = type;
2088
2089 intel_sdvo->is_tv = true;
2090 intel_sdvo->base.needs_tv_clock = true;
2091 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2092
2093 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2094
2095 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2096 goto err;
2097
2098 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2099 goto err;
2100
2101 return true;
2102
2103 err:
2104 intel_sdvo_destroy(connector);
2105 return false;
2106 }
2107
2108 static bool
2109 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2110 {
2111 struct drm_encoder *encoder = &intel_sdvo->base.base;
2112 struct drm_connector *connector;
2113 struct intel_connector *intel_connector;
2114 struct intel_sdvo_connector *intel_sdvo_connector;
2115
2116 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2117 if (!intel_sdvo_connector)
2118 return false;
2119
2120 intel_connector = &intel_sdvo_connector->base;
2121 connector = &intel_connector->base;
2122 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2123 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2124 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2125
2126 if (device == 0) {
2127 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2128 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2129 } else if (device == 1) {
2130 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2131 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2132 }
2133
2134 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2135 (1 << INTEL_ANALOG_CLONE_BIT));
2136
2137 intel_sdvo_connector_init(intel_sdvo_connector,
2138 intel_sdvo);
2139 return true;
2140 }
2141
2142 static bool
2143 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2144 {
2145 struct drm_encoder *encoder = &intel_sdvo->base.base;
2146 struct drm_connector *connector;
2147 struct intel_connector *intel_connector;
2148 struct intel_sdvo_connector *intel_sdvo_connector;
2149
2150 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2151 if (!intel_sdvo_connector)
2152 return false;
2153
2154 intel_connector = &intel_sdvo_connector->base;
2155 connector = &intel_connector->base;
2156 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2157 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2158
2159 if (device == 0) {
2160 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2161 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2162 } else if (device == 1) {
2163 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2164 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2165 }
2166
2167 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2168 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2169
2170 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2171 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2172 goto err;
2173
2174 return true;
2175
2176 err:
2177 intel_sdvo_destroy(connector);
2178 return false;
2179 }
2180
2181 static bool
2182 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2183 {
2184 intel_sdvo->is_tv = false;
2185 intel_sdvo->base.needs_tv_clock = false;
2186 intel_sdvo->is_lvds = false;
2187
2188 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2189
2190 if (flags & SDVO_OUTPUT_TMDS0)
2191 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2192 return false;
2193
2194 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2195 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2196 return false;
2197
2198 /* TV has no XXX1 function block */
2199 if (flags & SDVO_OUTPUT_SVID0)
2200 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2201 return false;
2202
2203 if (flags & SDVO_OUTPUT_CVBS0)
2204 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2205 return false;
2206
2207 if (flags & SDVO_OUTPUT_RGB0)
2208 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2209 return false;
2210
2211 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2212 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2213 return false;
2214
2215 if (flags & SDVO_OUTPUT_LVDS0)
2216 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2217 return false;
2218
2219 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2220 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2221 return false;
2222
2223 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2224 unsigned char bytes[2];
2225
2226 intel_sdvo->controlled_output = 0;
2227 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2228 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2229 SDVO_NAME(intel_sdvo),
2230 bytes[0], bytes[1]);
2231 return false;
2232 }
2233 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2234
2235 return true;
2236 }
2237
2238 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2239 struct intel_sdvo_connector *intel_sdvo_connector,
2240 int type)
2241 {
2242 struct drm_device *dev = intel_sdvo->base.base.dev;
2243 struct intel_sdvo_tv_format format;
2244 uint32_t format_map, i;
2245
2246 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2247 return false;
2248
2249 if (!intel_sdvo_get_value(intel_sdvo,
2250 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2251 &format, sizeof(format)))
2252 return false;
2253
2254 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2255
2256 if (format_map == 0)
2257 return false;
2258
2259 intel_sdvo_connector->format_supported_num = 0;
2260 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2261 if (format_map & (1 << i))
2262 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2263
2264
2265 intel_sdvo_connector->tv_format =
2266 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2267 "mode", intel_sdvo_connector->format_supported_num);
2268 if (!intel_sdvo_connector->tv_format)
2269 return false;
2270
2271 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2272 drm_property_add_enum(
2273 intel_sdvo_connector->tv_format, i,
2274 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2275
2276 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2277 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2278 intel_sdvo_connector->tv_format, 0);
2279 return true;
2280
2281 }
2282
2283 #define ENHANCEMENT(name, NAME) do { \
2284 if (enhancements.name) { \
2285 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2286 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2287 return false; \
2288 intel_sdvo_connector->max_##name = data_value[0]; \
2289 intel_sdvo_connector->cur_##name = response; \
2290 intel_sdvo_connector->name = \
2291 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2292 if (!intel_sdvo_connector->name) return false; \
2293 intel_sdvo_connector->name->values[0] = 0; \
2294 intel_sdvo_connector->name->values[1] = data_value[0]; \
2295 drm_connector_attach_property(connector, \
2296 intel_sdvo_connector->name, \
2297 intel_sdvo_connector->cur_##name); \
2298 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2299 data_value[0], data_value[1], response); \
2300 } \
2301 } while(0)
2302
2303 static bool
2304 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2305 struct intel_sdvo_connector *intel_sdvo_connector,
2306 struct intel_sdvo_enhancements_reply enhancements)
2307 {
2308 struct drm_device *dev = intel_sdvo->base.base.dev;
2309 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2310 uint16_t response, data_value[2];
2311
2312 /* when horizontal overscan is supported, Add the left/right property */
2313 if (enhancements.overscan_h) {
2314 if (!intel_sdvo_get_value(intel_sdvo,
2315 SDVO_CMD_GET_MAX_OVERSCAN_H,
2316 &data_value, 4))
2317 return false;
2318
2319 if (!intel_sdvo_get_value(intel_sdvo,
2320 SDVO_CMD_GET_OVERSCAN_H,
2321 &response, 2))
2322 return false;
2323
2324 intel_sdvo_connector->max_hscan = data_value[0];
2325 intel_sdvo_connector->left_margin = data_value[0] - response;
2326 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2327 intel_sdvo_connector->left =
2328 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2329 "left_margin", 2);
2330 if (!intel_sdvo_connector->left)
2331 return false;
2332
2333 intel_sdvo_connector->left->values[0] = 0;
2334 intel_sdvo_connector->left->values[1] = data_value[0];
2335 drm_connector_attach_property(connector,
2336 intel_sdvo_connector->left,
2337 intel_sdvo_connector->left_margin);
2338
2339 intel_sdvo_connector->right =
2340 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2341 "right_margin", 2);
2342 if (!intel_sdvo_connector->right)
2343 return false;
2344
2345 intel_sdvo_connector->right->values[0] = 0;
2346 intel_sdvo_connector->right->values[1] = data_value[0];
2347 drm_connector_attach_property(connector,
2348 intel_sdvo_connector->right,
2349 intel_sdvo_connector->right_margin);
2350 DRM_DEBUG_KMS("h_overscan: max %d, "
2351 "default %d, current %d\n",
2352 data_value[0], data_value[1], response);
2353 }
2354
2355 if (enhancements.overscan_v) {
2356 if (!intel_sdvo_get_value(intel_sdvo,
2357 SDVO_CMD_GET_MAX_OVERSCAN_V,
2358 &data_value, 4))
2359 return false;
2360
2361 if (!intel_sdvo_get_value(intel_sdvo,
2362 SDVO_CMD_GET_OVERSCAN_V,
2363 &response, 2))
2364 return false;
2365
2366 intel_sdvo_connector->max_vscan = data_value[0];
2367 intel_sdvo_connector->top_margin = data_value[0] - response;
2368 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2369 intel_sdvo_connector->top =
2370 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2371 "top_margin", 2);
2372 if (!intel_sdvo_connector->top)
2373 return false;
2374
2375 intel_sdvo_connector->top->values[0] = 0;
2376 intel_sdvo_connector->top->values[1] = data_value[0];
2377 drm_connector_attach_property(connector,
2378 intel_sdvo_connector->top,
2379 intel_sdvo_connector->top_margin);
2380
2381 intel_sdvo_connector->bottom =
2382 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2383 "bottom_margin", 2);
2384 if (!intel_sdvo_connector->bottom)
2385 return false;
2386
2387 intel_sdvo_connector->bottom->values[0] = 0;
2388 intel_sdvo_connector->bottom->values[1] = data_value[0];
2389 drm_connector_attach_property(connector,
2390 intel_sdvo_connector->bottom,
2391 intel_sdvo_connector->bottom_margin);
2392 DRM_DEBUG_KMS("v_overscan: max %d, "
2393 "default %d, current %d\n",
2394 data_value[0], data_value[1], response);
2395 }
2396
2397 ENHANCEMENT(hpos, HPOS);
2398 ENHANCEMENT(vpos, VPOS);
2399 ENHANCEMENT(saturation, SATURATION);
2400 ENHANCEMENT(contrast, CONTRAST);
2401 ENHANCEMENT(hue, HUE);
2402 ENHANCEMENT(sharpness, SHARPNESS);
2403 ENHANCEMENT(brightness, BRIGHTNESS);
2404 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2405 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2406 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2407 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2408 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2409
2410 if (enhancements.dot_crawl) {
2411 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2412 return false;
2413
2414 intel_sdvo_connector->max_dot_crawl = 1;
2415 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2416 intel_sdvo_connector->dot_crawl =
2417 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2418 if (!intel_sdvo_connector->dot_crawl)
2419 return false;
2420
2421 intel_sdvo_connector->dot_crawl->values[0] = 0;
2422 intel_sdvo_connector->dot_crawl->values[1] = 1;
2423 drm_connector_attach_property(connector,
2424 intel_sdvo_connector->dot_crawl,
2425 intel_sdvo_connector->cur_dot_crawl);
2426 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2427 }
2428
2429 return true;
2430 }
2431
2432 static bool
2433 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2434 struct intel_sdvo_connector *intel_sdvo_connector,
2435 struct intel_sdvo_enhancements_reply enhancements)
2436 {
2437 struct drm_device *dev = intel_sdvo->base.base.dev;
2438 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2439 uint16_t response, data_value[2];
2440
2441 ENHANCEMENT(brightness, BRIGHTNESS);
2442
2443 return true;
2444 }
2445 #undef ENHANCEMENT
2446
2447 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2448 struct intel_sdvo_connector *intel_sdvo_connector)
2449 {
2450 union {
2451 struct intel_sdvo_enhancements_reply reply;
2452 uint16_t response;
2453 } enhancements;
2454
2455 enhancements.response = 0;
2456 intel_sdvo_get_value(intel_sdvo,
2457 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2458 &enhancements, sizeof(enhancements));
2459 if (enhancements.response == 0) {
2460 DRM_DEBUG_KMS("No enhancement is supported\n");
2461 return true;
2462 }
2463
2464 if (IS_TV(intel_sdvo_connector))
2465 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2466 else if(IS_LVDS(intel_sdvo_connector))
2467 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2468 else
2469 return true;
2470 }
2471
2472 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2473 struct i2c_msg *msgs,
2474 int num)
2475 {
2476 struct intel_sdvo *sdvo = adapter->algo_data;
2477
2478 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2479 return -EIO;
2480
2481 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2482 }
2483
2484 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2485 {
2486 struct intel_sdvo *sdvo = adapter->algo_data;
2487 return sdvo->i2c->algo->functionality(sdvo->i2c);
2488 }
2489
2490 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2491 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2492 .functionality = intel_sdvo_ddc_proxy_func
2493 };
2494
2495 static bool
2496 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2497 struct drm_device *dev)
2498 {
2499 sdvo->ddc.owner = THIS_MODULE;
2500 sdvo->ddc.class = I2C_CLASS_DDC;
2501 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2502 sdvo->ddc.dev.parent = &dev->pdev->dev;
2503 sdvo->ddc.algo_data = sdvo;
2504 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2505
2506 return i2c_add_adapter(&sdvo->ddc) == 0;
2507 }
2508
2509 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2510 {
2511 struct drm_i915_private *dev_priv = dev->dev_private;
2512 struct intel_encoder *intel_encoder;
2513 struct intel_sdvo *intel_sdvo;
2514 int i;
2515
2516 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2517 if (!intel_sdvo)
2518 return false;
2519
2520 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2521 kfree(intel_sdvo);
2522 return false;
2523 }
2524
2525 intel_sdvo->sdvo_reg = sdvo_reg;
2526
2527 intel_encoder = &intel_sdvo->base;
2528 intel_encoder->type = INTEL_OUTPUT_SDVO;
2529 /* encoder type will be decided later */
2530 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2531
2532 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2533 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2534
2535 /* Read the regs to test if we can talk to the device */
2536 for (i = 0; i < 0x40; i++) {
2537 u8 byte;
2538
2539 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2540 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2541 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2542 goto err;
2543 }
2544 }
2545
2546 if (IS_SDVOB(sdvo_reg))
2547 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2548 else
2549 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2550
2551 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2552
2553 /* In default case sdvo lvds is false */
2554 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2555 goto err;
2556
2557 if (intel_sdvo_output_setup(intel_sdvo,
2558 intel_sdvo->caps.output_flags) != true) {
2559 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2560 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2561 goto err;
2562 }
2563
2564 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2565
2566 /* Set the input timing to the screen. Assume always input 0. */
2567 if (!intel_sdvo_set_target_input(intel_sdvo))
2568 goto err;
2569
2570 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2571 &intel_sdvo->pixel_clock_min,
2572 &intel_sdvo->pixel_clock_max))
2573 goto err;
2574
2575 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2576 "clock range %dMHz - %dMHz, "
2577 "input 1: %c, input 2: %c, "
2578 "output 1: %c, output 2: %c\n",
2579 SDVO_NAME(intel_sdvo),
2580 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2581 intel_sdvo->caps.device_rev_id,
2582 intel_sdvo->pixel_clock_min / 1000,
2583 intel_sdvo->pixel_clock_max / 1000,
2584 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2585 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2586 /* check currently supported outputs */
2587 intel_sdvo->caps.output_flags &
2588 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2589 intel_sdvo->caps.output_flags &
2590 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2591 return true;
2592
2593 err:
2594 drm_encoder_cleanup(&intel_encoder->base);
2595 i2c_del_adapter(&intel_sdvo->ddc);
2596 kfree(intel_sdvo);
2597
2598 return false;
2599 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree