Staging: dt3155: remove unused 32-bit and 8-bit global registers
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / dt3155 / dt3155_io.c
blobb2f2f1e74110806804f2989685e2ce9be459cddf
1 /*
2 * Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
3 * Jason Lapenta, Scott Smedley
5 * This file is part of the DT3155 Device Driver.
7 * The DT3155 Device Driver is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * The DT3155 Device Driver is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
15 * Public License for more details.
19 * This file provides some basic register io routines. It is modified from
20 * demo code provided by Data Translations.
23 #include <linux/delay.h>
24 #include <linux/io.h>
26 #include "dt3155.h"
27 #include "dt3155_io.h"
28 #include "dt3155_drv.h"
31 /****** local copies of board's 32 bit registers ******/
32 u32 even_dma_start_r; /* bit 0 should always be 0 */
33 u32 odd_dma_start_r; /* .. */
34 u32 even_dma_stride_r; /* bits 0&1 should always be 0 */
35 u32 odd_dma_stride_r; /* .. */
37 CSR1_R csr1_r;
38 INT_CSR_R int_csr_r;
40 IIC_CSR1_R iic_csr1_r;
41 IIC_CSR2_R iic_csr2_r;
45 /******** local copies of board's 8 bit I2C registers ******/
46 I2C_CSR2 i2c_csr2;
47 I2C_EVEN_CSR i2c_even_csr;
48 I2C_ODD_CSR i2c_odd_csr;
51 * wait_ibsyclr()
53 * This function handles read/write timing and r/w timeout error
55 static int wait_ibsyclr(void __iomem *mmio)
57 /* wait 100 microseconds */
58 udelay(100L);
59 /* __delay(loops_per_sec/10000); */
61 iic_csr2_r.reg = readl(mmio + IIC_CSR2);
62 if (iic_csr2_r.fld.NEW_CYCLE) {
63 /* if NEW_CYCLE didn't clear */
64 /* TIMEOUT ERROR */
65 dt3155_errno = DT_ERR_I2C_TIMEOUT;
66 return -ETIMEDOUT;
69 return 0; /* no error */
73 * WriteI2C()
75 * This function handles writing to 8-bit DT3155 registers
77 * 1st parameter is pointer to 32-bit register base address
78 * 2nd parameter is reg. index;
79 * 3rd is value to be written
81 int WriteI2C(void __iomem *mmio, u_short wIregIndex, u8 byVal)
83 /* read 32 bit IIC_CSR2 register data into union */
85 iic_csr2_r.reg = readl(mmio + IIC_CSR2);
87 /* for write operation */
88 iic_csr2_r.fld.DIR_RD = 0;
89 /* I2C address of I2C register: */
90 iic_csr2_r.fld.DIR_ADDR = wIregIndex;
91 /* 8 bit data to be written to I2C reg */
92 iic_csr2_r.fld.DIR_WR_DATA = byVal;
93 /* will start a direct I2C cycle: */
94 iic_csr2_r.fld.NEW_CYCLE = 1;
96 /* xfer union data into 32 bit IIC_CSR2 register */
97 writel(iic_csr2_r.reg, mmio + IIC_CSR2);
99 /* wait for IIC cycle to finish */
100 return wait_ibsyclr(mmio);
104 * ReadI2C()
106 * This function handles reading from 8-bit DT3155 registers
108 * 1st parameter is pointer to 32-bit register base address
109 * 2nd parameter is reg. index;
110 * 3rd is adrs of value to be read
112 int ReadI2C(void __iomem *mmio, u_short wIregIndex, u8 *byVal)
114 int writestat; /* status for return */
116 /* read 32 bit IIC_CSR2 register data into union */
117 iic_csr2_r.reg = readl(mmio + IIC_CSR2);
119 /* for read operation */
120 iic_csr2_r.fld.DIR_RD = 1;
122 /* I2C address of I2C register: */
123 iic_csr2_r.fld.DIR_ADDR = wIregIndex;
125 /* will start a direct I2C cycle: */
126 iic_csr2_r.fld.NEW_CYCLE = 1;
128 /* xfer union's data into 32 bit IIC_CSR2 register */
129 writel(iic_csr2_r.reg, mmio + IIC_CSR2);
131 /* wait for IIC cycle to finish */
132 writestat = wait_ibsyclr(mmio);
134 /* Next 2 commands read 32 bit IIC_CSR1 register's data into union */
135 /* first read data is in IIC_CSR1 */
136 iic_csr1_r.reg = readl(mmio + IIC_CSR1);
138 /* now get data u8 out of register */
139 *byVal = (u8) iic_csr1_r.fld.RD_DATA;
141 return writestat;