arch/arm/plat-mxc/iomux-v1.c

   1 /*
   2  * arch/arm/plat-mxc/iomux-v1.c
   3  *
   4  * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
   5  * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
   6  *
   7  * Common code for i.MX1, i.MX21 and i.MX27
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software Foundation, Inc.,
  21  * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
  22  */
  23
  24 #include <linux/errno.h>
  25 #include <linux/init.h>
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/string.h>
  29 #include <linux/gpio.h>
  30
  31 #include <mach/hardware.h>
  32 #include <asm/mach/map.h>
  33 #include <mach/iomux-v1.h>
  34
  35 static void __iomem *imx_iomuxv1_baseaddr;
  36
  37 static inline unsigned long imx_iomuxv1_readl(unsigned offset)
  38 {
  39         return __raw_readl(imx_iomuxv1_baseaddr + offset);
  40 }
  41
  42 static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
  43 {
  44         __raw_writel(val, imx_iomuxv1_baseaddr + offset);
  45 }
  46
  47 static inline void imx_iomuxv1_rmwl(unsigned offset,
  48                 unsigned long mask, unsigned long value)
  49 {
  50         unsigned long reg = imx_iomuxv1_readl(offset);
  51
  52         reg &= ~mask;
  53         reg |= value;
  54
  55         imx_iomuxv1_writel(reg, offset);
  56 }
  57
  58 static inline void imx_iomuxv1_set_puen(
  59                 unsigned int port, unsigned int pin, int on)
  60 {
  61         unsigned long mask = 1 << pin;
  62
  63         imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
  64 }
  65
  66 static inline void imx_iomuxv1_set_ddir(
  67                 unsigned int port, unsigned int pin, int out)
  68 {
  69         unsigned long mask = 1 << pin;
  70
  71         imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
  72 }
  73
  74 static inline void imx_iomuxv1_set_gpr(
  75                 unsigned int port, unsigned int pin, int af)
  76 {
  77         unsigned long mask = 1 << pin;
  78
  79         imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
  80 }
  81
  82 static inline void imx_iomuxv1_set_gius(
  83                 unsigned int port, unsigned int pin, int inuse)
  84 {
  85         unsigned long mask = 1 << pin;
  86
  87         imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
  88 }
  89
  90 static inline void imx_iomuxv1_set_ocr(
  91                 unsigned int port, unsigned int pin, unsigned int ocr)
  92 {
  93         unsigned long shift = (pin & 0xf) << 1;
  94         unsigned long mask = 3 << shift;
  95         unsigned long value = ocr << shift;
  96         unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
  97
  98         imx_iomuxv1_rmwl(offset, mask, value);
  99 }
 100
 101 static inline void imx_iomuxv1_set_iconfa(
 102                 unsigned int port, unsigned int pin, unsigned int aout)
 103 {
 104         unsigned long shift = (pin & 0xf) << 1;
 105         unsigned long mask = 3 << shift;
 106         unsigned long value = aout << shift;
 107         unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
 108
 109         imx_iomuxv1_rmwl(offset, mask, value);
 110 }
 111
 112 static inline void imx_iomuxv1_set_iconfb(
 113                 unsigned int port, unsigned int pin, unsigned int bout)
 114 {
 115         unsigned long shift = (pin & 0xf) << 1;
 116         unsigned long mask = 3 << shift;
 117         unsigned long value = bout << shift;
 118         unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
 119
 120         imx_iomuxv1_rmwl(offset, mask, value);
 121 }
 122
 123 void mxc_gpio_mode(int gpio_mode)
 124 {
 125         unsigned int pin = gpio_mode & GPIO_PIN_MASK;
 126         unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
 127         unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
 128         unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
 129         unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
 130
 131         /* Pullup enable */
 132         imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
 133
 134         /* Data direction */
 135         imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
 136
 137         /* Primary / alternate function */
 138         imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
 139
 140         /* use as gpio? */
 141         imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
 142
 143         imx_iomuxv1_set_ocr(port, pin, ocr);
 144
 145         imx_iomuxv1_set_iconfa(port, pin, aout);
 146
 147         imx_iomuxv1_set_iconfb(port, pin, bout);
 148 }
 149 EXPORT_SYMBOL(mxc_gpio_mode);
 150
 151 int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 152                 const char *label)
 153 {
 154         const int *p = pin_list;
 155         int i;
 156         unsigned gpio;
 157         unsigned mode;
 158         int ret = -EINVAL;
 159
 160         for (i = 0; i < count; i++) {
 161                 gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
 162                 mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK);
 163
 164                 if (gpio >= (GPIO_PORT_MAX + 1) * 32)
 165                         goto setup_error;
 166
 167                 ret = gpio_request(gpio, label);
 168                 if (ret)
 169                         goto setup_error;
 170
 171                 mxc_gpio_mode(gpio | mode);
 172
 173                 p++;
 174         }
 175         return 0;
 176
 177 setup_error:
 178         mxc_gpio_release_multiple_pins(pin_list, i);
 179         return ret;
 180 }
 181 EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
 182
 183 void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
 184 {
 185         const int *p = pin_list;
 186         int i;
 187
 188         for (i = 0; i < count; i++) {
 189                 unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
 190                 gpio_free(gpio);
 191                 p++;
 192         }
 193 }
 194 EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
 195
 196 static int imx_iomuxv1_init(void)
 197 {
 198 #ifdef CONFIG_ARCH_MX1
 199         if (cpu_is_mx1())
 200                 imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR);
 201         else
 202 #endif
 203 #ifdef CONFIG_MACH_MX21
 204         if (cpu_is_mx21())
 205                 imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR);
 206         else
 207 #endif
 208 #ifdef CONFIG_MACH_MX27
 209         if (cpu_is_mx27())
 210                 imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR);
 211         else
 212 #endif
 213                 return -ENODEV;
 214
 215         return 0;
 216 }
 217 pure_initcall(imx_iomuxv1_init);