drivers/pci/pci.h

   1 #ifndef DRIVERS_PCI_H
   2 #define DRIVERS_PCI_H
   3
   4 #include <linux/workqueue.h>
   5
   6 #define PCI_CFG_SPACE_SIZE      256
   7 #define PCI_CFG_SPACE_EXP_SIZE  4096
   8
   9 /* Functions internal to the PCI core code */
  10
  11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
  12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  14 extern void pci_cleanup_rom(struct pci_dev *dev);
  15 #ifdef HAVE_PCI_MMAP
  16 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
  17                          struct vm_area_struct *vma);
  18 #endif
  19 int pci_probe_reset_function(struct pci_dev *dev);
  20
  21 /**
  22  * struct pci_platform_pm_ops - Firmware PM callbacks
  23  *
  24  * @is_manageable: returns 'true' if given device is power manageable by the
  25  *                 platform firmware
  26  *
  27  * @set_state: invokes the platform firmware to set the device's power state
  28  *
  29  * @choose_state: returns PCI power state of given device preferred by the
  30  *                platform; to be used during system-wide transitions from a
  31  *                sleeping state to the working state and vice versa
  32  *
  33  * @can_wakeup: returns 'true' if given device is capable of waking up the
  34  *              system from a sleeping state
  35  *
  36  * @sleep_wake: enables/disables the system wake up capability of given device
  37  *
  38  * @run_wake: enables/disables the platform to generate run-time wake-up events
  39  *              for given device (the device's wake-up capability has to be
  40  *              enabled by @sleep_wake for this feature to work)
  41  *
  42  * If given platform is generally capable of power managing PCI devices, all of
  43  * these callbacks are mandatory.
  44  */
  45 struct pci_platform_pm_ops {
  46         bool (*is_manageable)(struct pci_dev *dev);
  47         int (*set_state)(struct pci_dev *dev, pci_power_t state);
  48         pci_power_t (*choose_state)(struct pci_dev *dev);
  49         bool (*can_wakeup)(struct pci_dev *dev);
  50         int (*sleep_wake)(struct pci_dev *dev, bool enable);
  51         int (*run_wake)(struct pci_dev *dev, bool enable);
  52 };
  53
  54 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
  55 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  56 extern void pci_disable_enabled_device(struct pci_dev *dev);
  57 extern bool pci_check_pme_status(struct pci_dev *dev);
  58 extern int pci_finish_runtime_suspend(struct pci_dev *dev);
  59 extern void pci_wakeup_event(struct pci_dev *dev);
  60 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
  61 extern void pci_pme_wakeup_bus(struct pci_bus *bus);
  62 extern void pci_pm_init(struct pci_dev *dev);
  63 extern void platform_pci_wakeup_init(struct pci_dev *dev);
  64 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  65
  66 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
  67 {
  68         return !!(pci_dev->subordinate);
  69 }
  70
  71 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
  72 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
  73 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
  74 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
  75 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
  76 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
  77
  78 struct pci_vpd_ops {
  79         ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  80         ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
  81         void (*release)(struct pci_dev *dev);
  82 };
  83
  84 struct pci_vpd {
  85         unsigned int len;
  86         const struct pci_vpd_ops *ops;
  87         struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
  88 };
  89
  90 extern int pci_vpd_pci22_init(struct pci_dev *dev);
  91 static inline void pci_vpd_release(struct pci_dev *dev)
  92 {
  93         if (dev->vpd)
  94                 dev->vpd->ops->release(dev);
  95 }
  96
  97 /* PCI /proc functions */
  98 #ifdef CONFIG_PROC_FS
  99 extern int pci_proc_attach_device(struct pci_dev *dev);
 100 extern int pci_proc_detach_device(struct pci_dev *dev);
 101 extern int pci_proc_detach_bus(struct pci_bus *bus);
 102 #else
 103 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
 104 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
 105 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
 106 #endif
 107
 108 /* Functions for PCI Hotplug drivers to use */
 109 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
 110
 111 #ifdef HAVE_PCI_LEGACY
 112 extern void pci_create_legacy_files(struct pci_bus *bus);
 113 extern void pci_remove_legacy_files(struct pci_bus *bus);
 114 #else
 115 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 116 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 117 #endif
 118
 119 /* Lock for read/write access to pci device and bus lists */
 120 extern struct rw_semaphore pci_bus_sem;
 121
 122 extern unsigned int pci_pm_d3_delay;
 123
 124 #ifdef CONFIG_PCI_MSI
 125 void pci_no_msi(void);
 126 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
 127 #else
 128 static inline void pci_no_msi(void) { }
 129 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 130 #endif
 131
 132 #ifdef CONFIG_PCIEAER
 133 void pci_no_aer(void);
 134 #else
 135 static inline void pci_no_aer(void) { }
 136 #endif
 137
 138 static inline int pci_no_d1d2(struct pci_dev *dev)
 139 {
 140         unsigned int parent_dstates = 0;
 141
 142         if (dev->bus->self)
 143                 parent_dstates = dev->bus->self->no_d1d2;
 144         return (dev->no_d1d2 || parent_dstates);
 145
 146 }
 147 extern struct device_attribute pci_dev_attrs[];
 148 extern struct device_attribute dev_attr_cpuaffinity;
 149 extern struct device_attribute dev_attr_cpulistaffinity;
 150 #ifdef CONFIG_HOTPLUG
 151 extern struct bus_attribute pci_bus_attrs[];
 152 #else
 153 #define pci_bus_attrs   NULL
 154 #endif
 155
 156
 157 /**
 158  * pci_match_one_device - Tell if a PCI device structure has a matching
 159  *                        PCI device id structure
 160  * @id: single PCI device id structure to match
 161  * @dev: the PCI device structure to match against
 162  *
 163  * Returns the matching pci_device_id structure or %NULL if there is no match.
 164  */
 165 static inline const struct pci_device_id *
 166 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 167 {
 168         if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 169             (id->device == PCI_ANY_ID || id->device == dev->device) &&
 170             (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 171             (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 172             !((id->class ^ dev->class) & id->class_mask))
 173                 return id;
 174         return NULL;
 175 }
 176
 177 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
 178
 179 /* PCI slot sysfs helper code */
 180 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 181
 182 extern struct kset *pci_slots_kset;
 183
 184 struct pci_slot_attribute {
 185         struct attribute attr;
 186         ssize_t (*show)(struct pci_slot *, char *);
 187         ssize_t (*store)(struct pci_slot *, const char *, size_t);
 188 };
 189 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 190
 191 enum pci_bar_type {
 192         pci_bar_unknown,        /* Standard PCI BAR probe */
 193         pci_bar_io,             /* An io port BAR */
 194         pci_bar_mem32,          /* A 32-bit memory BAR */
 195         pci_bar_mem64,          /* A 64-bit memory BAR */
 196 };
 197
 198 extern int pci_setup_device(struct pci_dev *dev);
 199 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 200                                 struct resource *res, unsigned int reg);
 201 extern int pci_resource_bar(struct pci_dev *dev, int resno,
 202                             enum pci_bar_type *type);
 203 extern int pci_bus_add_child(struct pci_bus *bus);
 204 extern void pci_enable_ari(struct pci_dev *dev);
 205 /**
 206  * pci_ari_enabled - query ARI forwarding status
 207  * @bus: the PCI bus
 208  *
 209  * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
 210  */
 211 static inline int pci_ari_enabled(struct pci_bus *bus)
 212 {
 213         return bus->self && bus->self->ari_enabled;
 214 }
 215
 216 #ifdef CONFIG_PCI_QUIRKS
 217 extern int pci_is_reassigndev(struct pci_dev *dev);
 218 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
 219 extern void pci_disable_bridge_window(struct pci_dev *dev);
 220 #endif
 221
 222 /* Single Root I/O Virtualization */
 223 struct pci_sriov {
 224         int pos;                /* capability position */
 225         int nres;               /* number of resources */
 226         u32 cap;                /* SR-IOV Capabilities */
 227         u16 ctrl;               /* SR-IOV Control */
 228         u16 total;              /* total VFs associated with the PF */
 229         u16 initial;            /* initial VFs associated with the PF */
 230         u16 nr_virtfn;          /* number of VFs available */
 231         u16 offset;             /* first VF Routing ID offset */
 232         u16 stride;             /* following VF stride */
 233         u32 pgsz;               /* page size for BAR alignment */
 234         u8 link;                /* Function Dependency Link */
 235         struct pci_dev *dev;    /* lowest numbered PF */
 236         struct pci_dev *self;   /* this PF */
 237         struct mutex lock;      /* lock for VF bus */
 238         struct work_struct mtask; /* VF Migration task */
 239         u8 __iomem *mstate;     /* VF Migration State Array */
 240 };
 241
 242 /* Address Translation Service */
 243 struct pci_ats {
 244         int pos;        /* capability position */
 245         int stu;        /* Smallest Translation Unit */
 246         int qdep;       /* Invalidate Queue Depth */
 247         int ref_cnt;    /* Physical Function reference count */
 248         unsigned int is_enabled:1;      /* Enable bit is set */
 249 };
 250
 251 #ifdef CONFIG_PCI_IOV
 252 extern int pci_iov_init(struct pci_dev *dev);
 253 extern void pci_iov_release(struct pci_dev *dev);
 254 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 255                                 enum pci_bar_type *type);
 256 extern int pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
 257 extern void pci_restore_iov_state(struct pci_dev *dev);
 258 extern int pci_iov_bus_range(struct pci_bus *bus);
 259
 260 extern int pci_enable_ats(struct pci_dev *dev, int ps);
 261 extern void pci_disable_ats(struct pci_dev *dev);
 262 extern int pci_ats_queue_depth(struct pci_dev *dev);
 263 /**
 264  * pci_ats_enabled - query the ATS status
 265  * @dev: the PCI device
 266  *
 267  * Returns 1 if ATS capability is enabled, or 0 if not.
 268  */
 269 static inline int pci_ats_enabled(struct pci_dev *dev)
 270 {
 271         return dev->ats && dev->ats->is_enabled;
 272 }
 273 #else
 274 static inline int pci_iov_init(struct pci_dev *dev)
 275 {
 276         return -ENODEV;
 277 }
 278 static inline void pci_iov_release(struct pci_dev *dev)
 279
 280 {
 281 }
 282 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 283                                        enum pci_bar_type *type)
 284 {
 285         return 0;
 286 }
 287 static inline void pci_restore_iov_state(struct pci_dev *dev)
 288 {
 289 }
 290 static inline int pci_iov_bus_range(struct pci_bus *bus)
 291 {
 292         return 0;
 293 }
 294
 295 static inline int pci_enable_ats(struct pci_dev *dev, int ps)
 296 {
 297         return -ENODEV;
 298 }
 299 static inline void pci_disable_ats(struct pci_dev *dev)
 300 {
 301 }
 302 static inline int pci_ats_queue_depth(struct pci_dev *dev)
 303 {
 304         return -ENODEV;
 305 }
 306 static inline int pci_ats_enabled(struct pci_dev *dev)
 307 {
 308         return 0;
 309 }
 310 #endif /* CONFIG_PCI_IOV */
 311
 312 static inline int pci_resource_alignment(struct pci_dev *dev,
 313                                          struct resource *res)
 314 {
 315 #ifdef CONFIG_PCI_IOV
 316         int resno = res - dev->resource;
 317
 318         if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 319                 return pci_sriov_resource_alignment(dev, resno);
 320 #endif
 321         return resource_alignment(res);
 322 }
 323
 324 extern void pci_enable_acs(struct pci_dev *dev);
 325
 326 struct pci_dev_reset_methods {
 327         u16 vendor;
 328         u16 device;
 329         int (*reset)(struct pci_dev *dev, int probe);
 330 };
 331
 332 #ifdef CONFIG_PCI_QUIRKS
 333 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
 334 #else
 335 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 336 {
 337         return -ENOTTY;
 338 }
 339 #endif
 340
 341 #endif /* DRIVERS_PCI_H */