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drivers/net/wireless/iwlwifi/iwl-3945.c Fix type issue on 64bit
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-3945.c
blob55ac850744b343024189ec0db16efc10e0d9aec9
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40 #include <net/mac80211.h>
41
42 #include "iwl-3945-core.h"
43 #include "iwl-3945.h"
44 #include "iwl-helpers.h"
45 #include "iwl-3945-rs.h"
46
47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
48 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
49 IWL_RATE_##r##M_IEEE, \
50 IWL_RATE_##ip##M_INDEX, \
51 IWL_RATE_##in##M_INDEX, \
52 IWL_RATE_##rp##M_INDEX, \
53 IWL_RATE_##rn##M_INDEX, \
54 IWL_RATE_##pp##M_INDEX, \
55 IWL_RATE_##np##M_INDEX, \
56 IWL_RATE_##r##M_INDEX_TABLE, \
57 IWL_RATE_##ip##M_INDEX_TABLE }
58
59 /*
60 * Parameter order:
61 * rate, prev rate, next rate, prev tgg rate, next tgg rate
62 *
63 * If there isn't a valid next or previous rate then INV is used which
64 * maps to IWL_RATE_INVALID
65 *
66 */
67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
68 IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
69 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
70 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
71 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
72 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
73 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
74 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
75 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
76 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
77 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
78 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
79 IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
80 };
81
82 /* 1 = enable the iwl3945_disable_events() function */
83 #define IWL_EVT_DISABLE (0)
84 #define IWL_EVT_DISABLE_SIZE (1532/32)
85
86 /**
87 * iwl3945_disable_events - Disable selected events in uCode event log
88 *
89 * Disable an event by writing "1"s into "disable"
90 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
91 * Default values of 0 enable uCode events to be logged.
92 * Use for only special debugging. This function is just a placeholder as-is,
93 * you'll need to provide the special bits! ...
94 * ... and set IWL_EVT_DISABLE to 1. */
95 void iwl3945_disable_events(struct iwl3945_priv *priv)
96 {
97 int ret;
98 int i;
99 u32 base; /* SRAM address of event log header */
100 u32 disable_ptr; /* SRAM address of event-disable bitmap array */
101 u32 array_size; /* # of u32 entries in array */
102 u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
103 0x00000000, /* 31 - 0 Event id numbers */
104 0x00000000, /* 63 - 32 */
105 0x00000000, /* 95 - 64 */
106 0x00000000, /* 127 - 96 */
107 0x00000000, /* 159 - 128 */
108 0x00000000, /* 191 - 160 */
109 0x00000000, /* 223 - 192 */
110 0x00000000, /* 255 - 224 */
111 0x00000000, /* 287 - 256 */
112 0x00000000, /* 319 - 288 */
113 0x00000000, /* 351 - 320 */
114 0x00000000, /* 383 - 352 */
115 0x00000000, /* 415 - 384 */
116 0x00000000, /* 447 - 416 */
117 0x00000000, /* 479 - 448 */
118 0x00000000, /* 511 - 480 */
119 0x00000000, /* 543 - 512 */
120 0x00000000, /* 575 - 544 */
121 0x00000000, /* 607 - 576 */
122 0x00000000, /* 639 - 608 */
123 0x00000000, /* 671 - 640 */
124 0x00000000, /* 703 - 672 */
125 0x00000000, /* 735 - 704 */
126 0x00000000, /* 767 - 736 */
127 0x00000000, /* 799 - 768 */
128 0x00000000, /* 831 - 800 */
129 0x00000000, /* 863 - 832 */
130 0x00000000, /* 895 - 864 */
131 0x00000000, /* 927 - 896 */
132 0x00000000, /* 959 - 928 */
133 0x00000000, /* 991 - 960 */
134 0x00000000, /* 1023 - 992 */
135 0x00000000, /* 1055 - 1024 */
136 0x00000000, /* 1087 - 1056 */
137 0x00000000, /* 1119 - 1088 */
138 0x00000000, /* 1151 - 1120 */
139 0x00000000, /* 1183 - 1152 */
140 0x00000000, /* 1215 - 1184 */
141 0x00000000, /* 1247 - 1216 */
142 0x00000000, /* 1279 - 1248 */
143 0x00000000, /* 1311 - 1280 */
144 0x00000000, /* 1343 - 1312 */
145 0x00000000, /* 1375 - 1344 */
146 0x00000000, /* 1407 - 1376 */
147 0x00000000, /* 1439 - 1408 */
148 0x00000000, /* 1471 - 1440 */
149 0x00000000, /* 1503 - 1472 */
150 };
151
152 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
153 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
154 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
155 return;
156 }
157
158 ret = iwl3945_grab_nic_access(priv);
159 if (ret) {
160 IWL_WARNING("Can not read from adapter at this time.\n");
161 return;
162 }
163
164 disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
165 array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
166 iwl3945_release_nic_access(priv);
167
168 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
169 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
170 disable_ptr);
171 ret = iwl3945_grab_nic_access(priv);
172 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
173 iwl3945_write_targ_mem(priv,
174 disable_ptr + (i * sizeof(u32)),
175 evt_disable[i]);
176
177 iwl3945_release_nic_access(priv);
178 } else {
179 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
180 IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n");
181 IWL_DEBUG_INFO(" in SRAM at 0x%x, size %d u32s\n",
182 disable_ptr, array_size);
183 }
184
185 }
186
187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
188 {
189 int idx;
190
191 for (idx = 0; idx < IWL_RATE_COUNT; idx++)
192 if (iwl3945_rates[idx].plcp == plcp)
193 return idx;
194 return -1;
195 }
196
197 /**
198 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
199 * @priv: eeprom and antenna fields are used to determine antenna flags
200 *
201 * priv->eeprom is used to determine if antenna AUX/MAIN are reversed
202 * priv->antenna specifies the antenna diversity mode:
203 *
204 * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
205 * IWL_ANTENNA_MAIN - Force MAIN antenna
206 * IWL_ANTENNA_AUX - Force AUX antenna
207 */
208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
209 {
210 switch (priv->antenna) {
211 case IWL_ANTENNA_DIVERSITY:
212 return 0;
213
214 case IWL_ANTENNA_MAIN:
215 if (priv->eeprom.antenna_switch_type)
216 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
217 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
218
219 case IWL_ANTENNA_AUX:
220 if (priv->eeprom.antenna_switch_type)
221 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
222 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
223 }
224
225 /* bad antenna selector value */
226 IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
227 return 0; /* "diversity" is default if error */
228 }
229
230 #ifdef CONFIG_IWL3945_DEBUG
231 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
232
233 static const char *iwl3945_get_tx_fail_reason(u32 status)
234 {
235 switch (status & TX_STATUS_MSK) {
236 case TX_STATUS_SUCCESS:
237 return "SUCCESS";
238 TX_STATUS_ENTRY(SHORT_LIMIT);
239 TX_STATUS_ENTRY(LONG_LIMIT);
240 TX_STATUS_ENTRY(FIFO_UNDERRUN);
241 TX_STATUS_ENTRY(MGMNT_ABORT);
242 TX_STATUS_ENTRY(NEXT_FRAG);
243 TX_STATUS_ENTRY(LIFE_EXPIRE);
244 TX_STATUS_ENTRY(DEST_PS);
245 TX_STATUS_ENTRY(ABORTED);
246 TX_STATUS_ENTRY(BT_RETRY);
247 TX_STATUS_ENTRY(STA_INVALID);
248 TX_STATUS_ENTRY(FRAG_DROPPED);
249 TX_STATUS_ENTRY(TID_DISABLE);
250 TX_STATUS_ENTRY(FRAME_FLUSHED);
251 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
252 TX_STATUS_ENTRY(TX_LOCKED);
253 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
254 }
255
256 return "UNKNOWN";
257 }
258 #else
259 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
260 {
261 return "";
262 }
263 #endif
264
265
266 /**
267 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
268 *
269 * When FW advances 'R' index, all entries between old and new 'R' index
270 * need to be reclaimed. As result, some free space forms. If there is
271 * enough free space (> low mark), wake the stack that feeds us.
272 */
273 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
274 int txq_id, int index)
275 {
276 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
277 struct iwl3945_queue *q = &txq->q;
278 struct iwl3945_tx_info *tx_info;
279
280 BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
281
282 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
283 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
284
285 tx_info = &txq->txb[txq->q.read_ptr];
286 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0],
287 &tx_info->status);
288 tx_info->skb[0] = NULL;
289 iwl3945_hw_txq_free_tfd(priv, txq);
290 }
291
292 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
293 (txq_id != IWL_CMD_QUEUE_NUM) &&
294 priv->mac80211_registered)
295 ieee80211_wake_queue(priv->hw, txq_id);
296 }
297
298 /**
299 * iwl3945_rx_reply_tx - Handle Tx response
300 */
301 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
302 struct iwl3945_rx_mem_buffer *rxb)
303 {
304 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
305 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
306 int txq_id = SEQ_TO_QUEUE(sequence);
307 int index = SEQ_TO_INDEX(sequence);
308 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
309 struct ieee80211_tx_status *tx_status;
310 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
311 u32 status = le32_to_cpu(tx_resp->status);
312 int rate_idx;
313
314 if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
315 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
316 "is out of range [0-%d] %d %d\n", txq_id,
317 index, txq->q.n_bd, txq->q.write_ptr,
318 txq->q.read_ptr);
319 return;
320 }
321
322 tx_status = &(txq->txb[txq->q.read_ptr].status);
323
324 tx_status->retry_count = tx_resp->failure_frame;
325 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
326 tx_status->flags = ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
327 IEEE80211_TX_STATUS_ACK : 0;
328
329 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
330 txq_id, iwl3945_get_tx_fail_reason(status), status,
331 tx_resp->rate, tx_resp->failure_frame);
332
333 rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
334 tx_status->control.tx_rate = &priv->ieee_rates[rate_idx];
335 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
336 iwl3945_tx_queue_reclaim(priv, txq_id, index);
337
338 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
339 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
340 }
341
342
343
344 /*****************************************************************************
345 *
346 * Intel PRO/Wireless 3945ABG/BG Network Connection
347 *
348 * RX handler implementations
349 *
350 *****************************************************************************/
351
352 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
353 {
354 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
355 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
356 (int)sizeof(struct iwl3945_notif_statistics),
357 le32_to_cpu(pkt->len));
358
359 memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
360
361 iwl3945_led_background(priv);
362
363 priv->last_statistics_time = jiffies;
364 }
365
366 /******************************************************************************
367 *
368 * Misc. internal state and helper functions
369 *
370 ******************************************************************************/
371 #ifdef CONFIG_IWL3945_DEBUG
372
373 /**
374 * iwl3945_report_frame - dump frame to syslog during debug sessions
375 *
376 * You may hack this function to show different aspects of received frames,
377 * including selective frame dumps.
378 * group100 parameter selects whether to show 1 out of 100 good frames.
379 */
380 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
381 struct iwl3945_rx_packet *pkt,
382 struct ieee80211_hdr *header, int group100)
383 {
384 u32 to_us;
385 u32 print_summary = 0;
386 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
387 u32 hundred = 0;
388 u32 dataframe = 0;
389 u16 fc;
390 u16 seq_ctl;
391 u16 channel;
392 u16 phy_flags;
393 u16 length;
394 u16 status;
395 u16 bcn_tmr;
396 u32 tsf_low;
397 u64 tsf;
398 u8 rssi;
399 u8 agc;
400 u16 sig_avg;
401 u16 noise_diff;
402 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
403 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
404 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
405 u8 *data = IWL_RX_DATA(pkt);
406
407 /* MAC header */
408 fc = le16_to_cpu(header->frame_control);
409 seq_ctl = le16_to_cpu(header->seq_ctrl);
410
411 /* metadata */
412 channel = le16_to_cpu(rx_hdr->channel);
413 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
414 length = le16_to_cpu(rx_hdr->len);
415
416 /* end-of-frame status and timestamp */
417 status = le32_to_cpu(rx_end->status);
418 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
419 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
420 tsf = le64_to_cpu(rx_end->timestamp);
421
422 /* signal statistics */
423 rssi = rx_stats->rssi;
424 agc = rx_stats->agc;
425 sig_avg = le16_to_cpu(rx_stats->sig_avg);
426 noise_diff = le16_to_cpu(rx_stats->noise_diff);
427
428 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
429
430 /* if data frame is to us and all is good,
431 * (optionally) print summary for only 1 out of every 100 */
432 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
433 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
434 dataframe = 1;
435 if (!group100)
436 print_summary = 1; /* print each frame */
437 else if (priv->framecnt_to_us < 100) {
438 priv->framecnt_to_us++;
439 print_summary = 0;
440 } else {
441 priv->framecnt_to_us = 0;
442 print_summary = 1;
443 hundred = 1;
444 }
445 } else {
446 /* print summary for all other frames */
447 print_summary = 1;
448 }
449
450 if (print_summary) {
451 char *title;
452 int rate;
453
454 if (hundred)
455 title = "100Frames";
456 else if (fc & IEEE80211_FCTL_RETRY)
457 title = "Retry";
458 else if (ieee80211_is_assoc_response(fc))
459 title = "AscRsp";
460 else if (ieee80211_is_reassoc_response(fc))
461 title = "RasRsp";
462 else if (ieee80211_is_probe_response(fc)) {
463 title = "PrbRsp";
464 print_dump = 1; /* dump frame contents */
465 } else if (ieee80211_is_beacon(fc)) {
466 title = "Beacon";
467 print_dump = 1; /* dump frame contents */
468 } else if (ieee80211_is_atim(fc))
469 title = "ATIM";
470 else if (ieee80211_is_auth(fc))
471 title = "Auth";
472 else if (ieee80211_is_deauth(fc))
473 title = "DeAuth";
474 else if (ieee80211_is_disassoc(fc))
475 title = "DisAssoc";
476 else
477 title = "Frame";
478
479 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
480 if (rate == -1)
481 rate = 0;
482 else
483 rate = iwl3945_rates[rate].ieee / 2;
484
485 /* print frame summary.
486 * MAC addresses show just the last byte (for brevity),
487 * but you can hack it to show more, if you'd like to. */
488 if (dataframe)
489 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
490 "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
491 title, fc, header->addr1[5],
492 length, rssi, channel, rate);
493 else {
494 /* src/dst addresses assume managed mode */
495 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
496 "src=0x%02x, rssi=%u, tim=%lu usec, "
497 "phy=0x%02x, chnl=%d\n",
498 title, fc, header->addr1[5],
499 header->addr3[5], rssi,
500 tsf_low - priv->scan_start_tsf,
501 phy_flags, channel);
502 }
503 }
504 if (print_dump)
505 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
506 }
507 #else
508 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
509 struct iwl3945_rx_packet *pkt,
510 struct ieee80211_hdr *header, int group100)
511 {
512 }
513 #endif
514
515
516 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
517 struct sk_buff *skb,
518 struct iwl3945_rx_frame_hdr *rx_hdr,
519 struct ieee80211_rx_status *stats)
520 {
521 /* First cache any information we need before we overwrite
522 * the information provided in the skb from the hardware */
523 s8 signal = stats->ssi;
524 s8 noise = 0;
525 int rate = stats->rate_idx;
526 u64 tsf = stats->mactime;
527 __le16 phy_flags_hw = rx_hdr->phy_flags, antenna;
528
529 struct iwl3945_rt_rx_hdr {
530 struct ieee80211_radiotap_header rt_hdr;
531 __le64 rt_tsf; /* TSF */
532 u8 rt_flags; /* radiotap packet flags */
533 u8 rt_rate; /* rate in 500kb/s */
534 __le16 rt_channelMHz; /* channel in MHz */
535 __le16 rt_chbitmask; /* channel bitfield */
536 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
537 s8 rt_dbmnoise;
538 u8 rt_antenna; /* antenna number */
539 } __attribute__ ((packed)) *iwl3945_rt;
540
541 if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
542 if (net_ratelimit())
543 printk(KERN_ERR "not enough headroom [%d] for "
544 "radiotap head [%zd]\n",
545 skb_headroom(skb), sizeof(*iwl3945_rt));
546 return;
547 }
548
549 /* put radiotap header in front of 802.11 header and data */
550 iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
551
552 /* initialise radiotap header */
553 iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
554 iwl3945_rt->rt_hdr.it_pad = 0;
555
556 /* total header + data */
557 put_unaligned_le16(sizeof(*iwl3945_rt), &iwl3945_rt->rt_hdr.it_len);
558
559 /* Indicate all the fields we add to the radiotap header */
560 put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
561 (1 << IEEE80211_RADIOTAP_FLAGS) |
562 (1 << IEEE80211_RADIOTAP_RATE) |
563 (1 << IEEE80211_RADIOTAP_CHANNEL) |
564 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
565 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
566 (1 << IEEE80211_RADIOTAP_ANTENNA),
567 &iwl3945_rt->rt_hdr.it_present);
568
569 /* Zero the flags, we'll add to them as we go */
570 iwl3945_rt->rt_flags = 0;
571
572 put_unaligned_le64(tsf, &iwl3945_rt->rt_tsf);
573
574 iwl3945_rt->rt_dbmsignal = signal;
575 iwl3945_rt->rt_dbmnoise = noise;
576
577 /* Convert the channel frequency and set the flags */
578 put_unaligned_le16(stats->freq, &iwl3945_rt->rt_channelMHz);
579 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
580 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
581 &iwl3945_rt->rt_chbitmask);
582 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
583 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
584 &iwl3945_rt->rt_chbitmask);
585 else /* 802.11g */
586 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
587 &iwl3945_rt->rt_chbitmask);
588
589 if (rate == -1)
590 iwl3945_rt->rt_rate = 0;
591 else {
592 if (stats->band == IEEE80211_BAND_5GHZ)
593 rate += IWL_FIRST_OFDM_RATE;
594
595 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
596 }
597
598 /* antenna number */
599 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
600 iwl3945_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
601
602 /* set the preamble flag if we have it */
603 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
604 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
605
606 stats->flag |= RX_FLAG_RADIOTAP;
607 }
608
609 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
610 struct iwl3945_rx_mem_buffer *rxb,
611 struct ieee80211_rx_status *stats)
612 {
613 struct ieee80211_hdr *hdr;
614 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
615 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
616 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
617 short len = le16_to_cpu(rx_hdr->len);
618
619 /* We received data from the HW, so stop the watchdog */
620 if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
621 IWL_DEBUG_DROP("Corruption detected!\n");
622 return;
623 }
624
625 /* We only process data packets if the interface is open */
626 if (unlikely(!priv->is_open)) {
627 IWL_DEBUG_DROP_LIMIT
628 ("Dropping packet while interface is not open.\n");
629 return;
630 }
631
632 skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
633 /* Set the size of the skb to the size of the frame */
634 skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
635
636 hdr = (void *)rxb->skb->data;
637
638 if (iwl3945_param_hwcrypto)
639 iwl3945_set_decrypted_flag(priv, rxb->skb,
640 le32_to_cpu(rx_end->status), stats);
641
642 if (priv->add_radiotap)
643 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
644
645 #ifdef CONFIG_IWL3945_LEDS
646 if (is_data)
647 priv->rxtxpackets += len;
648 #endif
649 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
650 rxb->skb = NULL;
651 }
652
653 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
654
655 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
656 struct iwl3945_rx_mem_buffer *rxb)
657 {
658 struct ieee80211_hdr *header;
659 struct ieee80211_rx_status rx_status;
660 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
661 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
662 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
663 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
664 int snr;
665 u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
666 u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
667 u8 network_packet;
668
669 rx_status.antenna = 0;
670 rx_status.flag = 0;
671 rx_status.mactime = le64_to_cpu(rx_end->timestamp);
672 rx_status.freq =
673 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
674 rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
675 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
676
677 rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
678 if (rx_status.band == IEEE80211_BAND_5GHZ)
679 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
680
681 if ((unlikely(rx_stats->phy_count > 20))) {
682 IWL_DEBUG_DROP
683 ("dsp size out of range [0,20]: "
684 "%d/n", rx_stats->phy_count);
685 return;
686 }
687
688 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
689 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
690 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
691 return;
692 }
693
694 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
695 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
696 return;
697 }
698
699 /* Convert 3945's rssi indicator to dBm */
700 rx_status.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
701
702 /* Set default noise value to -127 */
703 if (priv->last_rx_noise == 0)
704 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
705
706 /* 3945 provides noise info for OFDM frames only.
707 * sig_avg and noise_diff are measured by the 3945's digital signal
708 * processor (DSP), and indicate linear levels of signal level and
709 * distortion/noise within the packet preamble after
710 * automatic gain control (AGC). sig_avg should stay fairly
711 * constant if the radio's AGC is working well.
712 * Since these values are linear (not dB or dBm), linear
713 * signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
714 * Convert linear SNR to dB SNR, then subtract that from rssi dBm
715 * to obtain noise level in dBm.
716 * Calculate rx_status.signal (quality indicator in %) based on SNR. */
717 if (rx_stats_noise_diff) {
718 snr = rx_stats_sig_avg / rx_stats_noise_diff;
719 rx_status.noise = rx_status.ssi -
720 iwl3945_calc_db_from_ratio(snr);
721 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi,
722 rx_status.noise);
723
724 /* If noise info not available, calculate signal quality indicator (%)
725 * using just the dBm signal level. */
726 } else {
727 rx_status.noise = priv->last_rx_noise;
728 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi, 0);
729 }
730
731
732 IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
733 rx_status.ssi, rx_status.noise, rx_status.signal,
734 rx_stats_sig_avg, rx_stats_noise_diff);
735
736 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
737
738 network_packet = iwl3945_is_network_packet(priv, header);
739
740 IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
741 network_packet ? '*' : ' ',
742 le16_to_cpu(rx_hdr->channel),
743 rx_status.ssi, rx_status.ssi,
744 rx_status.ssi, rx_status.rate_idx);
745
746 #ifdef CONFIG_IWL3945_DEBUG
747 if (iwl3945_debug_level & (IWL_DL_RX))
748 /* Set "1" to report good data frames in groups of 100 */
749 iwl3945_dbg_report_frame(priv, pkt, header, 1);
750 #endif
751
752 if (network_packet) {
753 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
754 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
755 priv->last_rx_rssi = rx_status.ssi;
756 priv->last_rx_noise = rx_status.noise;
757 }
758
759 switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
760 case IEEE80211_FTYPE_MGMT:
761 switch (le16_to_cpu(header->frame_control) &
762 IEEE80211_FCTL_STYPE) {
763 case IEEE80211_STYPE_PROBE_RESP:
764 case IEEE80211_STYPE_BEACON:{
765 /* If this is a beacon or probe response for
766 * our network then cache the beacon
767 * timestamp */
768 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
769 && !compare_ether_addr(header->addr2,
770 priv->bssid)) ||
771 ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
772 && !compare_ether_addr(header->addr3,
773 priv->bssid)))) {
774 struct ieee80211_mgmt *mgmt =
775 (struct ieee80211_mgmt *)header;
776 __le32 *pos;
777 pos =
778 (__le32 *) & mgmt->u.beacon.
779 timestamp;
780 priv->timestamp0 = le32_to_cpu(pos[0]);
781 priv->timestamp1 = le32_to_cpu(pos[1]);
782 priv->beacon_int = le16_to_cpu(
783 mgmt->u.beacon.beacon_int);
784 if (priv->call_post_assoc_from_beacon &&
785 (priv->iw_mode ==
786 IEEE80211_IF_TYPE_STA))
787 queue_work(priv->workqueue,
788 &priv->post_associate.work);
789
790 priv->call_post_assoc_from_beacon = 0;
791 }
792
793 break;
794 }
795
796 case IEEE80211_STYPE_ACTION:
797 /* TODO: Parse 802.11h frames for CSA... */
798 break;
799
800 /*
801 * TODO: Use the new callback function from
802 * mac80211 instead of sniffing these packets.
803 */
804 case IEEE80211_STYPE_ASSOC_RESP:
805 case IEEE80211_STYPE_REASSOC_RESP:{
806 struct ieee80211_mgmt *mgnt =
807 (struct ieee80211_mgmt *)header;
808
809 /* We have just associated, give some
810 * time for the 4-way handshake if
811 * any. Don't start scan too early. */
812 priv->next_scan_jiffies = jiffies +
813 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
814
815 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
816 le16_to_cpu(mgnt->u.
817 assoc_resp.aid));
818 priv->assoc_capability =
819 le16_to_cpu(mgnt->u.assoc_resp.capab_info);
820 if (priv->beacon_int)
821 queue_work(priv->workqueue,
822 &priv->post_associate.work);
823 else
824 priv->call_post_assoc_from_beacon = 1;
825 break;
826 }
827
828 case IEEE80211_STYPE_PROBE_REQ:{
829 DECLARE_MAC_BUF(mac1);
830 DECLARE_MAC_BUF(mac2);
831 DECLARE_MAC_BUF(mac3);
832 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
833 IWL_DEBUG_DROP
834 ("Dropping (non network): %s"
835 ", %s, %s\n",
836 print_mac(mac1, header->addr1),
837 print_mac(mac2, header->addr2),
838 print_mac(mac3, header->addr3));
839 return;
840 }
841 }
842
843 iwl3945_handle_data_packet(priv, 0, rxb, &rx_status);
844 break;
845
846 case IEEE80211_FTYPE_CTL:
847 break;
848
849 case IEEE80211_FTYPE_DATA: {
850 DECLARE_MAC_BUF(mac1);
851 DECLARE_MAC_BUF(mac2);
852 DECLARE_MAC_BUF(mac3);
853
854 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
855 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
856 print_mac(mac1, header->addr1),
857 print_mac(mac2, header->addr2),
858 print_mac(mac3, header->addr3));
859 else
860 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
861 break;
862 }
863 }
864 }
865
866 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
867 dma_addr_t addr, u16 len)
868 {
869 int count;
870 u32 pad;
871 struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
872
873 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
874 pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
875
876 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
877 IWL_ERROR("Error can not send more than %d chunks\n",
878 NUM_TFD_CHUNKS);
879 return -EINVAL;
880 }
881
882 tfd->pa[count].addr = cpu_to_le32(addr);
883 tfd->pa[count].len = cpu_to_le32(len);
884
885 count++;
886
887 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
888 TFD_CTL_PAD_SET(pad));
889
890 return 0;
891 }
892
893 /**
894 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
895 *
896 * Does NOT advance any indexes
897 */
898 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
899 {
900 struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
901 struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
902 struct pci_dev *dev = priv->pci_dev;
903 int i;
904 int counter;
905
906 /* classify bd */
907 if (txq->q.id == IWL_CMD_QUEUE_NUM)
908 /* nothing to cleanup after for host commands */
909 return 0;
910
911 /* sanity check */
912 counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
913 if (counter > NUM_TFD_CHUNKS) {
914 IWL_ERROR("Too many chunks: %i\n", counter);
915 /* @todo issue fatal error, it is quite serious situation */
916 return 0;
917 }
918
919 /* unmap chunks if any */
920
921 for (i = 1; i < counter; i++) {
922 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
923 le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
924 if (txq->txb[txq->q.read_ptr].skb[0]) {
925 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
926 if (txq->txb[txq->q.read_ptr].skb[0]) {
927 /* Can be called from interrupt context */
928 dev_kfree_skb_any(skb);
929 txq->txb[txq->q.read_ptr].skb[0] = NULL;
930 }
931 }
932 }
933 return 0;
934 }
935
936 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
937 {
938 int i;
939 int ret = IWL_INVALID_STATION;
940 unsigned long flags;
941 DECLARE_MAC_BUF(mac);
942
943 spin_lock_irqsave(&priv->sta_lock, flags);
944 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
945 if ((priv->stations[i].used) &&
946 (!compare_ether_addr
947 (priv->stations[i].sta.sta.addr, addr))) {
948 ret = i;
949 goto out;
950 }
951
952 IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
953 print_mac(mac, addr), priv->num_stations);
954 out:
955 spin_unlock_irqrestore(&priv->sta_lock, flags);
956 return ret;
957 }
958
959 /**
960 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
961 *
962 */
963 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
964 struct iwl3945_cmd *cmd,
965 struct ieee80211_tx_control *ctrl,
966 struct ieee80211_hdr *hdr, int sta_id, int tx_id)
967 {
968 unsigned long flags;
969 u16 rate_index = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
970 u16 rate_mask;
971 int rate;
972 u8 rts_retry_limit;
973 u8 data_retry_limit;
974 __le32 tx_flags;
975 u16 fc = le16_to_cpu(hdr->frame_control);
976
977 rate = iwl3945_rates[rate_index].plcp;
978 tx_flags = cmd->cmd.tx.tx_flags;
979
980 /* We need to figure out how to get the sta->supp_rates while
981 * in this running context; perhaps encoding into ctrl->tx_rate? */
982 rate_mask = IWL_RATES_MASK;
983
984 spin_lock_irqsave(&priv->sta_lock, flags);
985
986 priv->stations[sta_id].current_rate.rate_n_flags = rate;
987
988 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
989 (sta_id != priv->hw_setting.bcast_sta_id) &&
990 (sta_id != IWL_MULTICAST_ID))
991 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
992
993 spin_unlock_irqrestore(&priv->sta_lock, flags);
994
995 if (tx_id >= IWL_CMD_QUEUE_NUM)
996 rts_retry_limit = 3;
997 else
998 rts_retry_limit = 7;
999
1000 if (ieee80211_is_probe_response(fc)) {
1001 data_retry_limit = 3;
1002 if (data_retry_limit < rts_retry_limit)
1003 rts_retry_limit = data_retry_limit;
1004 } else
1005 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1006
1007 if (priv->data_retry_limit != -1)
1008 data_retry_limit = priv->data_retry_limit;
1009
1010 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1011 switch (fc & IEEE80211_FCTL_STYPE) {
1012 case IEEE80211_STYPE_AUTH:
1013 case IEEE80211_STYPE_DEAUTH:
1014 case IEEE80211_STYPE_ASSOC_REQ:
1015 case IEEE80211_STYPE_REASSOC_REQ:
1016 if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1017 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1018 tx_flags |= TX_CMD_FLG_CTS_MSK;
1019 }
1020 break;
1021 default:
1022 break;
1023 }
1024 }
1025
1026 cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1027 cmd->cmd.tx.data_retry_limit = data_retry_limit;
1028 cmd->cmd.tx.rate = rate;
1029 cmd->cmd.tx.tx_flags = tx_flags;
1030
1031 /* OFDM */
1032 cmd->cmd.tx.supp_rates[0] =
1033 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1034
1035 /* CCK */
1036 cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1037
1038 IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1039 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1040 cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1041 cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1042 }
1043
1044 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1045 {
1046 unsigned long flags_spin;
1047 struct iwl3945_station_entry *station;
1048
1049 if (sta_id == IWL_INVALID_STATION)
1050 return IWL_INVALID_STATION;
1051
1052 spin_lock_irqsave(&priv->sta_lock, flags_spin);
1053 station = &priv->stations[sta_id];
1054
1055 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1056 station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1057 station->current_rate.rate_n_flags = tx_rate;
1058 station->sta.mode = STA_CONTROL_MODIFY_MSK;
1059
1060 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1061
1062 iwl3945_send_add_station(priv, &station->sta, flags);
1063 IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1064 sta_id, tx_rate);
1065 return sta_id;
1066 }
1067
1068 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1069 {
1070 int rc;
1071 unsigned long flags;
1072
1073 spin_lock_irqsave(&priv->lock, flags);
1074 rc = iwl3945_grab_nic_access(priv);
1075 if (rc) {
1076 spin_unlock_irqrestore(&priv->lock, flags);
1077 return rc;
1078 }
1079
1080 if (!pwr_max) {
1081 u32 val;
1082
1083 rc = pci_read_config_dword(priv->pci_dev,
1084 PCI_POWER_SOURCE, &val);
1085 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1086 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1087 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1088 ~APMG_PS_CTRL_MSK_PWR_SRC);
1089 iwl3945_release_nic_access(priv);
1090
1091 iwl3945_poll_bit(priv, CSR_GPIO_IN,
1092 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1093 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1094 } else
1095 iwl3945_release_nic_access(priv);
1096 } else {
1097 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1098 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1099 ~APMG_PS_CTRL_MSK_PWR_SRC);
1100
1101 iwl3945_release_nic_access(priv);
1102 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1103 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
1104 }
1105 spin_unlock_irqrestore(&priv->lock, flags);
1106
1107 return rc;
1108 }
1109
1110 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1111 {
1112 int rc;
1113 unsigned long flags;
1114
1115 spin_lock_irqsave(&priv->lock, flags);
1116 rc = iwl3945_grab_nic_access(priv);
1117 if (rc) {
1118 spin_unlock_irqrestore(&priv->lock, flags);
1119 return rc;
1120 }
1121
1122 iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1123 iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1124 priv->hw_setting.shared_phys +
1125 offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1126 iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1127 iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1128 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1129 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1130 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1131 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1132 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1133 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1134 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1135 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1136
1137 /* fake read to flush all prev I/O */
1138 iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1139
1140 iwl3945_release_nic_access(priv);
1141 spin_unlock_irqrestore(&priv->lock, flags);
1142
1143 return 0;
1144 }
1145
1146 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1147 {
1148 int rc;
1149 unsigned long flags;
1150
1151 spin_lock_irqsave(&priv->lock, flags);
1152 rc = iwl3945_grab_nic_access(priv);
1153 if (rc) {
1154 spin_unlock_irqrestore(&priv->lock, flags);
1155 return rc;
1156 }
1157
1158 /* bypass mode */
1159 iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1160
1161 /* RA 0 is active */
1162 iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1163
1164 /* all 6 fifo are active */
1165 iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1166
1167 iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1168 iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1169 iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1170 iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1171
1172 iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1173 priv->hw_setting.shared_phys);
1174
1175 iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1176 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1177 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1178 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1179 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1180 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1181 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1182 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1183
1184 iwl3945_release_nic_access(priv);
1185 spin_unlock_irqrestore(&priv->lock, flags);
1186
1187 return 0;
1188 }
1189
1190 /**
1191 * iwl3945_txq_ctx_reset - Reset TX queue context
1192 *
1193 * Destroys all DMA structures and initialize them again
1194 */
1195 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1196 {
1197 int rc;
1198 int txq_id, slots_num;
1199
1200 iwl3945_hw_txq_ctx_free(priv);
1201
1202 /* Tx CMD queue */
1203 rc = iwl3945_tx_reset(priv);
1204 if (rc)
1205 goto error;
1206
1207 /* Tx queue(s) */
1208 for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1209 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1210 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1211 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1212 txq_id);
1213 if (rc) {
1214 IWL_ERROR("Tx %d queue init failed\n", txq_id);
1215 goto error;
1216 }
1217 }
1218
1219 return rc;
1220
1221 error:
1222 iwl3945_hw_txq_ctx_free(priv);
1223 return rc;
1224 }
1225
1226 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1227 {
1228 u8 rev_id;
1229 int rc;
1230 unsigned long flags;
1231 struct iwl3945_rx_queue *rxq = &priv->rxq;
1232
1233 iwl3945_power_init_handle(priv);
1234
1235 spin_lock_irqsave(&priv->lock, flags);
1236 iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
1237 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1238 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1239
1240 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1241 rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1242 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1243 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1244 if (rc < 0) {
1245 spin_unlock_irqrestore(&priv->lock, flags);
1246 IWL_DEBUG_INFO("Failed to init the card\n");
1247 return rc;
1248 }
1249
1250 rc = iwl3945_grab_nic_access(priv);
1251 if (rc) {
1252 spin_unlock_irqrestore(&priv->lock, flags);
1253 return rc;
1254 }
1255 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1256 APMG_CLK_VAL_DMA_CLK_RQT |
1257 APMG_CLK_VAL_BSM_CLK_RQT);
1258 udelay(20);
1259 iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1260 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1261 iwl3945_release_nic_access(priv);
1262 spin_unlock_irqrestore(&priv->lock, flags);
1263
1264 /* Determine HW type */
1265 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1266 if (rc)
1267 return rc;
1268 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1269
1270 iwl3945_nic_set_pwr_src(priv, 1);
1271 spin_lock_irqsave(&priv->lock, flags);
1272
1273 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1274 IWL_DEBUG_INFO("RTP type \n");
1275 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1276 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1277 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1278 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1279 } else {
1280 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1281 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1282 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1283 }
1284
1285 if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1286 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1287 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1288 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1289 } else
1290 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1291
1292 if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1293 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1294 priv->eeprom.board_revision);
1295 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1296 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1297 } else {
1298 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1299 priv->eeprom.board_revision);
1300 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1301 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1302 }
1303
1304 if (priv->eeprom.almgor_m_version <= 1) {
1305 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1306 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1307 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1308 priv->eeprom.almgor_m_version);
1309 } else {
1310 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1311 priv->eeprom.almgor_m_version);
1312 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1313 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1314 }
1315 spin_unlock_irqrestore(&priv->lock, flags);
1316
1317 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1318 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1319
1320 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1321 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1322
1323 /* Allocate the RX queue, or reset if it is already allocated */
1324 if (!rxq->bd) {
1325 rc = iwl3945_rx_queue_alloc(priv);
1326 if (rc) {
1327 IWL_ERROR("Unable to initialize Rx queue\n");
1328 return -ENOMEM;
1329 }
1330 } else
1331 iwl3945_rx_queue_reset(priv, rxq);
1332
1333 iwl3945_rx_replenish(priv);
1334
1335 iwl3945_rx_init(priv, rxq);
1336
1337 spin_lock_irqsave(&priv->lock, flags);
1338
1339 /* Look at using this instead:
1340 rxq->need_update = 1;
1341 iwl3945_rx_queue_update_write_ptr(priv, rxq);
1342 */
1343
1344 rc = iwl3945_grab_nic_access(priv);
1345 if (rc) {
1346 spin_unlock_irqrestore(&priv->lock, flags);
1347 return rc;
1348 }
1349 iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1350 iwl3945_release_nic_access(priv);
1351
1352 spin_unlock_irqrestore(&priv->lock, flags);
1353
1354 rc = iwl3945_txq_ctx_reset(priv);
1355 if (rc)
1356 return rc;
1357
1358 set_bit(STATUS_INIT, &priv->status);
1359
1360 return 0;
1361 }
1362
1363 /**
1364 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1365 *
1366 * Destroy all TX DMA queues and structures
1367 */
1368 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1369 {
1370 int txq_id;
1371
1372 /* Tx queues */
1373 for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1374 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1375 }
1376
1377 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1378 {
1379 int queue;
1380 unsigned long flags;
1381
1382 spin_lock_irqsave(&priv->lock, flags);
1383 if (iwl3945_grab_nic_access(priv)) {
1384 spin_unlock_irqrestore(&priv->lock, flags);
1385 iwl3945_hw_txq_ctx_free(priv);
1386 return;
1387 }
1388
1389 /* stop SCD */
1390 iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1391
1392 /* reset TFD queues */
1393 for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1394 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1395 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1396 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1397 1000);
1398 }
1399
1400 iwl3945_release_nic_access(priv);
1401 spin_unlock_irqrestore(&priv->lock, flags);
1402
1403 iwl3945_hw_txq_ctx_free(priv);
1404 }
1405
1406 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1407 {
1408 int rc = 0;
1409 u32 reg_val;
1410 unsigned long flags;
1411
1412 spin_lock_irqsave(&priv->lock, flags);
1413
1414 /* set stop master bit */
1415 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1416
1417 reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1418
1419 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1420 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1421 IWL_DEBUG_INFO("Card in power save, master is already "
1422 "stopped\n");
1423 else {
1424 rc = iwl3945_poll_bit(priv, CSR_RESET,
1425 CSR_RESET_REG_FLAG_MASTER_DISABLED,
1426 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1427 if (rc < 0) {
1428 spin_unlock_irqrestore(&priv->lock, flags);
1429 return rc;
1430 }
1431 }
1432
1433 spin_unlock_irqrestore(&priv->lock, flags);
1434 IWL_DEBUG_INFO("stop master\n");
1435
1436 return rc;
1437 }
1438
1439 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1440 {
1441 int rc;
1442 unsigned long flags;
1443
1444 iwl3945_hw_nic_stop_master(priv);
1445
1446 spin_lock_irqsave(&priv->lock, flags);
1447
1448 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1449
1450 rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1451 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1452 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1453
1454 rc = iwl3945_grab_nic_access(priv);
1455 if (!rc) {
1456 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1457 APMG_CLK_VAL_BSM_CLK_RQT);
1458
1459 udelay(10);
1460
1461 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1462 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1463
1464 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1465 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1466 0xFFFFFFFF);
1467
1468 /* enable DMA */
1469 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1470 APMG_CLK_VAL_DMA_CLK_RQT |
1471 APMG_CLK_VAL_BSM_CLK_RQT);
1472 udelay(10);
1473
1474 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1475 APMG_PS_CTRL_VAL_RESET_REQ);
1476 udelay(5);
1477 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1478 APMG_PS_CTRL_VAL_RESET_REQ);
1479 iwl3945_release_nic_access(priv);
1480 }
1481
1482 /* Clear the 'host command active' bit... */
1483 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1484
1485 wake_up_interruptible(&priv->wait_command_queue);
1486 spin_unlock_irqrestore(&priv->lock, flags);
1487
1488 return rc;
1489 }
1490
1491 /**
1492 * iwl3945_hw_reg_adjust_power_by_temp
1493 * return index delta into power gain settings table
1494 */
1495 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1496 {
1497 return (new_reading - old_reading) * (-11) / 100;
1498 }
1499
1500 /**
1501 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1502 */
1503 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1504 {
1505 return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1506 }
1507
1508 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1509 {
1510 return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1511 }
1512
1513 /**
1514 * iwl3945_hw_reg_txpower_get_temperature
1515 * get the current temperature by reading from NIC
1516 */
1517 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1518 {
1519 int temperature;
1520
1521 temperature = iwl3945_hw_get_temperature(priv);
1522
1523 /* driver's okay range is -260 to +25.
1524 * human readable okay range is 0 to +285 */
1525 IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1526
1527 /* handle insane temp reading */
1528 if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1529 IWL_ERROR("Error bad temperature value %d\n", temperature);
1530
1531 /* if really really hot(?),
1532 * substitute the 3rd band/group's temp measured at factory */
1533 if (priv->last_temperature > 100)
1534 temperature = priv->eeprom.groups[2].temperature;
1535 else /* else use most recent "sane" value from driver */
1536 temperature = priv->last_temperature;
1537 }
1538
1539 return temperature; /* raw, not "human readable" */
1540 }
1541
1542 /* Adjust Txpower only if temperature variance is greater than threshold.
1543 *
1544 * Both are lower than older versions' 9 degrees */
1545 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1546
1547 /**
1548 * is_temp_calib_needed - determines if new calibration is needed
1549 *
1550 * records new temperature in tx_mgr->temperature.
1551 * replaces tx_mgr->last_temperature *only* if calib needed
1552 * (assumes caller will actually do the calibration!). */
1553 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1554 {
1555 int temp_diff;
1556
1557 priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1558 temp_diff = priv->temperature - priv->last_temperature;
1559
1560 /* get absolute value */
1561 if (temp_diff < 0) {
1562 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1563 temp_diff = -temp_diff;
1564 } else if (temp_diff == 0)
1565 IWL_DEBUG_POWER("Same temp,\n");
1566 else
1567 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1568
1569 /* if we don't need calibration, *don't* update last_temperature */
1570 if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1571 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1572 return 0;
1573 }
1574
1575 IWL_DEBUG_POWER("Timed thermal calib needed\n");
1576
1577 /* assume that caller will actually do calib ...
1578 * update the "last temperature" value */
1579 priv->last_temperature = priv->temperature;
1580 return 1;
1581 }
1582
1583 #define IWL_MAX_GAIN_ENTRIES 78
1584 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1585 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1586
1587 /* radio and DSP power table, each step is 1/2 dB.
1588 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1589 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1590 {
1591 {251, 127}, /* 2.4 GHz, highest power */
1592 {251, 127},
1593 {251, 127},
1594 {251, 127},
1595 {251, 125},
1596 {251, 110},
1597 {251, 105},
1598 {251, 98},
1599 {187, 125},
1600 {187, 115},
1601 {187, 108},
1602 {187, 99},
1603 {243, 119},
1604 {243, 111},
1605 {243, 105},
1606 {243, 97},
1607 {243, 92},
1608 {211, 106},
1609 {211, 100},
1610 {179, 120},
1611 {179, 113},
1612 {179, 107},
1613 {147, 125},
1614 {147, 119},
1615 {147, 112},
1616 {147, 106},
1617 {147, 101},
1618 {147, 97},
1619 {147, 91},
1620 {115, 107},
1621 {235, 121},
1622 {235, 115},
1623 {235, 109},
1624 {203, 127},
1625 {203, 121},
1626 {203, 115},
1627 {203, 108},
1628 {203, 102},
1629 {203, 96},
1630 {203, 92},
1631 {171, 110},
1632 {171, 104},
1633 {171, 98},
1634 {139, 116},
1635 {227, 125},
1636 {227, 119},
1637 {227, 113},
1638 {227, 107},
1639 {227, 101},
1640 {227, 96},
1641 {195, 113},
1642 {195, 106},
1643 {195, 102},
1644 {195, 95},
1645 {163, 113},
1646 {163, 106},
1647 {163, 102},
1648 {163, 95},
1649 {131, 113},
1650 {131, 106},
1651 {131, 102},
1652 {131, 95},
1653 {99, 113},
1654 {99, 106},
1655 {99, 102},
1656 {99, 95},
1657 {67, 113},
1658 {67, 106},
1659 {67, 102},
1660 {67, 95},
1661 {35, 113},
1662 {35, 106},
1663 {35, 102},
1664 {35, 95},
1665 {3, 113},
1666 {3, 106},
1667 {3, 102},
1668 {3, 95} }, /* 2.4 GHz, lowest power */
1669 {
1670 {251, 127}, /* 5.x GHz, highest power */
1671 {251, 120},
1672 {251, 114},
1673 {219, 119},
1674 {219, 101},
1675 {187, 113},
1676 {187, 102},
1677 {155, 114},
1678 {155, 103},
1679 {123, 117},
1680 {123, 107},
1681 {123, 99},
1682 {123, 92},
1683 {91, 108},
1684 {59, 125},
1685 {59, 118},
1686 {59, 109},
1687 {59, 102},
1688 {59, 96},
1689 {59, 90},
1690 {27, 104},
1691 {27, 98},
1692 {27, 92},
1693 {115, 118},
1694 {115, 111},
1695 {115, 104},
1696 {83, 126},
1697 {83, 121},
1698 {83, 113},
1699 {83, 105},
1700 {83, 99},
1701 {51, 118},
1702 {51, 111},
1703 {51, 104},
1704 {51, 98},
1705 {19, 116},
1706 {19, 109},
1707 {19, 102},
1708 {19, 98},
1709 {19, 93},
1710 {171, 113},
1711 {171, 107},
1712 {171, 99},
1713 {139, 120},
1714 {139, 113},
1715 {139, 107},
1716 {139, 99},
1717 {107, 120},
1718 {107, 113},
1719 {107, 107},
1720 {107, 99},
1721 {75, 120},
1722 {75, 113},
1723 {75, 107},
1724 {75, 99},
1725 {43, 120},
1726 {43, 113},
1727 {43, 107},
1728 {43, 99},
1729 {11, 120},
1730 {11, 113},
1731 {11, 107},
1732 {11, 99},
1733 {131, 107},
1734 {131, 99},
1735 {99, 120},
1736 {99, 113},
1737 {99, 107},
1738 {99, 99},
1739 {67, 120},
1740 {67, 113},
1741 {67, 107},
1742 {67, 99},
1743 {35, 120},
1744 {35, 113},
1745 {35, 107},
1746 {35, 99},
1747 {3, 120} } /* 5.x GHz, lowest power */
1748 };
1749
1750 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1751 {
1752 if (index < 0)
1753 return 0;
1754 if (index >= IWL_MAX_GAIN_ENTRIES)
1755 return IWL_MAX_GAIN_ENTRIES - 1;
1756 return (u8) index;
1757 }
1758
1759 /* Kick off thermal recalibration check every 60 seconds */
1760 #define REG_RECALIB_PERIOD (60)
1761
1762 /**
1763 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1764 *
1765 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1766 * or 6 Mbit (OFDM) rates.
1767 */
1768 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1769 s32 rate_index, const s8 *clip_pwrs,
1770 struct iwl3945_channel_info *ch_info,
1771 int band_index)
1772 {
1773 struct iwl3945_scan_power_info *scan_power_info;
1774 s8 power;
1775 u8 power_index;
1776
1777 scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1778
1779 /* use this channel group's 6Mbit clipping/saturation pwr,
1780 * but cap at regulatory scan power restriction (set during init
1781 * based on eeprom channel data) for this channel. */
1782 power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1783
1784 /* further limit to user's max power preference.
1785 * FIXME: Other spectrum management power limitations do not
1786 * seem to apply?? */
1787 power = min(power, priv->user_txpower_limit);
1788 scan_power_info->requested_power = power;
1789
1790 /* find difference between new scan *power* and current "normal"
1791 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1792 * current "normal" temperature-compensated Tx power *index* for
1793 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1794 * *index*. */
1795 power_index = ch_info->power_info[rate_index].power_table_index
1796 - (power - ch_info->power_info
1797 [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1798
1799 /* store reference index that we use when adjusting *all* scan
1800 * powers. So we can accommodate user (all channel) or spectrum
1801 * management (single channel) power changes "between" temperature
1802 * feedback compensation procedures.
1803 * don't force fit this reference index into gain table; it may be a
1804 * negative number. This will help avoid errors when we're at
1805 * the lower bounds (highest gains, for warmest temperatures)
1806 * of the table. */
1807
1808 /* don't exceed table bounds for "real" setting */
1809 power_index = iwl3945_hw_reg_fix_power_index(power_index);
1810
1811 scan_power_info->power_table_index = power_index;
1812 scan_power_info->tpc.tx_gain =
1813 power_gain_table[band_index][power_index].tx_gain;
1814 scan_power_info->tpc.dsp_atten =
1815 power_gain_table[band_index][power_index].dsp_atten;
1816 }
1817
1818 /**
1819 * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1820 *
1821 * Configures power settings for all rates for the current channel,
1822 * using values from channel info struct, and send to NIC
1823 */
1824 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1825 {
1826 int rate_idx, i;
1827 const struct iwl3945_channel_info *ch_info = NULL;
1828 struct iwl3945_txpowertable_cmd txpower = {
1829 .channel = priv->active_rxon.channel,
1830 };
1831
1832 txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1833 ch_info = iwl3945_get_channel_info(priv,
1834 priv->band,
1835 le16_to_cpu(priv->active_rxon.channel));
1836 if (!ch_info) {
1837 IWL_ERROR
1838 ("Failed to get channel info for channel %d [%d]\n",
1839 le16_to_cpu(priv->active_rxon.channel), priv->band);
1840 return -EINVAL;
1841 }
1842
1843 if (!is_channel_valid(ch_info)) {
1844 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1845 "non-Tx channel.\n");
1846 return 0;
1847 }
1848
1849 /* fill cmd with power settings for all rates for current channel */
1850 /* Fill OFDM rate */
1851 for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1852 rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1853
1854 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1855 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1856
1857 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1858 le16_to_cpu(txpower.channel),
1859 txpower.band,
1860 txpower.power[i].tpc.tx_gain,
1861 txpower.power[i].tpc.dsp_atten,
1862 txpower.power[i].rate);
1863 }
1864 /* Fill CCK rates */
1865 for (rate_idx = IWL_FIRST_CCK_RATE;
1866 rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1867 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1868 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1869
1870 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1871 le16_to_cpu(txpower.channel),
1872 txpower.band,
1873 txpower.power[i].tpc.tx_gain,
1874 txpower.power[i].tpc.dsp_atten,
1875 txpower.power[i].rate);
1876 }
1877
1878 return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1879 sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1880
1881 }
1882
1883 /**
1884 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1885 * @ch_info: Channel to update. Uses power_info.requested_power.
1886 *
1887 * Replace requested_power and base_power_index ch_info fields for
1888 * one channel.
1889 *
1890 * Called if user or spectrum management changes power preferences.
1891 * Takes into account h/w and modulation limitations (clip power).
1892 *
1893 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1894 *
1895 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1896 * properly fill out the scan powers, and actual h/w gain settings,
1897 * and send changes to NIC
1898 */
1899 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1900 struct iwl3945_channel_info *ch_info)
1901 {
1902 struct iwl3945_channel_power_info *power_info;
1903 int power_changed = 0;
1904 int i;
1905 const s8 *clip_pwrs;
1906 int power;
1907
1908 /* Get this chnlgrp's rate-to-max/clip-powers table */
1909 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1910
1911 /* Get this channel's rate-to-current-power settings table */
1912 power_info = ch_info->power_info;
1913
1914 /* update OFDM Txpower settings */
1915 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1916 i++, ++power_info) {
1917 int delta_idx;
1918
1919 /* limit new power to be no more than h/w capability */
1920 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1921 if (power == power_info->requested_power)
1922 continue;
1923
1924 /* find difference between old and new requested powers,
1925 * update base (non-temp-compensated) power index */
1926 delta_idx = (power - power_info->requested_power) * 2;
1927 power_info->base_power_index -= delta_idx;
1928
1929 /* save new requested power value */
1930 power_info->requested_power = power;
1931
1932 power_changed = 1;
1933 }
1934
1935 /* update CCK Txpower settings, based on OFDM 12M setting ...
1936 * ... all CCK power settings for a given channel are the *same*. */
1937 if (power_changed) {
1938 power =
1939 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1940 requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1941
1942 /* do all CCK rates' iwl3945_channel_power_info structures */
1943 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1944 power_info->requested_power = power;
1945 power_info->base_power_index =
1946 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1947 base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1948 ++power_info;
1949 }
1950 }
1951
1952 return 0;
1953 }
1954
1955 /**
1956 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1957 *
1958 * NOTE: Returned power limit may be less (but not more) than requested,
1959 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1960 * (no consideration for h/w clipping limitations).
1961 */
1962 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1963 {
1964 s8 max_power;
1965
1966 #if 0
1967 /* if we're using TGd limits, use lower of TGd or EEPROM */
1968 if (ch_info->tgd_data.max_power != 0)
1969 max_power = min(ch_info->tgd_data.max_power,
1970 ch_info->eeprom.max_power_avg);
1971
1972 /* else just use EEPROM limits */
1973 else
1974 #endif
1975 max_power = ch_info->eeprom.max_power_avg;
1976
1977 return min(max_power, ch_info->max_power_avg);
1978 }
1979
1980 /**
1981 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1982 *
1983 * Compensate txpower settings of *all* channels for temperature.
1984 * This only accounts for the difference between current temperature
1985 * and the factory calibration temperatures, and bases the new settings
1986 * on the channel's base_power_index.
1987 *
1988 * If RxOn is "associated", this sends the new Txpower to NIC!
1989 */
1990 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1991 {
1992 struct iwl3945_channel_info *ch_info = NULL;
1993 int delta_index;
1994 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1995 u8 a_band;
1996 u8 rate_index;
1997 u8 scan_tbl_index;
1998 u8 i;
1999 int ref_temp;
2000 int temperature = priv->temperature;
2001
2002 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
2003 for (i = 0; i < priv->channel_count; i++) {
2004 ch_info = &priv->channel_info[i];
2005 a_band = is_channel_a_band(ch_info);
2006
2007 /* Get this chnlgrp's factory calibration temperature */
2008 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2009 temperature;
2010
2011 /* get power index adjustment based on curr and factory
2012 * temps */
2013 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2014 ref_temp);
2015
2016 /* set tx power value for all rates, OFDM and CCK */
2017 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2018 rate_index++) {
2019 int power_idx =
2020 ch_info->power_info[rate_index].base_power_index;
2021
2022 /* temperature compensate */
2023 power_idx += delta_index;
2024
2025 /* stay within table range */
2026 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2027 ch_info->power_info[rate_index].
2028 power_table_index = (u8) power_idx;
2029 ch_info->power_info[rate_index].tpc =
2030 power_gain_table[a_band][power_idx];
2031 }
2032
2033 /* Get this chnlgrp's rate-to-max/clip-powers table */
2034 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2035
2036 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2037 for (scan_tbl_index = 0;
2038 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2039 s32 actual_index = (scan_tbl_index == 0) ?
2040 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2041 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2042 actual_index, clip_pwrs,
2043 ch_info, a_band);
2044 }
2045 }
2046
2047 /* send Txpower command for current channel to ucode */
2048 return iwl3945_hw_reg_send_txpower(priv);
2049 }
2050
2051 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2052 {
2053 struct iwl3945_channel_info *ch_info;
2054 s8 max_power;
2055 u8 a_band;
2056 u8 i;
2057
2058 if (priv->user_txpower_limit == power) {
2059 IWL_DEBUG_POWER("Requested Tx power same as current "
2060 "limit: %ddBm.\n", power);
2061 return 0;
2062 }
2063
2064 IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2065 priv->user_txpower_limit = power;
2066
2067 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2068
2069 for (i = 0; i < priv->channel_count; i++) {
2070 ch_info = &priv->channel_info[i];
2071 a_band = is_channel_a_band(ch_info);
2072
2073 /* find minimum power of all user and regulatory constraints
2074 * (does not consider h/w clipping limitations) */
2075 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2076 max_power = min(power, max_power);
2077 if (max_power != ch_info->curr_txpow) {
2078 ch_info->curr_txpow = max_power;
2079
2080 /* this considers the h/w clipping limitations */
2081 iwl3945_hw_reg_set_new_power(priv, ch_info);
2082 }
2083 }
2084
2085 /* update txpower settings for all channels,
2086 * send to NIC if associated. */
2087 is_temp_calib_needed(priv);
2088 iwl3945_hw_reg_comp_txpower_temp(priv);
2089
2090 return 0;
2091 }
2092
2093 /* will add 3945 channel switch cmd handling later */
2094 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2095 {
2096 return 0;
2097 }
2098
2099 /**
2100 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
2101 *
2102 * -- reset periodic timer
2103 * -- see if temp has changed enough to warrant re-calibration ... if so:
2104 * -- correct coeffs for temp (can reset temp timer)
2105 * -- save this temp as "last",
2106 * -- send new set of gain settings to NIC
2107 * NOTE: This should continue working, even when we're not associated,
2108 * so we can keep our internal table of scan powers current. */
2109 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2110 {
2111 /* This will kick in the "brute force"
2112 * iwl3945_hw_reg_comp_txpower_temp() below */
2113 if (!is_temp_calib_needed(priv))
2114 goto reschedule;
2115
2116 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2117 * This is based *only* on current temperature,
2118 * ignoring any previous power measurements */
2119 iwl3945_hw_reg_comp_txpower_temp(priv);
2120
2121 reschedule:
2122 queue_delayed_work(priv->workqueue,
2123 &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2124 }
2125
2126 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2127 {
2128 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2129 thermal_periodic.work);
2130
2131 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2132 return;
2133
2134 mutex_lock(&priv->mutex);
2135 iwl3945_reg_txpower_periodic(priv);
2136 mutex_unlock(&priv->mutex);
2137 }
2138
2139 /**
2140 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2141 * for the channel.
2142 *
2143 * This function is used when initializing channel-info structs.
2144 *
2145 * NOTE: These channel groups do *NOT* match the bands above!
2146 * These channel groups are based on factory-tested channels;
2147 * on A-band, EEPROM's "group frequency" entries represent the top
2148 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
2149 */
2150 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2151 const struct iwl3945_channel_info *ch_info)
2152 {
2153 struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2154 u8 group;
2155 u16 group_index = 0; /* based on factory calib frequencies */
2156 u8 grp_channel;
2157
2158 /* Find the group index for the channel ... don't use index 1(?) */
2159 if (is_channel_a_band(ch_info)) {
2160 for (group = 1; group < 5; group++) {
2161 grp_channel = ch_grp[group].group_channel;
2162 if (ch_info->channel <= grp_channel) {
2163 group_index = group;
2164 break;
2165 }
2166 }
2167 /* group 4 has a few channels *above* its factory cal freq */
2168 if (group == 5)
2169 group_index = 4;
2170 } else
2171 group_index = 0; /* 2.4 GHz, group 0 */
2172
2173 IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2174 group_index);
2175 return group_index;
2176 }
2177
2178 /**
2179 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2180 *
2181 * Interpolate to get nominal (i.e. at factory calibration temperature) index
2182 * into radio/DSP gain settings table for requested power.
2183 */
2184 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2185 s8 requested_power,
2186 s32 setting_index, s32 *new_index)
2187 {
2188 const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2189 s32 index0, index1;
2190 s32 power = 2 * requested_power;
2191 s32 i;
2192 const struct iwl3945_eeprom_txpower_sample *samples;
2193 s32 gains0, gains1;
2194 s32 res;
2195 s32 denominator;
2196
2197 chnl_grp = &priv->eeprom.groups[setting_index];
2198 samples = chnl_grp->samples;
2199 for (i = 0; i < 5; i++) {
2200 if (power == samples[i].power) {
2201 *new_index = samples[i].gain_index;
2202 return 0;
2203 }
2204 }
2205
2206 if (power > samples[1].power) {
2207 index0 = 0;
2208 index1 = 1;
2209 } else if (power > samples[2].power) {
2210 index0 = 1;
2211 index1 = 2;
2212 } else if (power > samples[3].power) {
2213 index0 = 2;
2214 index1 = 3;
2215 } else {
2216 index0 = 3;
2217 index1 = 4;
2218 }
2219
2220 denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2221 if (denominator == 0)
2222 return -EINVAL;
2223 gains0 = (s32) samples[index0].gain_index * (1 << 19);
2224 gains1 = (s32) samples[index1].gain_index * (1 << 19);
2225 res = gains0 + (gains1 - gains0) *
2226 ((s32) power - (s32) samples[index0].power) / denominator +
2227 (1 << 18);
2228 *new_index = res >> 19;
2229 return 0;
2230 }
2231
2232 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2233 {
2234 u32 i;
2235 s32 rate_index;
2236 const struct iwl3945_eeprom_txpower_group *group;
2237
2238 IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2239
2240 for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2241 s8 *clip_pwrs; /* table of power levels for each rate */
2242 s8 satur_pwr; /* saturation power for each chnl group */
2243 group = &priv->eeprom.groups[i];
2244
2245 /* sanity check on factory saturation power value */
2246 if (group->saturation_power < 40) {
2247 IWL_WARNING("Error: saturation power is %d, "
2248 "less than minimum expected 40\n",
2249 group->saturation_power);
2250 return;
2251 }
2252
2253 /*
2254 * Derive requested power levels for each rate, based on
2255 * hardware capabilities (saturation power for band).
2256 * Basic value is 3dB down from saturation, with further
2257 * power reductions for highest 3 data rates. These
2258 * backoffs provide headroom for high rate modulation
2259 * power peaks, without too much distortion (clipping).
2260 */
2261 /* we'll fill in this array with h/w max power levels */
2262 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2263
2264 /* divide factory saturation power by 2 to find -3dB level */
2265 satur_pwr = (s8) (group->saturation_power >> 1);
2266
2267 /* fill in channel group's nominal powers for each rate */
2268 for (rate_index = 0;
2269 rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2270 switch (rate_index) {
2271 case IWL_RATE_36M_INDEX_TABLE:
2272 if (i == 0) /* B/G */
2273 *clip_pwrs = satur_pwr;
2274 else /* A */
2275 *clip_pwrs = satur_pwr - 5;
2276 break;
2277 case IWL_RATE_48M_INDEX_TABLE:
2278 if (i == 0)
2279 *clip_pwrs = satur_pwr - 7;
2280 else
2281 *clip_pwrs = satur_pwr - 10;
2282 break;
2283 case IWL_RATE_54M_INDEX_TABLE:
2284 if (i == 0)
2285 *clip_pwrs = satur_pwr - 9;
2286 else
2287 *clip_pwrs = satur_pwr - 12;
2288 break;
2289 default:
2290 *clip_pwrs = satur_pwr;
2291 break;
2292 }
2293 }
2294 }
2295 }
2296
2297 /**
2298 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2299 *
2300 * Second pass (during init) to set up priv->channel_info
2301 *
2302 * Set up Tx-power settings in our channel info database for each VALID
2303 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2304 * and current temperature.
2305 *
2306 * Since this is based on current temperature (at init time), these values may
2307 * not be valid for very long, but it gives us a starting/default point,
2308 * and allows us to active (i.e. using Tx) scan.
2309 *
2310 * This does *not* write values to NIC, just sets up our internal table.
2311 */
2312 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2313 {
2314 struct iwl3945_channel_info *ch_info = NULL;
2315 struct iwl3945_channel_power_info *pwr_info;
2316 int delta_index;
2317 u8 rate_index;
2318 u8 scan_tbl_index;
2319 const s8 *clip_pwrs; /* array of power levels for each rate */
2320 u8 gain, dsp_atten;
2321 s8 power;
2322 u8 pwr_index, base_pwr_index, a_band;
2323 u8 i;
2324 int temperature;
2325
2326 /* save temperature reference,
2327 * so we can determine next time to calibrate */
2328 temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2329 priv->last_temperature = temperature;
2330
2331 iwl3945_hw_reg_init_channel_groups(priv);
2332
2333 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2334 for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2335 i++, ch_info++) {
2336 a_band = is_channel_a_band(ch_info);
2337 if (!is_channel_valid(ch_info))
2338 continue;
2339
2340 /* find this channel's channel group (*not* "band") index */
2341 ch_info->group_index =
2342 iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2343
2344 /* Get this chnlgrp's rate->max/clip-powers table */
2345 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2346
2347 /* calculate power index *adjustment* value according to
2348 * diff between current temperature and factory temperature */
2349 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2350 priv->eeprom.groups[ch_info->group_index].
2351 temperature);
2352
2353 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2354 ch_info->channel, delta_index, temperature +
2355 IWL_TEMP_CONVERT);
2356
2357 /* set tx power value for all OFDM rates */
2358 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2359 rate_index++) {
2360 s32 power_idx;
2361 int rc;
2362
2363 /* use channel group's clip-power table,
2364 * but don't exceed channel's max power */
2365 s8 pwr = min(ch_info->max_power_avg,
2366 clip_pwrs[rate_index]);
2367
2368 pwr_info = &ch_info->power_info[rate_index];
2369
2370 /* get base (i.e. at factory-measured temperature)
2371 * power table index for this rate's power */
2372 rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2373 ch_info->group_index,
2374 &power_idx);
2375 if (rc) {
2376 IWL_ERROR("Invalid power index\n");
2377 return rc;
2378 }
2379 pwr_info->base_power_index = (u8) power_idx;
2380
2381 /* temperature compensate */
2382 power_idx += delta_index;
2383
2384 /* stay within range of gain table */
2385 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2386
2387 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2388 pwr_info->requested_power = pwr;
2389 pwr_info->power_table_index = (u8) power_idx;
2390 pwr_info->tpc.tx_gain =
2391 power_gain_table[a_band][power_idx].tx_gain;
2392 pwr_info->tpc.dsp_atten =
2393 power_gain_table[a_band][power_idx].dsp_atten;
2394 }
2395
2396 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2397 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2398 power = pwr_info->requested_power +
2399 IWL_CCK_FROM_OFDM_POWER_DIFF;
2400 pwr_index = pwr_info->power_table_index +
2401 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2402 base_pwr_index = pwr_info->base_power_index +
2403 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2404
2405 /* stay within table range */
2406 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2407 gain = power_gain_table[a_band][pwr_index].tx_gain;
2408 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2409
2410 /* fill each CCK rate's iwl3945_channel_power_info structure
2411 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2412 * NOTE: CCK rates start at end of OFDM rates! */
2413 for (rate_index = 0;
2414 rate_index < IWL_CCK_RATES; rate_index++) {
2415 pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2416 pwr_info->requested_power = power;
2417 pwr_info->power_table_index = pwr_index;
2418 pwr_info->base_power_index = base_pwr_index;
2419 pwr_info->tpc.tx_gain = gain;
2420 pwr_info->tpc.dsp_atten = dsp_atten;
2421 }
2422
2423 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2424 for (scan_tbl_index = 0;
2425 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2426 s32 actual_index = (scan_tbl_index == 0) ?
2427 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2428 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2429 actual_index, clip_pwrs, ch_info, a_band);
2430 }
2431 }
2432
2433 return 0;
2434 }
2435
2436 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2437 {
2438 int rc;
2439 unsigned long flags;
2440
2441 spin_lock_irqsave(&priv->lock, flags);
2442 rc = iwl3945_grab_nic_access(priv);
2443 if (rc) {
2444 spin_unlock_irqrestore(&priv->lock, flags);
2445 return rc;
2446 }
2447
2448 iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2449 rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2450 if (rc < 0)
2451 IWL_ERROR("Can't stop Rx DMA.\n");
2452
2453 iwl3945_release_nic_access(priv);
2454 spin_unlock_irqrestore(&priv->lock, flags);
2455
2456 return 0;
2457 }
2458
2459 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2460 {
2461 int rc;
2462 unsigned long flags;
2463 int txq_id = txq->q.id;
2464
2465 struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2466
2467 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2468
2469 spin_lock_irqsave(&priv->lock, flags);
2470 rc = iwl3945_grab_nic_access(priv);
2471 if (rc) {
2472 spin_unlock_irqrestore(&priv->lock, flags);
2473 return rc;
2474 }
2475 iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2476 iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2477
2478 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2479 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2480 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2481 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2482 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2483 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2484 iwl3945_release_nic_access(priv);
2485
2486 /* fake read to flush all prev. writes */
2487 iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2488 spin_unlock_irqrestore(&priv->lock, flags);
2489
2490 return 0;
2491 }
2492
2493 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2494 {
2495 struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2496
2497 return le32_to_cpu(shared_data->rx_read_ptr[0]);
2498 }
2499
2500 /**
2501 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2502 */
2503 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2504 {
2505 int rc, i, index, prev_index;
2506 struct iwl3945_rate_scaling_cmd rate_cmd = {
2507 .reserved = {0, 0, 0},
2508 };
2509 struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2510
2511 for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2512 index = iwl3945_rates[i].table_rs_index;
2513
2514 table[index].rate_n_flags =
2515 iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2516 table[index].try_cnt = priv->retry_rate;
2517 prev_index = iwl3945_get_prev_ieee_rate(i);
2518 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2519 }
2520
2521 switch (priv->band) {
2522 case IEEE80211_BAND_5GHZ:
2523 IWL_DEBUG_RATE("Select A mode rate scale\n");
2524 /* If one of the following CCK rates is used,
2525 * have it fall back to the 6M OFDM rate */
2526 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2527 table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2528
2529 /* Don't fall back to CCK rates */
2530 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2531
2532 /* Don't drop out of OFDM rates */
2533 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2534 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2535 break;
2536
2537 case IEEE80211_BAND_2GHZ:
2538 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2539 /* If an OFDM rate is used, have it fall back to the
2540 * 1M CCK rates */
2541 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2542 table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2543
2544 /* CCK shouldn't fall back to OFDM... */
2545 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2546 break;
2547
2548 default:
2549 WARN_ON(1);
2550 break;
2551 }
2552
2553 /* Update the rate scaling for control frame Tx */
2554 rate_cmd.table_id = 0;
2555 rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2556 &rate_cmd);
2557 if (rc)
2558 return rc;
2559
2560 /* Update the rate scaling for data frame Tx */
2561 rate_cmd.table_id = 1;
2562 return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2563 &rate_cmd);
2564 }
2565
2566 /* Called when initializing driver */
2567 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2568 {
2569 memset((void *)&priv->hw_setting, 0,
2570 sizeof(struct iwl3945_driver_hw_info));
2571
2572 priv->hw_setting.shared_virt =
2573 pci_alloc_consistent(priv->pci_dev,
2574 sizeof(struct iwl3945_shared),
2575 &priv->hw_setting.shared_phys);
2576
2577 if (!priv->hw_setting.shared_virt) {
2578 IWL_ERROR("failed to allocate pci memory\n");
2579 mutex_unlock(&priv->mutex);
2580 return -ENOMEM;
2581 }
2582
2583 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2584 priv->hw_setting.max_pkt_size = 2342;
2585 priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2586 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2587 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2588 priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2589 priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2590
2591 priv->hw_setting.tx_ant_num = 2;
2592 return 0;
2593 }
2594
2595 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2596 struct iwl3945_frame *frame, u8 rate)
2597 {
2598 struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2599 unsigned int frame_size;
2600
2601 tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2602 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2603
2604 tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2605 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2606
2607 frame_size = iwl3945_fill_beacon_frame(priv,
2608 tx_beacon_cmd->frame,
2609 iwl3945_broadcast_addr,
2610 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2611
2612 BUG_ON(frame_size > MAX_MPDU_SIZE);
2613 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2614
2615 tx_beacon_cmd->tx.rate = rate;
2616 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2617 TX_CMD_FLG_TSF_MSK);
2618
2619 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2620 tx_beacon_cmd->tx.supp_rates[0] =
2621 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2622
2623 tx_beacon_cmd->tx.supp_rates[1] =
2624 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2625
2626 return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2627 }
2628
2629 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2630 {
2631 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2632 priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2633 }
2634
2635 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2636 {
2637 INIT_DELAYED_WORK(&priv->thermal_periodic,
2638 iwl3945_bg_reg_txpower_periodic);
2639 }
2640
2641 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2642 {
2643 cancel_delayed_work(&priv->thermal_periodic);
2644 }
2645
2646 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2647 .name = "3945BG",
2648 .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2649 .sku = IWL_SKU_G,
2650 };
2651
2652 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2653 .name = "3945ABG",
2654 .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2655 .sku = IWL_SKU_A|IWL_SKU_G,
2656 };
2657
2658 struct pci_device_id iwl3945_hw_card_ids[] = {
2659 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2660 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2661 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2662 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2663 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2664 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2665 {0}
2666 };
2667
2668 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree