2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
6 * Version 0.03 Cleaned auto-tune, added probe
7 * Version 0.04 Added second channel tuning
8 * Version 0.05 Enhanced tuning ; added qd6500 support
9 * Version 0.06 Added dos driver's list
10 * Version 0.07 Second channel bug fix
12 * QDI QD6500/QD6580 EIDE controller fast support
14 * To activate controller support, use "ide0=qd65xx"
18 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
19 * Samuel Thibault <samuel.thibault@ens-lyon.org>
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/timer.h>
28 #include <linux/ioport.h>
29 #include <linux/blkdev.h>
30 #include <linux/ide.h>
31 #include <linux/init.h>
32 #include <asm/system.h>
35 #define DRV_NAME "qd65xx"
40 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
41 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
42 * -- qd6500 is a single IDE interface
43 * -- qd6580 is a dual IDE interface
45 * More research on qd6580 being done by willmore@cig.mot.com (David)
46 * More Information given by Petr Soucek (petr@ryston.cz)
47 * http://www.ryston.cz/petr/vlb
54 * base+0x01: Config (R/O)
56 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
57 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
58 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
59 * bit 3: qd6500: 1 = disabled, 0 = enabled
63 * qd6580: either 1010 or 0101
66 * base+0x02: Timer2 (qd6580 only)
69 * base+0x03: Control (qd6580 only)
71 * bits 0-3 must always be set 1
72 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
73 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
74 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
75 * channel 1 for hdc & hdd
76 * bit 1 : 1 = only disks on primary port
77 * 0 = disks & ATAPI devices on primary port
79 * bit 5 : status, but of what ?
80 * bit 6 : always set 1 by dos driver
81 * bit 7 : set 1 for non-ATAPI devices on primary port
82 * (maybe read-ahead and post-write buffer ?)
85 static int timings
[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
90 * This routine is invoked to prepare for access to a given drive.
93 static void qd65xx_dev_select(ide_drive_t
*drive
)
95 u8 index
= (( (QD_TIMREG(drive
)) & 0x80 ) >> 7) |
96 (QD_TIMREG(drive
) & 0x02);
98 if (timings
[index
] != QD_TIMING(drive
))
99 outb(timings
[index
] = QD_TIMING(drive
), QD_TIMREG(drive
));
101 outb(drive
->select
| ATA_DEVICE_OBS
, drive
->hwif
->io_ports
.device_addr
);
105 * qd6500_compute_timing
107 * computes the timing value where
108 * lower nibble represents active time, in count of VLB clocks
109 * upper nibble represents recovery time, in count of VLB clocks
112 static u8
qd6500_compute_timing (ide_hwif_t
*hwif
, int active_time
, int recovery_time
)
114 int clk
= ide_vlb_clk
? ide_vlb_clk
: 50;
118 act_cyc
= 9 - IDE_IN(active_time
* clk
/ 1000 + 1, 2, 9);
119 rec_cyc
= 15 - IDE_IN(recovery_time
* clk
/ 1000 + 1, 0, 15);
121 act_cyc
= 8 - IDE_IN(active_time
* clk
/ 1000 + 1, 1, 8);
122 rec_cyc
= 18 - IDE_IN(recovery_time
* clk
/ 1000 + 1, 3, 18);
125 return (rec_cyc
<< 4) | 0x08 | act_cyc
;
129 * qd6580_compute_timing
134 static u8
qd6580_compute_timing (int active_time
, int recovery_time
)
136 int clk
= ide_vlb_clk
? ide_vlb_clk
: 50;
139 act_cyc
= 17 - IDE_IN(active_time
* clk
/ 1000 + 1, 2, 17);
140 rec_cyc
= 15 - IDE_IN(recovery_time
* clk
/ 1000 + 1, 2, 15);
142 return (rec_cyc
<< 4) | act_cyc
;
148 * tries to find timing from dos driver's table
151 static int qd_find_disk_type (ide_drive_t
*drive
,
152 int *active_time
, int *recovery_time
)
154 struct qd65xx_timing_s
*p
;
155 char *m
= (char *)&drive
->id
[ATA_ID_PROD
];
156 char model
[ATA_ID_PROD_LEN
];
161 strncpy(model
, m
, ATA_ID_PROD_LEN
);
162 ide_fixstring(model
, ATA_ID_PROD_LEN
, 1); /* byte-swap */
164 for (p
= qd65xx_timing
; p
->offset
!= -1 ; p
++) {
165 if (!strncmp(p
->model
, model
+p
->offset
, 4)) {
166 printk(KERN_DEBUG
"%s: listed !\n", drive
->name
);
167 *active_time
= p
->active
;
168 *recovery_time
= p
->recovery
;
181 static void qd_set_timing (ide_drive_t
*drive
, u8 timing
)
183 drive
->drive_data
&= 0xff00;
184 drive
->drive_data
|= timing
;
186 printk(KERN_DEBUG
"%s: %#x\n", drive
->name
, timing
);
189 static void qd6500_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
192 int active_time
= 175;
193 int recovery_time
= 415; /* worst case values from the dos driver */
196 * FIXME: use "pio" value
198 if (!qd_find_disk_type(drive
, &active_time
, &recovery_time
) &&
199 (id
[ATA_ID_OLD_PIO_MODES
] & 0xff) && (id
[ATA_ID_FIELD_VALID
] & 2) &&
200 id
[ATA_ID_EIDE_PIO
] >= 240) {
201 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,
202 id
[ATA_ID_OLD_PIO_MODES
] & 0xff);
204 recovery_time
= drive
->id
[ATA_ID_EIDE_PIO
] - 120;
207 qd_set_timing(drive
, qd6500_compute_timing(drive
->hwif
,
208 active_time
, recovery_time
));
211 static void qd6580_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
213 ide_hwif_t
*hwif
= drive
->hwif
;
214 struct ide_timing
*t
= ide_timing_find_mode(XFER_PIO_0
+ pio
);
215 unsigned int cycle_time
;
216 int active_time
= 175;
217 int recovery_time
= 415; /* worst case values from the dos driver */
218 u8 base
= (hwif
->config_data
& 0xff00) >> 8;
220 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)) {
221 cycle_time
= ide_pio_cycle_time(drive
, pio
);
226 if (cycle_time
>= 110) {
228 recovery_time
= cycle_time
- 102;
230 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
233 if (cycle_time
>= 69) {
235 recovery_time
= cycle_time
- 61;
237 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
240 if (cycle_time
>= 180) {
242 recovery_time
= cycle_time
- 120;
244 active_time
= t
->active
;
245 recovery_time
= cycle_time
- active_time
;
248 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,pio
);
251 if (!hwif
->channel
&& drive
->media
!= ide_disk
) {
252 outb(0x5f, QD_CONTROL_PORT
);
253 printk(KERN_WARNING
"%s: ATAPI: disabled read-ahead FIFO "
254 "and post-write buffer on %s.\n",
255 drive
->name
, hwif
->name
);
258 qd_set_timing(drive
, qd6580_compute_timing(active_time
, recovery_time
));
264 * tests if the given port is a register
267 static int __init
qd_testreg(int port
)
272 local_irq_save(flags
);
273 savereg
= inb_p(port
);
274 outb_p(QD_TESTVAL
, port
); /* safe value */
275 readreg
= inb_p(port
);
277 local_irq_restore(flags
);
279 if (savereg
== QD_TESTVAL
) {
280 printk(KERN_ERR
"Outch ! the probe for qd65xx isn't reliable !\n");
281 printk(KERN_ERR
"Please contact maintainers to tell about your hardware\n");
282 printk(KERN_ERR
"Assuming qd65xx is not present.\n");
286 return (readreg
!= QD_TESTVAL
);
289 static void __init
qd6500_init_dev(ide_drive_t
*drive
)
291 ide_hwif_t
*hwif
= drive
->hwif
;
292 u8 base
= (hwif
->config_data
& 0xff00) >> 8;
293 u8 config
= QD_CONFIG(hwif
);
295 drive
->drive_data
= QD6500_DEF_DATA
;
298 static void __init
qd6580_init_dev(ide_drive_t
*drive
)
300 ide_hwif_t
*hwif
= drive
->hwif
;
302 u8 base
= (hwif
->config_data
& 0xff00) >> 8;
303 u8 config
= QD_CONFIG(hwif
);
305 if (hwif
->host_flags
& IDE_HFLAG_SINGLE
) {
306 t1
= QD6580_DEF_DATA
;
307 t2
= QD6580_DEF_DATA2
;
309 t2
= t1
= hwif
->channel
? QD6580_DEF_DATA2
: QD6580_DEF_DATA
;
311 drive
->drive_data
= (drive
->dn
& 1) ? t2
: t1
;
314 static const struct ide_tp_ops qd65xx_tp_ops
= {
315 .exec_command
= ide_exec_command
,
316 .read_status
= ide_read_status
,
317 .read_altstatus
= ide_read_altstatus
,
318 .write_devctl
= ide_write_devctl
,
320 .dev_select
= qd65xx_dev_select
,
321 .tf_load
= ide_tf_load
,
322 .tf_read
= ide_tf_read
,
324 .input_data
= ide_input_data
,
325 .output_data
= ide_output_data
,
328 static const struct ide_port_ops qd6500_port_ops
= {
329 .init_dev
= qd6500_init_dev
,
330 .set_pio_mode
= qd6500_set_pio_mode
,
333 static const struct ide_port_ops qd6580_port_ops
= {
334 .init_dev
= qd6580_init_dev
,
335 .set_pio_mode
= qd6580_set_pio_mode
,
338 static const struct ide_port_info qd65xx_port_info __initdata
= {
340 .tp_ops
= &qd65xx_tp_ops
,
341 .chipset
= ide_qd65xx
,
342 .host_flags
= IDE_HFLAG_IO_32BIT
|
344 .pio_mask
= ATA_PIO4
,
350 * looks at the specified baseport, and if qd found, registers & initialises it
351 * return 1 if another qd may be probed
354 static int __init
qd_probe(int base
)
357 u8 config
, unit
, control
;
358 struct ide_port_info d
= qd65xx_port_info
;
360 config
= inb(QD_CONFIG_PORT
);
362 if (! ((config
& QD_CONFIG_BASEPORT
) >> 1 == (base
== 0xb0)) )
365 unit
= ! (config
& QD_CONFIG_IDE_BASEPORT
);
368 d
.host_flags
|= IDE_HFLAG_QD_2ND_PORT
;
370 switch (config
& 0xf0) {
371 case QD_CONFIG_QD6500
:
372 if (qd_testreg(base
))
373 return -ENODEV
; /* bad register */
375 if (config
& QD_CONFIG_DISABLED
) {
376 printk(KERN_WARNING
"qd6500 is disabled !\n");
380 printk(KERN_NOTICE
"qd6500 at %#x\n", base
);
381 printk(KERN_DEBUG
"qd6500: config=%#x, ID3=%u\n",
384 d
.port_ops
= &qd6500_port_ops
;
385 d
.host_flags
|= IDE_HFLAG_SINGLE
;
387 case QD_CONFIG_QD6580_A
:
388 case QD_CONFIG_QD6580_B
:
389 if (qd_testreg(base
) || qd_testreg(base
+ 0x02))
390 return -ENODEV
; /* bad registers */
392 control
= inb(QD_CONTROL_PORT
);
394 printk(KERN_NOTICE
"qd6580 at %#x\n", base
);
395 printk(KERN_DEBUG
"qd6580: config=%#x, control=%#x, ID3=%u\n",
396 config
, control
, QD_ID3
);
398 outb(QD_DEF_CONTR
, QD_CONTROL_PORT
);
400 d
.port_ops
= &qd6580_port_ops
;
401 if (control
& QD_CONTR_SEC_DISABLED
)
402 d
.host_flags
|= IDE_HFLAG_SINGLE
;
404 printk(KERN_INFO
"qd6580: %s IDE board\n",
405 (control
& QD_CONTR_SEC_DISABLED
) ? "single" : "dual");
411 rc
= ide_legacy_device_add(&d
, (base
<< 8) | config
);
413 if (d
.host_flags
& IDE_HFLAG_SINGLE
)
414 return (rc
== 0) ? 1 : rc
;
419 static int probe_qd65xx
;
421 module_param_named(probe
, probe_qd65xx
, bool, 0);
422 MODULE_PARM_DESC(probe
, "probe for QD65xx chipsets");
424 static int __init
qd65xx_init(void)
426 int rc1
, rc2
= -ENODEV
;
428 if (probe_qd65xx
== 0)
431 rc1
= qd_probe(0x30);
433 rc2
= qd_probe(0xb0);
435 if (rc1
< 0 && rc2
< 0)
441 module_init(qd65xx_init
);
443 MODULE_AUTHOR("Samuel Thibault");
444 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
445 MODULE_LICENSE("GPL");