thermal: remove driver_data direct access of struct device
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / ia64 / include / asm / fpu.h
blob0c26157cffa55fe0ea1c348fd0a542b11e6c46c3
1 #ifndef _ASM_IA64_FPU_H
2 #define _ASM_IA64_FPU_H
4 /*
5 * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
9 /* floating point status register: */
10 #define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */
11 #define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */
12 #define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */
13 #define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */
14 #define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */
15 #define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */
16 #define FPSR_S0(x) ((x) << 6)
17 #define FPSR_S1(x) ((x) << 19)
18 #define FPSR_S2(x) (__IA64_UL(x) << 32)
19 #define FPSR_S3(x) (__IA64_UL(x) << 45)
21 /* floating-point status field controls: */
22 #define FPSF_FTZ (1 << 0) /* flush-to-zero */
23 #define FPSF_WRE (1 << 1) /* widest-range exponent */
24 #define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */
25 #define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */
26 #define FPSF_TD (1 << 6) /* trap disabled */
28 /* floating-point status field flags: */
29 #define FPSF_V (1 << 7) /* invalid operation flag */
30 #define FPSF_D (1 << 8) /* denormal/unnormal operand flag */
31 #define FPSF_Z (1 << 9) /* zero divide (IEEE) flag */
32 #define FPSF_O (1 << 10) /* overflow (IEEE) flag */
33 #define FPSF_U (1 << 11) /* underflow (IEEE) flag */
34 #define FPSF_I (1 << 12) /* inexact (IEEE) flag) */
36 /* floating-point rounding control: */
37 #define FPRC_NEAREST 0x0
38 #define FPRC_NEGINF 0x1
39 #define FPRC_POSINF 0x2
40 #define FPRC_TRUNC 0x3
42 #define FPSF_DEFAULT (FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST))
44 /* This default value is the same as HP-UX uses. Don't change it
45 without a very good reason. */
46 #define FPSR_DEFAULT (FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD \
47 | FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID \
48 | FPSR_S0 (FPSF_DEFAULT) \
49 | FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE) \
50 | FPSR_S2 (FPSF_DEFAULT | FPSF_TD) \
51 | FPSR_S3 (FPSF_DEFAULT | FPSF_TD))
53 # ifndef __ASSEMBLY__
55 struct ia64_fpreg {
56 union {
57 unsigned long bits[2];
58 long double __dummy; /* force 16-byte alignment */
59 } u;
62 # endif /* __ASSEMBLY__ */
64 #endif /* _ASM_IA64_FPU_H */