2 * drivers/watchdog/shwdt.c
4 * Watchdog driver for integrated watchdog in the SuperH processors.
6 * Copyright (C) 2001 - 2010 Paul Mundt <lethal@linux-sh.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
14 * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
16 * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
17 * Added expect close support, made emulated timeout runtime changeable
18 * general cleanups, add some ioctls
20 #include <linux/module.h>
21 #include <linux/moduleparam.h>
22 #include <linux/platform_device.h>
23 #include <linux/init.h>
24 #include <linux/types.h>
25 #include <linux/miscdevice.h>
26 #include <linux/watchdog.h>
27 #include <linux/reboot.h>
28 #include <linux/notifier.h>
29 #include <linux/ioport.h>
32 #include <linux/slab.h>
34 #include <linux/uaccess.h>
35 #include <asm/watchdog.h>
37 #define DRV_NAME "sh-wdt"
40 * Default clock division ratio is 5.25 msecs. For an additional table of
41 * values, consult the asm-sh/watchdog.h. Overload this at module load
44 * In order for this to work reliably we need to have HZ set to 1000 or
45 * something quite higher than 100 (or we need a proper high-res timer
46 * implementation that will deal with this properly), otherwise the 10ms
47 * resolution of a jiffy is enough to trigger the overflow. For things like
48 * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
49 * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
52 * As a result of this timing problem, the only modes that are particularly
53 * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
54 * overflow periods respectively.
56 * Also, since we can't really expect userspace to be responsive enough
57 * before the overflow happens, we maintain two separate timers .. One in
58 * the kernel for clearing out WOVF every 2ms or so (again, this depends on
59 * HZ == 1000), and another for monitoring userspace writes to the WDT device.
61 * As such, we currently use a configurable heartbeat interval which defaults
62 * to 30s. In this case, the userspace daemon is only responsible for periodic
63 * writes to the device before the next heartbeat is scheduled. If the daemon
64 * misses its deadline, the kernel timer will allow the WDT to overflow.
66 static int clock_division_ratio
= WTCSR_CKS_4096
;
67 #define next_ping_period(cks) (jiffies + msecs_to_jiffies(cks - 4))
69 static const struct watchdog_info sh_wdt_info
;
70 static struct platform_device
*sh_wdt_dev
;
71 static DEFINE_SPINLOCK(shwdt_lock
);
73 #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
74 static int heartbeat
= WATCHDOG_HEARTBEAT
; /* in seconds */
75 static int nowayout
= WATCHDOG_NOWAYOUT
;
76 static unsigned long next_heartbeat
;
82 struct timer_list timer
;
84 unsigned long enabled
;
88 static void sh_wdt_start(struct sh_wdt
*wdt
)
93 spin_lock_irqsave(&shwdt_lock
, flags
);
95 next_heartbeat
= jiffies
+ (heartbeat
* HZ
);
96 mod_timer(&wdt
->timer
, next_ping_period(clock_division_ratio
));
98 csr
= sh_wdt_read_csr();
99 csr
|= WTCSR_WT
| clock_division_ratio
;
100 sh_wdt_write_csr(csr
);
105 * These processors have a bit of an inconsistent initialization
106 * process.. starting with SH-3, RSTS was moved to WTCSR, and the
107 * RSTCSR register was removed.
109 * On the SH-2 however, in addition with bits being in different
110 * locations, we must deal with RSTCSR outright..
112 csr
= sh_wdt_read_csr();
115 sh_wdt_write_csr(csr
);
117 #ifdef CONFIG_CPU_SH2
118 csr
= sh_wdt_read_rstcsr();
120 sh_wdt_write_rstcsr(csr
);
122 spin_unlock_irqrestore(&shwdt_lock
, flags
);
125 static void sh_wdt_stop(struct sh_wdt
*wdt
)
130 spin_lock_irqsave(&shwdt_lock
, flags
);
132 del_timer(&wdt
->timer
);
134 csr
= sh_wdt_read_csr();
136 sh_wdt_write_csr(csr
);
138 spin_unlock_irqrestore(&shwdt_lock
, flags
);
141 static inline void sh_wdt_keepalive(struct sh_wdt
*wdt
)
145 spin_lock_irqsave(&shwdt_lock
, flags
);
146 next_heartbeat
= jiffies
+ (heartbeat
* HZ
);
147 spin_unlock_irqrestore(&shwdt_lock
, flags
);
150 static int sh_wdt_set_heartbeat(int t
)
154 if (unlikely(t
< 1 || t
> 3600)) /* arbitrary upper limit */
157 spin_lock_irqsave(&shwdt_lock
, flags
);
159 spin_unlock_irqrestore(&shwdt_lock
, flags
);
163 static void sh_wdt_ping(unsigned long data
)
165 struct sh_wdt
*wdt
= (struct sh_wdt
*)data
;
168 spin_lock_irqsave(&shwdt_lock
, flags
);
169 if (time_before(jiffies
, next_heartbeat
)) {
172 csr
= sh_wdt_read_csr();
174 sh_wdt_write_csr(csr
);
178 mod_timer(&wdt
->timer
, next_ping_period(clock_division_ratio
));
180 dev_warn(wdt
->dev
, "Heartbeat lost! Will not ping "
182 spin_unlock_irqrestore(&shwdt_lock
, flags
);
185 static int sh_wdt_open(struct inode
*inode
, struct file
*file
)
187 struct sh_wdt
*wdt
= platform_get_drvdata(sh_wdt_dev
);
189 if (test_and_set_bit(0, &wdt
->enabled
))
192 __module_get(THIS_MODULE
);
194 file
->private_data
= wdt
;
198 return nonseekable_open(inode
, file
);
201 static int sh_wdt_close(struct inode
*inode
, struct file
*file
)
203 struct sh_wdt
*wdt
= file
->private_data
;
205 if (wdt
->expect_close
== 42) {
208 dev_crit(wdt
->dev
, "Unexpected close, not "
209 "stopping watchdog!\n");
210 sh_wdt_keepalive(wdt
);
213 clear_bit(0, &wdt
->enabled
);
214 wdt
->expect_close
= 0;
219 static ssize_t
sh_wdt_write(struct file
*file
, const char *buf
,
220 size_t count
, loff_t
*ppos
)
222 struct sh_wdt
*wdt
= file
->private_data
;
228 wdt
->expect_close
= 0;
230 for (i
= 0; i
!= count
; i
++) {
232 if (get_user(c
, buf
+ i
))
235 wdt
->expect_close
= 42;
238 sh_wdt_keepalive(wdt
);
244 static long sh_wdt_ioctl(struct file
*file
, unsigned int cmd
,
247 struct sh_wdt
*wdt
= file
->private_data
;
249 int options
, retval
= -EINVAL
;
252 case WDIOC_GETSUPPORT
:
253 return copy_to_user((struct watchdog_info
*)arg
,
254 &sh_wdt_info
, sizeof(sh_wdt_info
)) ? -EFAULT
: 0;
255 case WDIOC_GETSTATUS
:
256 case WDIOC_GETBOOTSTATUS
:
257 return put_user(0, (int *)arg
);
258 case WDIOC_SETOPTIONS
:
259 if (get_user(options
, (int *)arg
))
262 if (options
& WDIOS_DISABLECARD
) {
267 if (options
& WDIOS_ENABLECARD
) {
273 case WDIOC_KEEPALIVE
:
274 sh_wdt_keepalive(wdt
);
276 case WDIOC_SETTIMEOUT
:
277 if (get_user(new_heartbeat
, (int *)arg
))
280 if (sh_wdt_set_heartbeat(new_heartbeat
))
283 sh_wdt_keepalive(wdt
);
285 case WDIOC_GETTIMEOUT
:
286 return put_user(heartbeat
, (int *)arg
);
293 static int sh_wdt_notify_sys(struct notifier_block
*this,
294 unsigned long code
, void *unused
)
296 struct sh_wdt
*wdt
= platform_get_drvdata(sh_wdt_dev
);
298 if (code
== SYS_DOWN
|| code
== SYS_HALT
)
304 static const struct file_operations sh_wdt_fops
= {
305 .owner
= THIS_MODULE
,
307 .write
= sh_wdt_write
,
308 .unlocked_ioctl
= sh_wdt_ioctl
,
310 .release
= sh_wdt_close
,
313 static const struct watchdog_info sh_wdt_info
= {
314 .options
= WDIOF_KEEPALIVEPING
| WDIOF_SETTIMEOUT
|
316 .firmware_version
= 1,
317 .identity
= "SH WDT",
320 static struct notifier_block sh_wdt_notifier
= {
321 .notifier_call
= sh_wdt_notify_sys
,
324 static struct miscdevice sh_wdt_miscdev
= {
325 .minor
= WATCHDOG_MINOR
,
327 .fops
= &sh_wdt_fops
,
330 static int __devinit
sh_wdt_probe(struct platform_device
*pdev
)
333 struct resource
*res
;
337 * As this driver only covers the global watchdog case, reject
338 * any attempts to register per-CPU watchdogs.
343 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
347 if (!devm_request_mem_region(&pdev
->dev
, res
->start
,
348 resource_size(res
), DRV_NAME
))
351 wdt
= devm_kzalloc(&pdev
->dev
, sizeof(struct sh_wdt
), GFP_KERNEL
);
352 if (unlikely(!wdt
)) {
357 wdt
->dev
= &pdev
->dev
;
359 wdt
->base
= devm_ioremap(&pdev
->dev
, res
->start
, resource_size(res
));
360 if (unlikely(!wdt
->base
)) {
365 rc
= register_reboot_notifier(&sh_wdt_notifier
);
368 "Can't register reboot notifier (err=%d)\n", rc
);
372 sh_wdt_miscdev
.parent
= wdt
->dev
;
374 rc
= misc_register(&sh_wdt_miscdev
);
377 "Can't register miscdev on minor=%d (err=%d)\n",
378 sh_wdt_miscdev
.minor
, rc
);
382 init_timer(&wdt
->timer
);
383 wdt
->timer
.function
= sh_wdt_ping
;
384 wdt
->timer
.data
= (unsigned long)wdt
;
385 wdt
->timer
.expires
= next_ping_period(clock_division_ratio
);
387 platform_set_drvdata(pdev
, wdt
);
390 dev_info(&pdev
->dev
, "initialized.\n");
395 unregister_reboot_notifier(&sh_wdt_notifier
);
397 devm_iounmap(&pdev
->dev
, wdt
->base
);
399 devm_kfree(&pdev
->dev
, wdt
);
401 devm_release_mem_region(&pdev
->dev
, res
->start
, resource_size(res
));
406 static int __devexit
sh_wdt_remove(struct platform_device
*pdev
)
408 struct sh_wdt
*wdt
= platform_get_drvdata(pdev
);
409 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
411 platform_set_drvdata(pdev
, NULL
);
413 misc_deregister(&sh_wdt_miscdev
);
417 unregister_reboot_notifier(&sh_wdt_notifier
);
418 devm_release_mem_region(&pdev
->dev
, res
->start
, resource_size(res
));
419 devm_iounmap(&pdev
->dev
, wdt
->base
);
420 devm_kfree(&pdev
->dev
, wdt
);
425 static struct platform_driver sh_wdt_driver
= {
428 .owner
= THIS_MODULE
,
431 .probe
= sh_wdt_probe
,
432 .remove
= __devexit_p(sh_wdt_remove
),
435 static int __init
sh_wdt_init(void)
439 if (unlikely(clock_division_ratio
< 0x5 ||
440 clock_division_ratio
> 0x7)) {
441 clock_division_ratio
= WTCSR_CKS_4096
;
443 pr_info("%s: divisor must be 0x5<=x<=0x7, using %d\n",
444 DRV_NAME
, clock_division_ratio
);
447 rc
= sh_wdt_set_heartbeat(heartbeat
);
449 heartbeat
= WATCHDOG_HEARTBEAT
;
451 pr_info("%s: heartbeat value must be 1<=x<=3600, using %d\n",
452 DRV_NAME
, heartbeat
);
455 pr_info("%s: configured with heartbeat=%d sec (nowayout=%d)\n",
456 DRV_NAME
, heartbeat
, nowayout
);
458 return platform_driver_register(&sh_wdt_driver
);
461 static void __exit
sh_wdt_exit(void)
463 platform_driver_unregister(&sh_wdt_driver
);
465 module_init(sh_wdt_init
);
466 module_exit(sh_wdt_exit
);
468 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
469 MODULE_DESCRIPTION("SuperH watchdog driver");
470 MODULE_LICENSE("GPL");
471 MODULE_ALIAS("platform:" DRV_NAME
);
472 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);
474 module_param(clock_division_ratio
, int, 0);
475 MODULE_PARM_DESC(clock_division_ratio
,
476 "Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
477 "to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096
) ")");
479 module_param(heartbeat
, int, 0);
480 MODULE_PARM_DESC(heartbeat
,
481 "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
482 __MODULE_STRING(WATCHDOG_HEARTBEAT
) ")");
484 module_param(nowayout
, int, 0);
485 MODULE_PARM_DESC(nowayout
,
486 "Watchdog cannot be stopped once started (default="
487 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");