drivers/ata/pata_cs5520.c

   1 /*
   2  *      IDE tuning and bus mastering support for the CS5510/CS5520
   3  *      chipsets
   4  *
   5  *      The CS5510/CS5520 are slightly unusual devices. Unlike the
   6  *      typical IDE controllers they do bus mastering with the drive in
   7  *      PIO mode and smarter silicon.
   8  *
   9  *      The practical upshot of this is that we must always tune the
  10  *      drive for the right PIO mode. We must also ignore all the blacklists
  11  *      and the drive bus mastering DMA information. Also to confuse matters
  12  *      further we can do DMA on PIO only drives.
  13  *
  14  *      DMA on the 5510 also requires we disable_hlt() during DMA on early
  15  *      revisions.
  16  *
  17  *      *** This driver is strictly experimental ***
  18  *
  19  *      (c) Copyright Red Hat Inc 2002
  20  *
  21  * This program is free software; you can redistribute it and/or modify it
  22  * under the terms of the GNU General Public License as published by the
  23  * Free Software Foundation; either version 2, or (at your option) any
  24  * later version.
  25  *
  26  * This program is distributed in the hope that it will be useful, but
  27  * WITHOUT ANY WARRANTY; without even the implied warranty of
  28  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  29  * General Public License for more details.
  30  *
  31  * Documentation:
  32  *      Not publically available.
  33  */
  34 #include <linux/kernel.h>
  35 #include <linux/module.h>
  36 #include <linux/pci.h>
  37 #include <linux/init.h>
  38 #include <linux/blkdev.h>
  39 #include <linux/delay.h>
  40 #include <scsi/scsi_host.h>
  41 #include <linux/libata.h>
  42
  43 #define DRV_NAME        "pata_cs5520"
  44 #define DRV_VERSION     "0.6.6"
  45
  46 struct pio_clocks
  47 {
  48         int address;
  49         int assert;
  50         int recovery;
  51 };
  52
  53 static const struct pio_clocks cs5520_pio_clocks[]={
  54         {3, 6, 11},
  55         {2, 5, 6},
  56         {1, 4, 3},
  57         {1, 3, 2},
  58         {1, 2, 1}
  59 };
  60
  61 /**
  62  *      cs5520_set_timings      -       program PIO timings
  63  *      @ap: ATA port
  64  *      @adev: ATA device
  65  *
  66  *      Program the PIO mode timings for the controller according to the pio
  67  *      clocking table.
  68  */
  69
  70 static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int pio)
  71 {
  72         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  73         int slave = adev->devno;
  74
  75         pio -= XFER_PIO_0;
  76
  77         /* Channel command timing */
  78         pci_write_config_byte(pdev, 0x62 + ap->port_no,
  79                                 (cs5520_pio_clocks[pio].recovery << 4) |
  80                                 (cs5520_pio_clocks[pio].assert));
  81         /* FIXME: should these use address ? */
  82         /* Read command timing */
  83         pci_write_config_byte(pdev, 0x64 +  4*ap->port_no + slave,
  84                                 (cs5520_pio_clocks[pio].recovery << 4) |
  85                                 (cs5520_pio_clocks[pio].assert));
  86         /* Write command timing */
  87         pci_write_config_byte(pdev, 0x66 +  4*ap->port_no + slave,
  88                                 (cs5520_pio_clocks[pio].recovery << 4) |
  89                                 (cs5520_pio_clocks[pio].assert));
  90 }
  91
  92 /**
  93  *      cs5520_set_piomode      -       program PIO timings
  94  *      @ap: ATA port
  95  *      @adev: ATA device
  96  *
  97  *      Program the PIO mode timings for the controller according to the pio
  98  *      clocking table.
  99  */
 100
 101 static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev)
 102 {
 103         cs5520_set_timings(ap, adev, adev->pio_mode);
 104 }
 105
 106 static struct scsi_host_template cs5520_sht = {
 107         ATA_BMDMA_SHT(DRV_NAME),
 108         .sg_tablesize           = LIBATA_DUMB_MAX_PRD,
 109 };
 110
 111 static struct ata_port_operations cs5520_port_ops = {
 112         .inherits               = &ata_bmdma_port_ops,
 113         .qc_prep                = ata_sff_dumb_qc_prep,
 114         .cable_detect           = ata_cable_40wire,
 115         .set_piomode            = cs5520_set_piomode,
 116 };
 117
 118 static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 119 {
 120         static const unsigned int cmd_port[] = { 0x1F0, 0x170 };
 121         static const unsigned int ctl_port[] = { 0x3F6, 0x376 };
 122         struct ata_port_info pi = {
 123                 .flags          = ATA_FLAG_SLAVE_POSS,
 124                 .pio_mask       = ATA_PIO4,
 125                 .port_ops       = &cs5520_port_ops,
 126         };
 127         const struct ata_port_info *ppi[2];
 128         u8 pcicfg;
 129         void __iomem *iomap[5];
 130         struct ata_host *host;
 131         struct ata_ioports *ioaddr;
 132         int i, rc;
 133
 134         rc = pcim_enable_device(pdev);
 135         if (rc)
 136                 return rc;
 137
 138         /* IDE port enable bits */
 139         pci_read_config_byte(pdev, 0x60, &pcicfg);
 140
 141         /* Check if the ATA ports are enabled */
 142         if ((pcicfg & 3) == 0)
 143                 return -ENODEV;
 144
 145         ppi[0] = ppi[1] = &ata_dummy_port_info;
 146         if (pcicfg & 1)
 147                 ppi[0] = &pi;
 148         if (pcicfg & 2)
 149                 ppi[1] = &pi;
 150
 151         if ((pcicfg & 0x40) == 0) {
 152                 dev_printk(KERN_WARNING, &pdev->dev,
 153                            "DMA mode disabled. Enabling.\n");
 154                 pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
 155         }
 156
 157         pi.mwdma_mask = id->driver_data;
 158
 159         host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
 160         if (!host)
 161                 return -ENOMEM;
 162
 163         /* Perform set up for DMA */
 164         if (pci_enable_device_io(pdev)) {
 165                 printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n");
 166                 return -ENODEV;
 167         }
 168
 169         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
 170                 printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n");
 171                 return -ENODEV;
 172         }
 173         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
 174                 printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n");
 175                 return -ENODEV;
 176         }
 177
 178         /* Map IO ports and initialize host accordingly */
 179         iomap[0] = devm_ioport_map(&pdev->dev, cmd_port[0], 8);
 180         iomap[1] = devm_ioport_map(&pdev->dev, ctl_port[0], 1);
 181         iomap[2] = devm_ioport_map(&pdev->dev, cmd_port[1], 8);
 182         iomap[3] = devm_ioport_map(&pdev->dev, ctl_port[1], 1);
 183         iomap[4] = pcim_iomap(pdev, 2, 0);
 184
 185         if (!iomap[0] || !iomap[1] || !iomap[2] || !iomap[3] || !iomap[4])
 186                 return -ENOMEM;
 187
 188         ioaddr = &host->ports[0]->ioaddr;
 189         ioaddr->cmd_addr = iomap[0];
 190         ioaddr->ctl_addr = iomap[1];
 191         ioaddr->altstatus_addr = iomap[1];
 192         ioaddr->bmdma_addr = iomap[4];
 193         ata_sff_std_ports(ioaddr);
 194
 195         ata_port_desc(host->ports[0],
 196                       "cmd 0x%x ctl 0x%x", cmd_port[0], ctl_port[0]);
 197         ata_port_pbar_desc(host->ports[0], 4, 0, "bmdma");
 198
 199         ioaddr = &host->ports[1]->ioaddr;
 200         ioaddr->cmd_addr = iomap[2];
 201         ioaddr->ctl_addr = iomap[3];
 202         ioaddr->altstatus_addr = iomap[3];
 203         ioaddr->bmdma_addr = iomap[4] + 8;
 204         ata_sff_std_ports(ioaddr);
 205
 206         ata_port_desc(host->ports[1],
 207                       "cmd 0x%x ctl 0x%x", cmd_port[1], ctl_port[1]);
 208         ata_port_pbar_desc(host->ports[1], 4, 8, "bmdma");
 209
 210         /* activate the host */
 211         pci_set_master(pdev);
 212         rc = ata_host_start(host);
 213         if (rc)
 214                 return rc;
 215
 216         for (i = 0; i < 2; i++) {
 217                 static const int irq[] = { 14, 15 };
 218                 struct ata_port *ap = host->ports[i];
 219
 220                 if (ata_port_is_dummy(ap))
 221                         continue;
 222
 223                 rc = devm_request_irq(&pdev->dev, irq[ap->port_no],
 224                                       ata_sff_interrupt, 0, DRV_NAME, host);
 225                 if (rc)
 226                         return rc;
 227
 228                 ata_port_desc(ap, "irq %d", irq[i]);
 229         }
 230
 231         return ata_host_register(host, &cs5520_sht);
 232 }
 233
 234 #ifdef CONFIG_PM
 235 /**
 236  *      cs5520_reinit_one       -       device resume
 237  *      @pdev: PCI device
 238  *
 239  *      Do any reconfiguration work needed by a resume from RAM. We need
 240  *      to restore DMA mode support on BIOSen which disabled it
 241  */
 242
 243 static int cs5520_reinit_one(struct pci_dev *pdev)
 244 {
 245         struct ata_host *host = dev_get_drvdata(&pdev->dev);
 246         u8 pcicfg;
 247         int rc;
 248
 249         rc = ata_pci_device_do_resume(pdev);
 250         if (rc)
 251                 return rc;
 252
 253         pci_read_config_byte(pdev, 0x60, &pcicfg);
 254         if ((pcicfg & 0x40) == 0)
 255                 pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
 256
 257         ata_host_resume(host);
 258         return 0;
 259 }
 260
 261 /**
 262  *      cs5520_pci_device_suspend       -       device suspend
 263  *      @pdev: PCI device
 264  *
 265  *      We have to cut and waste bits from the standard method because
 266  *      the 5520 is a bit odd and not just a pure ATA device. As a result
 267  *      we must not disable it. The needed code is short and this avoids
 268  *      chip specific mess in the core code.
 269  */
 270
 271 static int cs5520_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
 272 {
 273         struct ata_host *host = dev_get_drvdata(&pdev->dev);
 274         int rc = 0;
 275
 276         rc = ata_host_suspend(host, mesg);
 277         if (rc)
 278                 return rc;
 279
 280         pci_save_state(pdev);
 281         return 0;
 282 }
 283 #endif /* CONFIG_PM */
 284
 285 /* For now keep DMA off. We can set it for all but A rev CS5510 once the
 286    core ATA code can handle it */
 287
 288 static const struct pci_device_id pata_cs5520[] = {
 289         { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
 290         { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
 291
 292         { },
 293 };
 294
 295 static struct pci_driver cs5520_pci_driver = {
 296         .name           = DRV_NAME,
 297         .id_table       = pata_cs5520,
 298         .probe          = cs5520_init_one,
 299         .remove         = ata_pci_remove_one,
 300 #ifdef CONFIG_PM
 301         .suspend        = cs5520_pci_device_suspend,
 302         .resume         = cs5520_reinit_one,
 303 #endif
 304 };
 305
 306 static int __init cs5520_init(void)
 307 {
 308         return pci_register_driver(&cs5520_pci_driver);
 309 }
 310
 311 static void __exit cs5520_exit(void)
 312 {
 313         pci_unregister_driver(&cs5520_pci_driver);
 314 }
 315
 316 MODULE_AUTHOR("Alan Cox");
 317 MODULE_DESCRIPTION("low-level driver for Cyrix CS5510/5520");
 318 MODULE_LICENSE("GPL");
 319 MODULE_DEVICE_TABLE(pci, pata_cs5520);
 320 MODULE_VERSION(DRV_VERSION);
 321
 322 module_init(cs5520_init);
 323 module_exit(cs5520_exit);
 324