?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
qeth: fix race condition during device startup
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / s390 / net / qeth_core_main.c
blobe6b2df0e73f56a4b143365be8302875c600c49bc
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23 #include <linux/slab.h>
24
25 #include <asm/ebcdic.h>
26 #include <asm/io.h>
27
28 #include "qeth_core.h"
29
30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 /* N P A M L V H */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
35 [QETH_DBF_MSG] = {"qeth_msg",
36 8, 1, 128, 3, &debug_sprintf_view, NULL},
37 [QETH_DBF_CTRL] = {"qeth_control",
38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
39 };
40 EXPORT_SYMBOL_GPL(qeth_dbf);
41
42 struct qeth_card_list_struct qeth_core_card_list;
43 EXPORT_SYMBOL_GPL(qeth_core_card_list);
44 struct kmem_cache *qeth_core_header_cache;
45 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
46
47 static struct device *qeth_core_root_dev;
48 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
49 static struct lock_class_key qdio_out_skb_queue_key;
50
51 static void qeth_send_control_data_cb(struct qeth_channel *,
52 struct qeth_cmd_buffer *);
53 static int qeth_issue_next_read(struct qeth_card *);
54 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
55 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
56 static void qeth_free_buffer_pool(struct qeth_card *);
57 static int qeth_qdio_establish(struct qeth_card *);
58
59
60 static inline const char *qeth_get_cardname(struct qeth_card *card)
61 {
62 if (card->info.guestlan) {
63 switch (card->info.type) {
64 case QETH_CARD_TYPE_OSD:
65 return " Guest LAN QDIO";
66 case QETH_CARD_TYPE_IQD:
67 return " Guest LAN Hiper";
68 case QETH_CARD_TYPE_OSM:
69 return " Guest LAN QDIO - OSM";
70 case QETH_CARD_TYPE_OSX:
71 return " Guest LAN QDIO - OSX";
72 default:
73 return " unknown";
74 }
75 } else {
76 switch (card->info.type) {
77 case QETH_CARD_TYPE_OSD:
78 return " OSD Express";
79 case QETH_CARD_TYPE_IQD:
80 return " HiperSockets";
81 case QETH_CARD_TYPE_OSN:
82 return " OSN QDIO";
83 case QETH_CARD_TYPE_OSM:
84 return " OSM QDIO";
85 case QETH_CARD_TYPE_OSX:
86 return " OSX QDIO";
87 default:
88 return " unknown";
89 }
90 }
91 return " n/a";
92 }
93
94 /* max length to be returned: 14 */
95 const char *qeth_get_cardname_short(struct qeth_card *card)
96 {
97 if (card->info.guestlan) {
98 switch (card->info.type) {
99 case QETH_CARD_TYPE_OSD:
100 return "GuestLAN QDIO";
101 case QETH_CARD_TYPE_IQD:
102 return "GuestLAN Hiper";
103 case QETH_CARD_TYPE_OSM:
104 return "GuestLAN OSM";
105 case QETH_CARD_TYPE_OSX:
106 return "GuestLAN OSX";
107 default:
108 return "unknown";
109 }
110 } else {
111 switch (card->info.type) {
112 case QETH_CARD_TYPE_OSD:
113 switch (card->info.link_type) {
114 case QETH_LINK_TYPE_FAST_ETH:
115 return "OSD_100";
116 case QETH_LINK_TYPE_HSTR:
117 return "HSTR";
118 case QETH_LINK_TYPE_GBIT_ETH:
119 return "OSD_1000";
120 case QETH_LINK_TYPE_10GBIT_ETH:
121 return "OSD_10GIG";
122 case QETH_LINK_TYPE_LANE_ETH100:
123 return "OSD_FE_LANE";
124 case QETH_LINK_TYPE_LANE_TR:
125 return "OSD_TR_LANE";
126 case QETH_LINK_TYPE_LANE_ETH1000:
127 return "OSD_GbE_LANE";
128 case QETH_LINK_TYPE_LANE:
129 return "OSD_ATM_LANE";
130 default:
131 return "OSD_Express";
132 }
133 case QETH_CARD_TYPE_IQD:
134 return "HiperSockets";
135 case QETH_CARD_TYPE_OSN:
136 return "OSN";
137 case QETH_CARD_TYPE_OSM:
138 return "OSM_1000";
139 case QETH_CARD_TYPE_OSX:
140 return "OSX_10GIG";
141 default:
142 return "unknown";
143 }
144 }
145 return "n/a";
146 }
147
148 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
149 int clear_start_mask)
150 {
151 unsigned long flags;
152
153 spin_lock_irqsave(&card->thread_mask_lock, flags);
154 card->thread_allowed_mask = threads;
155 if (clear_start_mask)
156 card->thread_start_mask &= threads;
157 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
158 wake_up(&card->wait_q);
159 }
160 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
161
162 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
163 {
164 unsigned long flags;
165 int rc = 0;
166
167 spin_lock_irqsave(&card->thread_mask_lock, flags);
168 rc = (card->thread_running_mask & threads);
169 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
170 return rc;
171 }
172 EXPORT_SYMBOL_GPL(qeth_threads_running);
173
174 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
175 {
176 return wait_event_interruptible(card->wait_q,
177 qeth_threads_running(card, threads) == 0);
178 }
179 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
180
181 void qeth_clear_working_pool_list(struct qeth_card *card)
182 {
183 struct qeth_buffer_pool_entry *pool_entry, *tmp;
184
185 QETH_CARD_TEXT(card, 5, "clwrklst");
186 list_for_each_entry_safe(pool_entry, tmp,
187 &card->qdio.in_buf_pool.entry_list, list){
188 list_del(&pool_entry->list);
189 }
190 }
191 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
192
193 static int qeth_alloc_buffer_pool(struct qeth_card *card)
194 {
195 struct qeth_buffer_pool_entry *pool_entry;
196 void *ptr;
197 int i, j;
198
199 QETH_CARD_TEXT(card, 5, "alocpool");
200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
202 if (!pool_entry) {
203 qeth_free_buffer_pool(card);
204 return -ENOMEM;
205 }
206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
207 ptr = (void *) __get_free_page(GFP_KERNEL);
208 if (!ptr) {
209 while (j > 0)
210 free_page((unsigned long)
211 pool_entry->elements[--j]);
212 kfree(pool_entry);
213 qeth_free_buffer_pool(card);
214 return -ENOMEM;
215 }
216 pool_entry->elements[j] = ptr;
217 }
218 list_add(&pool_entry->init_list,
219 &card->qdio.init_pool.entry_list);
220 }
221 return 0;
222 }
223
224 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
225 {
226 QETH_CARD_TEXT(card, 2, "realcbp");
227
228 if ((card->state != CARD_STATE_DOWN) &&
229 (card->state != CARD_STATE_RECOVER))
230 return -EPERM;
231
232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
233 qeth_clear_working_pool_list(card);
234 qeth_free_buffer_pool(card);
235 card->qdio.in_buf_pool.buf_count = bufcnt;
236 card->qdio.init_pool.buf_count = bufcnt;
237 return qeth_alloc_buffer_pool(card);
238 }
239 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
240
241 static int qeth_issue_next_read(struct qeth_card *card)
242 {
243 int rc;
244 struct qeth_cmd_buffer *iob;
245
246 QETH_CARD_TEXT(card, 5, "issnxrd");
247 if (card->read.state != CH_STATE_UP)
248 return -EIO;
249 iob = qeth_get_buffer(&card->read);
250 if (!iob) {
251 dev_warn(&card->gdev->dev, "The qeth device driver "
252 "failed to recover an error on the device\n");
253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
254 "available\n", dev_name(&card->gdev->dev));
255 return -ENOMEM;
256 }
257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
258 QETH_CARD_TEXT(card, 6, "noirqpnd");
259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
260 (addr_t) iob, 0, 0);
261 if (rc) {
262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
263 "rc=%i\n", dev_name(&card->gdev->dev), rc);
264 atomic_set(&card->read.irq_pending, 0);
265 card->read_or_write_problem = 1;
266 qeth_schedule_recovery(card);
267 wake_up(&card->wait_q);
268 }
269 return rc;
270 }
271
272 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
273 {
274 struct qeth_reply *reply;
275
276 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
277 if (reply) {
278 atomic_set(&reply->refcnt, 1);
279 atomic_set(&reply->received, 0);
280 reply->card = card;
281 };
282 return reply;
283 }
284
285 static void qeth_get_reply(struct qeth_reply *reply)
286 {
287 WARN_ON(atomic_read(&reply->refcnt) <= 0);
288 atomic_inc(&reply->refcnt);
289 }
290
291 static void qeth_put_reply(struct qeth_reply *reply)
292 {
293 WARN_ON(atomic_read(&reply->refcnt) <= 0);
294 if (atomic_dec_and_test(&reply->refcnt))
295 kfree(reply);
296 }
297
298 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
299 struct qeth_card *card)
300 {
301 char *ipa_name;
302 int com = cmd->hdr.command;
303 ipa_name = qeth_get_ipa_cmd_name(com);
304 if (rc)
305 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
306 ipa_name, com, QETH_CARD_IFNAME(card),
307 rc, qeth_get_ipa_msg(rc));
308 else
309 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
310 ipa_name, com, QETH_CARD_IFNAME(card));
311 }
312
313 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
314 struct qeth_cmd_buffer *iob)
315 {
316 struct qeth_ipa_cmd *cmd = NULL;
317
318 QETH_CARD_TEXT(card, 5, "chkipad");
319 if (IS_IPA(iob->data)) {
320 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
321 if (IS_IPA_REPLY(cmd)) {
322 if (cmd->hdr.command != IPA_CMD_SETCCID &&
323 cmd->hdr.command != IPA_CMD_DELCCID &&
324 cmd->hdr.command != IPA_CMD_MODCCID &&
325 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
326 qeth_issue_ipa_msg(cmd,
327 cmd->hdr.return_code, card);
328 return cmd;
329 } else {
330 switch (cmd->hdr.command) {
331 case IPA_CMD_STOPLAN:
332 dev_warn(&card->gdev->dev,
333 "The link for interface %s on CHPID"
334 " 0x%X failed\n",
335 QETH_CARD_IFNAME(card),
336 card->info.chpid);
337 card->lan_online = 0;
338 if (card->dev && netif_carrier_ok(card->dev))
339 netif_carrier_off(card->dev);
340 return NULL;
341 case IPA_CMD_STARTLAN:
342 dev_info(&card->gdev->dev,
343 "The link for %s on CHPID 0x%X has"
344 " been restored\n",
345 QETH_CARD_IFNAME(card),
346 card->info.chpid);
347 netif_carrier_on(card->dev);
348 card->lan_online = 1;
349 qeth_schedule_recovery(card);
350 return NULL;
351 case IPA_CMD_MODCCID:
352 return cmd;
353 case IPA_CMD_REGISTER_LOCAL_ADDR:
354 QETH_CARD_TEXT(card, 3, "irla");
355 break;
356 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
357 QETH_CARD_TEXT(card, 3, "urla");
358 break;
359 default:
360 QETH_DBF_MESSAGE(2, "Received data is IPA "
361 "but not a reply!\n");
362 break;
363 }
364 }
365 }
366 return cmd;
367 }
368
369 void qeth_clear_ipacmd_list(struct qeth_card *card)
370 {
371 struct qeth_reply *reply, *r;
372 unsigned long flags;
373
374 QETH_CARD_TEXT(card, 4, "clipalst");
375
376 spin_lock_irqsave(&card->lock, flags);
377 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
378 qeth_get_reply(reply);
379 reply->rc = -EIO;
380 atomic_inc(&reply->received);
381 list_del_init(&reply->list);
382 wake_up(&reply->wait_q);
383 qeth_put_reply(reply);
384 }
385 spin_unlock_irqrestore(&card->lock, flags);
386 atomic_set(&card->write.irq_pending, 0);
387 }
388 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
389
390 static int qeth_check_idx_response(struct qeth_card *card,
391 unsigned char *buffer)
392 {
393 if (!buffer)
394 return 0;
395
396 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
397 if ((buffer[2] & 0xc0) == 0xc0) {
398 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
399 "with cause code 0x%02x%s\n",
400 buffer[4],
401 ((buffer[4] == 0x22) ?
402 " -- try another portname" : ""));
403 QETH_CARD_TEXT(card, 2, "ckidxres");
404 QETH_CARD_TEXT(card, 2, " idxterm");
405 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
406 if (buffer[4] == 0xf6) {
407 dev_err(&card->gdev->dev,
408 "The qeth device is not configured "
409 "for the OSI layer required by z/VM\n");
410 return -EPERM;
411 }
412 return -EIO;
413 }
414 return 0;
415 }
416
417 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
418 __u32 len)
419 {
420 struct qeth_card *card;
421
422 card = CARD_FROM_CDEV(channel->ccwdev);
423 QETH_CARD_TEXT(card, 4, "setupccw");
424 if (channel == &card->read)
425 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
426 else
427 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
428 channel->ccw.count = len;
429 channel->ccw.cda = (__u32) __pa(iob);
430 }
431
432 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
433 {
434 __u8 index;
435
436 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
437 index = channel->io_buf_no;
438 do {
439 if (channel->iob[index].state == BUF_STATE_FREE) {
440 channel->iob[index].state = BUF_STATE_LOCKED;
441 channel->io_buf_no = (channel->io_buf_no + 1) %
442 QETH_CMD_BUFFER_NO;
443 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
444 return channel->iob + index;
445 }
446 index = (index + 1) % QETH_CMD_BUFFER_NO;
447 } while (index != channel->io_buf_no);
448
449 return NULL;
450 }
451
452 void qeth_release_buffer(struct qeth_channel *channel,
453 struct qeth_cmd_buffer *iob)
454 {
455 unsigned long flags;
456
457 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
458 spin_lock_irqsave(&channel->iob_lock, flags);
459 memset(iob->data, 0, QETH_BUFSIZE);
460 iob->state = BUF_STATE_FREE;
461 iob->callback = qeth_send_control_data_cb;
462 iob->rc = 0;
463 spin_unlock_irqrestore(&channel->iob_lock, flags);
464 }
465 EXPORT_SYMBOL_GPL(qeth_release_buffer);
466
467 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
468 {
469 struct qeth_cmd_buffer *buffer = NULL;
470 unsigned long flags;
471
472 spin_lock_irqsave(&channel->iob_lock, flags);
473 buffer = __qeth_get_buffer(channel);
474 spin_unlock_irqrestore(&channel->iob_lock, flags);
475 return buffer;
476 }
477
478 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
479 {
480 struct qeth_cmd_buffer *buffer;
481 wait_event(channel->wait_q,
482 ((buffer = qeth_get_buffer(channel)) != NULL));
483 return buffer;
484 }
485 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
486
487 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
488 {
489 int cnt;
490
491 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
492 qeth_release_buffer(channel, &channel->iob[cnt]);
493 channel->buf_no = 0;
494 channel->io_buf_no = 0;
495 }
496 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
497
498 static void qeth_send_control_data_cb(struct qeth_channel *channel,
499 struct qeth_cmd_buffer *iob)
500 {
501 struct qeth_card *card;
502 struct qeth_reply *reply, *r;
503 struct qeth_ipa_cmd *cmd;
504 unsigned long flags;
505 int keep_reply;
506 int rc = 0;
507
508 card = CARD_FROM_CDEV(channel->ccwdev);
509 QETH_CARD_TEXT(card, 4, "sndctlcb");
510 rc = qeth_check_idx_response(card, iob->data);
511 switch (rc) {
512 case 0:
513 break;
514 case -EIO:
515 qeth_clear_ipacmd_list(card);
516 qeth_schedule_recovery(card);
517 /* fall through */
518 default:
519 goto out;
520 }
521
522 cmd = qeth_check_ipa_data(card, iob);
523 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
524 goto out;
525 /*in case of OSN : check if cmd is set */
526 if (card->info.type == QETH_CARD_TYPE_OSN &&
527 cmd &&
528 cmd->hdr.command != IPA_CMD_STARTLAN &&
529 card->osn_info.assist_cb != NULL) {
530 card->osn_info.assist_cb(card->dev, cmd);
531 goto out;
532 }
533
534 spin_lock_irqsave(&card->lock, flags);
535 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
536 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
537 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
538 qeth_get_reply(reply);
539 list_del_init(&reply->list);
540 spin_unlock_irqrestore(&card->lock, flags);
541 keep_reply = 0;
542 if (reply->callback != NULL) {
543 if (cmd) {
544 reply->offset = (__u16)((char *)cmd -
545 (char *)iob->data);
546 keep_reply = reply->callback(card,
547 reply,
548 (unsigned long)cmd);
549 } else
550 keep_reply = reply->callback(card,
551 reply,
552 (unsigned long)iob);
553 }
554 if (cmd)
555 reply->rc = (u16) cmd->hdr.return_code;
556 else if (iob->rc)
557 reply->rc = iob->rc;
558 if (keep_reply) {
559 spin_lock_irqsave(&card->lock, flags);
560 list_add_tail(&reply->list,
561 &card->cmd_waiter_list);
562 spin_unlock_irqrestore(&card->lock, flags);
563 } else {
564 atomic_inc(&reply->received);
565 wake_up(&reply->wait_q);
566 }
567 qeth_put_reply(reply);
568 goto out;
569 }
570 }
571 spin_unlock_irqrestore(&card->lock, flags);
572 out:
573 memcpy(&card->seqno.pdu_hdr_ack,
574 QETH_PDU_HEADER_SEQ_NO(iob->data),
575 QETH_SEQ_NO_LENGTH);
576 qeth_release_buffer(channel, iob);
577 }
578
579 static int qeth_setup_channel(struct qeth_channel *channel)
580 {
581 int cnt;
582
583 QETH_DBF_TEXT(SETUP, 2, "setupch");
584 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
585 channel->iob[cnt].data =
586 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
587 if (channel->iob[cnt].data == NULL)
588 break;
589 channel->iob[cnt].state = BUF_STATE_FREE;
590 channel->iob[cnt].channel = channel;
591 channel->iob[cnt].callback = qeth_send_control_data_cb;
592 channel->iob[cnt].rc = 0;
593 }
594 if (cnt < QETH_CMD_BUFFER_NO) {
595 while (cnt-- > 0)
596 kfree(channel->iob[cnt].data);
597 return -ENOMEM;
598 }
599 channel->buf_no = 0;
600 channel->io_buf_no = 0;
601 atomic_set(&channel->irq_pending, 0);
602 spin_lock_init(&channel->iob_lock);
603
604 init_waitqueue_head(&channel->wait_q);
605 return 0;
606 }
607
608 static int qeth_set_thread_start_bit(struct qeth_card *card,
609 unsigned long thread)
610 {
611 unsigned long flags;
612
613 spin_lock_irqsave(&card->thread_mask_lock, flags);
614 if (!(card->thread_allowed_mask & thread) ||
615 (card->thread_start_mask & thread)) {
616 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
617 return -EPERM;
618 }
619 card->thread_start_mask |= thread;
620 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
621 return 0;
622 }
623
624 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
625 {
626 unsigned long flags;
627
628 spin_lock_irqsave(&card->thread_mask_lock, flags);
629 card->thread_start_mask &= ~thread;
630 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
631 wake_up(&card->wait_q);
632 }
633 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
634
635 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
636 {
637 unsigned long flags;
638
639 spin_lock_irqsave(&card->thread_mask_lock, flags);
640 card->thread_running_mask &= ~thread;
641 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
642 wake_up(&card->wait_q);
643 }
644 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
645
646 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
647 {
648 unsigned long flags;
649 int rc = 0;
650
651 spin_lock_irqsave(&card->thread_mask_lock, flags);
652 if (card->thread_start_mask & thread) {
653 if ((card->thread_allowed_mask & thread) &&
654 !(card->thread_running_mask & thread)) {
655 rc = 1;
656 card->thread_start_mask &= ~thread;
657 card->thread_running_mask |= thread;
658 } else
659 rc = -EPERM;
660 }
661 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
662 return rc;
663 }
664
665 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
666 {
667 int rc = 0;
668
669 wait_event(card->wait_q,
670 (rc = __qeth_do_run_thread(card, thread)) >= 0);
671 return rc;
672 }
673 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
674
675 void qeth_schedule_recovery(struct qeth_card *card)
676 {
677 QETH_CARD_TEXT(card, 2, "startrec");
678 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
679 schedule_work(&card->kernel_thread_starter);
680 }
681 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
682
683 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
684 {
685 int dstat, cstat;
686 char *sense;
687 struct qeth_card *card;
688
689 sense = (char *) irb->ecw;
690 cstat = irb->scsw.cmd.cstat;
691 dstat = irb->scsw.cmd.dstat;
692 card = CARD_FROM_CDEV(cdev);
693
694 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
695 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
696 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
697 QETH_CARD_TEXT(card, 2, "CGENCHK");
698 dev_warn(&cdev->dev, "The qeth device driver "
699 "failed to recover an error on the device\n");
700 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
701 dev_name(&cdev->dev), dstat, cstat);
702 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
703 16, 1, irb, 64, 1);
704 return 1;
705 }
706
707 if (dstat & DEV_STAT_UNIT_CHECK) {
708 if (sense[SENSE_RESETTING_EVENT_BYTE] &
709 SENSE_RESETTING_EVENT_FLAG) {
710 QETH_CARD_TEXT(card, 2, "REVIND");
711 return 1;
712 }
713 if (sense[SENSE_COMMAND_REJECT_BYTE] &
714 SENSE_COMMAND_REJECT_FLAG) {
715 QETH_CARD_TEXT(card, 2, "CMDREJi");
716 return 1;
717 }
718 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
719 QETH_CARD_TEXT(card, 2, "AFFE");
720 return 1;
721 }
722 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
723 QETH_CARD_TEXT(card, 2, "ZEROSEN");
724 return 0;
725 }
726 QETH_CARD_TEXT(card, 2, "DGENCHK");
727 return 1;
728 }
729 return 0;
730 }
731
732 static long __qeth_check_irb_error(struct ccw_device *cdev,
733 unsigned long intparm, struct irb *irb)
734 {
735 struct qeth_card *card;
736
737 card = CARD_FROM_CDEV(cdev);
738
739 if (!IS_ERR(irb))
740 return 0;
741
742 switch (PTR_ERR(irb)) {
743 case -EIO:
744 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
745 dev_name(&cdev->dev));
746 QETH_CARD_TEXT(card, 2, "ckirberr");
747 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
748 break;
749 case -ETIMEDOUT:
750 dev_warn(&cdev->dev, "A hardware operation timed out"
751 " on the device\n");
752 QETH_CARD_TEXT(card, 2, "ckirberr");
753 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
754 if (intparm == QETH_RCD_PARM) {
755 if (card && (card->data.ccwdev == cdev)) {
756 card->data.state = CH_STATE_DOWN;
757 wake_up(&card->wait_q);
758 }
759 }
760 break;
761 default:
762 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
763 dev_name(&cdev->dev), PTR_ERR(irb));
764 QETH_CARD_TEXT(card, 2, "ckirberr");
765 QETH_CARD_TEXT(card, 2, " rc???");
766 }
767 return PTR_ERR(irb);
768 }
769
770 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
771 struct irb *irb)
772 {
773 int rc;
774 int cstat, dstat;
775 struct qeth_cmd_buffer *buffer;
776 struct qeth_channel *channel;
777 struct qeth_card *card;
778 struct qeth_cmd_buffer *iob;
779 __u8 index;
780
781 if (__qeth_check_irb_error(cdev, intparm, irb))
782 return;
783 cstat = irb->scsw.cmd.cstat;
784 dstat = irb->scsw.cmd.dstat;
785
786 card = CARD_FROM_CDEV(cdev);
787 if (!card)
788 return;
789
790 QETH_CARD_TEXT(card, 5, "irq");
791
792 if (card->read.ccwdev == cdev) {
793 channel = &card->read;
794 QETH_CARD_TEXT(card, 5, "read");
795 } else if (card->write.ccwdev == cdev) {
796 channel = &card->write;
797 QETH_CARD_TEXT(card, 5, "write");
798 } else {
799 channel = &card->data;
800 QETH_CARD_TEXT(card, 5, "data");
801 }
802 atomic_set(&channel->irq_pending, 0);
803
804 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
805 channel->state = CH_STATE_STOPPED;
806
807 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
808 channel->state = CH_STATE_HALTED;
809
810 /*let's wake up immediately on data channel*/
811 if ((channel == &card->data) && (intparm != 0) &&
812 (intparm != QETH_RCD_PARM))
813 goto out;
814
815 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
816 QETH_CARD_TEXT(card, 6, "clrchpar");
817 /* we don't have to handle this further */
818 intparm = 0;
819 }
820 if (intparm == QETH_HALT_CHANNEL_PARM) {
821 QETH_CARD_TEXT(card, 6, "hltchpar");
822 /* we don't have to handle this further */
823 intparm = 0;
824 }
825 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
826 (dstat & DEV_STAT_UNIT_CHECK) ||
827 (cstat)) {
828 if (irb->esw.esw0.erw.cons) {
829 dev_warn(&channel->ccwdev->dev,
830 "The qeth device driver failed to recover "
831 "an error on the device\n");
832 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
833 "0x%X dstat 0x%X\n",
834 dev_name(&channel->ccwdev->dev), cstat, dstat);
835 print_hex_dump(KERN_WARNING, "qeth: irb ",
836 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
837 print_hex_dump(KERN_WARNING, "qeth: sense data ",
838 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
839 }
840 if (intparm == QETH_RCD_PARM) {
841 channel->state = CH_STATE_DOWN;
842 goto out;
843 }
844 rc = qeth_get_problem(cdev, irb);
845 if (rc) {
846 qeth_clear_ipacmd_list(card);
847 qeth_schedule_recovery(card);
848 goto out;
849 }
850 }
851
852 if (intparm == QETH_RCD_PARM) {
853 channel->state = CH_STATE_RCD_DONE;
854 goto out;
855 }
856 if (intparm) {
857 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
858 buffer->state = BUF_STATE_PROCESSED;
859 }
860 if (channel == &card->data)
861 return;
862 if (channel == &card->read &&
863 channel->state == CH_STATE_UP)
864 qeth_issue_next_read(card);
865
866 iob = channel->iob;
867 index = channel->buf_no;
868 while (iob[index].state == BUF_STATE_PROCESSED) {
869 if (iob[index].callback != NULL)
870 iob[index].callback(channel, iob + index);
871
872 index = (index + 1) % QETH_CMD_BUFFER_NO;
873 }
874 channel->buf_no = index;
875 out:
876 wake_up(&card->wait_q);
877 return;
878 }
879
880 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
881 struct qeth_qdio_out_buffer *buf)
882 {
883 int i;
884 struct sk_buff *skb;
885
886 /* is PCI flag set on buffer? */
887 if (buf->buffer->element[0].flags & 0x40)
888 atomic_dec(&queue->set_pci_flags_count);
889
890 skb = skb_dequeue(&buf->skb_list);
891 while (skb) {
892 atomic_dec(&skb->users);
893 dev_kfree_skb_any(skb);
894 skb = skb_dequeue(&buf->skb_list);
895 }
896 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
897 if (buf->buffer->element[i].addr && buf->is_header[i])
898 kmem_cache_free(qeth_core_header_cache,
899 buf->buffer->element[i].addr);
900 buf->is_header[i] = 0;
901 buf->buffer->element[i].length = 0;
902 buf->buffer->element[i].addr = NULL;
903 buf->buffer->element[i].flags = 0;
904 }
905 buf->buffer->element[15].flags = 0;
906 buf->next_element_to_fill = 0;
907 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
908 }
909
910 void qeth_clear_qdio_buffers(struct qeth_card *card)
911 {
912 int i, j;
913
914 QETH_CARD_TEXT(card, 2, "clearqdbf");
915 /* clear outbound buffers to free skbs */
916 for (i = 0; i < card->qdio.no_out_queues; ++i)
917 if (card->qdio.out_qs[i]) {
918 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
919 qeth_clear_output_buffer(card->qdio.out_qs[i],
920 &card->qdio.out_qs[i]->bufs[j]);
921 }
922 }
923 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
924
925 static void qeth_free_buffer_pool(struct qeth_card *card)
926 {
927 struct qeth_buffer_pool_entry *pool_entry, *tmp;
928 int i = 0;
929 list_for_each_entry_safe(pool_entry, tmp,
930 &card->qdio.init_pool.entry_list, init_list){
931 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
932 free_page((unsigned long)pool_entry->elements[i]);
933 list_del(&pool_entry->init_list);
934 kfree(pool_entry);
935 }
936 }
937
938 static void qeth_free_qdio_buffers(struct qeth_card *card)
939 {
940 int i, j;
941
942 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
943 QETH_QDIO_UNINITIALIZED)
944 return;
945 kfree(card->qdio.in_q);
946 card->qdio.in_q = NULL;
947 /* inbound buffer pool */
948 qeth_free_buffer_pool(card);
949 /* free outbound qdio_qs */
950 if (card->qdio.out_qs) {
951 for (i = 0; i < card->qdio.no_out_queues; ++i) {
952 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
953 qeth_clear_output_buffer(card->qdio.out_qs[i],
954 &card->qdio.out_qs[i]->bufs[j]);
955 kfree(card->qdio.out_qs[i]);
956 }
957 kfree(card->qdio.out_qs);
958 card->qdio.out_qs = NULL;
959 }
960 }
961
962 static void qeth_clean_channel(struct qeth_channel *channel)
963 {
964 int cnt;
965
966 QETH_DBF_TEXT(SETUP, 2, "freech");
967 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
968 kfree(channel->iob[cnt].data);
969 }
970
971 static void qeth_get_channel_path_desc(struct qeth_card *card)
972 {
973 struct ccw_device *ccwdev;
974 struct channelPath_dsc {
975 u8 flags;
976 u8 lsn;
977 u8 desc;
978 u8 chpid;
979 u8 swla;
980 u8 zeroes;
981 u8 chla;
982 u8 chpp;
983 } *chp_dsc;
984
985 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
986
987 ccwdev = card->data.ccwdev;
988 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
989 if (chp_dsc != NULL) {
990 /* CHPP field bit 6 == 1 -> single queue */
991 if ((chp_dsc->chpp & 0x02) == 0x02)
992 card->qdio.no_out_queues = 1;
993 card->info.func_level = 0x4100 + chp_dsc->desc;
994 kfree(chp_dsc);
995 }
996 if (card->qdio.no_out_queues == 1) {
997 card->qdio.default_out_queue = 0;
998 dev_info(&card->gdev->dev,
999 "Priority Queueing not supported\n");
1000 }
1001 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1002 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1003 return;
1004 }
1005
1006 static void qeth_init_qdio_info(struct qeth_card *card)
1007 {
1008 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1009 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1010 /* inbound */
1011 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1012 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1013 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1014 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1015 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1016 }
1017
1018 static void qeth_set_intial_options(struct qeth_card *card)
1019 {
1020 card->options.route4.type = NO_ROUTER;
1021 card->options.route6.type = NO_ROUTER;
1022 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1023 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1024 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1025 card->options.fake_broadcast = 0;
1026 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1027 card->options.performance_stats = 0;
1028 card->options.rx_sg_cb = QETH_RX_SG_CB;
1029 card->options.isolation = ISOLATION_MODE_NONE;
1030 }
1031
1032 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1033 {
1034 unsigned long flags;
1035 int rc = 0;
1036
1037 spin_lock_irqsave(&card->thread_mask_lock, flags);
1038 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1039 (u8) card->thread_start_mask,
1040 (u8) card->thread_allowed_mask,
1041 (u8) card->thread_running_mask);
1042 rc = (card->thread_start_mask & thread);
1043 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1044 return rc;
1045 }
1046
1047 static void qeth_start_kernel_thread(struct work_struct *work)
1048 {
1049 struct qeth_card *card = container_of(work, struct qeth_card,
1050 kernel_thread_starter);
1051 QETH_CARD_TEXT(card , 2, "strthrd");
1052
1053 if (card->read.state != CH_STATE_UP &&
1054 card->write.state != CH_STATE_UP)
1055 return;
1056 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1057 kthread_run(card->discipline.recover, (void *) card,
1058 "qeth_recover");
1059 }
1060
1061 static int qeth_setup_card(struct qeth_card *card)
1062 {
1063
1064 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1065 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1066
1067 card->read.state = CH_STATE_DOWN;
1068 card->write.state = CH_STATE_DOWN;
1069 card->data.state = CH_STATE_DOWN;
1070 card->state = CARD_STATE_DOWN;
1071 card->lan_online = 0;
1072 card->use_hard_stop = 0;
1073 card->read_or_write_problem = 0;
1074 card->dev = NULL;
1075 spin_lock_init(&card->vlanlock);
1076 spin_lock_init(&card->mclock);
1077 card->vlangrp = NULL;
1078 spin_lock_init(&card->lock);
1079 spin_lock_init(&card->ip_lock);
1080 spin_lock_init(&card->thread_mask_lock);
1081 mutex_init(&card->conf_mutex);
1082 mutex_init(&card->discipline_mutex);
1083 card->thread_start_mask = 0;
1084 card->thread_allowed_mask = 0;
1085 card->thread_running_mask = 0;
1086 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1087 INIT_LIST_HEAD(&card->ip_list);
1088 INIT_LIST_HEAD(card->ip_tbd_list);
1089 INIT_LIST_HEAD(&card->cmd_waiter_list);
1090 init_waitqueue_head(&card->wait_q);
1091 /* intial options */
1092 qeth_set_intial_options(card);
1093 /* IP address takeover */
1094 INIT_LIST_HEAD(&card->ipato.entries);
1095 card->ipato.enabled = 0;
1096 card->ipato.invert4 = 0;
1097 card->ipato.invert6 = 0;
1098 /* init QDIO stuff */
1099 qeth_init_qdio_info(card);
1100 return 0;
1101 }
1102
1103 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1104 {
1105 struct qeth_card *card = container_of(slr, struct qeth_card,
1106 qeth_service_level);
1107 if (card->info.mcl_level[0])
1108 seq_printf(m, "qeth: %s firmware level %s\n",
1109 CARD_BUS_ID(card), card->info.mcl_level);
1110 }
1111
1112 static struct qeth_card *qeth_alloc_card(void)
1113 {
1114 struct qeth_card *card;
1115
1116 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1117 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1118 if (!card)
1119 goto out;
1120 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1121 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1122 if (!card->ip_tbd_list) {
1123 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1124 goto out_card;
1125 }
1126 if (qeth_setup_channel(&card->read))
1127 goto out_ip;
1128 if (qeth_setup_channel(&card->write))
1129 goto out_channel;
1130 card->options.layer2 = -1;
1131 card->qeth_service_level.seq_print = qeth_core_sl_print;
1132 register_service_level(&card->qeth_service_level);
1133 return card;
1134
1135 out_channel:
1136 qeth_clean_channel(&card->read);
1137 out_ip:
1138 kfree(card->ip_tbd_list);
1139 out_card:
1140 kfree(card);
1141 out:
1142 return NULL;
1143 }
1144
1145 static int qeth_determine_card_type(struct qeth_card *card)
1146 {
1147 int i = 0;
1148
1149 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1150
1151 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1152 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1153 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1154 if ((CARD_RDEV(card)->id.dev_type ==
1155 known_devices[i][QETH_DEV_TYPE_IND]) &&
1156 (CARD_RDEV(card)->id.dev_model ==
1157 known_devices[i][QETH_DEV_MODEL_IND])) {
1158 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1159 card->qdio.no_out_queues =
1160 known_devices[i][QETH_QUEUE_NO_IND];
1161 card->info.is_multicast_different =
1162 known_devices[i][QETH_MULTICAST_IND];
1163 qeth_get_channel_path_desc(card);
1164 return 0;
1165 }
1166 i++;
1167 }
1168 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1169 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1170 "unknown type\n");
1171 return -ENOENT;
1172 }
1173
1174 static int qeth_clear_channel(struct qeth_channel *channel)
1175 {
1176 unsigned long flags;
1177 struct qeth_card *card;
1178 int rc;
1179
1180 card = CARD_FROM_CDEV(channel->ccwdev);
1181 QETH_CARD_TEXT(card, 3, "clearch");
1182 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1183 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1184 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1185
1186 if (rc)
1187 return rc;
1188 rc = wait_event_interruptible_timeout(card->wait_q,
1189 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1190 if (rc == -ERESTARTSYS)
1191 return rc;
1192 if (channel->state != CH_STATE_STOPPED)
1193 return -ETIME;
1194 channel->state = CH_STATE_DOWN;
1195 return 0;
1196 }
1197
1198 static int qeth_halt_channel(struct qeth_channel *channel)
1199 {
1200 unsigned long flags;
1201 struct qeth_card *card;
1202 int rc;
1203
1204 card = CARD_FROM_CDEV(channel->ccwdev);
1205 QETH_CARD_TEXT(card, 3, "haltch");
1206 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1207 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1208 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1209
1210 if (rc)
1211 return rc;
1212 rc = wait_event_interruptible_timeout(card->wait_q,
1213 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1214 if (rc == -ERESTARTSYS)
1215 return rc;
1216 if (channel->state != CH_STATE_HALTED)
1217 return -ETIME;
1218 return 0;
1219 }
1220
1221 static int qeth_halt_channels(struct qeth_card *card)
1222 {
1223 int rc1 = 0, rc2 = 0, rc3 = 0;
1224
1225 QETH_CARD_TEXT(card, 3, "haltchs");
1226 rc1 = qeth_halt_channel(&card->read);
1227 rc2 = qeth_halt_channel(&card->write);
1228 rc3 = qeth_halt_channel(&card->data);
1229 if (rc1)
1230 return rc1;
1231 if (rc2)
1232 return rc2;
1233 return rc3;
1234 }
1235
1236 static int qeth_clear_channels(struct qeth_card *card)
1237 {
1238 int rc1 = 0, rc2 = 0, rc3 = 0;
1239
1240 QETH_CARD_TEXT(card, 3, "clearchs");
1241 rc1 = qeth_clear_channel(&card->read);
1242 rc2 = qeth_clear_channel(&card->write);
1243 rc3 = qeth_clear_channel(&card->data);
1244 if (rc1)
1245 return rc1;
1246 if (rc2)
1247 return rc2;
1248 return rc3;
1249 }
1250
1251 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1252 {
1253 int rc = 0;
1254
1255 QETH_CARD_TEXT(card, 3, "clhacrd");
1256
1257 if (halt)
1258 rc = qeth_halt_channels(card);
1259 if (rc)
1260 return rc;
1261 return qeth_clear_channels(card);
1262 }
1263
1264 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1265 {
1266 int rc = 0;
1267
1268 QETH_CARD_TEXT(card, 3, "qdioclr");
1269 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1270 QETH_QDIO_CLEANING)) {
1271 case QETH_QDIO_ESTABLISHED:
1272 if (card->info.type == QETH_CARD_TYPE_IQD)
1273 rc = qdio_shutdown(CARD_DDEV(card),
1274 QDIO_FLAG_CLEANUP_USING_HALT);
1275 else
1276 rc = qdio_shutdown(CARD_DDEV(card),
1277 QDIO_FLAG_CLEANUP_USING_CLEAR);
1278 if (rc)
1279 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1280 qdio_free(CARD_DDEV(card));
1281 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1282 break;
1283 case QETH_QDIO_CLEANING:
1284 return rc;
1285 default:
1286 break;
1287 }
1288 rc = qeth_clear_halt_card(card, use_halt);
1289 if (rc)
1290 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1291 card->state = CARD_STATE_DOWN;
1292 return rc;
1293 }
1294 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1295
1296 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1297 int *length)
1298 {
1299 struct ciw *ciw;
1300 char *rcd_buf;
1301 int ret;
1302 struct qeth_channel *channel = &card->data;
1303 unsigned long flags;
1304
1305 /*
1306 * scan for RCD command in extended SenseID data
1307 */
1308 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1309 if (!ciw || ciw->cmd == 0)
1310 return -EOPNOTSUPP;
1311 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1312 if (!rcd_buf)
1313 return -ENOMEM;
1314
1315 channel->ccw.cmd_code = ciw->cmd;
1316 channel->ccw.cda = (__u32) __pa(rcd_buf);
1317 channel->ccw.count = ciw->count;
1318 channel->ccw.flags = CCW_FLAG_SLI;
1319 channel->state = CH_STATE_RCD;
1320 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1321 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1322 QETH_RCD_PARM, LPM_ANYPATH, 0,
1323 QETH_RCD_TIMEOUT);
1324 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1325 if (!ret)
1326 wait_event(card->wait_q,
1327 (channel->state == CH_STATE_RCD_DONE ||
1328 channel->state == CH_STATE_DOWN));
1329 if (channel->state == CH_STATE_DOWN)
1330 ret = -EIO;
1331 else
1332 channel->state = CH_STATE_DOWN;
1333 if (ret) {
1334 kfree(rcd_buf);
1335 *buffer = NULL;
1336 *length = 0;
1337 } else {
1338 *length = ciw->count;
1339 *buffer = rcd_buf;
1340 }
1341 return ret;
1342 }
1343
1344 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1345 {
1346 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1347 card->info.chpid = prcd[30];
1348 card->info.unit_addr2 = prcd[31];
1349 card->info.cula = prcd[63];
1350 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1351 (prcd[0x11] == _ascebc['M']));
1352 }
1353
1354 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1355 {
1356 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1357
1358 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1359 card->info.blkt.time_total = 250;
1360 card->info.blkt.inter_packet = 5;
1361 card->info.blkt.inter_packet_jumbo = 15;
1362 } else {
1363 card->info.blkt.time_total = 0;
1364 card->info.blkt.inter_packet = 0;
1365 card->info.blkt.inter_packet_jumbo = 0;
1366 }
1367 }
1368
1369 static void qeth_init_tokens(struct qeth_card *card)
1370 {
1371 card->token.issuer_rm_w = 0x00010103UL;
1372 card->token.cm_filter_w = 0x00010108UL;
1373 card->token.cm_connection_w = 0x0001010aUL;
1374 card->token.ulp_filter_w = 0x0001010bUL;
1375 card->token.ulp_connection_w = 0x0001010dUL;
1376 }
1377
1378 static void qeth_init_func_level(struct qeth_card *card)
1379 {
1380 switch (card->info.type) {
1381 case QETH_CARD_TYPE_IQD:
1382 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1383 break;
1384 case QETH_CARD_TYPE_OSD:
1385 case QETH_CARD_TYPE_OSN:
1386 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1387 break;
1388 default:
1389 break;
1390 }
1391 }
1392
1393 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1394 void (*idx_reply_cb)(struct qeth_channel *,
1395 struct qeth_cmd_buffer *))
1396 {
1397 struct qeth_cmd_buffer *iob;
1398 unsigned long flags;
1399 int rc;
1400 struct qeth_card *card;
1401
1402 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1403 card = CARD_FROM_CDEV(channel->ccwdev);
1404 iob = qeth_get_buffer(channel);
1405 iob->callback = idx_reply_cb;
1406 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1407 channel->ccw.count = QETH_BUFSIZE;
1408 channel->ccw.cda = (__u32) __pa(iob->data);
1409
1410 wait_event(card->wait_q,
1411 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1412 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1413 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1414 rc = ccw_device_start(channel->ccwdev,
1415 &channel->ccw, (addr_t) iob, 0, 0);
1416 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1417
1418 if (rc) {
1419 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1420 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1421 atomic_set(&channel->irq_pending, 0);
1422 wake_up(&card->wait_q);
1423 return rc;
1424 }
1425 rc = wait_event_interruptible_timeout(card->wait_q,
1426 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1427 if (rc == -ERESTARTSYS)
1428 return rc;
1429 if (channel->state != CH_STATE_UP) {
1430 rc = -ETIME;
1431 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1432 qeth_clear_cmd_buffers(channel);
1433 } else
1434 rc = 0;
1435 return rc;
1436 }
1437
1438 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1439 void (*idx_reply_cb)(struct qeth_channel *,
1440 struct qeth_cmd_buffer *))
1441 {
1442 struct qeth_card *card;
1443 struct qeth_cmd_buffer *iob;
1444 unsigned long flags;
1445 __u16 temp;
1446 __u8 tmp;
1447 int rc;
1448 struct ccw_dev_id temp_devid;
1449
1450 card = CARD_FROM_CDEV(channel->ccwdev);
1451
1452 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1453
1454 iob = qeth_get_buffer(channel);
1455 iob->callback = idx_reply_cb;
1456 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1457 channel->ccw.count = IDX_ACTIVATE_SIZE;
1458 channel->ccw.cda = (__u32) __pa(iob->data);
1459 if (channel == &card->write) {
1460 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1461 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1462 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1463 card->seqno.trans_hdr++;
1464 } else {
1465 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1466 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1467 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1468 }
1469 tmp = ((__u8)card->info.portno) | 0x80;
1470 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1471 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1472 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1473 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1474 &card->info.func_level, sizeof(__u16));
1475 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1476 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1477 temp = (card->info.cula << 8) + card->info.unit_addr2;
1478 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1479
1480 wait_event(card->wait_q,
1481 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1482 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1483 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1484 rc = ccw_device_start(channel->ccwdev,
1485 &channel->ccw, (addr_t) iob, 0, 0);
1486 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1487
1488 if (rc) {
1489 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1490 rc);
1491 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1492 atomic_set(&channel->irq_pending, 0);
1493 wake_up(&card->wait_q);
1494 return rc;
1495 }
1496 rc = wait_event_interruptible_timeout(card->wait_q,
1497 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1498 if (rc == -ERESTARTSYS)
1499 return rc;
1500 if (channel->state != CH_STATE_ACTIVATING) {
1501 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1502 " failed to recover an error on the device\n");
1503 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1504 dev_name(&channel->ccwdev->dev));
1505 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1506 qeth_clear_cmd_buffers(channel);
1507 return -ETIME;
1508 }
1509 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1510 }
1511
1512 static int qeth_peer_func_level(int level)
1513 {
1514 if ((level & 0xff) == 8)
1515 return (level & 0xff) + 0x400;
1516 if (((level >> 8) & 3) == 1)
1517 return (level & 0xff) + 0x200;
1518 return level;
1519 }
1520
1521 static void qeth_idx_write_cb(struct qeth_channel *channel,
1522 struct qeth_cmd_buffer *iob)
1523 {
1524 struct qeth_card *card;
1525 __u16 temp;
1526
1527 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1528
1529 if (channel->state == CH_STATE_DOWN) {
1530 channel->state = CH_STATE_ACTIVATING;
1531 goto out;
1532 }
1533 card = CARD_FROM_CDEV(channel->ccwdev);
1534
1535 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1536 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1537 dev_err(&card->write.ccwdev->dev,
1538 "The adapter is used exclusively by another "
1539 "host\n");
1540 else
1541 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1542 " negative reply\n",
1543 dev_name(&card->write.ccwdev->dev));
1544 goto out;
1545 }
1546 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1547 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1548 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1549 "function level mismatch (sent: 0x%x, received: "
1550 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1551 card->info.func_level, temp);
1552 goto out;
1553 }
1554 channel->state = CH_STATE_UP;
1555 out:
1556 qeth_release_buffer(channel, iob);
1557 }
1558
1559 static void qeth_idx_read_cb(struct qeth_channel *channel,
1560 struct qeth_cmd_buffer *iob)
1561 {
1562 struct qeth_card *card;
1563 __u16 temp;
1564
1565 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1566 if (channel->state == CH_STATE_DOWN) {
1567 channel->state = CH_STATE_ACTIVATING;
1568 goto out;
1569 }
1570
1571 card = CARD_FROM_CDEV(channel->ccwdev);
1572 if (qeth_check_idx_response(card, iob->data))
1573 goto out;
1574
1575 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1576 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1577 case QETH_IDX_ACT_ERR_EXCL:
1578 dev_err(&card->write.ccwdev->dev,
1579 "The adapter is used exclusively by another "
1580 "host\n");
1581 break;
1582 case QETH_IDX_ACT_ERR_AUTH:
1583 case QETH_IDX_ACT_ERR_AUTH_USER:
1584 dev_err(&card->read.ccwdev->dev,
1585 "Setting the device online failed because of "
1586 "insufficient authorization\n");
1587 break;
1588 default:
1589 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1590 " negative reply\n",
1591 dev_name(&card->read.ccwdev->dev));
1592 }
1593 QETH_CARD_TEXT_(card, 2, "idxread%c",
1594 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1595 goto out;
1596 }
1597
1598 /**
1599 * * temporary fix for microcode bug
1600 * * to revert it,replace OR by AND
1601 * */
1602 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1603 (card->info.type == QETH_CARD_TYPE_OSD))
1604 card->info.portname_required = 1;
1605
1606 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1607 if (temp != qeth_peer_func_level(card->info.func_level)) {
1608 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1609 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1610 dev_name(&card->read.ccwdev->dev),
1611 card->info.func_level, temp);
1612 goto out;
1613 }
1614 memcpy(&card->token.issuer_rm_r,
1615 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1616 QETH_MPC_TOKEN_LENGTH);
1617 memcpy(&card->info.mcl_level[0],
1618 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1619 channel->state = CH_STATE_UP;
1620 out:
1621 qeth_release_buffer(channel, iob);
1622 }
1623
1624 void qeth_prepare_control_data(struct qeth_card *card, int len,
1625 struct qeth_cmd_buffer *iob)
1626 {
1627 qeth_setup_ccw(&card->write, iob->data, len);
1628 iob->callback = qeth_release_buffer;
1629
1630 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1631 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1632 card->seqno.trans_hdr++;
1633 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1634 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1635 card->seqno.pdu_hdr++;
1636 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1637 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1638 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1639 }
1640 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1641
1642 int qeth_send_control_data(struct qeth_card *card, int len,
1643 struct qeth_cmd_buffer *iob,
1644 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1645 unsigned long),
1646 void *reply_param)
1647 {
1648 int rc;
1649 unsigned long flags;
1650 struct qeth_reply *reply = NULL;
1651 unsigned long timeout, event_timeout;
1652 struct qeth_ipa_cmd *cmd;
1653
1654 QETH_CARD_TEXT(card, 2, "sendctl");
1655
1656 if (card->read_or_write_problem) {
1657 qeth_release_buffer(iob->channel, iob);
1658 return -EIO;
1659 }
1660 reply = qeth_alloc_reply(card);
1661 if (!reply) {
1662 return -ENOMEM;
1663 }
1664 reply->callback = reply_cb;
1665 reply->param = reply_param;
1666 if (card->state == CARD_STATE_DOWN)
1667 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1668 else
1669 reply->seqno = card->seqno.ipa++;
1670 init_waitqueue_head(&reply->wait_q);
1671 spin_lock_irqsave(&card->lock, flags);
1672 list_add_tail(&reply->list, &card->cmd_waiter_list);
1673 spin_unlock_irqrestore(&card->lock, flags);
1674 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1675
1676 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1677 qeth_prepare_control_data(card, len, iob);
1678
1679 if (IS_IPA(iob->data))
1680 event_timeout = QETH_IPA_TIMEOUT;
1681 else
1682 event_timeout = QETH_TIMEOUT;
1683 timeout = jiffies + event_timeout;
1684
1685 QETH_CARD_TEXT(card, 6, "noirqpnd");
1686 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1687 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1688 (addr_t) iob, 0, 0);
1689 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1690 if (rc) {
1691 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1692 "ccw_device_start rc = %i\n",
1693 dev_name(&card->write.ccwdev->dev), rc);
1694 QETH_CARD_TEXT_(card, 2, " err%d", rc);
1695 spin_lock_irqsave(&card->lock, flags);
1696 list_del_init(&reply->list);
1697 qeth_put_reply(reply);
1698 spin_unlock_irqrestore(&card->lock, flags);
1699 qeth_release_buffer(iob->channel, iob);
1700 atomic_set(&card->write.irq_pending, 0);
1701 wake_up(&card->wait_q);
1702 return rc;
1703 }
1704
1705 /* we have only one long running ipassist, since we can ensure
1706 process context of this command we can sleep */
1707 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1708 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1709 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1710 if (!wait_event_timeout(reply->wait_q,
1711 atomic_read(&reply->received), event_timeout))
1712 goto time_err;
1713 } else {
1714 while (!atomic_read(&reply->received)) {
1715 if (time_after(jiffies, timeout))
1716 goto time_err;
1717 cpu_relax();
1718 };
1719 }
1720
1721 rc = reply->rc;
1722 qeth_put_reply(reply);
1723 return rc;
1724
1725 time_err:
1726 spin_lock_irqsave(&reply->card->lock, flags);
1727 list_del_init(&reply->list);
1728 spin_unlock_irqrestore(&reply->card->lock, flags);
1729 reply->rc = -ETIME;
1730 atomic_inc(&reply->received);
1731 atomic_set(&card->write.irq_pending, 0);
1732 qeth_release_buffer(iob->channel, iob);
1733 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
1734 wake_up(&reply->wait_q);
1735 rc = reply->rc;
1736 qeth_put_reply(reply);
1737 return rc;
1738 }
1739 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1740
1741 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1742 unsigned long data)
1743 {
1744 struct qeth_cmd_buffer *iob;
1745
1746 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1747
1748 iob = (struct qeth_cmd_buffer *) data;
1749 memcpy(&card->token.cm_filter_r,
1750 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1751 QETH_MPC_TOKEN_LENGTH);
1752 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1753 return 0;
1754 }
1755
1756 static int qeth_cm_enable(struct qeth_card *card)
1757 {
1758 int rc;
1759 struct qeth_cmd_buffer *iob;
1760
1761 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1762
1763 iob = qeth_wait_for_buffer(&card->write);
1764 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1765 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1766 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1767 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1768 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1769
1770 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1771 qeth_cm_enable_cb, NULL);
1772 return rc;
1773 }
1774
1775 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1776 unsigned long data)
1777 {
1778
1779 struct qeth_cmd_buffer *iob;
1780
1781 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1782
1783 iob = (struct qeth_cmd_buffer *) data;
1784 memcpy(&card->token.cm_connection_r,
1785 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1786 QETH_MPC_TOKEN_LENGTH);
1787 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1788 return 0;
1789 }
1790
1791 static int qeth_cm_setup(struct qeth_card *card)
1792 {
1793 int rc;
1794 struct qeth_cmd_buffer *iob;
1795
1796 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1797
1798 iob = qeth_wait_for_buffer(&card->write);
1799 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1800 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1801 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1802 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1803 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1804 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1805 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1806 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1807 qeth_cm_setup_cb, NULL);
1808 return rc;
1809
1810 }
1811
1812 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1813 {
1814 switch (card->info.type) {
1815 case QETH_CARD_TYPE_UNKNOWN:
1816 return 1500;
1817 case QETH_CARD_TYPE_IQD:
1818 return card->info.max_mtu;
1819 case QETH_CARD_TYPE_OSD:
1820 switch (card->info.link_type) {
1821 case QETH_LINK_TYPE_HSTR:
1822 case QETH_LINK_TYPE_LANE_TR:
1823 return 2000;
1824 default:
1825 return 1492;
1826 }
1827 case QETH_CARD_TYPE_OSM:
1828 case QETH_CARD_TYPE_OSX:
1829 return 1492;
1830 default:
1831 return 1500;
1832 }
1833 }
1834
1835 static inline int qeth_get_max_mtu_for_card(int cardtype)
1836 {
1837 switch (cardtype) {
1838
1839 case QETH_CARD_TYPE_UNKNOWN:
1840 case QETH_CARD_TYPE_OSD:
1841 case QETH_CARD_TYPE_OSN:
1842 case QETH_CARD_TYPE_OSM:
1843 case QETH_CARD_TYPE_OSX:
1844 return 61440;
1845 case QETH_CARD_TYPE_IQD:
1846 return 57344;
1847 default:
1848 return 1500;
1849 }
1850 }
1851
1852 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1853 {
1854 switch (cardtype) {
1855 case QETH_CARD_TYPE_IQD:
1856 return 1;
1857 default:
1858 return 0;
1859 }
1860 }
1861
1862 static inline int qeth_get_mtu_outof_framesize(int framesize)
1863 {
1864 switch (framesize) {
1865 case 0x4000:
1866 return 8192;
1867 case 0x6000:
1868 return 16384;
1869 case 0xa000:
1870 return 32768;
1871 case 0xffff:
1872 return 57344;
1873 default:
1874 return 0;
1875 }
1876 }
1877
1878 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1879 {
1880 switch (card->info.type) {
1881 case QETH_CARD_TYPE_OSD:
1882 case QETH_CARD_TYPE_OSM:
1883 case QETH_CARD_TYPE_OSX:
1884 return ((mtu >= 576) && (mtu <= 61440));
1885 case QETH_CARD_TYPE_IQD:
1886 return ((mtu >= 576) &&
1887 (mtu <= card->info.max_mtu + 4096 - 32));
1888 case QETH_CARD_TYPE_OSN:
1889 case QETH_CARD_TYPE_UNKNOWN:
1890 default:
1891 return 1;
1892 }
1893 }
1894
1895 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1896 unsigned long data)
1897 {
1898
1899 __u16 mtu, framesize;
1900 __u16 len;
1901 __u8 link_type;
1902 struct qeth_cmd_buffer *iob;
1903
1904 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1905
1906 iob = (struct qeth_cmd_buffer *) data;
1907 memcpy(&card->token.ulp_filter_r,
1908 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1909 QETH_MPC_TOKEN_LENGTH);
1910 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1911 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1912 mtu = qeth_get_mtu_outof_framesize(framesize);
1913 if (!mtu) {
1914 iob->rc = -EINVAL;
1915 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1916 return 0;
1917 }
1918 card->info.max_mtu = mtu;
1919 card->info.initial_mtu = mtu;
1920 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1921 } else {
1922 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1923 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1924 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1925 }
1926
1927 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1928 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1929 memcpy(&link_type,
1930 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1931 card->info.link_type = link_type;
1932 } else
1933 card->info.link_type = 0;
1934 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
1935 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1936 return 0;
1937 }
1938
1939 static int qeth_ulp_enable(struct qeth_card *card)
1940 {
1941 int rc;
1942 char prot_type;
1943 struct qeth_cmd_buffer *iob;
1944
1945 /*FIXME: trace view callbacks*/
1946 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1947
1948 iob = qeth_wait_for_buffer(&card->write);
1949 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1950
1951 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1952 (__u8) card->info.portno;
1953 if (card->options.layer2)
1954 if (card->info.type == QETH_CARD_TYPE_OSN)
1955 prot_type = QETH_PROT_OSN2;
1956 else
1957 prot_type = QETH_PROT_LAYER2;
1958 else
1959 prot_type = QETH_PROT_TCPIP;
1960
1961 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1962 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1963 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1964 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1965 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1966 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1967 card->info.portname, 9);
1968 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1969 qeth_ulp_enable_cb, NULL);
1970 return rc;
1971
1972 }
1973
1974 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1975 unsigned long data)
1976 {
1977 struct qeth_cmd_buffer *iob;
1978 int rc = 0;
1979
1980 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1981
1982 iob = (struct qeth_cmd_buffer *) data;
1983 memcpy(&card->token.ulp_connection_r,
1984 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1985 QETH_MPC_TOKEN_LENGTH);
1986 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1987 3)) {
1988 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
1989 dev_err(&card->gdev->dev, "A connection could not be "
1990 "established because of an OLM limit\n");
1991 iob->rc = -EMLINK;
1992 }
1993 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1994 return rc;
1995 }
1996
1997 static int qeth_ulp_setup(struct qeth_card *card)
1998 {
1999 int rc;
2000 __u16 temp;
2001 struct qeth_cmd_buffer *iob;
2002 struct ccw_dev_id dev_id;
2003
2004 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2005
2006 iob = qeth_wait_for_buffer(&card->write);
2007 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2008
2009 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2010 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2011 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2012 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2013 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2014 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2015
2016 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2017 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2018 temp = (card->info.cula << 8) + card->info.unit_addr2;
2019 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2020 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2021 qeth_ulp_setup_cb, NULL);
2022 return rc;
2023 }
2024
2025 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2026 {
2027 int i, j;
2028
2029 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2030
2031 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2032 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2033 return 0;
2034
2035 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2036 GFP_KERNEL);
2037 if (!card->qdio.in_q)
2038 goto out_nomem;
2039 QETH_DBF_TEXT(SETUP, 2, "inq");
2040 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2041 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2042 /* give inbound qeth_qdio_buffers their qdio_buffers */
2043 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2044 card->qdio.in_q->bufs[i].buffer =
2045 &card->qdio.in_q->qdio_bufs[i];
2046 /* inbound buffer pool */
2047 if (qeth_alloc_buffer_pool(card))
2048 goto out_freeinq;
2049 /* outbound */
2050 card->qdio.out_qs =
2051 kmalloc(card->qdio.no_out_queues *
2052 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2053 if (!card->qdio.out_qs)
2054 goto out_freepool;
2055 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2056 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2057 GFP_KERNEL);
2058 if (!card->qdio.out_qs[i])
2059 goto out_freeoutq;
2060 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2061 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2062 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2063 card->qdio.out_qs[i]->queue_no = i;
2064 /* give outbound qeth_qdio_buffers their qdio_buffers */
2065 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2066 card->qdio.out_qs[i]->bufs[j].buffer =
2067 &card->qdio.out_qs[i]->qdio_bufs[j];
2068 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2069 skb_list);
2070 lockdep_set_class(
2071 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2072 &qdio_out_skb_queue_key);
2073 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2074 }
2075 }
2076 return 0;
2077
2078 out_freeoutq:
2079 while (i > 0)
2080 kfree(card->qdio.out_qs[--i]);
2081 kfree(card->qdio.out_qs);
2082 card->qdio.out_qs = NULL;
2083 out_freepool:
2084 qeth_free_buffer_pool(card);
2085 out_freeinq:
2086 kfree(card->qdio.in_q);
2087 card->qdio.in_q = NULL;
2088 out_nomem:
2089 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2090 return -ENOMEM;
2091 }
2092
2093 static void qeth_create_qib_param_field(struct qeth_card *card,
2094 char *param_field)
2095 {
2096
2097 param_field[0] = _ascebc['P'];
2098 param_field[1] = _ascebc['C'];
2099 param_field[2] = _ascebc['I'];
2100 param_field[3] = _ascebc['T'];
2101 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2102 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2103 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2104 }
2105
2106 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2107 char *param_field)
2108 {
2109 param_field[16] = _ascebc['B'];
2110 param_field[17] = _ascebc['L'];
2111 param_field[18] = _ascebc['K'];
2112 param_field[19] = _ascebc['T'];
2113 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2114 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2115 *((unsigned int *) (&param_field[28])) =
2116 card->info.blkt.inter_packet_jumbo;
2117 }
2118
2119 static int qeth_qdio_activate(struct qeth_card *card)
2120 {
2121 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2122 return qdio_activate(CARD_DDEV(card));
2123 }
2124
2125 static int qeth_dm_act(struct qeth_card *card)
2126 {
2127 int rc;
2128 struct qeth_cmd_buffer *iob;
2129
2130 QETH_DBF_TEXT(SETUP, 2, "dmact");
2131
2132 iob = qeth_wait_for_buffer(&card->write);
2133 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2134
2135 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2136 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2137 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2138 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2139 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2140 return rc;
2141 }
2142
2143 static int qeth_mpc_initialize(struct qeth_card *card)
2144 {
2145 int rc;
2146
2147 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2148
2149 rc = qeth_issue_next_read(card);
2150 if (rc) {
2151 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2152 return rc;
2153 }
2154 rc = qeth_cm_enable(card);
2155 if (rc) {
2156 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2157 goto out_qdio;
2158 }
2159 rc = qeth_cm_setup(card);
2160 if (rc) {
2161 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2162 goto out_qdio;
2163 }
2164 rc = qeth_ulp_enable(card);
2165 if (rc) {
2166 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2167 goto out_qdio;
2168 }
2169 rc = qeth_ulp_setup(card);
2170 if (rc) {
2171 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2172 goto out_qdio;
2173 }
2174 rc = qeth_alloc_qdio_buffers(card);
2175 if (rc) {
2176 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2177 goto out_qdio;
2178 }
2179 rc = qeth_qdio_establish(card);
2180 if (rc) {
2181 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2182 qeth_free_qdio_buffers(card);
2183 goto out_qdio;
2184 }
2185 rc = qeth_qdio_activate(card);
2186 if (rc) {
2187 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2188 goto out_qdio;
2189 }
2190 rc = qeth_dm_act(card);
2191 if (rc) {
2192 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2193 goto out_qdio;
2194 }
2195
2196 return 0;
2197 out_qdio:
2198 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2199 return rc;
2200 }
2201
2202 static void qeth_print_status_with_portname(struct qeth_card *card)
2203 {
2204 char dbf_text[15];
2205 int i;
2206
2207 sprintf(dbf_text, "%s", card->info.portname + 1);
2208 for (i = 0; i < 8; i++)
2209 dbf_text[i] =
2210 (char) _ebcasc[(__u8) dbf_text[i]];
2211 dbf_text[8] = 0;
2212 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2213 "with link type %s (portname: %s)\n",
2214 qeth_get_cardname(card),
2215 (card->info.mcl_level[0]) ? " (level: " : "",
2216 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2217 (card->info.mcl_level[0]) ? ")" : "",
2218 qeth_get_cardname_short(card),
2219 dbf_text);
2220
2221 }
2222
2223 static void qeth_print_status_no_portname(struct qeth_card *card)
2224 {
2225 if (card->info.portname[0])
2226 dev_info(&card->gdev->dev, "Device is a%s "
2227 "card%s%s%s\nwith link type %s "
2228 "(no portname needed by interface).\n",
2229 qeth_get_cardname(card),
2230 (card->info.mcl_level[0]) ? " (level: " : "",
2231 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2232 (card->info.mcl_level[0]) ? ")" : "",
2233 qeth_get_cardname_short(card));
2234 else
2235 dev_info(&card->gdev->dev, "Device is a%s "
2236 "card%s%s%s\nwith link type %s.\n",
2237 qeth_get_cardname(card),
2238 (card->info.mcl_level[0]) ? " (level: " : "",
2239 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2240 (card->info.mcl_level[0]) ? ")" : "",
2241 qeth_get_cardname_short(card));
2242 }
2243
2244 void qeth_print_status_message(struct qeth_card *card)
2245 {
2246 switch (card->info.type) {
2247 case QETH_CARD_TYPE_OSD:
2248 case QETH_CARD_TYPE_OSM:
2249 case QETH_CARD_TYPE_OSX:
2250 /* VM will use a non-zero first character
2251 * to indicate a HiperSockets like reporting
2252 * of the level OSA sets the first character to zero
2253 * */
2254 if (!card->info.mcl_level[0]) {
2255 sprintf(card->info.mcl_level, "%02x%02x",
2256 card->info.mcl_level[2],
2257 card->info.mcl_level[3]);
2258
2259 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2260 break;
2261 }
2262 /* fallthrough */
2263 case QETH_CARD_TYPE_IQD:
2264 if ((card->info.guestlan) ||
2265 (card->info.mcl_level[0] & 0x80)) {
2266 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2267 card->info.mcl_level[0]];
2268 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2269 card->info.mcl_level[1]];
2270 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2271 card->info.mcl_level[2]];
2272 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2273 card->info.mcl_level[3]];
2274 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2275 }
2276 break;
2277 default:
2278 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2279 }
2280 if (card->info.portname_required)
2281 qeth_print_status_with_portname(card);
2282 else
2283 qeth_print_status_no_portname(card);
2284 }
2285 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2286
2287 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2288 {
2289 struct qeth_buffer_pool_entry *entry;
2290
2291 QETH_CARD_TEXT(card, 5, "inwrklst");
2292
2293 list_for_each_entry(entry,
2294 &card->qdio.init_pool.entry_list, init_list) {
2295 qeth_put_buffer_pool_entry(card, entry);
2296 }
2297 }
2298
2299 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2300 struct qeth_card *card)
2301 {
2302 struct list_head *plh;
2303 struct qeth_buffer_pool_entry *entry;
2304 int i, free;
2305 struct page *page;
2306
2307 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2308 return NULL;
2309
2310 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2311 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2312 free = 1;
2313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2314 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2315 free = 0;
2316 break;
2317 }
2318 }
2319 if (free) {
2320 list_del_init(&entry->list);
2321 return entry;
2322 }
2323 }
2324
2325 /* no free buffer in pool so take first one and swap pages */
2326 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2327 struct qeth_buffer_pool_entry, list);
2328 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2329 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2330 page = alloc_page(GFP_ATOMIC);
2331 if (!page) {
2332 return NULL;
2333 } else {
2334 free_page((unsigned long)entry->elements[i]);
2335 entry->elements[i] = page_address(page);
2336 if (card->options.performance_stats)
2337 card->perf_stats.sg_alloc_page_rx++;
2338 }
2339 }
2340 }
2341 list_del_init(&entry->list);
2342 return entry;
2343 }
2344
2345 static int qeth_init_input_buffer(struct qeth_card *card,
2346 struct qeth_qdio_buffer *buf)
2347 {
2348 struct qeth_buffer_pool_entry *pool_entry;
2349 int i;
2350
2351 pool_entry = qeth_find_free_buffer_pool_entry(card);
2352 if (!pool_entry)
2353 return 1;
2354
2355 /*
2356 * since the buffer is accessed only from the input_tasklet
2357 * there shouldn't be a need to synchronize; also, since we use
2358 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2359 * buffers
2360 */
2361
2362 buf->pool_entry = pool_entry;
2363 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2364 buf->buffer->element[i].length = PAGE_SIZE;
2365 buf->buffer->element[i].addr = pool_entry->elements[i];
2366 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2367 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2368 else
2369 buf->buffer->element[i].flags = 0;
2370 }
2371 return 0;
2372 }
2373
2374 int qeth_init_qdio_queues(struct qeth_card *card)
2375 {
2376 int i, j;
2377 int rc;
2378
2379 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2380
2381 /* inbound queue */
2382 memset(card->qdio.in_q->qdio_bufs, 0,
2383 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2384 qeth_initialize_working_pool_list(card);
2385 /*give only as many buffers to hardware as we have buffer pool entries*/
2386 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2387 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2388 card->qdio.in_q->next_buf_to_init =
2389 card->qdio.in_buf_pool.buf_count - 1;
2390 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2391 card->qdio.in_buf_pool.buf_count - 1);
2392 if (rc) {
2393 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2394 return rc;
2395 }
2396 /* outbound queue */
2397 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2398 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2399 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2400 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2401 qeth_clear_output_buffer(card->qdio.out_qs[i],
2402 &card->qdio.out_qs[i]->bufs[j]);
2403 }
2404 card->qdio.out_qs[i]->card = card;
2405 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2406 card->qdio.out_qs[i]->do_pack = 0;
2407 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2408 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2409 atomic_set(&card->qdio.out_qs[i]->state,
2410 QETH_OUT_Q_UNLOCKED);
2411 }
2412 return 0;
2413 }
2414 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2415
2416 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2417 {
2418 switch (link_type) {
2419 case QETH_LINK_TYPE_HSTR:
2420 return 2;
2421 default:
2422 return 1;
2423 }
2424 }
2425
2426 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2427 struct qeth_ipa_cmd *cmd, __u8 command,
2428 enum qeth_prot_versions prot)
2429 {
2430 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2431 cmd->hdr.command = command;
2432 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2433 cmd->hdr.seqno = card->seqno.ipa;
2434 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2435 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2436 if (card->options.layer2)
2437 cmd->hdr.prim_version_no = 2;
2438 else
2439 cmd->hdr.prim_version_no = 1;
2440 cmd->hdr.param_count = 1;
2441 cmd->hdr.prot_version = prot;
2442 cmd->hdr.ipa_supported = 0;
2443 cmd->hdr.ipa_enabled = 0;
2444 }
2445
2446 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2447 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2448 {
2449 struct qeth_cmd_buffer *iob;
2450 struct qeth_ipa_cmd *cmd;
2451
2452 iob = qeth_wait_for_buffer(&card->write);
2453 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2454 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2455
2456 return iob;
2457 }
2458 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2459
2460 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2461 char prot_type)
2462 {
2463 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2464 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2465 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2466 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2467 }
2468 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2469
2470 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2471 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2472 unsigned long),
2473 void *reply_param)
2474 {
2475 int rc;
2476 char prot_type;
2477
2478 QETH_CARD_TEXT(card, 4, "sendipa");
2479
2480 if (card->options.layer2)
2481 if (card->info.type == QETH_CARD_TYPE_OSN)
2482 prot_type = QETH_PROT_OSN2;
2483 else
2484 prot_type = QETH_PROT_LAYER2;
2485 else
2486 prot_type = QETH_PROT_TCPIP;
2487 qeth_prepare_ipa_cmd(card, iob, prot_type);
2488 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2489 iob, reply_cb, reply_param);
2490 if (rc == -ETIME) {
2491 qeth_clear_ipacmd_list(card);
2492 qeth_schedule_recovery(card);
2493 }
2494 return rc;
2495 }
2496 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2497
2498 static int qeth_send_startstoplan(struct qeth_card *card,
2499 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2500 {
2501 int rc;
2502 struct qeth_cmd_buffer *iob;
2503
2504 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2505 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2506
2507 return rc;
2508 }
2509
2510 int qeth_send_startlan(struct qeth_card *card)
2511 {
2512 int rc;
2513
2514 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2515
2516 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2517 return rc;
2518 }
2519 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2520
2521 int qeth_send_stoplan(struct qeth_card *card)
2522 {
2523 int rc = 0;
2524
2525 /*
2526 * TODO: according to the IPA format document page 14,
2527 * TCP/IP (we!) never issue a STOPLAN
2528 * is this right ?!?
2529 */
2530 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2531
2532 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2533 return rc;
2534 }
2535 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2536
2537 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2538 struct qeth_reply *reply, unsigned long data)
2539 {
2540 struct qeth_ipa_cmd *cmd;
2541
2542 QETH_CARD_TEXT(card, 4, "defadpcb");
2543
2544 cmd = (struct qeth_ipa_cmd *) data;
2545 if (cmd->hdr.return_code == 0)
2546 cmd->hdr.return_code =
2547 cmd->data.setadapterparms.hdr.return_code;
2548 return 0;
2549 }
2550 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2551
2552 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2553 struct qeth_reply *reply, unsigned long data)
2554 {
2555 struct qeth_ipa_cmd *cmd;
2556
2557 QETH_CARD_TEXT(card, 3, "quyadpcb");
2558
2559 cmd = (struct qeth_ipa_cmd *) data;
2560 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2561 card->info.link_type =
2562 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2563 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2564 }
2565 card->options.adp.supported_funcs =
2566 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2567 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2568 }
2569
2570 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2571 __u32 command, __u32 cmdlen)
2572 {
2573 struct qeth_cmd_buffer *iob;
2574 struct qeth_ipa_cmd *cmd;
2575
2576 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2577 QETH_PROT_IPV4);
2578 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2579 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2580 cmd->data.setadapterparms.hdr.command_code = command;
2581 cmd->data.setadapterparms.hdr.used_total = 1;
2582 cmd->data.setadapterparms.hdr.seq_no = 1;
2583
2584 return iob;
2585 }
2586 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2587
2588 int qeth_query_setadapterparms(struct qeth_card *card)
2589 {
2590 int rc;
2591 struct qeth_cmd_buffer *iob;
2592
2593 QETH_CARD_TEXT(card, 3, "queryadp");
2594 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2595 sizeof(struct qeth_ipacmd_setadpparms));
2596 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2597 return rc;
2598 }
2599 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2600
2601 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2602 unsigned int qdio_error, const char *dbftext)
2603 {
2604 if (qdio_error) {
2605 QETH_CARD_TEXT(card, 2, dbftext);
2606 QETH_CARD_TEXT_(card, 2, " F15=%02X",
2607 buf->element[15].flags & 0xff);
2608 QETH_CARD_TEXT_(card, 2, " F14=%02X",
2609 buf->element[14].flags & 0xff);
2610 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
2611 if ((buf->element[15].flags & 0xff) == 0x12) {
2612 card->stats.rx_dropped++;
2613 return 0;
2614 } else
2615 return 1;
2616 }
2617 return 0;
2618 }
2619 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2620
2621 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2622 {
2623 struct qeth_qdio_q *queue = card->qdio.in_q;
2624 int count;
2625 int i;
2626 int rc;
2627 int newcount = 0;
2628
2629 count = (index < queue->next_buf_to_init)?
2630 card->qdio.in_buf_pool.buf_count -
2631 (queue->next_buf_to_init - index) :
2632 card->qdio.in_buf_pool.buf_count -
2633 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2634 /* only requeue at a certain threshold to avoid SIGAs */
2635 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2636 for (i = queue->next_buf_to_init;
2637 i < queue->next_buf_to_init + count; ++i) {
2638 if (qeth_init_input_buffer(card,
2639 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2640 break;
2641 } else {
2642 newcount++;
2643 }
2644 }
2645
2646 if (newcount < count) {
2647 /* we are in memory shortage so we switch back to
2648 traditional skb allocation and drop packages */
2649 atomic_set(&card->force_alloc_skb, 3);
2650 count = newcount;
2651 } else {
2652 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2653 }
2654
2655 /*
2656 * according to old code it should be avoided to requeue all
2657 * 128 buffers in order to benefit from PCI avoidance.
2658 * this function keeps at least one buffer (the buffer at
2659 * 'index') un-requeued -> this buffer is the first buffer that
2660 * will be requeued the next time
2661 */
2662 if (card->options.performance_stats) {
2663 card->perf_stats.inbound_do_qdio_cnt++;
2664 card->perf_stats.inbound_do_qdio_start_time =
2665 qeth_get_micros();
2666 }
2667 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2668 queue->next_buf_to_init, count);
2669 if (card->options.performance_stats)
2670 card->perf_stats.inbound_do_qdio_time +=
2671 qeth_get_micros() -
2672 card->perf_stats.inbound_do_qdio_start_time;
2673 if (rc) {
2674 dev_warn(&card->gdev->dev,
2675 "QDIO reported an error, rc=%i\n", rc);
2676 QETH_CARD_TEXT(card, 2, "qinberr");
2677 }
2678 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2679 QDIO_MAX_BUFFERS_PER_Q;
2680 }
2681 }
2682 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2683
2684 static int qeth_handle_send_error(struct qeth_card *card,
2685 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2686 {
2687 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2688
2689 QETH_CARD_TEXT(card, 6, "hdsnderr");
2690 if (card->info.type == QETH_CARD_TYPE_IQD) {
2691 if (sbalf15 == 0) {
2692 qdio_err = 0;
2693 } else {
2694 qdio_err = 1;
2695 }
2696 }
2697 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2698
2699 if (!qdio_err)
2700 return QETH_SEND_ERROR_NONE;
2701
2702 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2703 return QETH_SEND_ERROR_RETRY;
2704
2705 QETH_CARD_TEXT(card, 1, "lnkfail");
2706 QETH_CARD_TEXT_(card, 1, "%04x %02x",
2707 (u16)qdio_err, (u8)sbalf15);
2708 return QETH_SEND_ERROR_LINK_FAILURE;
2709 }
2710
2711 /*
2712 * Switched to packing state if the number of used buffers on a queue
2713 * reaches a certain limit.
2714 */
2715 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2716 {
2717 if (!queue->do_pack) {
2718 if (atomic_read(&queue->used_buffers)
2719 >= QETH_HIGH_WATERMARK_PACK){
2720 /* switch non-PACKING -> PACKING */
2721 QETH_CARD_TEXT(queue->card, 6, "np->pack");
2722 if (queue->card->options.performance_stats)
2723 queue->card->perf_stats.sc_dp_p++;
2724 queue->do_pack = 1;
2725 }
2726 }
2727 }
2728
2729 /*
2730 * Switches from packing to non-packing mode. If there is a packing
2731 * buffer on the queue this buffer will be prepared to be flushed.
2732 * In that case 1 is returned to inform the caller. If no buffer
2733 * has to be flushed, zero is returned.
2734 */
2735 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2736 {
2737 struct qeth_qdio_out_buffer *buffer;
2738 int flush_count = 0;
2739
2740 if (queue->do_pack) {
2741 if (atomic_read(&queue->used_buffers)
2742 <= QETH_LOW_WATERMARK_PACK) {
2743 /* switch PACKING -> non-PACKING */
2744 QETH_CARD_TEXT(queue->card, 6, "pack->np");
2745 if (queue->card->options.performance_stats)
2746 queue->card->perf_stats.sc_p_dp++;
2747 queue->do_pack = 0;
2748 /* flush packing buffers */
2749 buffer = &queue->bufs[queue->next_buf_to_fill];
2750 if ((atomic_read(&buffer->state) ==
2751 QETH_QDIO_BUF_EMPTY) &&
2752 (buffer->next_element_to_fill > 0)) {
2753 atomic_set(&buffer->state,
2754 QETH_QDIO_BUF_PRIMED);
2755 flush_count++;
2756 queue->next_buf_to_fill =
2757 (queue->next_buf_to_fill + 1) %
2758 QDIO_MAX_BUFFERS_PER_Q;
2759 }
2760 }
2761 }
2762 return flush_count;
2763 }
2764
2765 /*
2766 * Called to flush a packing buffer if no more pci flags are on the queue.
2767 * Checks if there is a packing buffer and prepares it to be flushed.
2768 * In that case returns 1, otherwise zero.
2769 */
2770 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2771 {
2772 struct qeth_qdio_out_buffer *buffer;
2773
2774 buffer = &queue->bufs[queue->next_buf_to_fill];
2775 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2776 (buffer->next_element_to_fill > 0)) {
2777 /* it's a packing buffer */
2778 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2779 queue->next_buf_to_fill =
2780 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2781 return 1;
2782 }
2783 return 0;
2784 }
2785
2786 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2787 int count)
2788 {
2789 struct qeth_qdio_out_buffer *buf;
2790 int rc;
2791 int i;
2792 unsigned int qdio_flags;
2793
2794 for (i = index; i < index + count; ++i) {
2795 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2796 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2797 SBAL_FLAGS_LAST_ENTRY;
2798
2799 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2800 continue;
2801
2802 if (!queue->do_pack) {
2803 if ((atomic_read(&queue->used_buffers) >=
2804 (QETH_HIGH_WATERMARK_PACK -
2805 QETH_WATERMARK_PACK_FUZZ)) &&
2806 !atomic_read(&queue->set_pci_flags_count)) {
2807 /* it's likely that we'll go to packing
2808 * mode soon */
2809 atomic_inc(&queue->set_pci_flags_count);
2810 buf->buffer->element[0].flags |= 0x40;
2811 }
2812 } else {
2813 if (!atomic_read(&queue->set_pci_flags_count)) {
2814 /*
2815 * there's no outstanding PCI any more, so we
2816 * have to request a PCI to be sure the the PCI
2817 * will wake at some time in the future then we
2818 * can flush packed buffers that might still be
2819 * hanging around, which can happen if no
2820 * further send was requested by the stack
2821 */
2822 atomic_inc(&queue->set_pci_flags_count);
2823 buf->buffer->element[0].flags |= 0x40;
2824 }
2825 }
2826 }
2827
2828 queue->card->dev->trans_start = jiffies;
2829 if (queue->card->options.performance_stats) {
2830 queue->card->perf_stats.outbound_do_qdio_cnt++;
2831 queue->card->perf_stats.outbound_do_qdio_start_time =
2832 qeth_get_micros();
2833 }
2834 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2835 if (atomic_read(&queue->set_pci_flags_count))
2836 qdio_flags |= QDIO_FLAG_PCI_OUT;
2837 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2838 queue->queue_no, index, count);
2839 if (queue->card->options.performance_stats)
2840 queue->card->perf_stats.outbound_do_qdio_time +=
2841 qeth_get_micros() -
2842 queue->card->perf_stats.outbound_do_qdio_start_time;
2843 if (rc) {
2844 queue->card->stats.tx_errors += count;
2845 /* ignore temporary SIGA errors without busy condition */
2846 if (rc == QDIO_ERROR_SIGA_TARGET)
2847 return;
2848 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
2849 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
2850
2851 /* this must not happen under normal circumstances. if it
2852 * happens something is really wrong -> recover */
2853 qeth_schedule_recovery(queue->card);
2854 return;
2855 }
2856 atomic_add(count, &queue->used_buffers);
2857 if (queue->card->options.performance_stats)
2858 queue->card->perf_stats.bufs_sent += count;
2859 }
2860
2861 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2862 {
2863 int index;
2864 int flush_cnt = 0;
2865 int q_was_packing = 0;
2866
2867 /*
2868 * check if weed have to switch to non-packing mode or if
2869 * we have to get a pci flag out on the queue
2870 */
2871 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2872 !atomic_read(&queue->set_pci_flags_count)) {
2873 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2874 QETH_OUT_Q_UNLOCKED) {
2875 /*
2876 * If we get in here, there was no action in
2877 * do_send_packet. So, we check if there is a
2878 * packing buffer to be flushed here.
2879 */
2880 netif_stop_queue(queue->card->dev);
2881 index = queue->next_buf_to_fill;
2882 q_was_packing = queue->do_pack;
2883 /* queue->do_pack may change */
2884 barrier();
2885 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2886 if (!flush_cnt &&
2887 !atomic_read(&queue->set_pci_flags_count))
2888 flush_cnt +=
2889 qeth_flush_buffers_on_no_pci(queue);
2890 if (queue->card->options.performance_stats &&
2891 q_was_packing)
2892 queue->card->perf_stats.bufs_sent_pack +=
2893 flush_cnt;
2894 if (flush_cnt)
2895 qeth_flush_buffers(queue, index, flush_cnt);
2896 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2897 }
2898 }
2899 }
2900
2901 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
2902 unsigned long card_ptr)
2903 {
2904 struct qeth_card *card = (struct qeth_card *)card_ptr;
2905
2906 if (card->dev && (card->dev->flags & IFF_UP))
2907 napi_schedule(&card->napi);
2908 }
2909 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
2910
2911 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
2912 unsigned int queue, int first_element, int count,
2913 unsigned long card_ptr)
2914 {
2915 struct qeth_card *card = (struct qeth_card *)card_ptr;
2916
2917 if (qdio_err)
2918 qeth_schedule_recovery(card);
2919 }
2920 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
2921
2922 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2923 unsigned int qdio_error, int __queue, int first_element,
2924 int count, unsigned long card_ptr)
2925 {
2926 struct qeth_card *card = (struct qeth_card *) card_ptr;
2927 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2928 struct qeth_qdio_out_buffer *buffer;
2929 int i;
2930
2931 QETH_CARD_TEXT(card, 6, "qdouhdl");
2932 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2933 QETH_CARD_TEXT(card, 2, "achkcond");
2934 netif_stop_queue(card->dev);
2935 qeth_schedule_recovery(card);
2936 return;
2937 }
2938 if (card->options.performance_stats) {
2939 card->perf_stats.outbound_handler_cnt++;
2940 card->perf_stats.outbound_handler_start_time =
2941 qeth_get_micros();
2942 }
2943 for (i = first_element; i < (first_element + count); ++i) {
2944 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2945 qeth_handle_send_error(card, buffer, qdio_error);
2946 qeth_clear_output_buffer(queue, buffer);
2947 }
2948 atomic_sub(count, &queue->used_buffers);
2949 /* check if we need to do something on this outbound queue */
2950 if (card->info.type != QETH_CARD_TYPE_IQD)
2951 qeth_check_outbound_queue(queue);
2952
2953 netif_wake_queue(queue->card->dev);
2954 if (card->options.performance_stats)
2955 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2956 card->perf_stats.outbound_handler_start_time;
2957 }
2958 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2959
2960 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2961 int ipv, int cast_type)
2962 {
2963 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
2964 card->info.type == QETH_CARD_TYPE_OSX))
2965 return card->qdio.default_out_queue;
2966 switch (card->qdio.no_out_queues) {
2967 case 4:
2968 if (cast_type && card->info.is_multicast_different)
2969 return card->info.is_multicast_different &
2970 (card->qdio.no_out_queues - 1);
2971 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2972 const u8 tos = ip_hdr(skb)->tos;
2973
2974 if (card->qdio.do_prio_queueing ==
2975 QETH_PRIO_Q_ING_TOS) {
2976 if (tos & IP_TOS_NOTIMPORTANT)
2977 return 3;
2978 if (tos & IP_TOS_HIGHRELIABILITY)
2979 return 2;
2980 if (tos & IP_TOS_HIGHTHROUGHPUT)
2981 return 1;
2982 if (tos & IP_TOS_LOWDELAY)
2983 return 0;
2984 }
2985 if (card->qdio.do_prio_queueing ==
2986 QETH_PRIO_Q_ING_PREC)
2987 return 3 - (tos >> 6);
2988 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2989 /* TODO: IPv6!!! */
2990 }
2991 return card->qdio.default_out_queue;
2992 case 1: /* fallthrough for single-out-queue 1920-device */
2993 default:
2994 return card->qdio.default_out_queue;
2995 }
2996 }
2997 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2998
2999 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3000 struct sk_buff *skb, int elems)
3001 {
3002 int dlen = skb->len - skb->data_len;
3003 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3004 PFN_DOWN((unsigned long)skb->data);
3005
3006 elements_needed += skb_shinfo(skb)->nr_frags;
3007 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3008 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3009 "(Number=%d / Length=%d). Discarded.\n",
3010 (elements_needed+elems), skb->len);
3011 return 0;
3012 }
3013 return elements_needed;
3014 }
3015 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3016
3017 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3018 {
3019 int hroom, inpage, rest;
3020
3021 if (((unsigned long)skb->data & PAGE_MASK) !=
3022 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3023 hroom = skb_headroom(skb);
3024 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3025 rest = len - inpage;
3026 if (rest > hroom)
3027 return 1;
3028 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3029 skb->data -= rest;
3030 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3031 }
3032 return 0;
3033 }
3034 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3035
3036 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3037 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3038 int offset)
3039 {
3040 int length = skb->len - skb->data_len;
3041 int length_here;
3042 int element;
3043 char *data;
3044 int first_lap, cnt;
3045 struct skb_frag_struct *frag;
3046
3047 element = *next_element_to_fill;
3048 data = skb->data;
3049 first_lap = (is_tso == 0 ? 1 : 0);
3050
3051 if (offset >= 0) {
3052 data = skb->data + offset;
3053 length -= offset;
3054 first_lap = 0;
3055 }
3056
3057 while (length > 0) {
3058 /* length_here is the remaining amount of data in this page */
3059 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3060 if (length < length_here)
3061 length_here = length;
3062
3063 buffer->element[element].addr = data;
3064 buffer->element[element].length = length_here;
3065 length -= length_here;
3066 if (!length) {
3067 if (first_lap)
3068 if (skb_shinfo(skb)->nr_frags)
3069 buffer->element[element].flags =
3070 SBAL_FLAGS_FIRST_FRAG;
3071 else
3072 buffer->element[element].flags = 0;
3073 else
3074 buffer->element[element].flags =
3075 SBAL_FLAGS_MIDDLE_FRAG;
3076 } else {
3077 if (first_lap)
3078 buffer->element[element].flags =
3079 SBAL_FLAGS_FIRST_FRAG;
3080 else
3081 buffer->element[element].flags =
3082 SBAL_FLAGS_MIDDLE_FRAG;
3083 }
3084 data += length_here;
3085 element++;
3086 first_lap = 0;
3087 }
3088
3089 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3090 frag = &skb_shinfo(skb)->frags[cnt];
3091 buffer->element[element].addr = (char *)page_to_phys(frag->page)
3092 + frag->page_offset;
3093 buffer->element[element].length = frag->size;
3094 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG;
3095 element++;
3096 }
3097
3098 if (buffer->element[element - 1].flags)
3099 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG;
3100 *next_element_to_fill = element;
3101 }
3102
3103 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3104 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3105 struct qeth_hdr *hdr, int offset, int hd_len)
3106 {
3107 struct qdio_buffer *buffer;
3108 int flush_cnt = 0, hdr_len, large_send = 0;
3109
3110 buffer = buf->buffer;
3111 atomic_inc(&skb->users);
3112 skb_queue_tail(&buf->skb_list, skb);
3113
3114 /*check first on TSO ....*/
3115 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3116 int element = buf->next_element_to_fill;
3117
3118 hdr_len = sizeof(struct qeth_hdr_tso) +
3119 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3120 /*fill first buffer entry only with header information */
3121 buffer->element[element].addr = skb->data;
3122 buffer->element[element].length = hdr_len;
3123 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3124 buf->next_element_to_fill++;
3125 skb->data += hdr_len;
3126 skb->len -= hdr_len;
3127 large_send = 1;
3128 }
3129
3130 if (offset >= 0) {
3131 int element = buf->next_element_to_fill;
3132 buffer->element[element].addr = hdr;
3133 buffer->element[element].length = sizeof(struct qeth_hdr) +
3134 hd_len;
3135 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3136 buf->is_header[element] = 1;
3137 buf->next_element_to_fill++;
3138 }
3139
3140 __qeth_fill_buffer(skb, buffer, large_send,
3141 (int *)&buf->next_element_to_fill, offset);
3142
3143 if (!queue->do_pack) {
3144 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3145 /* set state to PRIMED -> will be flushed */
3146 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3147 flush_cnt = 1;
3148 } else {
3149 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3150 if (queue->card->options.performance_stats)
3151 queue->card->perf_stats.skbs_sent_pack++;
3152 if (buf->next_element_to_fill >=
3153 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3154 /*
3155 * packed buffer if full -> set state PRIMED
3156 * -> will be flushed
3157 */
3158 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3159 flush_cnt = 1;
3160 }
3161 }
3162 return flush_cnt;
3163 }
3164
3165 int qeth_do_send_packet_fast(struct qeth_card *card,
3166 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3167 struct qeth_hdr *hdr, int elements_needed,
3168 int offset, int hd_len)
3169 {
3170 struct qeth_qdio_out_buffer *buffer;
3171 int index;
3172
3173 /* spin until we get the queue ... */
3174 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3175 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3176 /* ... now we've got the queue */
3177 index = queue->next_buf_to_fill;
3178 buffer = &queue->bufs[queue->next_buf_to_fill];
3179 /*
3180 * check if buffer is empty to make sure that we do not 'overtake'
3181 * ourselves and try to fill a buffer that is already primed
3182 */
3183 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3184 goto out;
3185 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3186 QDIO_MAX_BUFFERS_PER_Q;
3187 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3188 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3189 qeth_flush_buffers(queue, index, 1);
3190 return 0;
3191 out:
3192 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3193 return -EBUSY;
3194 }
3195 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3196
3197 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3198 struct sk_buff *skb, struct qeth_hdr *hdr,
3199 int elements_needed)
3200 {
3201 struct qeth_qdio_out_buffer *buffer;
3202 int start_index;
3203 int flush_count = 0;
3204 int do_pack = 0;
3205 int tmp;
3206 int rc = 0;
3207
3208 /* spin until we get the queue ... */
3209 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3210 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3211 start_index = queue->next_buf_to_fill;
3212 buffer = &queue->bufs[queue->next_buf_to_fill];
3213 /*
3214 * check if buffer is empty to make sure that we do not 'overtake'
3215 * ourselves and try to fill a buffer that is already primed
3216 */
3217 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3218 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3219 return -EBUSY;
3220 }
3221 /* check if we need to switch packing state of this queue */
3222 qeth_switch_to_packing_if_needed(queue);
3223 if (queue->do_pack) {
3224 do_pack = 1;
3225 /* does packet fit in current buffer? */
3226 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3227 buffer->next_element_to_fill) < elements_needed) {
3228 /* ... no -> set state PRIMED */
3229 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3230 flush_count++;
3231 queue->next_buf_to_fill =
3232 (queue->next_buf_to_fill + 1) %
3233 QDIO_MAX_BUFFERS_PER_Q;
3234 buffer = &queue->bufs[queue->next_buf_to_fill];
3235 /* we did a step forward, so check buffer state
3236 * again */
3237 if (atomic_read(&buffer->state) !=
3238 QETH_QDIO_BUF_EMPTY) {
3239 qeth_flush_buffers(queue, start_index,
3240 flush_count);
3241 atomic_set(&queue->state,
3242 QETH_OUT_Q_UNLOCKED);
3243 return -EBUSY;
3244 }
3245 }
3246 }
3247 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3248 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3249 QDIO_MAX_BUFFERS_PER_Q;
3250 flush_count += tmp;
3251 if (flush_count)
3252 qeth_flush_buffers(queue, start_index, flush_count);
3253 else if (!atomic_read(&queue->set_pci_flags_count))
3254 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3255 /*
3256 * queue->state will go from LOCKED -> UNLOCKED or from
3257 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3258 * (switch packing state or flush buffer to get another pci flag out).
3259 * In that case we will enter this loop
3260 */
3261 while (atomic_dec_return(&queue->state)) {
3262 flush_count = 0;
3263 start_index = queue->next_buf_to_fill;
3264 /* check if we can go back to non-packing state */
3265 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3266 /*
3267 * check if we need to flush a packing buffer to get a pci
3268 * flag out on the queue
3269 */
3270 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3271 flush_count += qeth_flush_buffers_on_no_pci(queue);
3272 if (flush_count)
3273 qeth_flush_buffers(queue, start_index, flush_count);
3274 }
3275 /* at this point the queue is UNLOCKED again */
3276 if (queue->card->options.performance_stats && do_pack)
3277 queue->card->perf_stats.bufs_sent_pack += flush_count;
3278
3279 return rc;
3280 }
3281 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3282
3283 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3284 struct qeth_reply *reply, unsigned long data)
3285 {
3286 struct qeth_ipa_cmd *cmd;
3287 struct qeth_ipacmd_setadpparms *setparms;
3288
3289 QETH_CARD_TEXT(card, 4, "prmadpcb");
3290
3291 cmd = (struct qeth_ipa_cmd *) data;
3292 setparms = &(cmd->data.setadapterparms);
3293
3294 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3295 if (cmd->hdr.return_code) {
3296 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3297 setparms->data.mode = SET_PROMISC_MODE_OFF;
3298 }
3299 card->info.promisc_mode = setparms->data.mode;
3300 return 0;
3301 }
3302
3303 void qeth_setadp_promisc_mode(struct qeth_card *card)
3304 {
3305 enum qeth_ipa_promisc_modes mode;
3306 struct net_device *dev = card->dev;
3307 struct qeth_cmd_buffer *iob;
3308 struct qeth_ipa_cmd *cmd;
3309
3310 QETH_CARD_TEXT(card, 4, "setprom");
3311
3312 if (((dev->flags & IFF_PROMISC) &&
3313 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3314 (!(dev->flags & IFF_PROMISC) &&
3315 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3316 return;
3317 mode = SET_PROMISC_MODE_OFF;
3318 if (dev->flags & IFF_PROMISC)
3319 mode = SET_PROMISC_MODE_ON;
3320 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3321
3322 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3323 sizeof(struct qeth_ipacmd_setadpparms));
3324 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3325 cmd->data.setadapterparms.data.mode = mode;
3326 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3327 }
3328 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3329
3330 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3331 {
3332 struct qeth_card *card;
3333 char dbf_text[15];
3334
3335 card = dev->ml_priv;
3336
3337 QETH_CARD_TEXT(card, 4, "chgmtu");
3338 sprintf(dbf_text, "%8x", new_mtu);
3339 QETH_CARD_TEXT(card, 4, dbf_text);
3340
3341 if (new_mtu < 64)
3342 return -EINVAL;
3343 if (new_mtu > 65535)
3344 return -EINVAL;
3345 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3346 (!qeth_mtu_is_valid(card, new_mtu)))
3347 return -EINVAL;
3348 dev->mtu = new_mtu;
3349 return 0;
3350 }
3351 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3352
3353 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3354 {
3355 struct qeth_card *card;
3356
3357 card = dev->ml_priv;
3358
3359 QETH_CARD_TEXT(card, 5, "getstat");
3360
3361 return &card->stats;
3362 }
3363 EXPORT_SYMBOL_GPL(qeth_get_stats);
3364
3365 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3366 struct qeth_reply *reply, unsigned long data)
3367 {
3368 struct qeth_ipa_cmd *cmd;
3369
3370 QETH_CARD_TEXT(card, 4, "chgmaccb");
3371
3372 cmd = (struct qeth_ipa_cmd *) data;
3373 if (!card->options.layer2 ||
3374 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3375 memcpy(card->dev->dev_addr,
3376 &cmd->data.setadapterparms.data.change_addr.addr,
3377 OSA_ADDR_LEN);
3378 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3379 }
3380 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3381 return 0;
3382 }
3383
3384 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3385 {
3386 int rc;
3387 struct qeth_cmd_buffer *iob;
3388 struct qeth_ipa_cmd *cmd;
3389
3390 QETH_CARD_TEXT(card, 4, "chgmac");
3391
3392 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3393 sizeof(struct qeth_ipacmd_setadpparms));
3394 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3395 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3396 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3397 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3398 card->dev->dev_addr, OSA_ADDR_LEN);
3399 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3400 NULL);
3401 return rc;
3402 }
3403 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3404
3405 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3406 struct qeth_reply *reply, unsigned long data)
3407 {
3408 struct qeth_ipa_cmd *cmd;
3409 struct qeth_set_access_ctrl *access_ctrl_req;
3410
3411 QETH_CARD_TEXT(card, 4, "setaccb");
3412
3413 cmd = (struct qeth_ipa_cmd *) data;
3414 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3415 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3416 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3417 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3418 cmd->data.setadapterparms.hdr.return_code);
3419 switch (cmd->data.setadapterparms.hdr.return_code) {
3420 case SET_ACCESS_CTRL_RC_SUCCESS:
3421 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3422 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3423 {
3424 card->options.isolation = access_ctrl_req->subcmd_code;
3425 if (card->options.isolation == ISOLATION_MODE_NONE) {
3426 dev_info(&card->gdev->dev,
3427 "QDIO data connection isolation is deactivated\n");
3428 } else {
3429 dev_info(&card->gdev->dev,
3430 "QDIO data connection isolation is activated\n");
3431 }
3432 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3433 card->gdev->dev.kobj.name,
3434 access_ctrl_req->subcmd_code,
3435 cmd->data.setadapterparms.hdr.return_code);
3436 break;
3437 }
3438 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3439 {
3440 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3441 card->gdev->dev.kobj.name,
3442 access_ctrl_req->subcmd_code,
3443 cmd->data.setadapterparms.hdr.return_code);
3444 dev_err(&card->gdev->dev, "Adapter does not "
3445 "support QDIO data connection isolation\n");
3446
3447 /* ensure isolation mode is "none" */
3448 card->options.isolation = ISOLATION_MODE_NONE;
3449 break;
3450 }
3451 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3452 {
3453 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3454 card->gdev->dev.kobj.name,
3455 access_ctrl_req->subcmd_code,
3456 cmd->data.setadapterparms.hdr.return_code);
3457 dev_err(&card->gdev->dev,
3458 "Adapter is dedicated. "
3459 "QDIO data connection isolation not supported\n");
3460
3461 /* ensure isolation mode is "none" */
3462 card->options.isolation = ISOLATION_MODE_NONE;
3463 break;
3464 }
3465 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3466 {
3467 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3468 card->gdev->dev.kobj.name,
3469 access_ctrl_req->subcmd_code,
3470 cmd->data.setadapterparms.hdr.return_code);
3471 dev_err(&card->gdev->dev,
3472 "TSO does not permit QDIO data connection isolation\n");
3473
3474 /* ensure isolation mode is "none" */
3475 card->options.isolation = ISOLATION_MODE_NONE;
3476 break;
3477 }
3478 default:
3479 {
3480 /* this should never happen */
3481 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3482 "==UNKNOWN\n",
3483 card->gdev->dev.kobj.name,
3484 access_ctrl_req->subcmd_code,
3485 cmd->data.setadapterparms.hdr.return_code);
3486
3487 /* ensure isolation mode is "none" */
3488 card->options.isolation = ISOLATION_MODE_NONE;
3489 break;
3490 }
3491 }
3492 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3493 return 0;
3494 }
3495
3496 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3497 enum qeth_ipa_isolation_modes isolation)
3498 {
3499 int rc;
3500 struct qeth_cmd_buffer *iob;
3501 struct qeth_ipa_cmd *cmd;
3502 struct qeth_set_access_ctrl *access_ctrl_req;
3503
3504 QETH_CARD_TEXT(card, 4, "setacctl");
3505
3506 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3507 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3508
3509 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3510 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3511 sizeof(struct qeth_set_access_ctrl));
3512 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3513 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3514 access_ctrl_req->subcmd_code = isolation;
3515
3516 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3517 NULL);
3518 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3519 return rc;
3520 }
3521
3522 int qeth_set_access_ctrl_online(struct qeth_card *card)
3523 {
3524 int rc = 0;
3525
3526 QETH_CARD_TEXT(card, 4, "setactlo");
3527
3528 if ((card->info.type == QETH_CARD_TYPE_OSD ||
3529 card->info.type == QETH_CARD_TYPE_OSX) &&
3530 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3531 rc = qeth_setadpparms_set_access_ctrl(card,
3532 card->options.isolation);
3533 if (rc) {
3534 QETH_DBF_MESSAGE(3,
3535 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
3536 card->gdev->dev.kobj.name,
3537 rc);
3538 }
3539 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3540 card->options.isolation = ISOLATION_MODE_NONE;
3541
3542 dev_err(&card->gdev->dev, "Adapter does not "
3543 "support QDIO data connection isolation\n");
3544 rc = -EOPNOTSUPP;
3545 }
3546 return rc;
3547 }
3548 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3549
3550 void qeth_tx_timeout(struct net_device *dev)
3551 {
3552 struct qeth_card *card;
3553
3554 card = dev->ml_priv;
3555 QETH_CARD_TEXT(card, 4, "txtimeo");
3556 card->stats.tx_errors++;
3557 qeth_schedule_recovery(card);
3558 }
3559 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3560
3561 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3562 {
3563 struct qeth_card *card = dev->ml_priv;
3564 int rc = 0;
3565
3566 switch (regnum) {
3567 case MII_BMCR: /* Basic mode control register */
3568 rc = BMCR_FULLDPLX;
3569 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3570 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3571 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3572 rc |= BMCR_SPEED100;
3573 break;
3574 case MII_BMSR: /* Basic mode status register */
3575 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3576 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3577 BMSR_100BASE4;
3578 break;
3579 case MII_PHYSID1: /* PHYS ID 1 */
3580 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3581 dev->dev_addr[2];
3582 rc = (rc >> 5) & 0xFFFF;
3583 break;
3584 case MII_PHYSID2: /* PHYS ID 2 */
3585 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3586 break;
3587 case MII_ADVERTISE: /* Advertisement control reg */
3588 rc = ADVERTISE_ALL;
3589 break;
3590 case MII_LPA: /* Link partner ability reg */
3591 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3592 LPA_100BASE4 | LPA_LPACK;
3593 break;
3594 case MII_EXPANSION: /* Expansion register */
3595 break;
3596 case MII_DCOUNTER: /* disconnect counter */
3597 break;
3598 case MII_FCSCOUNTER: /* false carrier counter */
3599 break;
3600 case MII_NWAYTEST: /* N-way auto-neg test register */
3601 break;
3602 case MII_RERRCOUNTER: /* rx error counter */
3603 rc = card->stats.rx_errors;
3604 break;
3605 case MII_SREVISION: /* silicon revision */
3606 break;
3607 case MII_RESV1: /* reserved 1 */
3608 break;
3609 case MII_LBRERROR: /* loopback, rx, bypass error */
3610 break;
3611 case MII_PHYADDR: /* physical address */
3612 break;
3613 case MII_RESV2: /* reserved 2 */
3614 break;
3615 case MII_TPISTATUS: /* TPI status for 10mbps */
3616 break;
3617 case MII_NCONFIG: /* network interface config */
3618 break;
3619 default:
3620 break;
3621 }
3622 return rc;
3623 }
3624 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3625
3626 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3627 struct qeth_cmd_buffer *iob, int len,
3628 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3629 unsigned long),
3630 void *reply_param)
3631 {
3632 u16 s1, s2;
3633
3634 QETH_CARD_TEXT(card, 4, "sendsnmp");
3635
3636 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3637 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3638 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3639 /* adjust PDU length fields in IPA_PDU_HEADER */
3640 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3641 s2 = (u32) len;
3642 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3643 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3644 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3645 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3646 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3647 reply_cb, reply_param);
3648 }
3649
3650 static int qeth_snmp_command_cb(struct qeth_card *card,
3651 struct qeth_reply *reply, unsigned long sdata)
3652 {
3653 struct qeth_ipa_cmd *cmd;
3654 struct qeth_arp_query_info *qinfo;
3655 struct qeth_snmp_cmd *snmp;
3656 unsigned char *data;
3657 __u16 data_len;
3658
3659 QETH_CARD_TEXT(card, 3, "snpcmdcb");
3660
3661 cmd = (struct qeth_ipa_cmd *) sdata;
3662 data = (unsigned char *)((char *)cmd - reply->offset);
3663 qinfo = (struct qeth_arp_query_info *) reply->param;
3664 snmp = &cmd->data.setadapterparms.data.snmp;
3665
3666 if (cmd->hdr.return_code) {
3667 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
3668 return 0;
3669 }
3670 if (cmd->data.setadapterparms.hdr.return_code) {
3671 cmd->hdr.return_code =
3672 cmd->data.setadapterparms.hdr.return_code;
3673 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
3674 return 0;
3675 }
3676 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3677 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3678 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3679 else
3680 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3681
3682 /* check if there is enough room in userspace */
3683 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3684 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
3685 cmd->hdr.return_code = -ENOMEM;
3686 return 0;
3687 }
3688 QETH_CARD_TEXT_(card, 4, "snore%i",
3689 cmd->data.setadapterparms.hdr.used_total);
3690 QETH_CARD_TEXT_(card, 4, "sseqn%i",
3691 cmd->data.setadapterparms.hdr.seq_no);
3692 /*copy entries to user buffer*/
3693 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3694 memcpy(qinfo->udata + qinfo->udata_offset,
3695 (char *)snmp,
3696 data_len + offsetof(struct qeth_snmp_cmd, data));
3697 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3698 } else {
3699 memcpy(qinfo->udata + qinfo->udata_offset,
3700 (char *)&snmp->request, data_len);
3701 }
3702 qinfo->udata_offset += data_len;
3703 /* check if all replies received ... */
3704 QETH_CARD_TEXT_(card, 4, "srtot%i",
3705 cmd->data.setadapterparms.hdr.used_total);
3706 QETH_CARD_TEXT_(card, 4, "srseq%i",
3707 cmd->data.setadapterparms.hdr.seq_no);
3708 if (cmd->data.setadapterparms.hdr.seq_no <
3709 cmd->data.setadapterparms.hdr.used_total)
3710 return 1;
3711 return 0;
3712 }
3713
3714 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3715 {
3716 struct qeth_cmd_buffer *iob;
3717 struct qeth_ipa_cmd *cmd;
3718 struct qeth_snmp_ureq *ureq;
3719 int req_len;
3720 struct qeth_arp_query_info qinfo = {0, };
3721 int rc = 0;
3722
3723 QETH_CARD_TEXT(card, 3, "snmpcmd");
3724
3725 if (card->info.guestlan)
3726 return -EOPNOTSUPP;
3727
3728 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3729 (!card->options.layer2)) {
3730 return -EOPNOTSUPP;
3731 }
3732 /* skip 4 bytes (data_len struct member) to get req_len */
3733 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3734 return -EFAULT;
3735 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
3736 if (IS_ERR(ureq)) {
3737 QETH_CARD_TEXT(card, 2, "snmpnome");
3738 return PTR_ERR(ureq);
3739 }
3740 qinfo.udata_len = ureq->hdr.data_len;
3741 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3742 if (!qinfo.udata) {
3743 kfree(ureq);
3744 return -ENOMEM;
3745 }
3746 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3747
3748 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3749 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3750 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3751 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3752 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3753 qeth_snmp_command_cb, (void *)&qinfo);
3754 if (rc)
3755 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3756 QETH_CARD_IFNAME(card), rc);
3757 else {
3758 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3759 rc = -EFAULT;
3760 }
3761
3762 kfree(ureq);
3763 kfree(qinfo.udata);
3764 return rc;
3765 }
3766 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3767
3768 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3769 {
3770 switch (card->info.type) {
3771 case QETH_CARD_TYPE_IQD:
3772 return 2;
3773 default:
3774 return 0;
3775 }
3776 }
3777
3778 static int qeth_qdio_establish(struct qeth_card *card)
3779 {
3780 struct qdio_initialize init_data;
3781 char *qib_param_field;
3782 struct qdio_buffer **in_sbal_ptrs;
3783 struct qdio_buffer **out_sbal_ptrs;
3784 int i, j, k;
3785 int rc = 0;
3786
3787 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3788
3789 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3790 GFP_KERNEL);
3791 if (!qib_param_field)
3792 return -ENOMEM;
3793
3794 qeth_create_qib_param_field(card, qib_param_field);
3795 qeth_create_qib_param_field_blkt(card, qib_param_field);
3796
3797 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3798 GFP_KERNEL);
3799 if (!in_sbal_ptrs) {
3800 kfree(qib_param_field);
3801 return -ENOMEM;
3802 }
3803 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3804 in_sbal_ptrs[i] = (struct qdio_buffer *)
3805 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3806
3807 out_sbal_ptrs =
3808 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3809 sizeof(void *), GFP_KERNEL);
3810 if (!out_sbal_ptrs) {
3811 kfree(in_sbal_ptrs);
3812 kfree(qib_param_field);
3813 return -ENOMEM;
3814 }
3815 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3816 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3817 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3818 card->qdio.out_qs[i]->bufs[j].buffer);
3819 }
3820
3821 memset(&init_data, 0, sizeof(struct qdio_initialize));
3822 init_data.cdev = CARD_DDEV(card);
3823 init_data.q_format = qeth_get_qdio_q_format(card);
3824 init_data.qib_param_field_format = 0;
3825 init_data.qib_param_field = qib_param_field;
3826 init_data.no_input_qs = 1;
3827 init_data.no_output_qs = card->qdio.no_out_queues;
3828 init_data.input_handler = card->discipline.input_handler;
3829 init_data.output_handler = card->discipline.output_handler;
3830 init_data.queue_start_poll = card->discipline.start_poll;
3831 init_data.int_parm = (unsigned long) card;
3832 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3833 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3834
3835 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3836 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3837 rc = qdio_allocate(&init_data);
3838 if (rc) {
3839 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3840 goto out;
3841 }
3842 rc = qdio_establish(&init_data);
3843 if (rc) {
3844 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3845 qdio_free(CARD_DDEV(card));
3846 }
3847 }
3848 out:
3849 kfree(out_sbal_ptrs);
3850 kfree(in_sbal_ptrs);
3851 kfree(qib_param_field);
3852 return rc;
3853 }
3854
3855 static void qeth_core_free_card(struct qeth_card *card)
3856 {
3857
3858 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3859 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3860 qeth_clean_channel(&card->read);
3861 qeth_clean_channel(&card->write);
3862 if (card->dev)
3863 free_netdev(card->dev);
3864 kfree(card->ip_tbd_list);
3865 qeth_free_qdio_buffers(card);
3866 unregister_service_level(&card->qeth_service_level);
3867 kfree(card);
3868 }
3869
3870 static struct ccw_device_id qeth_ids[] = {
3871 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
3872 .driver_info = QETH_CARD_TYPE_OSD},
3873 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
3874 .driver_info = QETH_CARD_TYPE_IQD},
3875 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
3876 .driver_info = QETH_CARD_TYPE_OSN},
3877 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
3878 .driver_info = QETH_CARD_TYPE_OSM},
3879 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
3880 .driver_info = QETH_CARD_TYPE_OSX},
3881 {},
3882 };
3883 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3884
3885 static struct ccw_driver qeth_ccw_driver = {
3886 .name = "qeth",
3887 .ids = qeth_ids,
3888 .probe = ccwgroup_probe_ccwdev,
3889 .remove = ccwgroup_remove_ccwdev,
3890 };
3891
3892 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3893 unsigned long driver_id)
3894 {
3895 return ccwgroup_create_from_string(root_dev, driver_id,
3896 &qeth_ccw_driver, 3, buf);
3897 }
3898
3899 int qeth_core_hardsetup_card(struct qeth_card *card)
3900 {
3901 int retries = 0;
3902 int rc;
3903
3904 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3905 atomic_set(&card->force_alloc_skb, 0);
3906 retry:
3907 if (retries)
3908 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3909 dev_name(&card->gdev->dev));
3910 ccw_device_set_offline(CARD_DDEV(card));
3911 ccw_device_set_offline(CARD_WDEV(card));
3912 ccw_device_set_offline(CARD_RDEV(card));
3913 rc = ccw_device_set_online(CARD_RDEV(card));
3914 if (rc)
3915 goto retriable;
3916 rc = ccw_device_set_online(CARD_WDEV(card));
3917 if (rc)
3918 goto retriable;
3919 rc = ccw_device_set_online(CARD_DDEV(card));
3920 if (rc)
3921 goto retriable;
3922 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3923 retriable:
3924 if (rc == -ERESTARTSYS) {
3925 QETH_DBF_TEXT(SETUP, 2, "break1");
3926 return rc;
3927 } else if (rc) {
3928 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3929 if (++retries > 3)
3930 goto out;
3931 else
3932 goto retry;
3933 }
3934 qeth_init_tokens(card);
3935 qeth_init_func_level(card);
3936 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3937 if (rc == -ERESTARTSYS) {
3938 QETH_DBF_TEXT(SETUP, 2, "break2");
3939 return rc;
3940 } else if (rc) {
3941 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3942 if (--retries < 0)
3943 goto out;
3944 else
3945 goto retry;
3946 }
3947 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3948 if (rc == -ERESTARTSYS) {
3949 QETH_DBF_TEXT(SETUP, 2, "break3");
3950 return rc;
3951 } else if (rc) {
3952 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3953 if (--retries < 0)
3954 goto out;
3955 else
3956 goto retry;
3957 }
3958 card->read_or_write_problem = 0;
3959 rc = qeth_mpc_initialize(card);
3960 if (rc) {
3961 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3962 goto out;
3963 }
3964 return 0;
3965 out:
3966 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3967 "an error on the device\n");
3968 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3969 dev_name(&card->gdev->dev), rc);
3970 return rc;
3971 }
3972 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3973
3974 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3975 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3976 {
3977 struct page *page = virt_to_page(element->addr);
3978 if (*pskb == NULL) {
3979 /* the upper protocol layers assume that there is data in the
3980 * skb itself. Copy a small amount (64 bytes) to make them
3981 * happy. */
3982 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3983 if (!(*pskb))
3984 return -ENOMEM;
3985 skb_reserve(*pskb, ETH_HLEN);
3986 if (data_len <= 64) {
3987 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3988 data_len);
3989 } else {
3990 get_page(page);
3991 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3992 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3993 data_len - 64);
3994 (*pskb)->data_len += data_len - 64;
3995 (*pskb)->len += data_len - 64;
3996 (*pskb)->truesize += data_len - 64;
3997 (*pfrag)++;
3998 }
3999 } else {
4000 get_page(page);
4001 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4002 (*pskb)->data_len += data_len;
4003 (*pskb)->len += data_len;
4004 (*pskb)->truesize += data_len;
4005 (*pfrag)++;
4006 }
4007 return 0;
4008 }
4009
4010 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4011 struct qdio_buffer *buffer,
4012 struct qdio_buffer_element **__element, int *__offset,
4013 struct qeth_hdr **hdr)
4014 {
4015 struct qdio_buffer_element *element = *__element;
4016 int offset = *__offset;
4017 struct sk_buff *skb = NULL;
4018 int skb_len = 0;
4019 void *data_ptr;
4020 int data_len;
4021 int headroom = 0;
4022 int use_rx_sg = 0;
4023 int frag = 0;
4024
4025 /* qeth_hdr must not cross element boundaries */
4026 if (element->length < offset + sizeof(struct qeth_hdr)) {
4027 if (qeth_is_last_sbale(element))
4028 return NULL;
4029 element++;
4030 offset = 0;
4031 if (element->length < sizeof(struct qeth_hdr))
4032 return NULL;
4033 }
4034 *hdr = element->addr + offset;
4035
4036 offset += sizeof(struct qeth_hdr);
4037 switch ((*hdr)->hdr.l2.id) {
4038 case QETH_HEADER_TYPE_LAYER2:
4039 skb_len = (*hdr)->hdr.l2.pkt_length;
4040 break;
4041 case QETH_HEADER_TYPE_LAYER3:
4042 skb_len = (*hdr)->hdr.l3.length;
4043 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4044 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4045 headroom = TR_HLEN;
4046 else
4047 headroom = ETH_HLEN;
4048 break;
4049 case QETH_HEADER_TYPE_OSN:
4050 skb_len = (*hdr)->hdr.osn.pdu_length;
4051 headroom = sizeof(struct qeth_hdr);
4052 break;
4053 default:
4054 break;
4055 }
4056
4057 if (!skb_len)
4058 return NULL;
4059
4060 if ((skb_len >= card->options.rx_sg_cb) &&
4061 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4062 (!atomic_read(&card->force_alloc_skb))) {
4063 use_rx_sg = 1;
4064 } else {
4065 skb = dev_alloc_skb(skb_len + headroom);
4066 if (!skb)
4067 goto no_mem;
4068 if (headroom)
4069 skb_reserve(skb, headroom);
4070 }
4071
4072 data_ptr = element->addr + offset;
4073 while (skb_len) {
4074 data_len = min(skb_len, (int)(element->length - offset));
4075 if (data_len) {
4076 if (use_rx_sg) {
4077 if (qeth_create_skb_frag(element, &skb, offset,
4078 &frag, data_len))
4079 goto no_mem;
4080 } else {
4081 memcpy(skb_put(skb, data_len), data_ptr,
4082 data_len);
4083 }
4084 }
4085 skb_len -= data_len;
4086 if (skb_len) {
4087 if (qeth_is_last_sbale(element)) {
4088 QETH_CARD_TEXT(card, 4, "unexeob");
4089 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4090 dev_kfree_skb_any(skb);
4091 card->stats.rx_errors++;
4092 return NULL;
4093 }
4094 element++;
4095 offset = 0;
4096 data_ptr = element->addr;
4097 } else {
4098 offset += data_len;
4099 }
4100 }
4101 *__element = element;
4102 *__offset = offset;
4103 if (use_rx_sg && card->options.performance_stats) {
4104 card->perf_stats.sg_skbs_rx++;
4105 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4106 }
4107 return skb;
4108 no_mem:
4109 if (net_ratelimit()) {
4110 QETH_CARD_TEXT(card, 2, "noskbmem");
4111 }
4112 card->stats.rx_dropped++;
4113 return NULL;
4114 }
4115 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4116
4117 static void qeth_unregister_dbf_views(void)
4118 {
4119 int x;
4120 for (x = 0; x < QETH_DBF_INFOS; x++) {
4121 debug_unregister(qeth_dbf[x].id);
4122 qeth_dbf[x].id = NULL;
4123 }
4124 }
4125
4126 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4127 {
4128 char dbf_txt_buf[32];
4129 va_list args;
4130
4131 if (level > id->level)
4132 return;
4133 va_start(args, fmt);
4134 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4135 va_end(args);
4136 debug_text_event(id, level, dbf_txt_buf);
4137 }
4138 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4139
4140 static int qeth_register_dbf_views(void)
4141 {
4142 int ret;
4143 int x;
4144
4145 for (x = 0; x < QETH_DBF_INFOS; x++) {
4146 /* register the areas */
4147 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4148 qeth_dbf[x].pages,
4149 qeth_dbf[x].areas,
4150 qeth_dbf[x].len);
4151 if (qeth_dbf[x].id == NULL) {
4152 qeth_unregister_dbf_views();
4153 return -ENOMEM;
4154 }
4155
4156 /* register a view */
4157 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4158 if (ret) {
4159 qeth_unregister_dbf_views();
4160 return ret;
4161 }
4162
4163 /* set a passing level */
4164 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4165 }
4166
4167 return 0;
4168 }
4169
4170 int qeth_core_load_discipline(struct qeth_card *card,
4171 enum qeth_discipline_id discipline)
4172 {
4173 int rc = 0;
4174 switch (discipline) {
4175 case QETH_DISCIPLINE_LAYER3:
4176 card->discipline.ccwgdriver = try_then_request_module(
4177 symbol_get(qeth_l3_ccwgroup_driver),
4178 "qeth_l3");
4179 break;
4180 case QETH_DISCIPLINE_LAYER2:
4181 card->discipline.ccwgdriver = try_then_request_module(
4182 symbol_get(qeth_l2_ccwgroup_driver),
4183 "qeth_l2");
4184 break;
4185 }
4186 if (!card->discipline.ccwgdriver) {
4187 dev_err(&card->gdev->dev, "There is no kernel module to "
4188 "support discipline %d\n", discipline);
4189 rc = -EINVAL;
4190 }
4191 return rc;
4192 }
4193
4194 void qeth_core_free_discipline(struct qeth_card *card)
4195 {
4196 if (card->options.layer2)
4197 symbol_put(qeth_l2_ccwgroup_driver);
4198 else
4199 symbol_put(qeth_l3_ccwgroup_driver);
4200 card->discipline.ccwgdriver = NULL;
4201 }
4202
4203 static void qeth_determine_capabilities(struct qeth_card *card)
4204 {
4205 int rc;
4206 int length;
4207 char *prcd;
4208
4209 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4210 rc = ccw_device_set_online(CARD_DDEV(card));
4211 if (rc) {
4212 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4213 goto out;
4214 }
4215
4216
4217 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4218 if (rc) {
4219 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4220 dev_name(&card->gdev->dev), rc);
4221 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4222 goto out_offline;
4223 }
4224 qeth_configure_unitaddr(card, prcd);
4225 qeth_configure_blkt_default(card, prcd);
4226 kfree(prcd);
4227
4228 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4229 if (rc)
4230 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4231
4232 out_offline:
4233 ccw_device_set_offline(CARD_DDEV(card));
4234 out:
4235 return;
4236 }
4237
4238 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4239 {
4240 struct qeth_card *card;
4241 struct device *dev;
4242 int rc;
4243 unsigned long flags;
4244 char dbf_name[20];
4245
4246 QETH_DBF_TEXT(SETUP, 2, "probedev");
4247
4248 dev = &gdev->dev;
4249 if (!get_device(dev))
4250 return -ENODEV;
4251
4252 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4253
4254 card = qeth_alloc_card();
4255 if (!card) {
4256 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4257 rc = -ENOMEM;
4258 goto err_dev;
4259 }
4260
4261 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4262 dev_name(&gdev->dev));
4263 card->debug = debug_register(dbf_name, 2, 1, 8);
4264 if (!card->debug) {
4265 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4266 rc = -ENOMEM;
4267 goto err_card;
4268 }
4269 debug_register_view(card->debug, &debug_hex_ascii_view);
4270
4271 card->read.ccwdev = gdev->cdev[0];
4272 card->write.ccwdev = gdev->cdev[1];
4273 card->data.ccwdev = gdev->cdev[2];
4274 dev_set_drvdata(&gdev->dev, card);
4275 card->gdev = gdev;
4276 gdev->cdev[0]->handler = qeth_irq;
4277 gdev->cdev[1]->handler = qeth_irq;
4278 gdev->cdev[2]->handler = qeth_irq;
4279
4280 rc = qeth_determine_card_type(card);
4281 if (rc) {
4282 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4283 goto err_dbf;
4284 }
4285 rc = qeth_setup_card(card);
4286 if (rc) {
4287 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4288 goto err_dbf;
4289 }
4290
4291 if (card->info.type == QETH_CARD_TYPE_OSN)
4292 rc = qeth_core_create_osn_attributes(dev);
4293 else
4294 rc = qeth_core_create_device_attributes(dev);
4295 if (rc)
4296 goto err_dbf;
4297 switch (card->info.type) {
4298 case QETH_CARD_TYPE_OSN:
4299 case QETH_CARD_TYPE_OSM:
4300 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4301 if (rc)
4302 goto err_attr;
4303 rc = card->discipline.ccwgdriver->probe(card->gdev);
4304 if (rc)
4305 goto err_disc;
4306 case QETH_CARD_TYPE_OSD:
4307 case QETH_CARD_TYPE_OSX:
4308 default:
4309 break;
4310 }
4311
4312 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4313 list_add_tail(&card->list, &qeth_core_card_list.list);
4314 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4315
4316 qeth_determine_capabilities(card);
4317 return 0;
4318
4319 err_disc:
4320 qeth_core_free_discipline(card);
4321 err_attr:
4322 if (card->info.type == QETH_CARD_TYPE_OSN)
4323 qeth_core_remove_osn_attributes(dev);
4324 else
4325 qeth_core_remove_device_attributes(dev);
4326 err_dbf:
4327 debug_unregister(card->debug);
4328 err_card:
4329 qeth_core_free_card(card);
4330 err_dev:
4331 put_device(dev);
4332 return rc;
4333 }
4334
4335 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4336 {
4337 unsigned long flags;
4338 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4339
4340 QETH_DBF_TEXT(SETUP, 2, "removedv");
4341
4342 if (card->info.type == QETH_CARD_TYPE_OSN) {
4343 qeth_core_remove_osn_attributes(&gdev->dev);
4344 } else {
4345 qeth_core_remove_device_attributes(&gdev->dev);
4346 }
4347
4348 if (card->discipline.ccwgdriver) {
4349 card->discipline.ccwgdriver->remove(gdev);
4350 qeth_core_free_discipline(card);
4351 }
4352
4353 debug_unregister(card->debug);
4354 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4355 list_del(&card->list);
4356 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4357 qeth_core_free_card(card);
4358 dev_set_drvdata(&gdev->dev, NULL);
4359 put_device(&gdev->dev);
4360 return;
4361 }
4362
4363 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4364 {
4365 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4366 int rc = 0;
4367 int def_discipline;
4368
4369 if (!card->discipline.ccwgdriver) {
4370 if (card->info.type == QETH_CARD_TYPE_IQD)
4371 def_discipline = QETH_DISCIPLINE_LAYER3;
4372 else
4373 def_discipline = QETH_DISCIPLINE_LAYER2;
4374 rc = qeth_core_load_discipline(card, def_discipline);
4375 if (rc)
4376 goto err;
4377 rc = card->discipline.ccwgdriver->probe(card->gdev);
4378 if (rc)
4379 goto err;
4380 }
4381 rc = card->discipline.ccwgdriver->set_online(gdev);
4382 err:
4383 return rc;
4384 }
4385
4386 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4387 {
4388 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4389 return card->discipline.ccwgdriver->set_offline(gdev);
4390 }
4391
4392 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4393 {
4394 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4395 if (card->discipline.ccwgdriver &&
4396 card->discipline.ccwgdriver->shutdown)
4397 card->discipline.ccwgdriver->shutdown(gdev);
4398 }
4399
4400 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4401 {
4402 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4403 if (card->discipline.ccwgdriver &&
4404 card->discipline.ccwgdriver->prepare)
4405 return card->discipline.ccwgdriver->prepare(gdev);
4406 return 0;
4407 }
4408
4409 static void qeth_core_complete(struct ccwgroup_device *gdev)
4410 {
4411 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4412 if (card->discipline.ccwgdriver &&
4413 card->discipline.ccwgdriver->complete)
4414 card->discipline.ccwgdriver->complete(gdev);
4415 }
4416
4417 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4418 {
4419 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4420 if (card->discipline.ccwgdriver &&
4421 card->discipline.ccwgdriver->freeze)
4422 return card->discipline.ccwgdriver->freeze(gdev);
4423 return 0;
4424 }
4425
4426 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4427 {
4428 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4429 if (card->discipline.ccwgdriver &&
4430 card->discipline.ccwgdriver->thaw)
4431 return card->discipline.ccwgdriver->thaw(gdev);
4432 return 0;
4433 }
4434
4435 static int qeth_core_restore(struct ccwgroup_device *gdev)
4436 {
4437 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4438 if (card->discipline.ccwgdriver &&
4439 card->discipline.ccwgdriver->restore)
4440 return card->discipline.ccwgdriver->restore(gdev);
4441 return 0;
4442 }
4443
4444 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4445 .owner = THIS_MODULE,
4446 .name = "qeth",
4447 .driver_id = 0xD8C5E3C8,
4448 .probe = qeth_core_probe_device,
4449 .remove = qeth_core_remove_device,
4450 .set_online = qeth_core_set_online,
4451 .set_offline = qeth_core_set_offline,
4452 .shutdown = qeth_core_shutdown,
4453 .prepare = qeth_core_prepare,
4454 .complete = qeth_core_complete,
4455 .freeze = qeth_core_freeze,
4456 .thaw = qeth_core_thaw,
4457 .restore = qeth_core_restore,
4458 };
4459
4460 static ssize_t
4461 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4462 size_t count)
4463 {
4464 int err;
4465 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4466 qeth_core_ccwgroup_driver.driver_id);
4467 if (err)
4468 return err;
4469 else
4470 return count;
4471 }
4472
4473 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4474
4475 static struct {
4476 const char str[ETH_GSTRING_LEN];
4477 } qeth_ethtool_stats_keys[] = {
4478 /* 0 */{"rx skbs"},
4479 {"rx buffers"},
4480 {"tx skbs"},
4481 {"tx buffers"},
4482 {"tx skbs no packing"},
4483 {"tx buffers no packing"},
4484 {"tx skbs packing"},
4485 {"tx buffers packing"},
4486 {"tx sg skbs"},
4487 {"tx sg frags"},
4488 /* 10 */{"rx sg skbs"},
4489 {"rx sg frags"},
4490 {"rx sg page allocs"},
4491 {"tx large kbytes"},
4492 {"tx large count"},
4493 {"tx pk state ch n->p"},
4494 {"tx pk state ch p->n"},
4495 {"tx pk watermark low"},
4496 {"tx pk watermark high"},
4497 {"queue 0 buffer usage"},
4498 /* 20 */{"queue 1 buffer usage"},
4499 {"queue 2 buffer usage"},
4500 {"queue 3 buffer usage"},
4501 {"rx poll time"},
4502 {"rx poll count"},
4503 {"rx do_QDIO time"},
4504 {"rx do_QDIO count"},
4505 {"tx handler time"},
4506 {"tx handler count"},
4507 {"tx time"},
4508 /* 30 */{"tx count"},
4509 {"tx do_QDIO time"},
4510 {"tx do_QDIO count"},
4511 {"tx csum"},
4512 {"tx lin"},
4513 };
4514
4515 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4516 {
4517 switch (stringset) {
4518 case ETH_SS_STATS:
4519 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4520 default:
4521 return -EINVAL;
4522 }
4523 }
4524 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4525
4526 void qeth_core_get_ethtool_stats(struct net_device *dev,
4527 struct ethtool_stats *stats, u64 *data)
4528 {
4529 struct qeth_card *card = dev->ml_priv;
4530 data[0] = card->stats.rx_packets -
4531 card->perf_stats.initial_rx_packets;
4532 data[1] = card->perf_stats.bufs_rec;
4533 data[2] = card->stats.tx_packets -
4534 card->perf_stats.initial_tx_packets;
4535 data[3] = card->perf_stats.bufs_sent;
4536 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4537 - card->perf_stats.skbs_sent_pack;
4538 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4539 data[6] = card->perf_stats.skbs_sent_pack;
4540 data[7] = card->perf_stats.bufs_sent_pack;
4541 data[8] = card->perf_stats.sg_skbs_sent;
4542 data[9] = card->perf_stats.sg_frags_sent;
4543 data[10] = card->perf_stats.sg_skbs_rx;
4544 data[11] = card->perf_stats.sg_frags_rx;
4545 data[12] = card->perf_stats.sg_alloc_page_rx;
4546 data[13] = (card->perf_stats.large_send_bytes >> 10);
4547 data[14] = card->perf_stats.large_send_cnt;
4548 data[15] = card->perf_stats.sc_dp_p;
4549 data[16] = card->perf_stats.sc_p_dp;
4550 data[17] = QETH_LOW_WATERMARK_PACK;
4551 data[18] = QETH_HIGH_WATERMARK_PACK;
4552 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4553 data[20] = (card->qdio.no_out_queues > 1) ?
4554 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4555 data[21] = (card->qdio.no_out_queues > 2) ?
4556 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4557 data[22] = (card->qdio.no_out_queues > 3) ?
4558 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4559 data[23] = card->perf_stats.inbound_time;
4560 data[24] = card->perf_stats.inbound_cnt;
4561 data[25] = card->perf_stats.inbound_do_qdio_time;
4562 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4563 data[27] = card->perf_stats.outbound_handler_time;
4564 data[28] = card->perf_stats.outbound_handler_cnt;
4565 data[29] = card->perf_stats.outbound_time;
4566 data[30] = card->perf_stats.outbound_cnt;
4567 data[31] = card->perf_stats.outbound_do_qdio_time;
4568 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4569 data[33] = card->perf_stats.tx_csum;
4570 data[34] = card->perf_stats.tx_lin;
4571 }
4572 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4573
4574 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4575 {
4576 switch (stringset) {
4577 case ETH_SS_STATS:
4578 memcpy(data, &qeth_ethtool_stats_keys,
4579 sizeof(qeth_ethtool_stats_keys));
4580 break;
4581 default:
4582 WARN_ON(1);
4583 break;
4584 }
4585 }
4586 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4587
4588 void qeth_core_get_drvinfo(struct net_device *dev,
4589 struct ethtool_drvinfo *info)
4590 {
4591 struct qeth_card *card = dev->ml_priv;
4592 if (card->options.layer2)
4593 strcpy(info->driver, "qeth_l2");
4594 else
4595 strcpy(info->driver, "qeth_l3");
4596
4597 strcpy(info->version, "1.0");
4598 strcpy(info->fw_version, card->info.mcl_level);
4599 sprintf(info->bus_info, "%s/%s/%s",
4600 CARD_RDEV_ID(card),
4601 CARD_WDEV_ID(card),
4602 CARD_DDEV_ID(card));
4603 }
4604 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4605
4606 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4607 struct ethtool_cmd *ecmd)
4608 {
4609 struct qeth_card *card = netdev->ml_priv;
4610 enum qeth_link_types link_type;
4611
4612 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4613 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4614 else
4615 link_type = card->info.link_type;
4616
4617 ecmd->transceiver = XCVR_INTERNAL;
4618 ecmd->supported = SUPPORTED_Autoneg;
4619 ecmd->advertising = ADVERTISED_Autoneg;
4620 ecmd->duplex = DUPLEX_FULL;
4621 ecmd->autoneg = AUTONEG_ENABLE;
4622
4623 switch (link_type) {
4624 case QETH_LINK_TYPE_FAST_ETH:
4625 case QETH_LINK_TYPE_LANE_ETH100:
4626 ecmd->supported |= SUPPORTED_10baseT_Half |
4627 SUPPORTED_10baseT_Full |
4628 SUPPORTED_100baseT_Half |
4629 SUPPORTED_100baseT_Full |
4630 SUPPORTED_TP;
4631 ecmd->advertising |= ADVERTISED_10baseT_Half |
4632 ADVERTISED_10baseT_Full |
4633 ADVERTISED_100baseT_Half |
4634 ADVERTISED_100baseT_Full |
4635 ADVERTISED_TP;
4636 ecmd->speed = SPEED_100;
4637 ecmd->port = PORT_TP;
4638 break;
4639
4640 case QETH_LINK_TYPE_GBIT_ETH:
4641 case QETH_LINK_TYPE_LANE_ETH1000:
4642 ecmd->supported |= SUPPORTED_10baseT_Half |
4643 SUPPORTED_10baseT_Full |
4644 SUPPORTED_100baseT_Half |
4645 SUPPORTED_100baseT_Full |
4646 SUPPORTED_1000baseT_Half |
4647 SUPPORTED_1000baseT_Full |
4648 SUPPORTED_FIBRE;
4649 ecmd->advertising |= ADVERTISED_10baseT_Half |
4650 ADVERTISED_10baseT_Full |
4651 ADVERTISED_100baseT_Half |
4652 ADVERTISED_100baseT_Full |
4653 ADVERTISED_1000baseT_Half |
4654 ADVERTISED_1000baseT_Full |
4655 ADVERTISED_FIBRE;
4656 ecmd->speed = SPEED_1000;
4657 ecmd->port = PORT_FIBRE;
4658 break;
4659
4660 case QETH_LINK_TYPE_10GBIT_ETH:
4661 ecmd->supported |= SUPPORTED_10baseT_Half |
4662 SUPPORTED_10baseT_Full |
4663 SUPPORTED_100baseT_Half |
4664 SUPPORTED_100baseT_Full |
4665 SUPPORTED_1000baseT_Half |
4666 SUPPORTED_1000baseT_Full |
4667 SUPPORTED_10000baseT_Full |
4668 SUPPORTED_FIBRE;
4669 ecmd->advertising |= ADVERTISED_10baseT_Half |
4670 ADVERTISED_10baseT_Full |
4671 ADVERTISED_100baseT_Half |
4672 ADVERTISED_100baseT_Full |
4673 ADVERTISED_1000baseT_Half |
4674 ADVERTISED_1000baseT_Full |
4675 ADVERTISED_10000baseT_Full |
4676 ADVERTISED_FIBRE;
4677 ecmd->speed = SPEED_10000;
4678 ecmd->port = PORT_FIBRE;
4679 break;
4680
4681 default:
4682 ecmd->supported |= SUPPORTED_10baseT_Half |
4683 SUPPORTED_10baseT_Full |
4684 SUPPORTED_TP;
4685 ecmd->advertising |= ADVERTISED_10baseT_Half |
4686 ADVERTISED_10baseT_Full |
4687 ADVERTISED_TP;
4688 ecmd->speed = SPEED_10;
4689 ecmd->port = PORT_TP;
4690 }
4691
4692 return 0;
4693 }
4694 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4695
4696 static int __init qeth_core_init(void)
4697 {
4698 int rc;
4699
4700 pr_info("loading core functions\n");
4701 INIT_LIST_HEAD(&qeth_core_card_list.list);
4702 rwlock_init(&qeth_core_card_list.rwlock);
4703
4704 rc = qeth_register_dbf_views();
4705 if (rc)
4706 goto out_err;
4707 rc = ccw_driver_register(&qeth_ccw_driver);
4708 if (rc)
4709 goto ccw_err;
4710 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4711 if (rc)
4712 goto ccwgroup_err;
4713 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4714 &driver_attr_group);
4715 if (rc)
4716 goto driver_err;
4717 qeth_core_root_dev = root_device_register("qeth");
4718 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4719 if (rc)
4720 goto register_err;
4721
4722 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4723 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4724 if (!qeth_core_header_cache) {
4725 rc = -ENOMEM;
4726 goto slab_err;
4727 }
4728
4729 return 0;
4730 slab_err:
4731 root_device_unregister(qeth_core_root_dev);
4732 register_err:
4733 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4734 &driver_attr_group);
4735 driver_err:
4736 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4737 ccwgroup_err:
4738 ccw_driver_unregister(&qeth_ccw_driver);
4739 ccw_err:
4740 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4741 qeth_unregister_dbf_views();
4742 out_err:
4743 pr_err("Initializing the qeth device driver failed\n");
4744 return rc;
4745 }
4746
4747 static void __exit qeth_core_exit(void)
4748 {
4749 root_device_unregister(qeth_core_root_dev);
4750 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4751 &driver_attr_group);
4752 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4753 ccw_driver_unregister(&qeth_ccw_driver);
4754 kmem_cache_destroy(qeth_core_header_cache);
4755 qeth_unregister_dbf_views();
4756 pr_info("core functions removed\n");
4757 }
4758
4759 module_init(qeth_core_init);
4760 module_exit(qeth_core_exit);
4761 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4762 MODULE_DESCRIPTION("qeth core functions");
4763 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree