arch/arm/mach-tegra/board-trimslice.c

   1 /*
   2  * arch/arm/mach-tegra/board-trimslice.c
   3  *
   4  * Copyright (C) 2011 CompuLab, Ltd.
   5  * Author: Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * Based on board-harmony.c
   8  * Copyright (C) 2010 Google, Inc.
   9  *
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/serial_8250.h>
  25 #include <linux/io.h>
  26
  27 #include <asm/mach-types.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/setup.h>
  30
  31 #include <mach/iomap.h>
  32
  33 #include "board.h"
  34 #include "clock.h"
  35
  36 #include "board-trimslice.h"
  37
  38 static struct plat_serial8250_port debug_uart_platform_data[] = {
  39         {
  40                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
  41                 .mapbase        = TEGRA_UARTA_BASE,
  42                 .irq            = INT_UARTA,
  43                 .flags          = UPF_BOOT_AUTOCONF,
  44                 .iotype         = UPIO_MEM,
  45                 .regshift       = 2,
  46                 .uartclk        = 216000000,
  47         }, {
  48                 .flags          = 0
  49         }
  50 };
  51
  52 static struct platform_device debug_uart = {
  53         .name   = "serial8250",
  54         .id     = PLAT8250_DEV_PLATFORM,
  55         .dev    = {
  56                 .platform_data  = debug_uart_platform_data,
  57         },
  58 };
  59
  60 static struct platform_device *trimslice_devices[] __initdata = {
  61         &debug_uart,
  62 };
  63
  64 static void __init tegra_trimslice_fixup(struct machine_desc *desc,
  65         struct tag *tags, char **cmdline, struct meminfo *mi)
  66 {
  67         mi->nr_banks = 2;
  68         mi->bank[0].start = PHYS_OFFSET;
  69         mi->bank[0].size = 448 * SZ_1M;
  70         mi->bank[1].start = SZ_512M;
  71         mi->bank[1].size = SZ_512M;
  72 }
  73
  74 static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
  75         /* name         parent          rate            enabled */
  76         { "uarta",      "pll_p",        216000000,      true },
  77         { NULL,         NULL,           0,              0},
  78 };
  79
  80 static int __init tegra_trimslice_pci_init(void)
  81 {
  82         return tegra_pcie_init(true, true);
  83 }
  84 subsys_initcall(tegra_trimslice_pci_init);
  85
  86 static void __init tegra_trimslice_init(void)
  87 {
  88         tegra_clk_init_from_table(trimslice_clk_init_table);
  89
  90         trimslice_pinmux_init();
  91
  92         platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
  93 }
  94
  95 MACHINE_START(TRIMSLICE, "trimslice")
  96         .boot_params    = 0x00000100,
  97         .fixup          = tegra_trimslice_fixup,
  98         .map_io         = tegra_map_common_io,
  99         .init_early     = tegra_init_early,
 100         .init_irq       = tegra_init_irq,
 101         .timer          = &tegra_timer,
 102         .init_machine   = tegra_trimslice_init,
 103 MACHINE_END