drivers/mmc/host/sdhci-esdhc-imx.c

   1 /*
   2  * Freescale eSDHC i.MX controller driver for the platform bus.
   3  *
   4  * derived from the OF-version.
   5  *
   6  * Copyright (c) 2010 Pengutronix e.K.
   7  *   Author: Wolfram Sang <w.sang@pengutronix.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12  */
  13
  14 #include <linux/io.h>
  15 #include <linux/delay.h>
  16 #include <linux/err.h>
  17 #include <linux/clk.h>
  18 #include <linux/gpio.h>
  19 #include <linux/mmc/host.h>
  20 #include <linux/mmc/sdhci-pltfm.h>
  21 #include <mach/hardware.h>
  22 #include <mach/esdhc.h>
  23 #include "sdhci.h"
  24 #include "sdhci-pltfm.h"
  25 #include "sdhci-esdhc.h"
  26
  27 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
  28 {
  29         void __iomem *base = host->ioaddr + (reg & ~0x3);
  30         u32 shift = (reg & 0x3) * 8;
  31
  32         writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
  33 }
  34
  35 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
  36 {
  37         if (unlikely(reg == SDHCI_HOST_VERSION))
  38                 reg ^= 2;
  39
  40         return readw(host->ioaddr + reg);
  41 }
  42
  43 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
  44 {
  45         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  46
  47         switch (reg) {
  48         case SDHCI_TRANSFER_MODE:
  49                 /*
  50                  * Postpone this write, we must do it together with a
  51                  * command write that is down below.
  52                  */
  53                 pltfm_host->scratchpad = val;
  54                 return;
  55         case SDHCI_COMMAND:
  56                 writel(val << 16 | pltfm_host->scratchpad,
  57                         host->ioaddr + SDHCI_TRANSFER_MODE);
  58                 return;
  59         case SDHCI_BLOCK_SIZE:
  60                 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
  61                 break;
  62         }
  63         esdhc_clrset_le(host, 0xffff, val, reg);
  64 }
  65
  66 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
  67 {
  68         u32 new_val;
  69
  70         switch (reg) {
  71         case SDHCI_POWER_CONTROL:
  72                 /*
  73                  * FSL put some DMA bits here
  74                  * If your board has a regulator, code should be here
  75                  */
  76                 return;
  77         case SDHCI_HOST_CONTROL:
  78                 /* FSL messed up here, so we can just keep those two */
  79                 new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS);
  80                 /* ensure the endianess */
  81                 new_val |= ESDHC_HOST_CONTROL_LE;
  82                 /* DMA mode bits are shifted */
  83                 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
  84
  85                 esdhc_clrset_le(host, 0xffff, new_val, reg);
  86                 return;
  87         }
  88         esdhc_clrset_le(host, 0xff, val, reg);
  89 }
  90
  91 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
  92 {
  93         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  94
  95         return clk_get_rate(pltfm_host->clk);
  96 }
  97
  98 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
  99 {
 100         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 101
 102         return clk_get_rate(pltfm_host->clk) / 256 / 16;
 103 }
 104
 105 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
 106 {
 107         struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
 108
 109         if (boarddata && gpio_is_valid(boarddata->wp_gpio))
 110                 return gpio_get_value(boarddata->wp_gpio);
 111         else
 112                 return -ENOSYS;
 113 }
 114
 115 static struct sdhci_ops sdhci_esdhc_ops = {
 116         .read_w = esdhc_readw_le,
 117         .write_w = esdhc_writew_le,
 118         .write_b = esdhc_writeb_le,
 119         .set_clock = esdhc_set_clock,
 120         .get_max_clock = esdhc_pltfm_get_max_clock,
 121         .get_min_clock = esdhc_pltfm_get_min_clock,
 122 };
 123
 124 static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pdata)
 125 {
 126         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 127         struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
 128         struct clk *clk;
 129         int err;
 130
 131         clk = clk_get(mmc_dev(host->mmc), NULL);
 132         if (IS_ERR(clk)) {
 133                 dev_err(mmc_dev(host->mmc), "clk err\n");
 134                 return PTR_ERR(clk);
 135         }
 136         clk_enable(clk);
 137         pltfm_host->clk = clk;
 138
 139         if (cpu_is_mx35() || cpu_is_mx51())
 140                 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
 141
 142         if (cpu_is_mx25() || cpu_is_mx35()) {
 143                 /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
 144                 host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK;
 145                 /* write_protect can't be routed to controller, use gpio */
 146                 sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro;
 147         }
 148
 149         if (boarddata) {
 150                 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
 151                 if (err) {
 152                         dev_warn(mmc_dev(host->mmc),
 153                                 "no write-protect pin available!\n");
 154                         boarddata->wp_gpio = err;
 155                 }
 156         }
 157
 158         return 0;
 159 }
 160
 161 static void esdhc_pltfm_exit(struct sdhci_host *host)
 162 {
 163         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 164         struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
 165
 166         if (boarddata && gpio_is_valid(boarddata->wp_gpio))
 167                 gpio_free(boarddata->wp_gpio);
 168
 169         clk_disable(pltfm_host->clk);
 170         clk_put(pltfm_host->clk);
 171 }
 172
 173 struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
 174         .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_ADMA,
 175         /* ADMA has issues. Might be fixable */
 176         .ops = &sdhci_esdhc_ops,
 177         .init = esdhc_pltfm_init,
 178         .exit = esdhc_pltfm_exit,
 179 };