4 * Copyright (c) 2004 Evgeniy Polyakov <johnpol@2ka.mipt.ru>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/delay.h>
25 #include <linux/moduleparam.h>
26 #include <linux/module.h>
31 static int w1_delay_parm
= 1;
32 module_param_named(delay_coef
, w1_delay_parm
, int, 0);
34 static u8 w1_crc8_table
[] = {
35 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
36 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
37 35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
38 190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
39 70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
40 219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
41 101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
42 248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
43 140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205,
44 17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80,
45 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
46 50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
47 202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
48 87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
49 233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
50 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
53 static void w1_delay(unsigned long tm
)
55 udelay(tm
* w1_delay_parm
);
58 static void w1_write_bit(struct w1_master
*dev
, int bit
);
59 static u8
w1_read_bit(struct w1_master
*dev
);
62 * Generates a write-0 or write-1 cycle and samples the level.
64 static u8
w1_touch_bit(struct w1_master
*dev
, int bit
)
66 if (dev
->bus_master
->touch_bit
)
67 return dev
->bus_master
->touch_bit(dev
->bus_master
->data
, bit
);
69 return w1_read_bit(dev
);
77 * Generates a write-0 or write-1 cycle.
78 * Only call if dev->bus_master->touch_bit is NULL
80 static void w1_write_bit(struct w1_master
*dev
, int bit
)
83 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 0);
85 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 1);
88 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 0);
90 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 1);
96 * Pre-write operation, currently only supporting strong pullups.
97 * Program the hardware for a strong pullup, if one has been requested and
98 * the hardware supports it.
100 * @param dev the master device
102 static void w1_pre_write(struct w1_master
*dev
)
104 if (dev
->pullup_duration
&&
105 dev
->enable_pullup
&& dev
->bus_master
->set_pullup
) {
106 dev
->bus_master
->set_pullup(dev
->bus_master
->data
,
107 dev
->pullup_duration
);
112 * Post-write operation, currently only supporting strong pullups.
113 * If a strong pullup was requested, clear it if the hardware supports
114 * them, or execute the delay otherwise, in either case clear the request.
116 * @param dev the master device
118 static void w1_post_write(struct w1_master
*dev
)
120 if (dev
->pullup_duration
) {
121 if (dev
->enable_pullup
&& dev
->bus_master
->set_pullup
)
122 dev
->bus_master
->set_pullup(dev
->bus_master
->data
, 0);
124 msleep(dev
->pullup_duration
);
125 dev
->pullup_duration
= 0;
132 * @param dev the master device
133 * @param byte the byte to write
135 void w1_write_8(struct w1_master
*dev
, u8 byte
)
139 if (dev
->bus_master
->write_byte
) {
141 dev
->bus_master
->write_byte(dev
->bus_master
->data
, byte
);
144 for (i
= 0; i
< 8; ++i
) {
147 w1_touch_bit(dev
, (byte
>> i
) & 0x1);
151 EXPORT_SYMBOL_GPL(w1_write_8
);
155 * Generates a write-1 cycle and samples the level.
156 * Only call if dev->bus_master->touch_bit is NULL
158 static u8
w1_read_bit(struct w1_master
*dev
)
162 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 0);
164 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 1);
167 result
= dev
->bus_master
->read_bit(dev
->bus_master
->data
);
174 * Does a triplet - used for searching ROM addresses.
179 * If both bits 0 & 1 are set, the search should be restarted.
181 * @param dev the master device
182 * @param bdir the bit to write if both id_bit and comp_bit are 0
183 * @return bit fields - see above
185 u8
w1_triplet(struct w1_master
*dev
, int bdir
)
187 if ( dev
->bus_master
->triplet
)
188 return(dev
->bus_master
->triplet(dev
->bus_master
->data
, bdir
));
190 u8 id_bit
= w1_touch_bit(dev
, 1);
191 u8 comp_bit
= w1_touch_bit(dev
, 1);
194 if ( id_bit
&& comp_bit
)
195 return(0x03); /* error */
197 if ( !id_bit
&& !comp_bit
) {
198 /* Both bits are valid, take the direction given */
199 retval
= bdir
? 0x04 : 0;
201 /* Only one bit is valid, take that direction */
203 retval
= id_bit
? 0x05 : 0x02;
206 if ( dev
->bus_master
->touch_bit
)
207 w1_touch_bit(dev
, bdir
);
209 w1_write_bit(dev
, bdir
);
217 * @param dev the master device
218 * @return the byte read
220 static u8
w1_read_8(struct w1_master
* dev
)
225 if (dev
->bus_master
->read_byte
)
226 res
= dev
->bus_master
->read_byte(dev
->bus_master
->data
);
228 for (i
= 0; i
< 8; ++i
)
229 res
|= (w1_touch_bit(dev
,1) << i
);
235 * Writes a series of bytes.
237 * @param dev the master device
238 * @param buf pointer to the data to write
239 * @param len the number of bytes to write
240 * @return the byte read
242 void w1_write_block(struct w1_master
*dev
, const u8
*buf
, int len
)
246 if (dev
->bus_master
->write_block
) {
248 dev
->bus_master
->write_block(dev
->bus_master
->data
, buf
, len
);
251 for (i
= 0; i
< len
; ++i
)
252 w1_write_8(dev
, buf
[i
]); /* calls w1_pre_write */
255 EXPORT_SYMBOL_GPL(w1_write_block
);
258 * Reads a series of bytes.
260 * @param dev the master device
261 * @param buf pointer to the buffer to fill
262 * @param len the number of bytes to read
263 * @return the number of bytes read
265 u8
w1_read_block(struct w1_master
*dev
, u8
*buf
, int len
)
270 if (dev
->bus_master
->read_block
)
271 ret
= dev
->bus_master
->read_block(dev
->bus_master
->data
, buf
, len
);
273 for (i
= 0; i
< len
; ++i
)
274 buf
[i
] = w1_read_8(dev
);
280 EXPORT_SYMBOL_GPL(w1_read_block
);
283 * Issues a reset bus sequence.
285 * @param dev The bus master pointer
286 * @return 0=Device present, 1=No device present or error
288 int w1_reset_bus(struct w1_master
*dev
)
292 if (dev
->bus_master
->reset_bus
)
293 result
= dev
->bus_master
->reset_bus(dev
->bus_master
->data
) & 0x1;
295 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 0);
296 /* minimum 480, max ? us
297 * be nice and sleep, except 18b20 spec lists 960us maximum,
298 * so until we can sleep with microsecond accuracy, spin.
299 * Feel free to come up with some other way to give up the
300 * cpu for such a short amount of time AND get it back in
301 * the maximum amount of time.
304 dev
->bus_master
->write_bit(dev
->bus_master
->data
, 1);
307 result
= dev
->bus_master
->read_bit(dev
->bus_master
->data
) & 0x1;
308 /* minmum 70 (above) + 410 = 480 us
309 * There aren't any timing requirements between a reset and
310 * the following transactions. Sleeping is safe here.
312 /* w1_delay(410); min required time */
318 EXPORT_SYMBOL_GPL(w1_reset_bus
);
320 u8
w1_calc_crc8(u8
* data
, int len
)
325 crc
= w1_crc8_table
[crc
^ *data
++];
329 EXPORT_SYMBOL_GPL(w1_calc_crc8
);
331 void w1_search_devices(struct w1_master
*dev
, u8 search_type
, w1_slave_found_callback cb
)
334 if (dev
->bus_master
->search
)
335 dev
->bus_master
->search(dev
->bus_master
->data
, dev
,
338 w1_search(dev
, search_type
, cb
);
342 * Resets the bus and then selects the slave by sending either a skip rom
344 * The w1 master lock must be held.
346 * @param sl the slave to select
347 * @return 0=success, anything else=error
349 int w1_reset_select_slave(struct w1_slave
*sl
)
351 if (w1_reset_bus(sl
->master
))
354 if (sl
->master
->slave_count
== 1)
355 w1_write_8(sl
->master
, W1_SKIP_ROM
);
357 u8 match
[9] = {W1_MATCH_ROM
, };
358 memcpy(&match
[1], (u8
*)&sl
->reg_num
, 8);
359 w1_write_block(sl
->master
, match
, 9);
363 EXPORT_SYMBOL_GPL(w1_reset_select_slave
);
366 * Put out a strong pull-up of the specified duration after the next write
367 * operation. Not all hardware supports strong pullups. Hardware that
368 * doesn't support strong pullups will sleep for the given time after the
369 * write operation without a strong pullup. This is a one shot request for
370 * the next write, specifying zero will clear a previous request.
371 * The w1 master lock must be held.
373 * @param delay time in milliseconds
374 * @return 0=success, anything else=error
376 void w1_next_pullup(struct w1_master
*dev
, int delay
)
378 dev
->pullup_duration
= delay
;
380 EXPORT_SYMBOL_GPL(w1_next_pullup
);