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gma500: begin the config based split
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / rtl8187se / r8180_core.c
blob2155a771c3397ead5f5566807ffccfa632872a80
1 /*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25
26 Power management interface routines.
27 Written by Mariusz Matuszek.
28 */
29
30 #undef RX_DONT_PASS_UL
31 #undef DUMMY_RX
32
33 #include <linux/slab.h>
34 #include <linux/syscalls.h>
35 #include <linux/eeprom_93cx6.h>
36
37 #include "r8180_hw.h"
38 #include "r8180.h"
39 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
40 #include "r8180_93cx6.h" /* Card EEPROM */
41 #include "r8180_wx.h"
42 #include "r8180_dm.h"
43
44 #include "ieee80211/dot11d.h"
45
46 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
47 {
48 .vendor = PCI_VENDOR_ID_REALTEK,
49 .device = 0x8199,
50 .subvendor = PCI_ANY_ID,
51 .subdevice = PCI_ANY_ID,
52 .driver_data = 0,
53 },
54 {
55 .vendor = 0,
56 .device = 0,
57 .subvendor = 0,
58 .subdevice = 0,
59 .driver_data = 0,
60 }
61 };
62
63
64 static char ifname[IFNAMSIZ] = "wlan%d";
65 static int hwseqnum = 0;
66 static int hwwep = 0;
67 static int channels = 0x3fff;
68
69 MODULE_LICENSE("GPL");
70 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
71 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
72 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
73
74
75 module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
76 module_param(hwseqnum, int, S_IRUGO|S_IWUSR);
77 module_param(hwwep, int, S_IRUGO|S_IWUSR);
78 module_param(channels, int, S_IRUGO|S_IWUSR);
79
80 MODULE_PARM_DESC(devname, " Net interface name, wlan%d=default");
81 MODULE_PARM_DESC(hwseqnum, " Try to use hardware 802.11 header sequence numbers. Zero=default");
82 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
83 MODULE_PARM_DESC(channels, " Channel bitmask for specific locales. NYI");
84
85
86 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
87 const struct pci_device_id *id);
88
89 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
90
91 static void rtl8180_shutdown(struct pci_dev *pdev)
92 {
93 struct net_device *dev = pci_get_drvdata(pdev);
94 if (dev->netdev_ops->ndo_stop)
95 dev->netdev_ops->ndo_stop(dev);
96 pci_disable_device(pdev);
97 }
98
99 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
100 {
101 struct net_device *dev = pci_get_drvdata(pdev);
102
103 if (!netif_running(dev))
104 goto out_pci_suspend;
105
106 if (dev->netdev_ops->ndo_stop)
107 dev->netdev_ops->ndo_stop(dev);
108
109 netif_device_detach(dev);
110
111 out_pci_suspend:
112 pci_save_state(pdev);
113 pci_disable_device(pdev);
114 pci_set_power_state(pdev, pci_choose_state(pdev, state));
115 return 0;
116 }
117
118 static int rtl8180_resume(struct pci_dev *pdev)
119 {
120 struct net_device *dev = pci_get_drvdata(pdev);
121 int err;
122 u32 val;
123
124 pci_set_power_state(pdev, PCI_D0);
125
126 err = pci_enable_device(pdev);
127 if (err) {
128 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
129 dev->name);
130
131 return err;
132 }
133
134 pci_restore_state(pdev);
135
136 /*
137 * Suspend/Resume resets the PCI configuration space, so we have to
138 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
139 * from interfering with C3 CPU state. pci_restore_state won't help
140 * here since it only restores the first 64 bytes pci config header.
141 */
142 pci_read_config_dword(pdev, 0x40, &val);
143 if ((val & 0x0000ff00) != 0)
144 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
145
146 if (!netif_running(dev))
147 goto out;
148
149 if (dev->netdev_ops->ndo_open)
150 dev->netdev_ops->ndo_open(dev);
151
152 netif_device_attach(dev);
153 out:
154 return 0;
155 }
156
157 static struct pci_driver rtl8180_pci_driver = {
158 .name = RTL8180_MODULE_NAME,
159 .id_table = rtl8180_pci_id_tbl,
160 .probe = rtl8180_pci_probe,
161 .remove = __devexit_p(rtl8180_pci_remove),
162 .suspend = rtl8180_suspend,
163 .resume = rtl8180_resume,
164 .shutdown = rtl8180_shutdown,
165 };
166
167 u8 read_nic_byte(struct net_device *dev, int x)
168 {
169 return 0xff&readb((u8 *)dev->mem_start + x);
170 }
171
172 u32 read_nic_dword(struct net_device *dev, int x)
173 {
174 return readl((u8 *)dev->mem_start + x);
175 }
176
177 u16 read_nic_word(struct net_device *dev, int x)
178 {
179 return readw((u8 *)dev->mem_start + x);
180 }
181
182 void write_nic_byte(struct net_device *dev, int x, u8 y)
183 {
184 writeb(y, (u8 *)dev->mem_start + x);
185 udelay(20);
186 }
187
188 void write_nic_dword(struct net_device *dev, int x, u32 y)
189 {
190 writel(y, (u8 *)dev->mem_start + x);
191 udelay(20);
192 }
193
194 void write_nic_word(struct net_device *dev, int x, u16 y)
195 {
196 writew(y, (u8 *)dev->mem_start + x);
197 udelay(20);
198 }
199
200 inline void force_pci_posting(struct net_device *dev)
201 {
202 read_nic_byte(dev, EPROM_CMD);
203 mb();
204 }
205
206 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
207 void set_nic_rxring(struct net_device *dev);
208 void set_nic_txring(struct net_device *dev);
209 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
210 void rtl8180_commit(struct net_device *dev);
211 void rtl8180_start_tx_beacon(struct net_device *dev);
212
213 static struct proc_dir_entry *rtl8180_proc = NULL;
214
215 static int proc_get_registers(char *page, char **start,
216 off_t offset, int count,
217 int *eof, void *data)
218 {
219 struct net_device *dev = data;
220 int len = 0;
221 int i, n;
222 int max = 0xff;
223
224 /* This dump the current register page */
225 for (n = 0; n <= max;) {
226 len += snprintf(page + len, count - len, "\nD: %2x > ", n);
227
228 for (i = 0; i < 16 && n <= max; i++, n++)
229 len += snprintf(page + len, count - len, "%2x ",
230 read_nic_byte(dev, n));
231 }
232 len += snprintf(page + len, count - len, "\n");
233
234 *eof = 1;
235 return len;
236 }
237
238 int get_curr_tx_free_desc(struct net_device *dev, int priority);
239
240 static int proc_get_stats_hw(char *page, char **start,
241 off_t offset, int count,
242 int *eof, void *data)
243 {
244 int len = 0;
245
246 *eof = 1;
247 return len;
248 }
249
250 static int proc_get_stats_rx(char *page, char **start,
251 off_t offset, int count,
252 int *eof, void *data)
253 {
254 struct net_device *dev = data;
255 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
256
257 int len = 0;
258
259 len += snprintf(page + len, count - len,
260 "RX OK: %lu\n"
261 "RX Retry: %lu\n"
262 "RX CRC Error(0-500): %lu\n"
263 "RX CRC Error(500-1000): %lu\n"
264 "RX CRC Error(>1000): %lu\n"
265 "RX ICV Error: %lu\n",
266 priv->stats.rxint,
267 priv->stats.rxerr,
268 priv->stats.rxcrcerrmin,
269 priv->stats.rxcrcerrmid,
270 priv->stats.rxcrcerrmax,
271 priv->stats.rxicverr
272 );
273
274 *eof = 1;
275 return len;
276 }
277
278 static int proc_get_stats_tx(char *page, char **start,
279 off_t offset, int count,
280 int *eof, void *data)
281 {
282 struct net_device *dev = data;
283 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
284
285 int len = 0;
286 unsigned long totalOK;
287
288 totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
289 len += snprintf(page + len, count - len,
290 "TX OK: %lu\n"
291 "TX Error: %lu\n"
292 "TX Retry: %lu\n"
293 "TX beacon OK: %lu\n"
294 "TX beacon error: %lu\n",
295 totalOK,
296 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
297 priv->stats.txretry,
298 priv->stats.txbeacon,
299 priv->stats.txbeaconerr
300 );
301
302 *eof = 1;
303 return len;
304 }
305
306 void rtl8180_proc_module_init(void)
307 {
308 DMESG("Initializing proc filesystem");
309 rtl8180_proc = create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
310 }
311
312 void rtl8180_proc_module_remove(void)
313 {
314 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
315 }
316
317 void rtl8180_proc_remove_one(struct net_device *dev)
318 {
319 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
320 if (priv->dir_dev) {
321 remove_proc_entry("stats-hw", priv->dir_dev);
322 remove_proc_entry("stats-tx", priv->dir_dev);
323 remove_proc_entry("stats-rx", priv->dir_dev);
324 remove_proc_entry("registers", priv->dir_dev);
325 remove_proc_entry(dev->name, rtl8180_proc);
326 priv->dir_dev = NULL;
327 }
328 }
329
330 void rtl8180_proc_init_one(struct net_device *dev)
331 {
332 struct proc_dir_entry *e;
333 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
334
335 priv->dir_dev = rtl8180_proc;
336 if (!priv->dir_dev) {
337 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
338 dev->name);
339 return;
340 }
341
342 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
343 priv->dir_dev, proc_get_stats_hw, dev);
344 if (!e) {
345 DMESGE("Unable to initialize "
346 "/proc/net/r8180/%s/stats-hw\n",
347 dev->name);
348 }
349
350 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
351 priv->dir_dev, proc_get_stats_rx, dev);
352 if (!e) {
353 DMESGE("Unable to initialize "
354 "/proc/net/r8180/%s/stats-rx\n",
355 dev->name);
356 }
357
358
359 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
360 priv->dir_dev, proc_get_stats_tx, dev);
361 if (!e) {
362 DMESGE("Unable to initialize "
363 "/proc/net/r8180/%s/stats-tx\n",
364 dev->name);
365 }
366
367 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
368 priv->dir_dev, proc_get_registers, dev);
369 if (!e) {
370 DMESGE("Unable to initialize "
371 "/proc/net/r8180/%s/registers\n",
372 dev->name);
373 }
374 }
375
376 /*
377 FIXME: check if we can use some standard already-existent
378 data type+functions in kernel
379 */
380
381 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
382 struct buffer **bufferhead)
383 {
384 struct buffer *tmp;
385
386 if (!*buffer) {
387
388 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
389
390 if (*buffer == NULL) {
391 DMESGE("Failed to kmalloc head of TX/RX struct");
392 return -1;
393 }
394 (*buffer)->next = *buffer;
395 (*buffer)->buf = buf;
396 (*buffer)->dma = dma;
397 if (bufferhead != NULL)
398 (*bufferhead) = (*buffer);
399 return 0;
400 }
401 tmp = *buffer;
402
403 while (tmp->next != (*buffer))
404 tmp = tmp->next;
405 tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
406 if (tmp->next == NULL) {
407 DMESGE("Failed to kmalloc TX/RX struct");
408 return -1;
409 }
410 tmp->next->buf = buf;
411 tmp->next->dma = dma;
412 tmp->next->next = *buffer;
413
414 return 0;
415 }
416
417 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
418 {
419
420 struct buffer *tmp, *next;
421 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
422 struct pci_dev *pdev = priv->pdev;
423
424 if (!*buffer)
425 return;
426
427 tmp = *buffer;
428
429 do {
430 next = tmp->next;
431 if (consistent) {
432 pci_free_consistent(pdev, len,
433 tmp->buf, tmp->dma);
434 } else {
435 pci_unmap_single(pdev, tmp->dma,
436 len, PCI_DMA_FROMDEVICE);
437 kfree(tmp->buf);
438 }
439 kfree(tmp);
440 tmp = next;
441 }
442 while (next != *buffer);
443
444 *buffer = NULL;
445 }
446
447 void print_buffer(u32 *buffer, int len)
448 {
449 int i;
450 u8 *buf = (u8 *)buffer;
451
452 printk("ASCII BUFFER DUMP (len: %x):\n", len);
453
454 for (i = 0; i < len; i++)
455 printk("%c", buf[i]);
456
457 printk("\nBINARY BUFFER DUMP (len: %x):\n", len);
458
459 for (i = 0; i < len; i++)
460 printk("%02x", buf[i]);
461
462 printk("\n");
463 }
464
465 int get_curr_tx_free_desc(struct net_device *dev, int priority)
466 {
467 struct r8180_priv *priv = ieee80211_priv(dev);
468 u32 *tail;
469 u32 *head;
470 int ret;
471
472 switch (priority) {
473 case MANAGE_PRIORITY:
474 head = priv->txmapringhead;
475 tail = priv->txmapringtail;
476 break;
477 case BK_PRIORITY:
478 head = priv->txbkpringhead;
479 tail = priv->txbkpringtail;
480 break;
481 case BE_PRIORITY:
482 head = priv->txbepringhead;
483 tail = priv->txbepringtail;
484 break;
485 case VI_PRIORITY:
486 head = priv->txvipringhead;
487 tail = priv->txvipringtail;
488 break;
489 case VO_PRIORITY:
490 head = priv->txvopringhead;
491 tail = priv->txvopringtail;
492 break;
493 case HI_PRIORITY:
494 head = priv->txhpringhead;
495 tail = priv->txhpringtail;
496 break;
497 default:
498 return -1;
499 }
500
501 if (head <= tail)
502 ret = priv->txringcount - (tail - head)/8;
503 else
504 ret = (head - tail)/8;
505
506 if (ret > priv->txringcount)
507 DMESG("BUG");
508
509 return ret;
510 }
511
512 short check_nic_enought_desc(struct net_device *dev, int priority)
513 {
514 struct r8180_priv *priv = ieee80211_priv(dev);
515 struct ieee80211_device *ieee = netdev_priv(dev);
516 int requiredbyte, required;
517
518 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
519
520 if (ieee->current_network.QoS_Enable)
521 requiredbyte += 2;
522
523 required = requiredbyte / (priv->txbuffsize-4);
524
525 if (requiredbyte % priv->txbuffsize)
526 required++;
527
528 /* for now we keep two free descriptor as a safety boundary
529 * between the tail and the head
530 */
531
532 return (required+2 < get_curr_tx_free_desc(dev, priority));
533 }
534
535 void fix_tx_fifo(struct net_device *dev)
536 {
537 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
538 u32 *tmp;
539 int i;
540
541 for (tmp = priv->txmapring, i = 0;
542 i < priv->txringcount;
543 tmp += 8, i++) {
544 *tmp = *tmp & ~(1<<31);
545 }
546
547 for (tmp = priv->txbkpring, i = 0;
548 i < priv->txringcount;
549 tmp += 8, i++) {
550 *tmp = *tmp & ~(1<<31);
551 }
552
553 for (tmp = priv->txbepring, i = 0;
554 i < priv->txringcount;
555 tmp += 8, i++) {
556 *tmp = *tmp & ~(1<<31);
557 }
558 for (tmp = priv->txvipring, i = 0;
559 i < priv->txringcount;
560 tmp += 8, i++) {
561 *tmp = *tmp & ~(1<<31);
562 }
563
564 for (tmp = priv->txvopring, i = 0;
565 i < priv->txringcount;
566 tmp += 8, i++) {
567 *tmp = *tmp & ~(1<<31);
568 }
569
570 for (tmp = priv->txhpring, i = 0;
571 i < priv->txringcount;
572 tmp += 8, i++) {
573 *tmp = *tmp & ~(1<<31);
574 }
575
576 for (tmp = priv->txbeaconring, i = 0;
577 i < priv->txbeaconcount;
578 tmp += 8, i++) {
579 *tmp = *tmp & ~(1<<31);
580 }
581
582 priv->txmapringtail = priv->txmapring;
583 priv->txmapringhead = priv->txmapring;
584 priv->txmapbufstail = priv->txmapbufs;
585
586 priv->txbkpringtail = priv->txbkpring;
587 priv->txbkpringhead = priv->txbkpring;
588 priv->txbkpbufstail = priv->txbkpbufs;
589
590 priv->txbepringtail = priv->txbepring;
591 priv->txbepringhead = priv->txbepring;
592 priv->txbepbufstail = priv->txbepbufs;
593
594 priv->txvipringtail = priv->txvipring;
595 priv->txvipringhead = priv->txvipring;
596 priv->txvipbufstail = priv->txvipbufs;
597
598 priv->txvopringtail = priv->txvopring;
599 priv->txvopringhead = priv->txvopring;
600 priv->txvopbufstail = priv->txvopbufs;
601
602 priv->txhpringtail = priv->txhpring;
603 priv->txhpringhead = priv->txhpring;
604 priv->txhpbufstail = priv->txhpbufs;
605
606 priv->txbeaconringtail = priv->txbeaconring;
607 priv->txbeaconbufstail = priv->txbeaconbufs;
608 set_nic_txring(dev);
609
610 ieee80211_reset_queue(priv->ieee80211);
611 priv->ack_tx_to_ieee = 0;
612 }
613
614 void fix_rx_fifo(struct net_device *dev)
615 {
616 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
617 u32 *tmp;
618 struct buffer *rxbuf;
619 u8 rx_desc_size;
620
621 rx_desc_size = 8; /* 4*8 = 32 bytes */
622
623 for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
624 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
625 tmp += rx_desc_size, rxbuf = rxbuf->next) {
626 *(tmp+2) = rxbuf->dma;
627 *tmp = *tmp & ~0xfff;
628 *tmp = *tmp | priv->rxbuffersize;
629 *tmp |= (1<<31);
630 }
631
632 priv->rxringtail = priv->rxring;
633 priv->rxbuffer = priv->rxbufferhead;
634 priv->rx_skb_complete = 1;
635 set_nic_rxring(dev);
636 }
637
638 unsigned char QUALITY_MAP[] = {
639 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
640 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
641 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
642 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
643 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
644 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
645 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
646 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
647 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
648 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
649 };
650
651 unsigned char STRENGTH_MAP[] = {
652 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
653 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
654 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
655 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
656 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
657 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
658 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
659 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
660 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
661 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
662 };
663
664 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
665 {
666 u32 temp;
667 u32 temp2;
668 u32 q;
669 u32 orig_qual;
670 u8 _rssi;
671
672 q = *qual;
673 orig_qual = *qual;
674 _rssi = 0; /* avoid gcc complains.. */
675
676 if (q <= 0x4e) {
677 temp = QUALITY_MAP[q];
678 } else {
679 if (q & 0x80)
680 temp = 0x32;
681 else
682 temp = 1;
683 }
684
685 *qual = temp;
686 temp2 = *rssi;
687
688 if (_rssi < 0x64) {
689 if (_rssi == 0)
690 *rssi = 1;
691 } else {
692 *rssi = 0x64;
693 }
694
695 return;
696 }
697
698 void rtl8180_irq_enable(struct net_device *dev)
699 {
700 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
701
702 priv->irq_enabled = 1;
703 write_nic_word(dev, INTA_MASK, priv->irq_mask);
704 }
705
706 void rtl8180_irq_disable(struct net_device *dev)
707 {
708 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
709
710 write_nic_dword(dev, IMR, 0);
711 force_pci_posting(dev);
712 priv->irq_enabled = 0;
713 }
714
715 void rtl8180_set_mode(struct net_device *dev, int mode)
716 {
717 u8 ecmd;
718
719 ecmd = read_nic_byte(dev, EPROM_CMD);
720 ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
721 ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
722 ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
723 ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
724 write_nic_byte(dev, EPROM_CMD, ecmd);
725 }
726
727 void rtl8180_adapter_start(struct net_device *dev);
728 void rtl8180_beacon_tx_enable(struct net_device *dev);
729
730 void rtl8180_update_msr(struct net_device *dev)
731 {
732 struct r8180_priv *priv = ieee80211_priv(dev);
733 u8 msr;
734 u32 rxconf;
735
736 msr = read_nic_byte(dev, MSR);
737 msr &= ~MSR_LINK_MASK;
738
739 rxconf = read_nic_dword(dev, RX_CONF);
740
741 if (priv->ieee80211->state == IEEE80211_LINKED) {
742 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
743 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
744 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
745 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
746 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
747 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
748 else
749 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
750 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
751
752 } else {
753 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
754 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
755 }
756
757 write_nic_byte(dev, MSR, msr);
758 write_nic_dword(dev, RX_CONF, rxconf);
759 }
760
761 void rtl8180_set_chan(struct net_device *dev, short ch)
762 {
763 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
764
765 if ((ch > 14) || (ch < 1)) {
766 printk("In %s: Invalid chnanel %d\n", __func__, ch);
767 return;
768 }
769
770 priv->chan = ch;
771 priv->rf_set_chan(dev, priv->chan);
772 }
773
774 void rtl8180_rx_enable(struct net_device *dev)
775 {
776 u8 cmd;
777 u32 rxconf;
778 /* for now we accept data, management & ctl frame*/
779 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
780
781 rxconf = read_nic_dword(dev, RX_CONF);
782 rxconf = rxconf & ~MAC_FILTER_MASK;
783 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
784 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
785 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
786 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
787 if (dev->flags & IFF_PROMISC)
788 DMESG("NIC in promisc mode");
789
790 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
791 dev->flags & IFF_PROMISC) {
792 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
793 } else {
794 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
795 }
796
797 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
798 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
799 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
800 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
801 }
802
803 if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
804 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
805
806 rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
807 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
808
809 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
810 rxconf = rxconf & ~MAX_RX_DMA_MASK;
811 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
812
813 rxconf = rxconf | RCR_ONLYERLPKT;
814
815 rxconf = rxconf & ~RCR_CS_MASK;
816
817 write_nic_dword(dev, RX_CONF, rxconf);
818
819 fix_rx_fifo(dev);
820
821 cmd = read_nic_byte(dev, CMD);
822 write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
823 }
824
825 void set_nic_txring(struct net_device *dev)
826 {
827 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
828
829 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
830 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
831 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
832 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
833 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
834 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
835 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
836 }
837
838 void rtl8180_conttx_enable(struct net_device *dev)
839 {
840 u32 txconf;
841
842 txconf = read_nic_dword(dev, TX_CONF);
843 txconf = txconf & ~TX_LOOPBACK_MASK;
844 txconf = txconf | (TX_LOOPBACK_CONTINUE<<TX_LOOPBACK_SHIFT);
845 write_nic_dword(dev, TX_CONF, txconf);
846 }
847
848 void rtl8180_conttx_disable(struct net_device *dev)
849 {
850 u32 txconf;
851
852 txconf = read_nic_dword(dev, TX_CONF);
853 txconf = txconf & ~TX_LOOPBACK_MASK;
854 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
855 write_nic_dword(dev, TX_CONF, txconf);
856 }
857
858 void rtl8180_tx_enable(struct net_device *dev)
859 {
860 u8 cmd;
861 u8 tx_agc_ctl;
862 u8 byte;
863 u32 txconf;
864 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
865
866 txconf = read_nic_dword(dev, TX_CONF);
867
868 byte = read_nic_byte(dev, CW_CONF);
869 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
870 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
871 write_nic_byte(dev, CW_CONF, byte);
872
873 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
874 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
875 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
876 tx_agc_ctl |= (1<<TX_AGC_CTL_FEEDBACK_ANT);
877 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
878 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
879
880 txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
881
882 txconf = txconf & ~TX_LOOPBACK_MASK;
883 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
884 txconf = txconf & ~TCR_DPRETRY_MASK;
885 txconf = txconf & ~TCR_RTSRETRY_MASK;
886 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
887 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
888 txconf = txconf & ~(1<<TX_NOCRC_SHIFT);
889
890 if (priv->hw_plcp_len)
891 txconf = txconf & ~TCR_PLCP_LEN;
892 else
893 txconf = txconf | TCR_PLCP_LEN;
894
895 txconf = txconf & ~TCR_MXDMA_MASK;
896 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
897 txconf = txconf | TCR_CWMIN;
898 txconf = txconf | TCR_DISCW;
899
900 txconf = txconf | (1 << TX_NOICV_SHIFT);
901
902 write_nic_dword(dev, TX_CONF, txconf);
903
904 fix_tx_fifo(dev);
905
906 cmd = read_nic_byte(dev, CMD);
907 write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
908
909 write_nic_dword(dev, TX_CONF, txconf);
910 }
911
912 void rtl8180_beacon_tx_enable(struct net_device *dev)
913 {
914 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
915
916 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
917 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
918 write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
919 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
920 }
921
922 void rtl8180_beacon_tx_disable(struct net_device *dev)
923 {
924 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
925
926 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
927 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
928 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
929 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
930
931 }
932
933 void rtl8180_rtx_disable(struct net_device *dev)
934 {
935 u8 cmd;
936 struct r8180_priv *priv = ieee80211_priv(dev);
937
938 cmd = read_nic_byte(dev, CMD);
939 write_nic_byte(dev, CMD, cmd & ~\
940 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
941 force_pci_posting(dev);
942 mdelay(10);
943
944 if (!priv->rx_skb_complete)
945 dev_kfree_skb_any(priv->rx_skb);
946 }
947
948 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
949 int addr)
950 {
951 int i;
952 u32 *desc;
953 u32 *tmp;
954 dma_addr_t dma_desc, dma_tmp;
955 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
956 struct pci_dev *pdev = priv->pdev;
957 void *buf;
958
959 if ((bufsize & 0xfff) != bufsize) {
960 DMESGE("TX buffer allocation too large");
961 return 0;
962 }
963 desc = (u32 *)pci_alloc_consistent(pdev,
964 sizeof(u32)*8*count+256, &dma_desc);
965 if (desc == NULL)
966 return -1;
967
968 if (dma_desc & 0xff)
969 /*
970 * descriptor's buffer must be 256 byte aligned
971 * we shouldn't be here, since we set DMA mask !
972 */
973 WARN(1, "DMA buffer is not aligned\n");
974
975 tmp = desc;
976
977 for (i = 0; i < count; i++) {
978 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
979 if (buf == NULL)
980 return -ENOMEM;
981
982 switch (addr) {
983 case TX_MANAGEPRIORITY_RING_ADDR:
984 if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
985 DMESGE("Unable to allocate mem for buffer NP");
986 return -ENOMEM;
987 }
988 break;
989 case TX_BKPRIORITY_RING_ADDR:
990 if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
991 DMESGE("Unable to allocate mem for buffer LP");
992 return -ENOMEM;
993 }
994 break;
995 case TX_BEPRIORITY_RING_ADDR:
996 if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
997 DMESGE("Unable to allocate mem for buffer NP");
998 return -ENOMEM;
999 }
1000 break;
1001 case TX_VIPRIORITY_RING_ADDR:
1002 if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
1003 DMESGE("Unable to allocate mem for buffer LP");
1004 return -ENOMEM;
1005 }
1006 break;
1007 case TX_VOPRIORITY_RING_ADDR:
1008 if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
1009 DMESGE("Unable to allocate mem for buffer NP");
1010 return -ENOMEM;
1011 }
1012 break;
1013 case TX_HIGHPRIORITY_RING_ADDR:
1014 if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
1015 DMESGE("Unable to allocate mem for buffer HP");
1016 return -ENOMEM;
1017 }
1018 break;
1019 case TX_BEACON_RING_ADDR:
1020 if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
1021 DMESGE("Unable to allocate mem for buffer BP");
1022 return -ENOMEM;
1023 }
1024 break;
1025 }
1026 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
1027 *(tmp+2) = (u32)dma_tmp;
1028 *(tmp+3) = bufsize;
1029
1030 if (i+1 < count)
1031 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1032 else
1033 *(tmp+4) = (u32)dma_desc;
1034
1035 tmp = tmp+8;
1036 }
1037
1038 switch (addr) {
1039 case TX_MANAGEPRIORITY_RING_ADDR:
1040 priv->txmapringdma = dma_desc;
1041 priv->txmapring = desc;
1042 break;
1043 case TX_BKPRIORITY_RING_ADDR:
1044 priv->txbkpringdma = dma_desc;
1045 priv->txbkpring = desc;
1046 break;
1047 case TX_BEPRIORITY_RING_ADDR:
1048 priv->txbepringdma = dma_desc;
1049 priv->txbepring = desc;
1050 break;
1051 case TX_VIPRIORITY_RING_ADDR:
1052 priv->txvipringdma = dma_desc;
1053 priv->txvipring = desc;
1054 break;
1055 case TX_VOPRIORITY_RING_ADDR:
1056 priv->txvopringdma = dma_desc;
1057 priv->txvopring = desc;
1058 break;
1059 case TX_HIGHPRIORITY_RING_ADDR:
1060 priv->txhpringdma = dma_desc;
1061 priv->txhpring = desc;
1062 break;
1063 case TX_BEACON_RING_ADDR:
1064 priv->txbeaconringdma = dma_desc;
1065 priv->txbeaconring = desc;
1066 break;
1067
1068 }
1069
1070 return 0;
1071 }
1072
1073 void free_tx_desc_rings(struct net_device *dev)
1074 {
1075 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1076 struct pci_dev *pdev = priv->pdev;
1077 int count = priv->txringcount;
1078
1079 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1080 priv->txmapring, priv->txmapringdma);
1081 buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
1082
1083 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1084 priv->txbkpring, priv->txbkpringdma);
1085 buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
1086
1087 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1088 priv->txbepring, priv->txbepringdma);
1089 buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
1090
1091 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1092 priv->txvipring, priv->txvipringdma);
1093 buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
1094
1095 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1096 priv->txvopring, priv->txvopringdma);
1097 buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
1098
1099 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1100 priv->txhpring, priv->txhpringdma);
1101 buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
1102
1103 count = priv->txbeaconcount;
1104 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1105 priv->txbeaconring, priv->txbeaconringdma);
1106 buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
1107 }
1108
1109 void free_rx_desc_ring(struct net_device *dev)
1110 {
1111 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1112 struct pci_dev *pdev = priv->pdev;
1113 int count = priv->rxringcount;
1114
1115 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1116 priv->rxring, priv->rxringdma);
1117
1118 buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
1119 }
1120
1121 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1122 {
1123 int i;
1124 u32 *desc;
1125 u32 *tmp;
1126 dma_addr_t dma_desc, dma_tmp;
1127 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1128 struct pci_dev *pdev = priv->pdev;
1129 void *buf;
1130 u8 rx_desc_size;
1131
1132 rx_desc_size = 8; /* 4*8 = 32 bytes */
1133
1134 if ((bufsize & 0xfff) != bufsize) {
1135 DMESGE("RX buffer allocation too large");
1136 return -1;
1137 }
1138
1139 desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
1140 &dma_desc);
1141
1142 if (dma_desc & 0xff)
1143 /*
1144 * descriptor's buffer must be 256 byte aligned
1145 * should never happen since we specify the DMA mask
1146 */
1147 WARN(1, "DMA buffer is not aligned\n");
1148
1149 priv->rxring = desc;
1150 priv->rxringdma = dma_desc;
1151 tmp = desc;
1152
1153 for (i = 0; i < count; i++) {
1154 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
1155 if (buf == NULL) {
1156 DMESGE("Failed to kmalloc RX buffer");
1157 return -1;
1158 }
1159
1160 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
1161 PCI_DMA_FROMDEVICE);
1162
1163 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
1164 &(priv->rxbufferhead))) {
1165 DMESGE("Unable to allocate mem RX buf");
1166 return -1;
1167 }
1168 *tmp = 0; /* zero pads the header of the descriptor */
1169 *tmp = *tmp | (bufsize&0xfff);
1170 *(tmp+2) = (u32)dma_tmp;
1171 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
1172
1173 tmp = tmp+rx_desc_size;
1174 }
1175
1176 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
1177
1178 return 0;
1179 }
1180
1181
1182 void set_nic_rxring(struct net_device *dev)
1183 {
1184 u8 pgreg;
1185 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1186
1187 pgreg = read_nic_byte(dev, PGSELECT);
1188 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
1189
1190 write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
1191 }
1192
1193 void rtl8180_reset(struct net_device *dev)
1194 {
1195 u8 cr;
1196
1197 rtl8180_irq_disable(dev);
1198
1199 cr = read_nic_byte(dev, CMD);
1200 cr = cr & 2;
1201 cr = cr | (1<<CMD_RST_SHIFT);
1202 write_nic_byte(dev, CMD, cr);
1203
1204 force_pci_posting(dev);
1205
1206 mdelay(200);
1207
1208 if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
1209 DMESGW("Card reset timeout!");
1210 else
1211 DMESG("Card successfully reset");
1212
1213 rtl8180_set_mode(dev, EPROM_CMD_LOAD);
1214 force_pci_posting(dev);
1215 mdelay(200);
1216 }
1217
1218 inline u16 ieeerate2rtlrate(int rate)
1219 {
1220 switch (rate) {
1221 case 10:
1222 return 0;
1223 case 20:
1224 return 1;
1225 case 55:
1226 return 2;
1227 case 110:
1228 return 3;
1229 case 60:
1230 return 4;
1231 case 90:
1232 return 5;
1233 case 120:
1234 return 6;
1235 case 180:
1236 return 7;
1237 case 240:
1238 return 8;
1239 case 360:
1240 return 9;
1241 case 480:
1242 return 10;
1243 case 540:
1244 return 11;
1245 default:
1246 return 3;
1247 }
1248 }
1249
1250 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1251
1252 inline u16 rtl8180_rate2rate(short rate)
1253 {
1254 if (rate > 12)
1255 return 10;
1256 return rtl_rate[rate];
1257 }
1258
1259 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1260 {
1261 if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1262 return 1;
1263 else
1264 return 0;
1265 }
1266
1267 u16 N_DBPSOfRate(u16 DataRate);
1268
1269 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1270 u8 bShortPreamble)
1271 {
1272 u16 FrameTime;
1273 u16 N_DBPS;
1274 u16 Ceiling;
1275
1276 if (rtl8180_IsWirelessBMode(DataRate)) {
1277 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1278 /* long preamble */
1279 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1280 else
1281 /* short preamble */
1282 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1283
1284 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1285 FrameTime++;
1286 } else { /* 802.11g DSSS-OFDM PLCP length field calculation. */
1287 N_DBPS = N_DBPSOfRate(DataRate);
1288 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1289 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1290 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1291 }
1292 return FrameTime;
1293 }
1294
1295 u16 N_DBPSOfRate(u16 DataRate)
1296 {
1297 u16 N_DBPS = 24;
1298
1299 switch (DataRate) {
1300 case 60:
1301 N_DBPS = 24;
1302 break;
1303 case 90:
1304 N_DBPS = 36;
1305 break;
1306 case 120:
1307 N_DBPS = 48;
1308 break;
1309 case 180:
1310 N_DBPS = 72;
1311 break;
1312 case 240:
1313 N_DBPS = 96;
1314 break;
1315 case 360:
1316 N_DBPS = 144;
1317 break;
1318 case 480:
1319 N_DBPS = 192;
1320 break;
1321 case 540:
1322 N_DBPS = 216;
1323 break;
1324 default:
1325 break;
1326 }
1327
1328 return N_DBPS;
1329 }
1330
1331 /*
1332 * For Netgear case, they want good-looking singal strength.
1333 */
1334 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1335 {
1336 long RetSS;
1337
1338 /* Step 1. Scale mapping. */
1339 if (CurrSS >= 71 && CurrSS <= 100)
1340 RetSS = 90 + ((CurrSS - 70) / 3);
1341 else if (CurrSS >= 41 && CurrSS <= 70)
1342 RetSS = 78 + ((CurrSS - 40) / 3);
1343 else if (CurrSS >= 31 && CurrSS <= 40)
1344 RetSS = 66 + (CurrSS - 30);
1345 else if (CurrSS >= 21 && CurrSS <= 30)
1346 RetSS = 54 + (CurrSS - 20);
1347 else if (CurrSS >= 5 && CurrSS <= 20)
1348 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1349 else if (CurrSS == 4)
1350 RetSS = 36;
1351 else if (CurrSS == 3)
1352 RetSS = 27;
1353 else if (CurrSS == 2)
1354 RetSS = 18;
1355 else if (CurrSS == 1)
1356 RetSS = 9;
1357 else
1358 RetSS = CurrSS;
1359
1360 /* Step 2. Smoothing. */
1361 if (LastSS > 0)
1362 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1363
1364 return RetSS;
1365 }
1366
1367 /*
1368 * Translate 0-100 signal strength index into dBm.
1369 */
1370 long TranslateToDbm8185(u8 SignalStrengthIndex)
1371 {
1372 long SignalPower;
1373
1374 /* Translate to dBm (x=0.5y-95). */
1375 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1376 SignalPower -= 95;
1377
1378 return SignalPower;
1379 }
1380
1381 /*
1382 * Perform signal smoothing for dynamic mechanism.
1383 * This is different with PerformSignalSmoothing8185 in smoothing fomula.
1384 * No dramatic adjustion is apply because dynamic mechanism need some degree
1385 * of correctness. Ported from 8187B.
1386 */
1387 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1388 bool bCckRate)
1389 {
1390 /* Determin the current packet is CCK rate. */
1391 priv->bCurCCKPkt = bCckRate;
1392
1393 if (priv->UndecoratedSmoothedSS >= 0)
1394 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10)) / 6;
1395 else
1396 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1397
1398 priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower * 11)) / 60;
1399
1400 if (bCckRate)
1401 priv->CurCCKRSSI = priv->RSSI;
1402 else
1403 priv->CurCCKRSSI = 0;
1404 }
1405
1406
1407 /*
1408 * This is rough RX isr handling routine
1409 */
1410 void rtl8180_rx(struct net_device *dev)
1411 {
1412 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1413 struct sk_buff *tmp_skb;
1414 short first, last;
1415 u32 len;
1416 int lastlen;
1417 unsigned char quality, signal;
1418 u8 rate;
1419 u32 *tmp, *tmp2;
1420 u8 rx_desc_size;
1421 u8 padding;
1422 char rxpower = 0;
1423 u32 RXAGC = 0;
1424 long RxAGC_dBm = 0;
1425 u8 LNA = 0, BB = 0;
1426 u8 LNA_gain[4] = {02, 17, 29, 39};
1427 u8 Antenna = 0;
1428 struct ieee80211_hdr_4addr *hdr;
1429 u16 fc, type;
1430 u8 bHwError = 0, bCRC = 0, bICV = 0;
1431 bool bCckRate = false;
1432 u8 RSSI = 0;
1433 long SignalStrengthIndex = 0;
1434 struct ieee80211_rx_stats stats = {
1435 .signal = 0,
1436 .noise = -98,
1437 .rate = 0,
1438 .freq = IEEE80211_24GHZ_BAND,
1439 };
1440
1441 stats.nic_type = NIC_8185B;
1442 rx_desc_size = 8;
1443
1444 if ((*(priv->rxringtail)) & (1<<31)) {
1445 /* we have got an RX int, but the descriptor
1446 * we are pointing is empty */
1447
1448 priv->stats.rxnodata++;
1449 priv->ieee80211->stats.rx_errors++;
1450
1451 tmp2 = NULL;
1452 tmp = priv->rxringtail;
1453 do {
1454 if (tmp == priv->rxring)
1455 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1456 else
1457 tmp -= rx_desc_size;
1458
1459 if (!(*tmp & (1<<31)))
1460 tmp2 = tmp;
1461 } while (tmp != priv->rxring);
1462
1463 if (tmp2)
1464 priv->rxringtail = tmp2;
1465 }
1466
1467 /* while there are filled descriptors */
1468 while (!(*(priv->rxringtail) & (1<<31))) {
1469 if (*(priv->rxringtail) & (1<<26))
1470 DMESGW("RX buffer overflow");
1471 if (*(priv->rxringtail) & (1<<12))
1472 priv->stats.rxicverr++;
1473
1474 if (*(priv->rxringtail) & (1<<27)) {
1475 priv->stats.rxdmafail++;
1476 /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1477 goto drop;
1478 }
1479
1480 pci_dma_sync_single_for_cpu(priv->pdev,
1481 priv->rxbuffer->dma,
1482 priv->rxbuffersize * \
1483 sizeof(u8),
1484 PCI_DMA_FROMDEVICE);
1485
1486 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1487 if (first)
1488 priv->rx_prevlen = 0;
1489
1490 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1491 if (last) {
1492 lastlen = ((*priv->rxringtail) & 0xfff);
1493
1494 /* if the last descriptor (that should
1495 * tell us the total packet len) tell
1496 * us something less than the descriptors
1497 * len we had until now, then there is some
1498 * problem..
1499 * workaround to prevent kernel panic
1500 */
1501 if (lastlen < priv->rx_prevlen)
1502 len = 0;
1503 else
1504 len = lastlen-priv->rx_prevlen;
1505
1506 if (*(priv->rxringtail) & (1<<13)) {
1507 if ((*(priv->rxringtail) & 0xfff) < 500)
1508 priv->stats.rxcrcerrmin++;
1509 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1510 priv->stats.rxcrcerrmax++;
1511 else
1512 priv->stats.rxcrcerrmid++;
1513
1514 }
1515
1516 } else {
1517 len = priv->rxbuffersize;
1518 }
1519
1520 if (first && last) {
1521 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1522 } else if (first) {
1523 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1524 if (padding)
1525 len -= 2;
1526 } else {
1527 padding = 0;
1528 }
1529 padding = 0;
1530 priv->rx_prevlen += len;
1531
1532 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1533 /* HW is probably passing several buggy frames
1534 * without FD or LD flag set.
1535 * Throw this garbage away to prevent skb
1536 * memory exausting
1537 */
1538 if (!priv->rx_skb_complete)
1539 dev_kfree_skb_any(priv->rx_skb);
1540 priv->rx_skb_complete = 1;
1541 }
1542
1543 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1544 signal = (signal & 0xfe) >> 1;
1545
1546 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1547
1548 stats.mac_time[0] = *(priv->rxringtail+1);
1549 stats.mac_time[1] = *(priv->rxringtail+2);
1550 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1551 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1552
1553 rate = ((*(priv->rxringtail)) &
1554 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1555
1556 stats.rate = rtl8180_rate2rate(rate);
1557 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1558 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1559 RxAGC_dBm = rxpower+1; /* bias */
1560 } else { /* CCK rate. */
1561 RxAGC_dBm = signal; /* bit 0 discard */
1562
1563 LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1564 BB = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1565
1566 RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1567
1568 RxAGC_dBm += 4; /* bias */
1569 }
1570
1571 if (RxAGC_dBm & 0x80) /* absolute value */
1572 RXAGC = ~(RxAGC_dBm)+1;
1573 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1574 /* Translate RXAGC into 1-100. */
1575 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1576 if (RXAGC > 90)
1577 RXAGC = 90;
1578 else if (RXAGC < 25)
1579 RXAGC = 25;
1580 RXAGC = (90-RXAGC)*100/65;
1581 } else { /* CCK rate. */
1582 if (RXAGC > 95)
1583 RXAGC = 95;
1584 else if (RXAGC < 30)
1585 RXAGC = 30;
1586 RXAGC = (95-RXAGC)*100/65;
1587 }
1588 priv->SignalStrength = (u8)RXAGC;
1589 priv->RecvSignalPower = RxAGC_dBm;
1590 priv->RxPower = rxpower;
1591 priv->RSSI = RSSI;
1592 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1593 if (quality >= 127)
1594 quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1595 else if (quality < 27)
1596 quality = 100;
1597 else
1598 quality = 127 - quality;
1599 priv->SignalQuality = quality;
1600
1601 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1602 stats.signalstrength = RXAGC;
1603 if (stats.signalstrength > 100)
1604 stats.signalstrength = 100;
1605 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1606 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1607 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1608 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1609 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) | (((*(priv->rxringtail)) & (0x04000000)) != 0)
1610 | (((*(priv->rxringtail)) & (0x08000000)) != 0) | (((~(*(priv->rxringtail))) & (0x10000000)) != 0) | (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1611 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1612 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1613 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1614 fc = le16_to_cpu(hdr->frame_ctl);
1615 type = WLAN_FC_GET_TYPE(fc);
1616
1617 if ((IEEE80211_FTYPE_CTL != type) &&
1618 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
1619 && (!bHwError) && (!bCRC) && (!bICV)) {
1620 /* Perform signal smoothing for dynamic
1621 * mechanism on demand. This is different
1622 * with PerformSignalSmoothing8185 in smoothing
1623 * fomula. No dramatic adjustion is apply
1624 * because dynamic mechanism need some degree
1625 * of correctness. */
1626 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1627
1628 /* For good-looking singal strength. */
1629 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1630 priv->LastSignalStrengthInPercent,
1631 priv->SignalStrength);
1632
1633 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1634 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1635 /*
1636 * We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
1637 * so we record the correct power here.
1638 */
1639 priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1640 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1641
1642 /* Figure out which antenna that received the lasted packet. */
1643 priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1644 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1645 }
1646
1647 if (first) {
1648 if (!priv->rx_skb_complete) {
1649 /* seems that HW sometimes fails to reiceve and
1650 doesn't provide the last descriptor */
1651 dev_kfree_skb_any(priv->rx_skb);
1652 priv->stats.rxnolast++;
1653 }
1654 /* support for prism header has been originally added by Christian */
1655 if (priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
1656
1657 } else {
1658 priv->rx_skb = dev_alloc_skb(len+2);
1659 if (!priv->rx_skb)
1660 goto drop;
1661 }
1662
1663 priv->rx_skb_complete = 0;
1664 priv->rx_skb->dev = dev;
1665 } else {
1666 /* if we are here we should have already RXed
1667 * the first frame.
1668 * If we get here and the skb is not allocated then
1669 * we have just throw out garbage (skb not allocated)
1670 * and we are still rxing garbage....
1671 */
1672 if (!priv->rx_skb_complete) {
1673
1674 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1675
1676 if (!tmp_skb)
1677 goto drop;
1678
1679 tmp_skb->dev = dev;
1680
1681 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1682 priv->rx_skb->data,
1683 priv->rx_skb->len);
1684
1685 dev_kfree_skb_any(priv->rx_skb);
1686
1687 priv->rx_skb = tmp_skb;
1688 }
1689 }
1690
1691 if (!priv->rx_skb_complete) {
1692 if (padding) {
1693 memcpy(skb_put(priv->rx_skb, len),
1694 (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1695 } else {
1696 memcpy(skb_put(priv->rx_skb, len),
1697 priv->rxbuffer->buf, len);
1698 }
1699 }
1700
1701 if (last && !priv->rx_skb_complete) {
1702 if (priv->rx_skb->len > 4)
1703 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1704 if (!ieee80211_rtl_rx(priv->ieee80211,
1705 priv->rx_skb, &stats))
1706 dev_kfree_skb_any(priv->rx_skb);
1707 priv->rx_skb_complete = 1;
1708 }
1709
1710 pci_dma_sync_single_for_device(priv->pdev,
1711 priv->rxbuffer->dma,
1712 priv->rxbuffersize * \
1713 sizeof(u8),
1714 PCI_DMA_FROMDEVICE);
1715
1716 drop: /* this is used when we have not enough mem */
1717 /* restore the descriptor */
1718 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1719 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1720 *(priv->rxringtail) =
1721 *(priv->rxringtail) | priv->rxbuffersize;
1722
1723 *(priv->rxringtail) =
1724 *(priv->rxringtail) | (1<<31);
1725
1726 priv->rxringtail += rx_desc_size;
1727 if (priv->rxringtail >=
1728 (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1729 priv->rxringtail = priv->rxring;
1730
1731 priv->rxbuffer = (priv->rxbuffer->next);
1732 }
1733 }
1734
1735
1736 void rtl8180_dma_kick(struct net_device *dev, int priority)
1737 {
1738 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1739
1740 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1741 write_nic_byte(dev, TX_DMA_POLLING,
1742 (1 << (priority + 1)) | priv->dma_poll_mask);
1743 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1744
1745 force_pci_posting(dev);
1746 }
1747
1748 void rtl8180_data_hard_stop(struct net_device *dev)
1749 {
1750 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1751
1752 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1753 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1754 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1755 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1756 }
1757
1758 void rtl8180_data_hard_resume(struct net_device *dev)
1759 {
1760 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1761
1762 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1763 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1764 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1765 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1766 }
1767
1768 /*
1769 * This function TX data frames when the ieee80211 stack requires this.
1770 * It checks also if we need to stop the ieee tx queue, eventually do it
1771 */
1772 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1773 rate) {
1774 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1775 int mode;
1776 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1777 short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1778 unsigned long flags;
1779 int priority;
1780
1781 mode = priv->ieee80211->iw_mode;
1782
1783 rate = ieeerate2rtlrate(rate);
1784 /*
1785 * This function doesn't require lock because we make
1786 * sure it's called with the tx_lock already acquired.
1787 * this come from the kernel's hard_xmit callback (through
1788 * the ieee stack, or from the try_wake_queue (again through
1789 * the ieee stack.
1790 */
1791 priority = AC2Q(skb->priority);
1792 spin_lock_irqsave(&priv->tx_lock, flags);
1793
1794 if (priv->ieee80211->bHwRadioOff) {
1795 spin_unlock_irqrestore(&priv->tx_lock, flags);
1796
1797 return;
1798 }
1799
1800 if (!check_nic_enought_desc(dev, priority)) {
1801 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1802 get_curr_tx_free_desc(dev, priority));
1803 ieee80211_rtl_stop_queue(priv->ieee80211);
1804 }
1805 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1806 if (!check_nic_enought_desc(dev, priority))
1807 ieee80211_rtl_stop_queue(priv->ieee80211);
1808
1809 spin_unlock_irqrestore(&priv->tx_lock, flags);
1810 }
1811
1812 /*
1813 * This is a rough attempt to TX a frame
1814 * This is called by the ieee 80211 stack to TX management frames.
1815 * If the ring is full packet are dropped (for data frame the queue
1816 * is stopped before this can happen). For this reason it is better
1817 * if the descriptors are larger than the largest management frame
1818 * we intend to TX: i'm unsure what the HW does if it will not found
1819 * the last fragment of a frame because it has been dropped...
1820 * Since queues for Management and Data frames are different we
1821 * might use a different lock than tx_lock (for example mgmt_tx_lock)
1822 */
1823 /* these function may loops if invoked with 0 descriptors or 0 len buffer */
1824 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1825 {
1826 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1827 unsigned long flags;
1828 int priority;
1829
1830 priority = MANAGE_PRIORITY;
1831
1832 spin_lock_irqsave(&priv->tx_lock, flags);
1833
1834 if (priv->ieee80211->bHwRadioOff) {
1835 spin_unlock_irqrestore(&priv->tx_lock, flags);
1836 dev_kfree_skb_any(skb);
1837 return NETDEV_TX_OK;
1838 }
1839
1840 rtl8180_tx(dev, skb->data, skb->len, priority,
1841 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1842
1843 priv->ieee80211->stats.tx_bytes += skb->len;
1844 priv->ieee80211->stats.tx_packets++;
1845 spin_unlock_irqrestore(&priv->tx_lock, flags);
1846
1847 dev_kfree_skb_any(skb);
1848 return NETDEV_TX_OK;
1849 }
1850
1851 /* longpre 144+48 shortpre 72+24 */
1852 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1853 {
1854 u16 duration;
1855 u16 drift;
1856 *ext = 0;
1857
1858 switch (rate) {
1859 case 0: /* 1mbps */
1860 *ext = 0;
1861 duration = ((len+4)<<4) / 0x2;
1862 drift = ((len+4)<<4) % 0x2;
1863 if (drift == 0)
1864 break;
1865 duration++;
1866 break;
1867 case 1: /* 2mbps */
1868 *ext = 0;
1869 duration = ((len+4)<<4) / 0x4;
1870 drift = ((len+4)<<4) % 0x4;
1871 if (drift == 0)
1872 break;
1873 duration++;
1874 break;
1875 case 2: /* 5.5mbps */
1876 *ext = 0;
1877 duration = ((len+4)<<4) / 0xb;
1878 drift = ((len+4)<<4) % 0xb;
1879 if (drift == 0)
1880 break;
1881 duration++;
1882 break;
1883 default:
1884 case 3: /* 11mbps */
1885 *ext = 0;
1886 duration = ((len+4)<<4) / 0x16;
1887 drift = ((len+4)<<4) % 0x16;
1888 if (drift == 0)
1889 break;
1890 duration++;
1891 if (drift > 6)
1892 break;
1893 *ext = 1;
1894 break;
1895 }
1896
1897 return duration;
1898 }
1899
1900 void rtl8180_prepare_beacon(struct net_device *dev)
1901 {
1902 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1903 struct sk_buff *skb;
1904
1905 u16 word = read_nic_word(dev, BcnItv);
1906 word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1907 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1908 write_nic_word(dev, BcnItv, word);
1909
1910 skb = ieee80211_get_beacon(priv->ieee80211);
1911 if (skb) {
1912 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1913 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1914 dev_kfree_skb_any(skb);
1915 }
1916 }
1917
1918 /*
1919 * This function do the real dirty work: it enqueues a TX command
1920 * descriptor in the ring buffer, copyes the frame in a TX buffer
1921 * and kicks the NIC to ensure it does the DMA transfer.
1922 */
1923 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1924 short morefrag, short descfrag, int rate)
1925 {
1926 struct r8180_priv *priv = ieee80211_priv(dev);
1927 u32 *tail, *temp_tail;
1928 u32 *begin;
1929 u32 *buf;
1930 int i;
1931 int remain;
1932 int buflen;
1933 int count;
1934 u16 duration;
1935 short ext;
1936 struct buffer *buflist;
1937 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1938 u8 dest[ETH_ALEN];
1939 u8 bUseShortPreamble = 0;
1940 u8 bCTSEnable = 0;
1941 u8 bRTSEnable = 0;
1942 u16 Duration = 0;
1943 u16 RtsDur = 0;
1944 u16 ThisFrameTime = 0;
1945 u16 TxDescDuration = 0;
1946 u8 ownbit_flag = false;
1947
1948 switch (priority) {
1949 case MANAGE_PRIORITY:
1950 tail = priv->txmapringtail;
1951 begin = priv->txmapring;
1952 buflist = priv->txmapbufstail;
1953 count = priv->txringcount;
1954 break;
1955 case BK_PRIORITY:
1956 tail = priv->txbkpringtail;
1957 begin = priv->txbkpring;
1958 buflist = priv->txbkpbufstail;
1959 count = priv->txringcount;
1960 break;
1961 case BE_PRIORITY:
1962 tail = priv->txbepringtail;
1963 begin = priv->txbepring;
1964 buflist = priv->txbepbufstail;
1965 count = priv->txringcount;
1966 break;
1967 case VI_PRIORITY:
1968 tail = priv->txvipringtail;
1969 begin = priv->txvipring;
1970 buflist = priv->txvipbufstail;
1971 count = priv->txringcount;
1972 break;
1973 case VO_PRIORITY:
1974 tail = priv->txvopringtail;
1975 begin = priv->txvopring;
1976 buflist = priv->txvopbufstail;
1977 count = priv->txringcount;
1978 break;
1979 case HI_PRIORITY:
1980 tail = priv->txhpringtail;
1981 begin = priv->txhpring;
1982 buflist = priv->txhpbufstail;
1983 count = priv->txringcount;
1984 break;
1985 case BEACON_PRIORITY:
1986 tail = priv->txbeaconringtail;
1987 begin = priv->txbeaconring;
1988 buflist = priv->txbeaconbufstail;
1989 count = priv->txbeaconcount;
1990 break;
1991 default:
1992 return -1;
1993 break;
1994 }
1995
1996 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1997 if (is_multicast_ether_addr(dest) ||
1998 is_broadcast_ether_addr(dest)) {
1999 Duration = 0;
2000 RtsDur = 0;
2001 bRTSEnable = 0;
2002 bCTSEnable = 0;
2003
2004 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2005 TxDescDuration = ThisFrameTime;
2006 } else { /* Unicast packet */
2007 u16 AckTime;
2008
2009 /* YJ,add,080828,for Keep alive */
2010 priv->NumTxUnicast++;
2011
2012 /* Figure out ACK rate according to BSS basic rate
2013 * and Tx rate. */
2014 AckTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
2015
2016 if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
2017 u16 RtsTime, CtsTime;
2018 /* u16 CtsRate; */
2019 bRTSEnable = 1;
2020 bCTSEnable = 0;
2021
2022 /* Rate and time required for RTS. */
2023 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
2024 /* Rate and time required for CTS. */
2025 CtsTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
2026
2027 /* Figure out time required to transmit this frame. */
2028 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2029 rtl8180_rate2rate(rate),
2030 0,
2031 bUseShortPreamble);
2032
2033 /* RTS-CTS-ThisFrame-ACK. */
2034 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2035
2036 TxDescDuration = RtsTime + RtsDur;
2037 } else { /* Normal case. */
2038 bCTSEnable = 0;
2039 bRTSEnable = 0;
2040 RtsDur = 0;
2041
2042 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2043 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2044 }
2045
2046 if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
2047 /* ThisFrame-ACK. */
2048 Duration = aSifsTime + AckTime;
2049 } else { /* One or more fragments remained. */
2050 u16 NextFragTime;
2051 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
2052 rtl8180_rate2rate(rate),
2053 0,
2054 bUseShortPreamble);
2055
2056 /* ThisFrag-ACk-NextFrag-ACK. */
2057 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2058 }
2059
2060 } /* End of Unicast packet */
2061
2062 frag_hdr->duration_id = Duration;
2063
2064 buflen = priv->txbuffsize;
2065 remain = len;
2066 temp_tail = tail;
2067
2068 while (remain != 0) {
2069 mb();
2070 if (!buflist) {
2071 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2072 return -1;
2073 }
2074 buf = buflist->buf;
2075
2076 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
2077 DMESGW("No more TX desc, returning %x of %x",
2078 remain, len);
2079 priv->stats.txrdu++;
2080 return remain;
2081 }
2082
2083 *tail = 0; /* zeroes header */
2084 *(tail+1) = 0;
2085 *(tail+3) = 0;
2086 *(tail+5) = 0;
2087 *(tail+6) = 0;
2088 *(tail+7) = 0;
2089
2090 /* FIXME: this should be triggered by HW encryption parameters.*/
2091 *tail |= (1<<15); /* no encrypt */
2092
2093 if (remain == len && !descfrag) {
2094 ownbit_flag = false;
2095 *tail = *tail | (1<<29) ; /* fist segment of the packet */
2096 *tail = *tail | (len);
2097 } else {
2098 ownbit_flag = true;
2099 }
2100
2101 for (i = 0; i < buflen && remain > 0; i++, remain--) {
2102 ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
2103 if (remain == 4 && i+4 >= buflen)
2104 break;
2105 /* ensure the last desc has at least 4 bytes payload */
2106
2107 }
2108 txbuf = txbuf + i;
2109 *(tail+3) = *(tail+3) & ~0xfff;
2110 *(tail+3) = *(tail+3) | i; /* buffer length */
2111 /* Use short preamble or not */
2112 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2113 if (priv->plcp_preamble_mode == 1 && rate != 0) /* short mode now, not long! */
2114 ; /* *tail |= (1<<16); */ /* enable short preamble mode. */
2115
2116 if (bCTSEnable)
2117 *tail |= (1<<18);
2118
2119 if (bRTSEnable) { /* rts enable */
2120 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
2121 *tail |= (1<<23); /* rts enable */
2122 *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
2123 }
2124 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
2125 /* *(tail+3) |= (0xe6<<16); */
2126 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
2127
2128 *tail = *tail | ((rate&0xf) << 24);
2129
2130 /* hw_plcp_len is not used for rtl8180 chip */
2131 /* FIXME */
2132 if (!priv->hw_plcp_len) {
2133 duration = rtl8180_len2duration(len, rate, &ext);
2134 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2135 if (ext)
2136 *(tail+1) = *(tail+1) | (1<<31); /* plcp length extension */
2137 }
2138
2139 if (morefrag)
2140 *tail = (*tail) | (1<<17); /* more fragment */
2141 if (!remain)
2142 *tail = (*tail) | (1<<28); /* last segment of frame */
2143
2144 *(tail+5) = *(tail+5)|(2<<27);
2145 *(tail+7) = *(tail+7)|(1<<4);
2146
2147 wmb();
2148 if (ownbit_flag)
2149 *tail = *tail | (1<<31); /* descriptor ready to be txed */
2150
2151 if ((tail - begin)/8 == count-1)
2152 tail = begin;
2153 else
2154 tail = tail+8;
2155
2156 buflist = buflist->next;
2157
2158 mb();
2159
2160 switch (priority) {
2161 case MANAGE_PRIORITY:
2162 priv->txmapringtail = tail;
2163 priv->txmapbufstail = buflist;
2164 break;
2165 case BK_PRIORITY:
2166 priv->txbkpringtail = tail;
2167 priv->txbkpbufstail = buflist;
2168 break;
2169 case BE_PRIORITY:
2170 priv->txbepringtail = tail;
2171 priv->txbepbufstail = buflist;
2172 break;
2173 case VI_PRIORITY:
2174 priv->txvipringtail = tail;
2175 priv->txvipbufstail = buflist;
2176 break;
2177 case VO_PRIORITY:
2178 priv->txvopringtail = tail;
2179 priv->txvopbufstail = buflist;
2180 break;
2181 case HI_PRIORITY:
2182 priv->txhpringtail = tail;
2183 priv->txhpbufstail = buflist;
2184 break;
2185 case BEACON_PRIORITY:
2186 /*
2187 * The HW seems to be happy with the 1st
2188 * descriptor filled and the 2nd empty...
2189 * So always update descriptor 1 and never
2190 * touch 2nd
2191 */
2192 break;
2193 }
2194 }
2195 *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
2196 rtl8180_dma_kick(dev, priority);
2197
2198 return 0;
2199 }
2200
2201 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
2202
2203 void rtl8180_link_change(struct net_device *dev)
2204 {
2205 struct r8180_priv *priv = ieee80211_priv(dev);
2206 u16 beacon_interval;
2207 struct ieee80211_network *net = &priv->ieee80211->current_network;
2208
2209 rtl8180_update_msr(dev);
2210
2211 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2212
2213 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
2214 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
2215
2216 beacon_interval = read_nic_dword(dev, BEACON_INTERVAL);
2217 beacon_interval &= ~BEACON_INTERVAL_MASK;
2218 beacon_interval |= net->beacon_interval;
2219 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2220
2221 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2222
2223 rtl8180_set_chan(dev, priv->chan);
2224 }
2225
2226 void rtl8180_rq_tx_ack(struct net_device *dev)
2227 {
2228
2229 struct r8180_priv *priv = ieee80211_priv(dev);
2230
2231 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2232 priv->ack_tx_to_ieee = 1;
2233 }
2234
2235 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2236 {
2237
2238 struct r8180_priv *priv = ieee80211_priv(dev);
2239 u32 *d;
2240
2241 for (d = priv->txmapring;
2242 d < priv->txmapring + priv->txringcount; d += 8)
2243 if (*d & (1<<31))
2244 return 0;
2245
2246 for (d = priv->txbkpring;
2247 d < priv->txbkpring + priv->txringcount; d += 8)
2248 if (*d & (1<<31))
2249 return 0;
2250
2251 for (d = priv->txbepring;
2252 d < priv->txbepring + priv->txringcount; d += 8)
2253 if (*d & (1<<31))
2254 return 0;
2255
2256 for (d = priv->txvipring;
2257 d < priv->txvipring + priv->txringcount; d += 8)
2258 if (*d & (1<<31))
2259 return 0;
2260
2261 for (d = priv->txvopring;
2262 d < priv->txvopring + priv->txringcount; d += 8)
2263 if (*d & (1<<31))
2264 return 0;
2265
2266 for (d = priv->txhpring;
2267 d < priv->txhpring + priv->txringcount; d += 8)
2268 if (*d & (1<<31))
2269 return 0;
2270 return 1;
2271 }
2272 /* FIXME FIXME 5msecs is random */
2273 #define HW_WAKE_DELAY 5
2274
2275 void rtl8180_hw_wakeup(struct net_device *dev)
2276 {
2277 unsigned long flags;
2278 struct r8180_priv *priv = ieee80211_priv(dev);
2279
2280 spin_lock_irqsave(&priv->ps_lock, flags);
2281 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2282 if (priv->rf_wakeup)
2283 priv->rf_wakeup(dev);
2284 spin_unlock_irqrestore(&priv->ps_lock, flags);
2285 }
2286
2287 void rtl8180_hw_sleep_down(struct net_device *dev)
2288 {
2289 unsigned long flags;
2290 struct r8180_priv *priv = ieee80211_priv(dev);
2291
2292 spin_lock_irqsave(&priv->ps_lock, flags);
2293 if (priv->rf_sleep)
2294 priv->rf_sleep(dev);
2295 spin_unlock_irqrestore(&priv->ps_lock, flags);
2296 }
2297
2298 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2299 {
2300 struct r8180_priv *priv = ieee80211_priv(dev);
2301 u32 rb = jiffies;
2302 unsigned long flags;
2303
2304 spin_lock_irqsave(&priv->ps_lock, flags);
2305
2306 /*
2307 * Writing HW register with 0 equals to disable
2308 * the timer, that is not really what we want
2309 */
2310 tl -= MSECS(4+16+7);
2311
2312 /*
2313 * If the interval in witch we are requested to sleep is too
2314 * short then give up and remain awake
2315 */
2316 if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2317 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2318 spin_unlock_irqrestore(&priv->ps_lock, flags);
2319 printk("too short to sleep\n");
2320 return;
2321 }
2322
2323 {
2324 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2325
2326 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2327
2328 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); /* as tl may be less than rb */
2329 }
2330 /*
2331 * If we suspect the TimerInt is gone beyond tl
2332 * while setting it, then give up
2333 */
2334
2335 if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2336 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2337 spin_unlock_irqrestore(&priv->ps_lock, flags);
2338 return;
2339 }
2340
2341 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2342 spin_unlock_irqrestore(&priv->ps_lock, flags);
2343 }
2344
2345 void rtl8180_wmm_param_update(struct work_struct *work)
2346 {
2347 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2348 struct net_device *dev = ieee->dev;
2349 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2350 u8 mode = ieee->current_network.mode;
2351 AC_CODING eACI;
2352 AC_PARAM AcParam;
2353 PAC_PARAM pAcParam;
2354 u8 i;
2355
2356 if (!ieee->current_network.QoS_Enable) {
2357 /* legacy ac_xx_param update */
2358 AcParam.longData = 0;
2359 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2360 AcParam.f.AciAifsn.f.ACM = 0;
2361 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2362 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2363 AcParam.f.TXOPLimit = 0;
2364 for (eACI = 0; eACI < AC_MAX; eACI++) {
2365 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2366 {
2367 u8 u1bAIFS;
2368 u32 u4bAcParam;
2369 pAcParam = (PAC_PARAM)(&AcParam);
2370 /* Retrive paramters to udpate. */
2371 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2372 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2373 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2374 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2375 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2376 switch (eACI) {
2377 case AC1_BK:
2378 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2379 break;
2380 case AC0_BE:
2381 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2382 break;
2383 case AC2_VI:
2384 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2385 break;
2386 case AC3_VO:
2387 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2388 break;
2389 default:
2390 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2391 break;
2392 }
2393 }
2394 }
2395 return;
2396 }
2397
2398 for (i = 0; i < AC_MAX; i++) {
2399 /* AcParam.longData = 0; */
2400 pAcParam = (AC_PARAM *)ac_param;
2401 {
2402 AC_CODING eACI;
2403 u8 u1bAIFS;
2404 u32 u4bAcParam;
2405
2406 /* Retrive paramters to udpate. */
2407 eACI = pAcParam->f.AciAifsn.f.ACI;
2408 /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2409 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2410 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
2411 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
2412 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
2413 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2414
2415 switch (eACI) {
2416 case AC1_BK:
2417 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2418 break;
2419 case AC0_BE:
2420 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2421 break;
2422 case AC2_VI:
2423 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2424 break;
2425 case AC3_VO:
2426 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2427 break;
2428 default:
2429 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2430 break;
2431 }
2432 }
2433 ac_param += (sizeof(AC_PARAM));
2434 }
2435 }
2436
2437 void rtl8180_tx_irq_wq(struct work_struct *work);
2438 void rtl8180_restart_wq(struct work_struct *work);
2439 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2440 void rtl8180_watch_dog_wq(struct work_struct *work);
2441 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2442 void rtl8180_hw_sleep_wq(struct work_struct *work);
2443 void rtl8180_sw_antenna_wq(struct work_struct *work);
2444 void rtl8180_watch_dog(struct net_device *dev);
2445
2446 void watch_dog_adaptive(unsigned long data)
2447 {
2448 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
2449
2450 if (!priv->up) {
2451 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2452 return;
2453 }
2454
2455 /* Tx High Power Mechanism. */
2456 if (CheckHighPower((struct net_device *)data))
2457 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2458
2459 /* Tx Power Tracking on 87SE. */
2460 if (CheckTxPwrTracking((struct net_device *)data))
2461 TxPwrTracking87SE((struct net_device *)data);
2462
2463 /* Perform DIG immediately. */
2464 if (CheckDig((struct net_device *)data) == true)
2465 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2466 rtl8180_watch_dog((struct net_device *)data);
2467
2468 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2469
2470 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2471 add_timer(&priv->watch_dog_timer);
2472 }
2473
2474 static CHANNEL_LIST ChannelPlan[] = {
2475 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, /* FCC */
2476 {{1,2,3,4,5,6,7,8,9,10,11},11}, /* IC */
2477 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* ETSI */
2478 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Spain. Change to ETSI. */
2479 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* France. Change to ETSI. */
2480 {{14,36,40,44,48,52,56,60,64},9}, /* MKK */
2481 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2482 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Israel. */
2483 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, /* For 11a , TELEC */
2484 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2485 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2486 };
2487
2488 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2489 {
2490 int i;
2491
2492 /* lzm add 080826 */
2493 ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2494 ieee->IbssStartChnl = 0;
2495
2496 switch (channel_plan) {
2497 case COUNTRY_CODE_FCC:
2498 case COUNTRY_CODE_IC:
2499 case COUNTRY_CODE_ETSI:
2500 case COUNTRY_CODE_SPAIN:
2501 case COUNTRY_CODE_FRANCE:
2502 case COUNTRY_CODE_MKK:
2503 case COUNTRY_CODE_MKK1:
2504 case COUNTRY_CODE_ISRAEL:
2505 case COUNTRY_CODE_TELEC:
2506 {
2507 Dot11d_Init(ieee);
2508 ieee->bGlobalDomain = false;
2509 if (ChannelPlan[channel_plan].Len != 0) {
2510 /* Clear old channel map */
2511 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2512 /* Set new channel map */
2513 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2514 if (ChannelPlan[channel_plan].Channel[i] <= 14)
2515 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2516 }
2517 }
2518 break;
2519 }
2520 case COUNTRY_CODE_GLOBAL_DOMAIN:
2521 {
2522 GET_DOT11D_INFO(ieee)->bEnabled = 0;
2523 Dot11d_Reset(ieee);
2524 ieee->bGlobalDomain = true;
2525 break;
2526 }
2527 case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2528 {
2529 ieee->MinPassiveChnlNum = 12;
2530 ieee->IbssStartChnl = 10;
2531 break;
2532 }
2533 default:
2534 {
2535 Dot11d_Init(ieee);
2536 ieee->bGlobalDomain = false;
2537 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2538 for (i = 1; i <= 14; i++)
2539 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2540 break;
2541 }
2542 }
2543 }
2544
2545 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2546
2547 /* YJ,add,080828 */
2548 static void rtl8180_statistics_init(struct Stats *pstats)
2549 {
2550 memset(pstats, 0, sizeof(struct Stats));
2551 }
2552
2553 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2554 {
2555 memset(plink_detect, 0, sizeof(link_detect_t));
2556 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2557 }
2558
2559 /* YJ,add,080828,end */
2560 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2561 {
2562 struct net_device *dev = eeprom->data;
2563 u8 reg = read_nic_byte(dev, EPROM_CMD);
2564
2565 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2566 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2567 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2568 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2569 }
2570
2571 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2572 {
2573 struct net_device *dev = eeprom->data;
2574 u8 reg = 2 << 6;
2575
2576 if (eeprom->reg_data_in)
2577 reg |= RTL818X_EEPROM_CMD_WRITE;
2578 if (eeprom->reg_data_out)
2579 reg |= RTL818X_EEPROM_CMD_READ;
2580 if (eeprom->reg_data_clock)
2581 reg |= RTL818X_EEPROM_CMD_CK;
2582 if (eeprom->reg_chip_select)
2583 reg |= RTL818X_EEPROM_CMD_CS;
2584
2585 write_nic_byte(dev, EPROM_CMD, reg);
2586 read_nic_byte(dev, EPROM_CMD);
2587 udelay(10);
2588 }
2589
2590 short rtl8180_init(struct net_device *dev)
2591 {
2592 struct r8180_priv *priv = ieee80211_priv(dev);
2593 u16 word;
2594 u16 version;
2595 u32 usValue;
2596 u16 tmpu16;
2597 int i, j;
2598 struct eeprom_93cx6 eeprom;
2599 u16 eeprom_val;
2600
2601 eeprom.data = dev;
2602 eeprom.register_read = rtl8187se_eeprom_register_read;
2603 eeprom.register_write = rtl8187se_eeprom_register_write;
2604 eeprom.width = PCI_EEPROM_WIDTH_93C46;
2605
2606 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2607 priv->channel_plan = eeprom_val & 0xFF;
2608 if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2609 printk("rtl8180_init:Error channel plan! Set to default.\n");
2610 priv->channel_plan = 0;
2611 }
2612
2613 DMESG("Channel plan is %d\n", priv->channel_plan);
2614 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2615
2616 /* FIXME: these constants are placed in a bad pleace. */
2617 priv->txbuffsize = 2048; /* 1024; */
2618 priv->txringcount = 32; /* 32; */
2619 priv->rxbuffersize = 2048; /* 1024; */
2620 priv->rxringcount = 64; /* 32; */
2621 priv->txbeaconcount = 2;
2622 priv->rx_skb_complete = 1;
2623
2624 priv->RFChangeInProgress = false;
2625 priv->SetRFPowerStateInProgress = false;
2626 priv->RFProgType = 0;
2627 priv->bInHctTest = false;
2628
2629 priv->irq_enabled = 0;
2630
2631 rtl8180_statistics_init(&priv->stats);
2632 rtl8180_link_detect_init(&priv->link_detect);
2633
2634 priv->ack_tx_to_ieee = 0;
2635 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2636 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2637 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2638 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2639 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2640 priv->ieee80211->active_scan = 1;
2641 priv->ieee80211->rate = 110; /* 11 mbps */
2642 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2643 priv->ieee80211->host_encrypt = 1;
2644 priv->ieee80211->host_decrypt = 1;
2645 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2646 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2647 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2648 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2649
2650 priv->hw_wep = hwwep;
2651 priv->prism_hdr = 0;
2652 priv->dev = dev;
2653 priv->retry_rts = DEFAULT_RETRY_RTS;
2654 priv->retry_data = DEFAULT_RETRY_DATA;
2655 priv->RFChangeInProgress = false;
2656 priv->SetRFPowerStateInProgress = false;
2657 priv->RFProgType = 0;
2658 priv->bInHctTest = false;
2659 priv->bInactivePs = true; /* false; */
2660 priv->ieee80211->bInactivePs = priv->bInactivePs;
2661 priv->bSwRfProcessing = false;
2662 priv->eRFPowerState = eRfOff;
2663 priv->RfOffReason = 0;
2664 priv->LedStrategy = SW_LED_MODE0;
2665 priv->TxPollingTimes = 0; /* lzm add 080826 */
2666 priv->bLeisurePs = true;
2667 priv->dot11PowerSaveMode = eActive;
2668 priv->AdMinCheckPeriod = 5;
2669 priv->AdMaxCheckPeriod = 10;
2670 priv->AdMaxRxSsThreshold = 30; /* 60->30 */
2671 priv->AdRxSsThreshold = 20; /* 50->20 */
2672 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2673 priv->AdTickCount = 0;
2674 priv->AdRxSignalStrength = -1;
2675 priv->RegSwAntennaDiversityMechanism = 0;
2676 priv->RegDefaultAntenna = 0;
2677 priv->SignalStrength = 0;
2678 priv->AdRxOkCnt = 0;
2679 priv->CurrAntennaIndex = 0;
2680 priv->AdRxSsBeforeSwitched = 0;
2681 init_timer(&priv->SwAntennaDiversityTimer);
2682 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2683 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2684 priv->bDigMechanism = 1;
2685 priv->InitialGain = 6;
2686 priv->bXtalCalibration = false;
2687 priv->XtalCal_Xin = 0;
2688 priv->XtalCal_Xout = 0;
2689 priv->bTxPowerTrack = false;
2690 priv->ThermalMeter = 0;
2691 priv->FalseAlarmRegValue = 0;
2692 priv->RegDigOfdmFaUpTh = 0xc; /* Upper threhold of OFDM false alarm, which is used in DIG. */
2693 priv->DIG_NumberFallbackVote = 0;
2694 priv->DIG_NumberUpgradeVote = 0;
2695 priv->LastSignalStrengthInPercent = 0;
2696 priv->Stats_SignalStrength = 0;
2697 priv->LastRxPktAntenna = 0;
2698 priv->SignalQuality = 0; /* in 0-100 index. */
2699 priv->Stats_SignalQuality = 0;
2700 priv->RecvSignalPower = 0; /* in dBm. */
2701 priv->Stats_RecvSignalPower = 0;
2702 priv->AdMainAntennaRxOkCnt = 0;
2703 priv->AdAuxAntennaRxOkCnt = 0;
2704 priv->bHWAdSwitched = false;
2705 priv->bRegHighPowerMechanism = true;
2706 priv->RegHiPwrUpperTh = 77;
2707 priv->RegHiPwrLowerTh = 75;
2708 priv->RegRSSIHiPwrUpperTh = 70;
2709 priv->RegRSSIHiPwrLowerTh = 20;
2710 priv->bCurCCKPkt = false;
2711 priv->UndecoratedSmoothedSS = -1;
2712 priv->bToUpdateTxPwr = false;
2713 priv->CurCCKRSSI = 0;
2714 priv->RxPower = 0;
2715 priv->RSSI = 0;
2716 priv->NumTxOkTotal = 0;
2717 priv->NumTxUnicast = 0;
2718 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2719 priv->PowerProfile = POWER_PROFILE_AC;
2720 priv->CurrRetryCnt = 0;
2721 priv->LastRetryCnt = 0;
2722 priv->LastTxokCnt = 0;
2723 priv->LastRxokCnt = 0;
2724 priv->LastRetryRate = 0;
2725 priv->bTryuping = 0;
2726 priv->CurrTxRate = 0;
2727 priv->CurrRetryRate = 0;
2728 priv->TryupingCount = 0;
2729 priv->TryupingCountNoData = 0;
2730 priv->TryDownCountLowData = 0;
2731 priv->LastTxOKBytes = 0;
2732 priv->LastFailTxRate = 0;
2733 priv->LastFailTxRateSS = 0;
2734 priv->FailTxRateCount = 0;
2735 priv->LastTxThroughput = 0;
2736 priv->NumTxOkBytesTotal = 0;
2737 priv->ForcedDataRate = 0;
2738 priv->RegBModeGainStage = 1;
2739
2740 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2741 spin_lock_init(&priv->irq_lock);
2742 spin_lock_init(&priv->irq_th_lock);
2743 spin_lock_init(&priv->tx_lock);
2744 spin_lock_init(&priv->ps_lock);
2745 spin_lock_init(&priv->rf_ps_lock);
2746 sema_init(&priv->wx_sem, 1);
2747 sema_init(&priv->rf_state, 1);
2748 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2749 INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2750 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2751 (void *)rtl8180_hw_wakeup_wq);
2752 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2753 (void *)rtl8180_hw_sleep_wq);
2754 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2755 (void *)rtl8180_wmm_param_update);
2756 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2757 (void *)rtl8180_rate_adapter);
2758 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2759 (void *)rtl8180_hw_dig_wq);
2760 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2761 (void *)rtl8180_tx_pw_wq);
2762 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2763 (void *) GPIOChangeRFWorkItemCallBack);
2764 tasklet_init(&priv->irq_rx_tasklet,
2765 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2766 (unsigned long)priv);
2767
2768 init_timer(&priv->watch_dog_timer);
2769 priv->watch_dog_timer.data = (unsigned long)dev;
2770 priv->watch_dog_timer.function = watch_dog_adaptive;
2771
2772 init_timer(&priv->rateadapter_timer);
2773 priv->rateadapter_timer.data = (unsigned long)dev;
2774 priv->rateadapter_timer.function = timer_rate_adaptive;
2775 priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2776 priv->bEnhanceTxPwr = false;
2777
2778 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2779 priv->ieee80211->set_chan = rtl8180_set_chan;
2780 priv->ieee80211->link_change = rtl8180_link_change;
2781 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2782 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2783 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2784
2785 priv->ieee80211->init_wmmparam_flag = 0;
2786
2787 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2788 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2789 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2790
2791 priv->MWIEnable = 0;
2792
2793 priv->ShortRetryLimit = 7;
2794 priv->LongRetryLimit = 7;
2795 priv->EarlyRxThreshold = 7;
2796
2797 priv->CSMethod = (0x01 << 29);
2798
2799 priv->TransmitConfig = TCR_DurProcMode_OFFSET |
2800 (7<<TCR_MXDMA_OFFSET) |
2801 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2802 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |
2803 (0 ? TCR_SAT : 0);
2804
2805 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF |
2806 RCR_AB | RCR_AM | RCR_APM |
2807 (7<<RCR_MXDMA_OFFSET) |
2808 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2809 (priv->EarlyRxThreshold == 7 ?
2810 RCR_ONLYERLPKT : 0);
2811
2812 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2813 IMR_THPDER | IMR_THPDOK |
2814 IMR_TVODER | IMR_TVODOK |
2815 IMR_TVIDER | IMR_TVIDOK |
2816 IMR_TBEDER | IMR_TBEDOK |
2817 IMR_TBKDER | IMR_TBKDOK |
2818 IMR_RDU |
2819 IMR_RER | IMR_ROK |
2820 IMR_RQoSOK;
2821
2822 priv->InitialGain = 6;
2823
2824 DMESG("MAC controller is a RTL8187SE b/g");
2825 priv->phy_ver = 2;
2826
2827 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2828 priv->ieee80211->short_slot = 1;
2829
2830 /* just for sync 85 */
2831 priv->enable_gpio0 = 0;
2832
2833 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2834 usValue = eeprom_val;
2835 DMESG("usValue is 0x%x\n", usValue);
2836 /* 3Read AntennaDiversity */
2837
2838 /* SW Antenna Diversity. */
2839 if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE)
2840 priv->EEPROMSwAntennaDiversity = false;
2841 else
2842 priv->EEPROMSwAntennaDiversity = true;
2843
2844 /* Default Antenna to use. */
2845 if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1)
2846 priv->EEPROMDefaultAntenna1 = false;
2847 else
2848 priv->EEPROMDefaultAntenna1 = true;
2849
2850 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2851 /* 0: default from EEPROM. */
2852 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2853 else
2854 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2855 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ? false : true);
2856
2857 if (priv->RegDefaultAntenna == 0)
2858 /* 0: default from EEPROM. */
2859 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2860 else
2861 /* 1: main, 2: aux. */
2862 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ? true : false);
2863
2864 /* rtl8185 can calc plcp len in HW. */
2865 priv->hw_plcp_len = 1;
2866
2867 priv->plcp_preamble_mode = 2;
2868 /* the eeprom type is stored in RCR register bit #6 */
2869 if (RCR_9356SEL & read_nic_dword(dev, RCR))
2870 priv->epromtype = EPROM_93c56;
2871 else
2872 priv->epromtype = EPROM_93c46;
2873
2874 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2875 dev->dev_addr, 3);
2876
2877 for (i = 1, j = 0; i < 14; i += 2, j++) {
2878 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2879 priv->chtxpwr[i] = word & 0xff;
2880 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2881 }
2882 for (i = 1, j = 0; i < 14; i += 2, j++) {
2883 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2884 priv->chtxpwr_ofdm[i] = word & 0xff;
2885 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2886 }
2887
2888 /* 3Read crystal calibtration and thermal meter indication on 87SE. */
2889 eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2890
2891 /* Crystal calibration for Xin and Xout resp. */
2892 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2893 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2894 if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2895 priv->bXtalCalibration = true;
2896
2897 /* Thermal meter reference indication. */
2898 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2899 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2900 priv->bTxPowerTrack = true;
2901
2902 eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
2903 priv->cck_txpwr_base = word & 0xf;
2904 priv->ofdm_txpwr_base = (word>>4) & 0xf;
2905
2906 eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2907 DMESG("EEPROM version %x", version);
2908 priv->rcr_csense = 3;
2909
2910 eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
2911 priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
2912
2913 eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
2914 priv->rf_sleep = rtl8225z4_rf_sleep;
2915 priv->rf_wakeup = rtl8225z4_rf_wakeup;
2916 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2917
2918 priv->rf_close = rtl8225z2_rf_close;
2919 priv->rf_init = rtl8225z2_rf_init;
2920 priv->rf_set_chan = rtl8225z2_rf_set_chan;
2921 priv->rf_set_sens = NULL;
2922
2923 if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2924 return -ENOMEM;
2925
2926 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2927 TX_MANAGEPRIORITY_RING_ADDR))
2928 return -ENOMEM;
2929
2930 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2931 TX_BKPRIORITY_RING_ADDR))
2932 return -ENOMEM;
2933
2934 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2935 TX_BEPRIORITY_RING_ADDR))
2936 return -ENOMEM;
2937
2938 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2939 TX_VIPRIORITY_RING_ADDR))
2940 return -ENOMEM;
2941
2942 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2943 TX_VOPRIORITY_RING_ADDR))
2944 return -ENOMEM;
2945
2946 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2947 TX_HIGHPRIORITY_RING_ADDR))
2948 return -ENOMEM;
2949
2950 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2951 TX_BEACON_RING_ADDR))
2952 return -ENOMEM;
2953
2954 if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2955 DMESGE("Error allocating IRQ %d", dev->irq);
2956 return -1;
2957 } else {
2958 priv->irq = dev->irq;
2959 DMESG("IRQ %d", dev->irq);
2960 }
2961
2962 return 0;
2963 }
2964
2965 void rtl8180_no_hw_wep(struct net_device *dev)
2966 {
2967 }
2968
2969 void rtl8180_set_hw_wep(struct net_device *dev)
2970 {
2971 struct r8180_priv *priv = ieee80211_priv(dev);
2972 u8 pgreg;
2973 u8 security;
2974 u32 key0_word4;
2975
2976 pgreg = read_nic_byte(dev, PGSELECT);
2977 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2978
2979 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2980 key0_word4 &= ~0xff;
2981 key0_word4 |= priv->key0[3] & 0xff;
2982 write_nic_dword(dev, KEY0, (priv->key0[0]));
2983 write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2984 write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2985 write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2986
2987 security = read_nic_byte(dev, SECURITY);
2988 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2989 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2990 security &= ~SECURITY_ENCRYP_MASK;
2991 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2992
2993 write_nic_byte(dev, SECURITY, security);
2994
2995 DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2996 read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2997 read_nic_dword(dev, KEY0));
2998 }
2999
3000
3001 void rtl8185_rf_pins_enable(struct net_device *dev)
3002 {
3003 /* u16 tmp; */
3004 /* tmp = read_nic_word(dev, RFPinsEnable); */
3005 write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
3006 }
3007
3008 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3009 {
3010 u8 conf3;
3011
3012 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3013
3014 conf3 = read_nic_byte(dev, CONFIG3);
3015 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3016 write_nic_dword(dev, ANAPARAM2, a);
3017
3018 conf3 = read_nic_byte(dev, CONFIG3);
3019 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3020 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3021 }
3022
3023 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3024 {
3025 u8 conf3;
3026
3027 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3028
3029 conf3 = read_nic_byte(dev, CONFIG3);
3030 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3031 write_nic_dword(dev, ANAPARAM, a);
3032
3033 conf3 = read_nic_byte(dev, CONFIG3);
3034 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3035 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3036 }
3037
3038 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
3039 {
3040 write_nic_byte(dev, TX_ANTENNA, ant);
3041 force_pci_posting(dev);
3042 mdelay(1);
3043 }
3044
3045 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3046 {
3047 u32 phyw;
3048
3049 adr |= 0x80;
3050
3051 phyw = ((data<<8) | adr);
3052
3053 /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
3054 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3055 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3056 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3057 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
3058
3059 /* this is ok to fail when we write AGC table. check for AGC table might be
3060 * done by masking with 0x7f instead of 0xff
3061 */
3062 /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
3063 }
3064
3065 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
3066 {
3067 data = data & 0xff;
3068 rtl8185_write_phy(dev, adr, data);
3069 }
3070
3071 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
3072 {
3073 data = data & 0xff;
3074 rtl8185_write_phy(dev, adr, data | 0x10000);
3075 }
3076
3077 void rtl8185_set_rate(struct net_device *dev)
3078 {
3079 int i;
3080 u16 word;
3081 int basic_rate, min_rr_rate, max_rr_rate;
3082
3083 basic_rate = ieeerate2rtlrate(240);
3084 min_rr_rate = ieeerate2rtlrate(60);
3085 max_rr_rate = ieeerate2rtlrate(240);
3086
3087 write_nic_byte(dev, RESP_RATE,
3088 max_rr_rate<<MAX_RESP_RATE_SHIFT | min_rr_rate<<MIN_RESP_RATE_SHIFT);
3089
3090 word = read_nic_word(dev, BRSR);
3091 word &= ~BRSR_MBR_8185;
3092
3093 for (i = 0; i <= basic_rate; i++)
3094 word |= (1<<i);
3095
3096 write_nic_word(dev, BRSR, word);
3097 }
3098
3099 void rtl8180_adapter_start(struct net_device *dev)
3100 {
3101 struct r8180_priv *priv = ieee80211_priv(dev);
3102
3103 rtl8180_rtx_disable(dev);
3104 rtl8180_reset(dev);
3105
3106 /* enable beacon timeout, beacon TX ok and err
3107 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3108 * RX ok and ERR, and GP timer
3109 */
3110 priv->irq_mask = 0x6fcf;
3111
3112 priv->dma_poll_mask = 0;
3113
3114 rtl8180_beacon_tx_disable(dev);
3115
3116 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3117 write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
3118 write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
3119 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3120
3121 rtl8180_update_msr(dev);
3122
3123 /* These might be unnecessary since we do in rx_enable / tx_enable */
3124 fix_rx_fifo(dev);
3125 fix_tx_fifo(dev);
3126
3127 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3128
3129 /*
3130 * The following is very strange. seems to be that 1 means test mode,
3131 * but we need to acknolwledges the nic when a packet is ready
3132 * although we set it to 0
3133 */
3134
3135 write_nic_byte(dev,
3136 CONFIG2, read_nic_byte(dev, CONFIG2) & ~\
3137 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3138 /* ^the nic isn't in test mode */
3139 write_nic_byte(dev,
3140 CONFIG2, read_nic_byte(dev, CONFIG2)|(1<<4));
3141
3142 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3143
3144 write_nic_dword(dev, INT_TIMEOUT, 0);
3145
3146 write_nic_byte(dev, WPA_CONFIG, 0);
3147
3148 rtl8180_no_hw_wep(dev);
3149
3150 rtl8185_set_rate(dev);
3151 write_nic_byte(dev, RATE_FALLBACK, 0x81);
3152
3153 write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3154
3155 /* FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3156 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3157 write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3158 | (1 << CONFIG3_CLKRUN_SHIFT));
3159 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3160
3161 priv->rf_init(dev);
3162
3163 if (priv->rf_set_sens != NULL)
3164 priv->rf_set_sens(dev, priv->sens);
3165 rtl8180_irq_enable(dev);
3166
3167 netif_start_queue(dev);
3168 }
3169
3170 /*
3171 * This configures registers for beacon tx and enables it via
3172 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
3173 * be used to stop beacon transmission
3174 */
3175 void rtl8180_start_tx_beacon(struct net_device *dev)
3176 {
3177 u16 word;
3178
3179 DMESG("Enabling beacon TX");
3180 rtl8180_prepare_beacon(dev);
3181 rtl8180_irq_disable(dev);
3182 rtl8180_beacon_tx_enable(dev);
3183
3184 word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
3185 write_nic_word(dev, AtimWnd, word); /* word |= */
3186
3187 word = read_nic_word(dev, BintrItv);
3188 word &= ~BintrItv_BintrItv;
3189 word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
3190 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
3191 // FIXME: check if correct ^^ worked with 0x3e8;
3192 */
3193 write_nic_word(dev, BintrItv, word);
3194
3195 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3196
3197 rtl8185b_irq_enable(dev);
3198 }
3199
3200 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3201 {
3202 struct r8180_priv *priv = ieee80211_priv(dev);
3203
3204 return &priv->ieee80211->stats;
3205 }
3206
3207 /*
3208 * Change current and default preamble mode.
3209 */
3210 bool
3211 MgntActSet_802_11_PowerSaveMode(
3212 struct r8180_priv *priv,
3213 RT_PS_MODE rtPsMode
3214 )
3215 {
3216 /* Currently, we do not change power save mode on IBSS mode. */
3217 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3218 return false;
3219
3220 priv->ieee80211->ps = rtPsMode;
3221
3222 return true;
3223 }
3224
3225 void LeisurePSEnter(struct r8180_priv *priv)
3226 {
3227 if (priv->bLeisurePs) {
3228 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3229 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST); /* IEEE80211_PS_ENABLE */
3230 }
3231 }
3232
3233 void LeisurePSLeave(struct r8180_priv *priv)
3234 {
3235 if (priv->bLeisurePs) {
3236 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3237 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3238 }
3239 }
3240
3241 void rtl8180_hw_wakeup_wq(struct work_struct *work)
3242 {
3243 struct delayed_work *dwork = to_delayed_work(work);
3244 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
3245 struct net_device *dev = ieee->dev;
3246
3247 rtl8180_hw_wakeup(dev);
3248 }
3249
3250 void rtl8180_hw_sleep_wq(struct work_struct *work)
3251 {
3252 struct delayed_work *dwork = to_delayed_work(work);
3253 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
3254 struct net_device *dev = ieee->dev;
3255
3256 rtl8180_hw_sleep_down(dev);
3257 }
3258
3259 static void MgntLinkKeepAlive(struct r8180_priv *priv)
3260 {
3261 if (priv->keepAliveLevel == 0)
3262 return;
3263
3264 if (priv->ieee80211->state == IEEE80211_LINKED) {
3265 /*
3266 * Keep-Alive.
3267 */
3268
3269 if ((priv->keepAliveLevel == 2) ||
3270 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
3271 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
3272 ) {
3273 priv->link_detect.IdleCount++;
3274
3275 /*
3276 * Send a Keep-Alive packet packet to AP if we had been idle for a while.
3277 */
3278 if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
3279 priv->link_detect.IdleCount = 0;
3280 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
3281 }
3282 } else {
3283 priv->link_detect.IdleCount = 0;
3284 }
3285 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
3286 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
3287 }
3288 }
3289
3290 static u8 read_acadapter_file(char *filename);
3291
3292 void rtl8180_watch_dog(struct net_device *dev)
3293 {
3294 struct r8180_priv *priv = ieee80211_priv(dev);
3295 bool bEnterPS = false;
3296 bool bBusyTraffic = false;
3297 u32 TotalRxNum = 0;
3298 u16 SlotIndex = 0;
3299 u16 i = 0;
3300 if (priv->ieee80211->actscanning == false) {
3301 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn))
3302 IPSEnter(dev);
3303 }
3304 /* YJ,add,080828,for link state check */
3305 if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
3306 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
3307 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
3308 for (i = 0; i < priv->link_detect.SlotNum; i++)
3309 TotalRxNum += priv->link_detect.RxFrameNum[i];
3310
3311 if (TotalRxNum == 0) {
3312 priv->ieee80211->state = IEEE80211_ASSOCIATING;
3313 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
3314 }
3315 }
3316
3317 /* YJ,add,080828,for KeepAlive */
3318 MgntLinkKeepAlive(priv);
3319
3320 /* YJ,add,080828,for LPS */
3321 if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3322 priv->bLeisurePs = true;
3323 else if (priv->PowerProfile == POWER_PROFILE_AC) {
3324 LeisurePSLeave(priv);
3325 priv->bLeisurePs = false;
3326 }
3327
3328 if (priv->ieee80211->state == IEEE80211_LINKED) {
3329 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3330 if (priv->link_detect.NumRxOkInPeriod > 666 ||
3331 priv->link_detect.NumTxOkInPeriod > 666) {
3332 bBusyTraffic = true;
3333 }
3334 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
3335 || (priv->link_detect.NumRxOkInPeriod > 2)) {
3336 bEnterPS = false;
3337 } else
3338 bEnterPS = true;
3339
3340 if (bEnterPS)
3341 LeisurePSEnter(priv);
3342 else
3343 LeisurePSLeave(priv);
3344 } else
3345 LeisurePSLeave(priv);
3346 priv->link_detect.bBusyTraffic = bBusyTraffic;
3347 priv->link_detect.NumRxOkInPeriod = 0;
3348 priv->link_detect.NumTxOkInPeriod = 0;
3349 priv->ieee80211->NumRxDataInPeriod = 0;
3350 priv->ieee80211->NumRxBcnInPeriod = 0;
3351 }
3352
3353 int _rtl8180_up(struct net_device *dev)
3354 {
3355 struct r8180_priv *priv = ieee80211_priv(dev);
3356
3357 priv->up = 1;
3358
3359 DMESG("Bringing up iface");
3360 rtl8185b_adapter_start(dev);
3361 rtl8185b_rx_enable(dev);
3362 rtl8185b_tx_enable(dev);
3363 if (priv->bInactivePs) {
3364 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3365 IPSLeave(dev);
3366 }
3367 timer_rate_adaptive((unsigned long)dev);
3368 watch_dog_adaptive((unsigned long)dev);
3369 if (priv->bSwAntennaDiverity)
3370 SwAntennaDiversityTimerCallback(dev);
3371 ieee80211_softmac_start_protocol(priv->ieee80211);
3372 return 0;
3373 }
3374
3375 int rtl8180_open(struct net_device *dev)
3376 {
3377 struct r8180_priv *priv = ieee80211_priv(dev);
3378 int ret;
3379
3380 down(&priv->wx_sem);
3381 ret = rtl8180_up(dev);
3382 up(&priv->wx_sem);
3383 return ret;
3384 }
3385
3386 int rtl8180_up(struct net_device *dev)
3387 {
3388 struct r8180_priv *priv = ieee80211_priv(dev);
3389
3390 if (priv->up == 1)
3391 return -1;
3392
3393 return _rtl8180_up(dev);
3394 }
3395
3396 int rtl8180_close(struct net_device *dev)
3397 {
3398 struct r8180_priv *priv = ieee80211_priv(dev);
3399 int ret;
3400
3401 down(&priv->wx_sem);
3402 ret = rtl8180_down(dev);
3403 up(&priv->wx_sem);
3404
3405 return ret;
3406 }
3407
3408 int rtl8180_down(struct net_device *dev)
3409 {
3410 struct r8180_priv *priv = ieee80211_priv(dev);
3411
3412 if (priv->up == 0)
3413 return -1;
3414
3415 priv->up = 0;
3416
3417 ieee80211_softmac_stop_protocol(priv->ieee80211);
3418 /* FIXME */
3419 if (!netif_queue_stopped(dev))
3420 netif_stop_queue(dev);
3421 rtl8180_rtx_disable(dev);
3422 rtl8180_irq_disable(dev);
3423 del_timer_sync(&priv->watch_dog_timer);
3424 del_timer_sync(&priv->rateadapter_timer);
3425 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3426 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3427 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3428 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3429 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3430 del_timer_sync(&priv->SwAntennaDiversityTimer);
3431 SetZebraRFPowerState8185(dev, eRfOff);
3432 memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3433 priv->ieee80211->state = IEEE80211_NOLINK;
3434 return 0;
3435 }
3436
3437 void rtl8180_restart_wq(struct work_struct *work)
3438 {
3439 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3440 struct net_device *dev = priv->dev;
3441
3442 down(&priv->wx_sem);
3443
3444 rtl8180_commit(dev);
3445
3446 up(&priv->wx_sem);
3447 }
3448
3449 void rtl8180_restart(struct net_device *dev)
3450 {
3451 struct r8180_priv *priv = ieee80211_priv(dev);
3452
3453 schedule_work(&priv->reset_wq);
3454 }
3455
3456 void rtl8180_commit(struct net_device *dev)
3457 {
3458 struct r8180_priv *priv = ieee80211_priv(dev);
3459
3460 if (priv->up == 0)
3461 return ;
3462
3463 del_timer_sync(&priv->watch_dog_timer);
3464 del_timer_sync(&priv->rateadapter_timer);
3465 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3466 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3467 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3468 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3469 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3470 del_timer_sync(&priv->SwAntennaDiversityTimer);
3471 ieee80211_softmac_stop_protocol(priv->ieee80211);
3472 rtl8180_irq_disable(dev);
3473 rtl8180_rtx_disable(dev);
3474 _rtl8180_up(dev);
3475 }
3476
3477 static void r8180_set_multicast(struct net_device *dev)
3478 {
3479 struct r8180_priv *priv = ieee80211_priv(dev);
3480 short promisc;
3481
3482 promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3483
3484 if (promisc != priv->promisc)
3485 rtl8180_restart(dev);
3486
3487 priv->promisc = promisc;
3488 }
3489
3490 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3491 {
3492 struct r8180_priv *priv = ieee80211_priv(dev);
3493 struct sockaddr *addr = mac;
3494
3495 down(&priv->wx_sem);
3496
3497 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3498
3499 if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3500 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3501
3502 if (priv->up) {
3503 rtl8180_down(dev);
3504 rtl8180_up(dev);
3505 }
3506
3507 up(&priv->wx_sem);
3508
3509 return 0;
3510 }
3511
3512 /* based on ipw2200 driver */
3513 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3514 {
3515 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3516 struct iwreq *wrq = (struct iwreq *) rq;
3517 int ret = -1;
3518
3519 switch (cmd) {
3520 case RTL_IOCTL_WPA_SUPPLICANT:
3521 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3522 return ret;
3523 default:
3524 return -EOPNOTSUPP;
3525 }
3526
3527 return -EOPNOTSUPP;
3528 }
3529
3530 static const struct net_device_ops rtl8180_netdev_ops = {
3531 .ndo_open = rtl8180_open,
3532 .ndo_stop = rtl8180_close,
3533 .ndo_get_stats = rtl8180_stats,
3534 .ndo_tx_timeout = rtl8180_restart,
3535 .ndo_do_ioctl = rtl8180_ioctl,
3536 .ndo_set_multicast_list = r8180_set_multicast,
3537 .ndo_set_mac_address = r8180_set_mac_adr,
3538 .ndo_validate_addr = eth_validate_addr,
3539 .ndo_change_mtu = eth_change_mtu,
3540 .ndo_start_xmit = ieee80211_rtl_xmit,
3541 };
3542
3543 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3544 const struct pci_device_id *id)
3545 {
3546 unsigned long ioaddr = 0;
3547 struct net_device *dev = NULL;
3548 struct r8180_priv *priv = NULL;
3549 u8 unit = 0;
3550 int ret = -ENODEV;
3551
3552 unsigned long pmem_start, pmem_len, pmem_flags;
3553
3554 DMESG("Configuring chip resources");
3555
3556 if (pci_enable_device(pdev)) {
3557 DMESG("Failed to enable PCI device");
3558 return -EIO;
3559 }
3560
3561 pci_set_master(pdev);
3562 pci_set_dma_mask(pdev, 0xffffff00ULL);
3563 pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3564 dev = alloc_ieee80211(sizeof(struct r8180_priv));
3565 if (!dev) {
3566 ret = -ENOMEM;
3567 goto fail_free;
3568 }
3569 priv = ieee80211_priv(dev);
3570 priv->ieee80211 = netdev_priv(dev);
3571
3572 pci_set_drvdata(pdev, dev);
3573 SET_NETDEV_DEV(dev, &pdev->dev);
3574
3575 priv = ieee80211_priv(dev);
3576 priv->pdev = pdev;
3577
3578 pmem_start = pci_resource_start(pdev, 1);
3579 pmem_len = pci_resource_len(pdev, 1);
3580 pmem_flags = pci_resource_flags(pdev, 1);
3581
3582 if (!(pmem_flags & IORESOURCE_MEM)) {
3583 DMESG("region #1 not a MMIO resource, aborting");
3584 goto fail;
3585 }
3586
3587 if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3588 DMESG("request_mem_region failed!");
3589 goto fail;
3590 }
3591
3592 ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3593 if (ioaddr == (unsigned long)NULL) {
3594 DMESG("ioremap failed!");
3595 goto fail1;
3596 }
3597
3598 dev->mem_start = ioaddr; /* shared mem start */
3599 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3600
3601 pci_read_config_byte(pdev, 0x05, &unit);
3602 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3603
3604 dev->irq = pdev->irq;
3605 priv->irq = 0;
3606
3607 dev->netdev_ops = &rtl8180_netdev_ops;
3608 dev->wireless_handlers = &r8180_wx_handlers_def;
3609
3610 dev->type = ARPHRD_ETHER;
3611 dev->watchdog_timeo = HZ*3;
3612
3613 if (dev_alloc_name(dev, ifname) < 0) {
3614 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3615 strcpy(ifname, "wlan%d");
3616 dev_alloc_name(dev, ifname);
3617 }
3618
3619 if (rtl8180_init(dev) != 0) {
3620 DMESG("Initialization failed");
3621 goto fail1;
3622 }
3623
3624 netif_carrier_off(dev);
3625
3626 register_netdev(dev);
3627
3628 rtl8180_proc_init_one(dev);
3629
3630 DMESG("Driver probe completed\n");
3631 return 0;
3632 fail1:
3633 if (dev->mem_start != (unsigned long)NULL) {
3634 iounmap((void *)dev->mem_start);
3635 release_mem_region(pci_resource_start(pdev, 1),
3636 pci_resource_len(pdev, 1));
3637 }
3638 fail:
3639 if (dev) {
3640 if (priv->irq) {
3641 free_irq(dev->irq, dev);
3642 dev->irq = 0;
3643 }
3644 free_ieee80211(dev);
3645 }
3646
3647 fail_free:
3648 pci_disable_device(pdev);
3649
3650 DMESG("wlan driver load failed\n");
3651 pci_set_drvdata(pdev, NULL);
3652 return ret;
3653 }
3654
3655 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3656 {
3657 struct r8180_priv *priv;
3658 struct net_device *dev = pci_get_drvdata(pdev);
3659
3660 if (dev) {
3661 unregister_netdev(dev);
3662
3663 priv = ieee80211_priv(dev);
3664
3665 rtl8180_proc_remove_one(dev);
3666 rtl8180_down(dev);
3667 priv->rf_close(dev);
3668 rtl8180_reset(dev);
3669 mdelay(10);
3670
3671 if (priv->irq) {
3672 DMESG("Freeing irq %d", dev->irq);
3673 free_irq(dev->irq, dev);
3674 priv->irq = 0;
3675 }
3676
3677 free_rx_desc_ring(dev);
3678 free_tx_desc_rings(dev);
3679
3680 if (dev->mem_start != (unsigned long)NULL) {
3681 iounmap((void *)dev->mem_start);
3682 release_mem_region(pci_resource_start(pdev, 1),
3683 pci_resource_len(pdev, 1));
3684 }
3685
3686 free_ieee80211(dev);
3687 }
3688 pci_disable_device(pdev);
3689
3690 DMESG("wlan driver removed\n");
3691 }
3692
3693 /* fun with the built-in ieee80211 stack... */
3694 extern int ieee80211_crypto_init(void);
3695 extern void ieee80211_crypto_deinit(void);
3696 extern int ieee80211_crypto_tkip_init(void);
3697 extern void ieee80211_crypto_tkip_exit(void);
3698 extern int ieee80211_crypto_ccmp_init(void);
3699 extern void ieee80211_crypto_ccmp_exit(void);
3700 extern int ieee80211_crypto_wep_init(void);
3701 extern void ieee80211_crypto_wep_exit(void);
3702
3703 static int __init rtl8180_pci_module_init(void)
3704 {
3705 int ret;
3706
3707 ret = ieee80211_crypto_init();
3708 if (ret) {
3709 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
3710 return ret;
3711 }
3712 ret = ieee80211_crypto_tkip_init();
3713 if (ret) {
3714 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3715 return ret;
3716 }
3717 ret = ieee80211_crypto_ccmp_init();
3718 if (ret) {
3719 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3720 return ret;
3721 }
3722 ret = ieee80211_crypto_wep_init();
3723 if (ret) {
3724 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
3725 return ret;
3726 }
3727
3728 printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3729 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3730 DMESG("Initializing module");
3731 DMESG("Wireless extensions version %d", WIRELESS_EXT);
3732 rtl8180_proc_module_init();
3733
3734 if (pci_register_driver(&rtl8180_pci_driver)) {
3735 DMESG("No device found");
3736 return -ENODEV;
3737 }
3738 return 0;
3739 }
3740
3741 static void __exit rtl8180_pci_module_exit(void)
3742 {
3743 pci_unregister_driver(&rtl8180_pci_driver);
3744 rtl8180_proc_module_remove();
3745 ieee80211_crypto_tkip_exit();
3746 ieee80211_crypto_ccmp_exit();
3747 ieee80211_crypto_wep_exit();
3748 ieee80211_crypto_deinit();
3749 DMESG("Exiting");
3750 }
3751
3752 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3753 {
3754 unsigned long flags;
3755 short enough_desc;
3756 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3757
3758 spin_lock_irqsave(&priv->tx_lock, flags);
3759 enough_desc = check_nic_enought_desc(dev, pri);
3760 spin_unlock_irqrestore(&priv->tx_lock, flags);
3761
3762 if (enough_desc)
3763 ieee80211_rtl_wake_queue(priv->ieee80211);
3764 }
3765
3766 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3767 {
3768 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3769 u32 *tail; /* tail virtual addr */
3770 u32 *head; /* head virtual addr */
3771 u32 *begin; /* start of ring virtual addr */
3772 u32 *nicv; /* nic pointer virtual addr */
3773 u32 nic; /* nic pointer physical addr */
3774 u32 nicbegin; /* start of ring physical addr */
3775 unsigned long flag;
3776 /* physical addr are ok on 32 bits since we set DMA mask */
3777 int offs;
3778 int j, i;
3779 int hd;
3780 if (error)
3781 priv->stats.txretry++; /* tony 20060601 */
3782 spin_lock_irqsave(&priv->tx_lock, flag);
3783 switch (pri) {
3784 case MANAGE_PRIORITY:
3785 tail = priv->txmapringtail;
3786 begin = priv->txmapring;
3787 head = priv->txmapringhead;
3788 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3789 nicbegin = priv->txmapringdma;
3790 break;
3791 case BK_PRIORITY:
3792 tail = priv->txbkpringtail;
3793 begin = priv->txbkpring;
3794 head = priv->txbkpringhead;
3795 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3796 nicbegin = priv->txbkpringdma;
3797 break;
3798 case BE_PRIORITY:
3799 tail = priv->txbepringtail;
3800 begin = priv->txbepring;
3801 head = priv->txbepringhead;
3802 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3803 nicbegin = priv->txbepringdma;
3804 break;
3805 case VI_PRIORITY:
3806 tail = priv->txvipringtail;
3807 begin = priv->txvipring;
3808 head = priv->txvipringhead;
3809 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3810 nicbegin = priv->txvipringdma;
3811 break;
3812 case VO_PRIORITY:
3813 tail = priv->txvopringtail;
3814 begin = priv->txvopring;
3815 head = priv->txvopringhead;
3816 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3817 nicbegin = priv->txvopringdma;
3818 break;
3819 case HI_PRIORITY:
3820 tail = priv->txhpringtail;
3821 begin = priv->txhpring;
3822 head = priv->txhpringhead;
3823 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3824 nicbegin = priv->txhpringdma;
3825 break;
3826
3827 default:
3828 spin_unlock_irqrestore(&priv->tx_lock, flag);
3829 return ;
3830 }
3831
3832 nicv = (u32 *)((nic - nicbegin) + (u8*)begin);
3833 if ((head <= tail && (nicv > tail || nicv < head)) ||
3834 (head > tail && (nicv > tail && nicv < head))) {
3835 DMESGW("nic has lost pointer");
3836 spin_unlock_irqrestore(&priv->tx_lock, flag);
3837 rtl8180_restart(dev);
3838 return;
3839 }
3840
3841 /*
3842 * We check all the descriptors between the head and the nic,
3843 * but not the currently pointed by the nic (the next to be txed)
3844 * and the previous of the pointed (might be in process ??)
3845 */
3846 offs = (nic - nicbegin);
3847 offs = offs / 8 / 4;
3848 hd = (head - begin) / 8;
3849
3850 if (offs >= hd)
3851 j = offs - hd;
3852 else
3853 j = offs + (priv->txringcount-1-hd);
3854
3855 j -= 2;
3856 if (j < 0)
3857 j = 0;
3858
3859 for (i = 0; i < j; i++) {
3860 if ((*head) & (1<<31))
3861 break;
3862 if (((*head)&(0x10000000)) != 0) {
3863 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3864 if (!error)
3865 priv->NumTxOkTotal++;
3866 }
3867
3868 if (!error)
3869 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3870
3871 *head = *head & ~(1<<31);
3872
3873 if ((head - begin)/8 == priv->txringcount-1)
3874 head = begin;
3875 else
3876 head += 8;
3877 }
3878
3879 /*
3880 * The head has been moved to the last certainly TXed
3881 * (or at least processed by the nic) packet.
3882 * The driver take forcefully owning of all these packets
3883 * If the packet previous of the nic pointer has been
3884 * processed this doesn't matter: it will be checked
3885 * here at the next round. Anyway if no more packet are
3886 * TXed no memory leak occur at all.
3887 */
3888
3889 switch (pri) {
3890 case MANAGE_PRIORITY:
3891 priv->txmapringhead = head;
3892
3893 if (priv->ack_tx_to_ieee) {
3894 if (rtl8180_is_tx_queue_empty(dev)) {
3895 priv->ack_tx_to_ieee = 0;
3896 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3897 }
3898 }
3899 break;
3900 case BK_PRIORITY:
3901 priv->txbkpringhead = head;
3902 break;
3903 case BE_PRIORITY:
3904 priv->txbepringhead = head;
3905 break;
3906 case VI_PRIORITY:
3907 priv->txvipringhead = head;
3908 break;
3909 case VO_PRIORITY:
3910 priv->txvopringhead = head;
3911 break;
3912 case HI_PRIORITY:
3913 priv->txhpringhead = head;
3914 break;
3915 }
3916
3917 spin_unlock_irqrestore(&priv->tx_lock, flag);
3918 }
3919
3920 void rtl8180_tx_irq_wq(struct work_struct *work)
3921 {
3922 struct delayed_work *dwork = to_delayed_work(work);
3923 struct ieee80211_device * ieee = (struct ieee80211_device *)
3924 container_of(dwork, struct ieee80211_device, watch_dog_wq);
3925 struct net_device *dev = ieee->dev;
3926
3927 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3928 }
3929 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3930 {
3931 struct net_device *dev = (struct net_device *) netdev;
3932 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3933 unsigned long flags;
3934 u32 inta;
3935
3936 /* We should return IRQ_NONE, but for now let me keep this */
3937 if (priv->irq_enabled == 0)
3938 return IRQ_HANDLED;
3939
3940 spin_lock_irqsave(&priv->irq_th_lock, flags);
3941
3942 /* ISR: 4bytes */
3943 inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3944 write_nic_dword(dev, ISR, inta); /* reset int situation */
3945
3946 priv->stats.shints++;
3947
3948 if (!inta) {
3949 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3950 return IRQ_HANDLED;
3951 /*
3952 * most probably we can safely return IRQ_NONE,
3953 * but for now is better to avoid problems
3954 */
3955 }
3956
3957 if (inta == 0xffff) {
3958 /* HW disappared */
3959 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3960 return IRQ_HANDLED;
3961 }
3962
3963 priv->stats.ints++;
3964
3965 if (!netif_running(dev)) {
3966 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3967 return IRQ_HANDLED;
3968 }
3969
3970 if (inta & ISR_TimeOut)
3971 write_nic_dword(dev, TimerInt, 0);
3972
3973 if (inta & ISR_TBDOK)
3974 priv->stats.txbeacon++;
3975
3976 if (inta & ISR_TBDER)
3977 priv->stats.txbeaconerr++;
3978
3979 if (inta & IMR_TMGDOK)
3980 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3981
3982 if (inta & ISR_THPDER) {
3983 priv->stats.txhperr++;
3984 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3985 priv->ieee80211->stats.tx_errors++;
3986 }
3987
3988 if (inta & ISR_THPDOK) { /* High priority tx ok */
3989 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3990 priv->stats.txhpokint++;
3991 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3992 }
3993
3994 if (inta & ISR_RER)
3995 priv->stats.rxerr++;
3996
3997 if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3998 priv->stats.txbkperr++;
3999 priv->ieee80211->stats.tx_errors++;
4000 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
4001 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4002 }
4003
4004 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
4005 priv->stats.txbeperr++;
4006 priv->ieee80211->stats.tx_errors++;
4007 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
4008 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4009 }
4010 if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
4011 priv->stats.txnperr++;
4012 priv->ieee80211->stats.tx_errors++;
4013 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
4014 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4015 }
4016
4017 if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
4018 priv->stats.txlperr++;
4019 priv->ieee80211->stats.tx_errors++;
4020 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
4021 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4022 }
4023
4024 if (inta & ISR_ROK) {
4025 priv->stats.rxint++;
4026 tasklet_schedule(&priv->irq_rx_tasklet);
4027 }
4028
4029 if (inta & ISR_RQoSOK) {
4030 priv->stats.rxint++;
4031 tasklet_schedule(&priv->irq_rx_tasklet);
4032 }
4033
4034 if (inta & ISR_BcnInt)
4035 rtl8180_prepare_beacon(dev);
4036
4037 if (inta & ISR_RDU) {
4038 DMESGW("No RX descriptor available");
4039 priv->stats.rxrdu++;
4040 tasklet_schedule(&priv->irq_rx_tasklet);
4041 }
4042
4043 if (inta & ISR_RXFOVW) {
4044 priv->stats.rxoverflow++;
4045 tasklet_schedule(&priv->irq_rx_tasklet);
4046 }
4047
4048 if (inta & ISR_TXFOVW)
4049 priv->stats.txoverflow++;
4050
4051 if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
4052 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4053 priv->stats.txnpokint++;
4054 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
4055 }
4056
4057 if (inta & ISR_TLPDOK) { /* Low priority tx ok */
4058 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4059 priv->stats.txlpokint++;
4060 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
4061 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4062 }
4063
4064 if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
4065 priv->stats.txbkpokint++;
4066 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4067 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
4068 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4069 }
4070
4071 if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
4072 priv->stats.txbeperr++;
4073 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4074 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
4075 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4076 }
4077 force_pci_posting(dev);
4078 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4079
4080 return IRQ_HANDLED;
4081 }
4082
4083 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
4084 {
4085 rtl8180_rx(priv->dev);
4086 }
4087
4088 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4089 {
4090 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
4091 struct net_device *dev = ieee->dev;
4092 struct r8180_priv *priv = ieee80211_priv(dev);
4093 u8 btPSR;
4094 u8 btConfig0;
4095 RT_RF_POWER_STATE eRfPowerStateToSet;
4096 bool bActuallySet = false;
4097
4098 char *argv[3];
4099 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4100 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4101 static int readf_count = 0;
4102
4103 if (readf_count % 10 == 0)
4104 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4105
4106 readf_count = (readf_count+1)%0xffff;
4107 /* We should turn off LED before polling FF51[4]. */
4108
4109 /* Turn off LED. */
4110 btPSR = read_nic_byte(dev, PSR);
4111 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
4112
4113 /* It need to delay 4us suggested by Jong, 2008-01-16 */
4114 udelay(4);
4115
4116 /* HW radio On/Off according to the value of FF51[4](config0) */
4117 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
4118
4119 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
4120
4121 /* Turn LED back on when radio enabled */
4122 if (eRfPowerStateToSet == eRfOn)
4123 write_nic_byte(dev, PSR, btPSR | BIT3);
4124
4125 if ((priv->ieee80211->bHwRadioOff == true) &&
4126 (eRfPowerStateToSet == eRfOn)) {
4127 priv->ieee80211->bHwRadioOff = false;
4128 bActuallySet = true;
4129 } else if ((priv->ieee80211->bHwRadioOff == false) &&
4130 (eRfPowerStateToSet == eRfOff)) {
4131 priv->ieee80211->bHwRadioOff = true;
4132 bActuallySet = true;
4133 }
4134
4135 if (bActuallySet) {
4136 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
4137
4138 /* To update the UI status for Power status changed */
4139 if (priv->ieee80211->bHwRadioOff == true)
4140 argv[1] = "RFOFF";
4141 else
4142 argv[1] = "RFON";
4143 argv[0] = RadioPowerPath;
4144 argv[2] = NULL;
4145
4146 call_usermodehelper(RadioPowerPath, argv, envp, 1);
4147 }
4148 }
4149
4150 static u8 read_acadapter_file(char *filename)
4151 {
4152 return 0;
4153 }
4154
4155 module_init(rtl8180_pci_module_init);
4156 module_exit(rtl8180_pci_module_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree