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sh-sci: ioremap() in a single place
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / serial / sh-sci.c
blob408624ae7fecb2ffd6209219813161c5f79143b8
1 /*
2 * drivers/serial/sh-sci.c
3 *
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 *
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
8 *
9 * based off of the old drivers/char/sh-sci.c by:
10 *
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
17 *
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
20 * for more details.
21 */
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #define SUPPORT_SYSRQ
24 #endif
25
26 #undef DEBUG
27
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
39 #include <linux/mm.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
51
52 #ifdef CONFIG_SUPERH
53 #include <asm/clock.h>
54 #include <asm/sh_bios.h>
55 #endif
56
57 #include "sh-sci.h"
58
59 struct sci_port {
60 struct uart_port port;
61
62 /* Port type */
63 unsigned int type;
64
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs[SCIx_NR_IRQS];
67
68 /* Port enable callback */
69 void (*enable)(struct uart_port *port);
70
71 /* Port disable callback */
72 void (*disable)(struct uart_port *port);
73
74 /* Break timer */
75 struct timer_list break_timer;
76 int break_flag;
77
78 #ifdef CONFIG_HAVE_CLK
79 /* Port clock */
80 struct clk *clk;
81 #endif
82 struct list_head node;
83 };
84
85 struct sh_sci_priv {
86 spinlock_t lock;
87 struct list_head ports;
88
89 #ifdef CONFIG_HAVE_CLK
90 struct notifier_block clk_nb;
91 #endif
92 };
93
94 /* Function prototypes */
95 static void sci_stop_tx(struct uart_port *port);
96
97 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
98
99 static struct sci_port sci_ports[SCI_NPORTS];
100 static struct uart_driver sci_uart_driver;
101
102 static inline struct sci_port *
103 to_sci_port(struct uart_port *uart)
104 {
105 return container_of(uart, struct sci_port, port);
106 }
107
108 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
109
110 #ifdef CONFIG_CONSOLE_POLL
111 static inline void handle_error(struct uart_port *port)
112 {
113 /* Clear error flags */
114 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
115 }
116
117 static int sci_poll_get_char(struct uart_port *port)
118 {
119 unsigned short status;
120 int c;
121
122 do {
123 status = sci_in(port, SCxSR);
124 if (status & SCxSR_ERRORS(port)) {
125 handle_error(port);
126 continue;
127 }
128 } while (!(status & SCxSR_RDxF(port)));
129
130 c = sci_in(port, SCxRDR);
131
132 /* Dummy read */
133 sci_in(port, SCxSR);
134 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
135
136 return c;
137 }
138 #endif
139
140 static void sci_poll_put_char(struct uart_port *port, unsigned char c)
141 {
142 unsigned short status;
143
144 do {
145 status = sci_in(port, SCxSR);
146 } while (!(status & SCxSR_TDxE(port)));
147
148 sci_in(port, SCxSR); /* Dummy read */
149 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
150 sci_out(port, SCxTDR, c);
151 }
152 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
153
154 #if defined(__H8300S__)
155 enum { sci_disable, sci_enable };
156
157 static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
158 {
159 volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
160 int ch = (port->mapbase - SMR0) >> 3;
161 unsigned char mask = 1 << (ch+1);
162
163 if (ctrl == sci_disable)
164 *mstpcrl |= mask;
165 else
166 *mstpcrl &= ~mask;
167 }
168
169 static inline void h8300_sci_enable(struct uart_port *port)
170 {
171 h8300_sci_config(port, sci_enable);
172 }
173
174 static inline void h8300_sci_disable(struct uart_port *port)
175 {
176 h8300_sci_config(port, sci_disable);
177 }
178 #endif
179
180 #if defined(__H8300H__) || defined(__H8300S__)
181 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
182 {
183 int ch = (port->mapbase - SMR0) >> 3;
184
185 /* set DDR regs */
186 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
187 h8300_sci_pins[ch].rx,
188 H8300_GPIO_INPUT);
189 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
190 h8300_sci_pins[ch].tx,
191 H8300_GPIO_OUTPUT);
192
193 /* tx mark output*/
194 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
195 }
196 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
197 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
198 {
199 if (port->mapbase == 0xA4400000) {
200 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
201 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
202 } else if (port->mapbase == 0xA4410000)
203 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
204 }
205 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
206 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
207 {
208 unsigned short data;
209
210 if (cflag & CRTSCTS) {
211 /* enable RTS/CTS */
212 if (port->mapbase == 0xa4430000) { /* SCIF0 */
213 /* Clear PTCR bit 9-2; enable all scif pins but sck */
214 data = __raw_readw(PORT_PTCR);
215 __raw_writew((data & 0xfc03), PORT_PTCR);
216 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
217 /* Clear PVCR bit 9-2 */
218 data = __raw_readw(PORT_PVCR);
219 __raw_writew((data & 0xfc03), PORT_PVCR);
220 }
221 } else {
222 if (port->mapbase == 0xa4430000) { /* SCIF0 */
223 /* Clear PTCR bit 5-2; enable only tx and rx */
224 data = __raw_readw(PORT_PTCR);
225 __raw_writew((data & 0xffc3), PORT_PTCR);
226 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
227 /* Clear PVCR bit 5-2 */
228 data = __raw_readw(PORT_PVCR);
229 __raw_writew((data & 0xffc3), PORT_PVCR);
230 }
231 }
232 }
233 #elif defined(CONFIG_CPU_SH3)
234 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
235 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
236 {
237 unsigned short data;
238
239 /* We need to set SCPCR to enable RTS/CTS */
240 data = __raw_readw(SCPCR);
241 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
242 __raw_writew(data & 0x0fcf, SCPCR);
243
244 if (!(cflag & CRTSCTS)) {
245 /* We need to set SCPCR to enable RTS/CTS */
246 data = __raw_readw(SCPCR);
247 /* Clear out SCP7MD1,0, SCP4MD1,0,
248 Set SCP6MD1,0 = {01} (output) */
249 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
250
251 data = ctrl_inb(SCPDR);
252 /* Set /RTS2 (bit6) = 0 */
253 ctrl_outb(data & 0xbf, SCPDR);
254 }
255 }
256 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
257 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
258 {
259 unsigned short data;
260
261 if (port->mapbase == 0xffe00000) {
262 data = __raw_readw(PSCR);
263 data &= ~0x03cf;
264 if (!(cflag & CRTSCTS))
265 data |= 0x0340;
266
267 __raw_writew(data, PSCR);
268 }
269 }
270 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
271 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
272 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
273 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
274 defined(CONFIG_CPU_SUBTYPE_SHX3)
275 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
276 {
277 if (!(cflag & CRTSCTS))
278 __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
279 }
280 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
281 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
282 {
283 if (!(cflag & CRTSCTS))
284 __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
285 }
286 #else
287 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
288 {
289 /* Nothing to do */
290 }
291 #endif
292
293 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
294 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
295 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
296 defined(CONFIG_CPU_SUBTYPE_SH7786)
297 static inline int scif_txroom(struct uart_port *port)
298 {
299 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
300 }
301
302 static inline int scif_rxroom(struct uart_port *port)
303 {
304 return sci_in(port, SCRFDR) & 0xff;
305 }
306 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
307 static inline int scif_txroom(struct uart_port *port)
308 {
309 if ((port->mapbase == 0xffe00000) ||
310 (port->mapbase == 0xffe08000)) {
311 /* SCIF0/1*/
312 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
313 } else {
314 /* SCIF2 */
315 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
316 }
317 }
318
319 static inline int scif_rxroom(struct uart_port *port)
320 {
321 if ((port->mapbase == 0xffe00000) ||
322 (port->mapbase == 0xffe08000)) {
323 /* SCIF0/1*/
324 return sci_in(port, SCRFDR) & 0xff;
325 } else {
326 /* SCIF2 */
327 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
328 }
329 }
330 #else
331 static inline int scif_txroom(struct uart_port *port)
332 {
333 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
334 }
335
336 static inline int scif_rxroom(struct uart_port *port)
337 {
338 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
339 }
340 #endif
341
342 static inline int sci_txroom(struct uart_port *port)
343 {
344 return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
345 }
346
347 static inline int sci_rxroom(struct uart_port *port)
348 {
349 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
350 }
351
352 /* ********************************************************************** *
353 * the interrupt related routines *
354 * ********************************************************************** */
355
356 static void sci_transmit_chars(struct uart_port *port)
357 {
358 struct circ_buf *xmit = &port->info->xmit;
359 unsigned int stopped = uart_tx_stopped(port);
360 unsigned short status;
361 unsigned short ctrl;
362 int count;
363
364 status = sci_in(port, SCxSR);
365 if (!(status & SCxSR_TDxE(port))) {
366 ctrl = sci_in(port, SCSCR);
367 if (uart_circ_empty(xmit))
368 ctrl &= ~SCI_CTRL_FLAGS_TIE;
369 else
370 ctrl |= SCI_CTRL_FLAGS_TIE;
371 sci_out(port, SCSCR, ctrl);
372 return;
373 }
374
375 if (port->type == PORT_SCI)
376 count = sci_txroom(port);
377 else
378 count = scif_txroom(port);
379
380 do {
381 unsigned char c;
382
383 if (port->x_char) {
384 c = port->x_char;
385 port->x_char = 0;
386 } else if (!uart_circ_empty(xmit) && !stopped) {
387 c = xmit->buf[xmit->tail];
388 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
389 } else {
390 break;
391 }
392
393 sci_out(port, SCxTDR, c);
394
395 port->icount.tx++;
396 } while (--count > 0);
397
398 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
399
400 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
401 uart_write_wakeup(port);
402 if (uart_circ_empty(xmit)) {
403 sci_stop_tx(port);
404 } else {
405 ctrl = sci_in(port, SCSCR);
406
407 if (port->type != PORT_SCI) {
408 sci_in(port, SCxSR); /* Dummy read */
409 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
410 }
411
412 ctrl |= SCI_CTRL_FLAGS_TIE;
413 sci_out(port, SCSCR, ctrl);
414 }
415 }
416
417 /* On SH3, SCIF may read end-of-break as a space->mark char */
418 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
419
420 static inline void sci_receive_chars(struct uart_port *port)
421 {
422 struct sci_port *sci_port = to_sci_port(port);
423 struct tty_struct *tty = port->info->port.tty;
424 int i, count, copied = 0;
425 unsigned short status;
426 unsigned char flag;
427
428 status = sci_in(port, SCxSR);
429 if (!(status & SCxSR_RDxF(port)))
430 return;
431
432 while (1) {
433 if (port->type == PORT_SCI)
434 count = sci_rxroom(port);
435 else
436 count = scif_rxroom(port);
437
438 /* Don't copy more bytes than there is room for in the buffer */
439 count = tty_buffer_request_room(tty, count);
440
441 /* If for any reason we can't copy more data, we're done! */
442 if (count == 0)
443 break;
444
445 if (port->type == PORT_SCI) {
446 char c = sci_in(port, SCxRDR);
447 if (uart_handle_sysrq_char(port, c) ||
448 sci_port->break_flag)
449 count = 0;
450 else
451 tty_insert_flip_char(tty, c, TTY_NORMAL);
452 } else {
453 for (i = 0; i < count; i++) {
454 char c = sci_in(port, SCxRDR);
455 status = sci_in(port, SCxSR);
456 #if defined(CONFIG_CPU_SH3)
457 /* Skip "chars" during break */
458 if (sci_port->break_flag) {
459 if ((c == 0) &&
460 (status & SCxSR_FER(port))) {
461 count--; i--;
462 continue;
463 }
464
465 /* Nonzero => end-of-break */
466 dev_dbg(port->dev, "debounce<%02x>\n", c);
467 sci_port->break_flag = 0;
468
469 if (STEPFN(c)) {
470 count--; i--;
471 continue;
472 }
473 }
474 #endif /* CONFIG_CPU_SH3 */
475 if (uart_handle_sysrq_char(port, c)) {
476 count--; i--;
477 continue;
478 }
479
480 /* Store data and status */
481 if (status&SCxSR_FER(port)) {
482 flag = TTY_FRAME;
483 dev_notice(port->dev, "frame error\n");
484 } else if (status&SCxSR_PER(port)) {
485 flag = TTY_PARITY;
486 dev_notice(port->dev, "parity error\n");
487 } else
488 flag = TTY_NORMAL;
489
490 tty_insert_flip_char(tty, c, flag);
491 }
492 }
493
494 sci_in(port, SCxSR); /* dummy read */
495 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
496
497 copied += count;
498 port->icount.rx += count;
499 }
500
501 if (copied) {
502 /* Tell the rest of the system the news. New characters! */
503 tty_flip_buffer_push(tty);
504 } else {
505 sci_in(port, SCxSR); /* dummy read */
506 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
507 }
508 }
509
510 #define SCI_BREAK_JIFFIES (HZ/20)
511 /* The sci generates interrupts during the break,
512 * 1 per millisecond or so during the break period, for 9600 baud.
513 * So dont bother disabling interrupts.
514 * But dont want more than 1 break event.
515 * Use a kernel timer to periodically poll the rx line until
516 * the break is finished.
517 */
518 static void sci_schedule_break_timer(struct sci_port *port)
519 {
520 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
521 add_timer(&port->break_timer);
522 }
523 /* Ensure that two consecutive samples find the break over. */
524 static void sci_break_timer(unsigned long data)
525 {
526 struct sci_port *port = (struct sci_port *)data;
527
528 if (sci_rxd_in(&port->port) == 0) {
529 port->break_flag = 1;
530 sci_schedule_break_timer(port);
531 } else if (port->break_flag == 1) {
532 /* break is over. */
533 port->break_flag = 2;
534 sci_schedule_break_timer(port);
535 } else
536 port->break_flag = 0;
537 }
538
539 static inline int sci_handle_errors(struct uart_port *port)
540 {
541 int copied = 0;
542 unsigned short status = sci_in(port, SCxSR);
543 struct tty_struct *tty = port->info->port.tty;
544
545 if (status & SCxSR_ORER(port)) {
546 /* overrun error */
547 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
548 copied++;
549
550 dev_notice(port->dev, "overrun error");
551 }
552
553 if (status & SCxSR_FER(port)) {
554 if (sci_rxd_in(port) == 0) {
555 /* Notify of BREAK */
556 struct sci_port *sci_port = to_sci_port(port);
557
558 if (!sci_port->break_flag) {
559 sci_port->break_flag = 1;
560 sci_schedule_break_timer(sci_port);
561
562 /* Do sysrq handling. */
563 if (uart_handle_break(port))
564 return 0;
565
566 dev_dbg(port->dev, "BREAK detected\n");
567
568 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
569 copied++;
570 }
571
572 } else {
573 /* frame error */
574 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
575 copied++;
576
577 dev_notice(port->dev, "frame error\n");
578 }
579 }
580
581 if (status & SCxSR_PER(port)) {
582 /* parity error */
583 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
584 copied++;
585
586 dev_notice(port->dev, "parity error");
587 }
588
589 if (copied)
590 tty_flip_buffer_push(tty);
591
592 return copied;
593 }
594
595 static inline int sci_handle_fifo_overrun(struct uart_port *port)
596 {
597 struct tty_struct *tty = port->info->port.tty;
598 int copied = 0;
599
600 if (port->type != PORT_SCIF)
601 return 0;
602
603 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
604 sci_out(port, SCLSR, 0);
605
606 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
607 tty_flip_buffer_push(tty);
608
609 dev_notice(port->dev, "overrun error\n");
610 copied++;
611 }
612
613 return copied;
614 }
615
616 static inline int sci_handle_breaks(struct uart_port *port)
617 {
618 int copied = 0;
619 unsigned short status = sci_in(port, SCxSR);
620 struct tty_struct *tty = port->info->port.tty;
621 struct sci_port *s = to_sci_port(port);
622
623 if (uart_handle_break(port))
624 return 0;
625
626 if (!s->break_flag && status & SCxSR_BRK(port)) {
627 #if defined(CONFIG_CPU_SH3)
628 /* Debounce break */
629 s->break_flag = 1;
630 #endif
631 /* Notify of BREAK */
632 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
633 copied++;
634
635 dev_dbg(port->dev, "BREAK detected\n");
636 }
637
638 if (copied)
639 tty_flip_buffer_push(tty);
640
641 copied += sci_handle_fifo_overrun(port);
642
643 return copied;
644 }
645
646 static irqreturn_t sci_rx_interrupt(int irq, void *port)
647 {
648 /* I think sci_receive_chars has to be called irrespective
649 * of whether the I_IXOFF is set, otherwise, how is the interrupt
650 * to be disabled?
651 */
652 sci_receive_chars(port);
653
654 return IRQ_HANDLED;
655 }
656
657 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
658 {
659 struct uart_port *port = ptr;
660
661 spin_lock_irq(&port->lock);
662 sci_transmit_chars(port);
663 spin_unlock_irq(&port->lock);
664
665 return IRQ_HANDLED;
666 }
667
668 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
669 {
670 struct uart_port *port = ptr;
671
672 /* Handle errors */
673 if (port->type == PORT_SCI) {
674 if (sci_handle_errors(port)) {
675 /* discard character in rx buffer */
676 sci_in(port, SCxSR);
677 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
678 }
679 } else {
680 sci_handle_fifo_overrun(port);
681 sci_rx_interrupt(irq, ptr);
682 }
683
684 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
685
686 /* Kick the transmission */
687 sci_tx_interrupt(irq, ptr);
688
689 return IRQ_HANDLED;
690 }
691
692 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
693 {
694 struct uart_port *port = ptr;
695
696 /* Handle BREAKs */
697 sci_handle_breaks(port);
698 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
699
700 return IRQ_HANDLED;
701 }
702
703 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
704 {
705 unsigned short ssr_status, scr_status;
706 struct uart_port *port = ptr;
707 irqreturn_t ret = IRQ_NONE;
708
709 ssr_status = sci_in(port, SCxSR);
710 scr_status = sci_in(port, SCSCR);
711
712 /* Tx Interrupt */
713 if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE))
714 ret = sci_tx_interrupt(irq, ptr);
715 /* Rx Interrupt */
716 if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE))
717 ret = sci_rx_interrupt(irq, ptr);
718 /* Error Interrupt */
719 if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE))
720 ret = sci_er_interrupt(irq, ptr);
721 /* Break Interrupt */
722 if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE))
723 ret = sci_br_interrupt(irq, ptr);
724
725 return ret;
726 }
727
728 #ifdef CONFIG_HAVE_CLK
729 /*
730 * Here we define a transistion notifier so that we can update all of our
731 * ports' baud rate when the peripheral clock changes.
732 */
733 static int sci_notifier(struct notifier_block *self,
734 unsigned long phase, void *p)
735 {
736 struct sh_sci_priv *priv = container_of(self,
737 struct sh_sci_priv, clk_nb);
738 struct sci_port *sci_port;
739 unsigned long flags;
740
741 if ((phase == CPUFREQ_POSTCHANGE) ||
742 (phase == CPUFREQ_RESUMECHANGE)) {
743 spin_lock_irqsave(&priv->lock, flags);
744 list_for_each_entry(sci_port, &priv->ports, node)
745 sci_port->port.uartclk = clk_get_rate(sci_port->clk);
746
747 spin_unlock_irqrestore(&priv->lock, flags);
748 }
749
750 return NOTIFY_OK;
751 }
752 #endif
753
754 static int sci_request_irq(struct sci_port *port)
755 {
756 int i;
757 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
758 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
759 sci_br_interrupt,
760 };
761 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
762 "SCI Transmit Data Empty", "SCI Break" };
763
764 if (port->irqs[0] == port->irqs[1]) {
765 if (unlikely(!port->irqs[0]))
766 return -ENODEV;
767
768 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
769 IRQF_DISABLED, "sci", port)) {
770 dev_err(port->port.dev, "Can't allocate IRQ\n");
771 return -ENODEV;
772 }
773 } else {
774 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
775 if (unlikely(!port->irqs[i]))
776 continue;
777
778 if (request_irq(port->irqs[i], handlers[i],
779 IRQF_DISABLED, desc[i], port)) {
780 dev_err(port->port.dev, "Can't allocate IRQ\n");
781 return -ENODEV;
782 }
783 }
784 }
785
786 return 0;
787 }
788
789 static void sci_free_irq(struct sci_port *port)
790 {
791 int i;
792
793 if (port->irqs[0] == port->irqs[1])
794 free_irq(port->irqs[0], port);
795 else {
796 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
797 if (!port->irqs[i])
798 continue;
799
800 free_irq(port->irqs[i], port);
801 }
802 }
803 }
804
805 static unsigned int sci_tx_empty(struct uart_port *port)
806 {
807 /* Can't detect */
808 return TIOCSER_TEMT;
809 }
810
811 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
812 {
813 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
814 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
815 /* If you have signals for DTR and DCD, please implement here. */
816 }
817
818 static unsigned int sci_get_mctrl(struct uart_port *port)
819 {
820 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
821 and CTS/RTS */
822
823 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
824 }
825
826 static void sci_start_tx(struct uart_port *port)
827 {
828 unsigned short ctrl;
829
830 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
831 ctrl = sci_in(port, SCSCR);
832 ctrl |= SCI_CTRL_FLAGS_TIE;
833 sci_out(port, SCSCR, ctrl);
834 }
835
836 static void sci_stop_tx(struct uart_port *port)
837 {
838 unsigned short ctrl;
839
840 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
841 ctrl = sci_in(port, SCSCR);
842 ctrl &= ~SCI_CTRL_FLAGS_TIE;
843 sci_out(port, SCSCR, ctrl);
844 }
845
846 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
847 {
848 unsigned short ctrl;
849
850 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
851 ctrl = sci_in(port, SCSCR);
852 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
853 sci_out(port, SCSCR, ctrl);
854 }
855
856 static void sci_stop_rx(struct uart_port *port)
857 {
858 unsigned short ctrl;
859
860 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
861 ctrl = sci_in(port, SCSCR);
862 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
863 sci_out(port, SCSCR, ctrl);
864 }
865
866 static void sci_enable_ms(struct uart_port *port)
867 {
868 /* Nothing here yet .. */
869 }
870
871 static void sci_break_ctl(struct uart_port *port, int break_state)
872 {
873 /* Nothing here yet .. */
874 }
875
876 static int sci_startup(struct uart_port *port)
877 {
878 struct sci_port *s = to_sci_port(port);
879
880 if (s->enable)
881 s->enable(port);
882
883 #ifdef CONFIG_HAVE_CLK
884 s->clk = clk_get(NULL, "module_clk");
885 #endif
886
887 sci_request_irq(s);
888 sci_start_tx(port);
889 sci_start_rx(port, 1);
890
891 return 0;
892 }
893
894 static void sci_shutdown(struct uart_port *port)
895 {
896 struct sci_port *s = to_sci_port(port);
897
898 sci_stop_rx(port);
899 sci_stop_tx(port);
900 sci_free_irq(s);
901
902 if (s->disable)
903 s->disable(port);
904
905 #ifdef CONFIG_HAVE_CLK
906 clk_put(s->clk);
907 s->clk = NULL;
908 #endif
909 }
910
911 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
912 struct ktermios *old)
913 {
914 unsigned int status, baud, smr_val;
915 int t = -1;
916
917 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
918 if (likely(baud))
919 t = SCBRR_VALUE(baud, port->uartclk);
920
921 do {
922 status = sci_in(port, SCxSR);
923 } while (!(status & SCxSR_TEND(port)));
924
925 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
926
927 if (port->type != PORT_SCI)
928 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
929
930 smr_val = sci_in(port, SCSMR) & 3;
931 if ((termios->c_cflag & CSIZE) == CS7)
932 smr_val |= 0x40;
933 if (termios->c_cflag & PARENB)
934 smr_val |= 0x20;
935 if (termios->c_cflag & PARODD)
936 smr_val |= 0x30;
937 if (termios->c_cflag & CSTOPB)
938 smr_val |= 0x08;
939
940 uart_update_timeout(port, termios->c_cflag, baud);
941
942 sci_out(port, SCSMR, smr_val);
943
944 if (t > 0) {
945 if (t >= 256) {
946 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
947 t >>= 2;
948 } else
949 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
950
951 sci_out(port, SCBRR, t);
952 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
953 }
954
955 sci_init_pins(port, termios->c_cflag);
956 sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
957
958 sci_out(port, SCSCR, SCSCR_INIT(port));
959
960 if ((termios->c_cflag & CREAD) != 0)
961 sci_start_rx(port, 0);
962 }
963
964 static const char *sci_type(struct uart_port *port)
965 {
966 switch (port->type) {
967 case PORT_IRDA:
968 return "irda";
969 case PORT_SCI:
970 return "sci";
971 case PORT_SCIF:
972 return "scif";
973 case PORT_SCIFA:
974 return "scifa";
975 }
976
977 return NULL;
978 }
979
980 static void sci_release_port(struct uart_port *port)
981 {
982 /* Nothing here yet .. */
983 }
984
985 static int sci_request_port(struct uart_port *port)
986 {
987 /* Nothing here yet .. */
988 return 0;
989 }
990
991 static void sci_config_port(struct uart_port *port, int flags)
992 {
993 struct sci_port *s = to_sci_port(port);
994
995 port->type = s->type;
996
997 if (port->membase)
998 return;
999
1000 if (port->flags & UPF_IOREMAP) {
1001 port->membase = ioremap_nocache(port->mapbase, 0x40);
1002
1003 if (IS_ERR(port->membase))
1004 dev_err(port->dev, "can't remap port#%d\n", port->line);
1005 } else {
1006 /*
1007 * For the simple (and majority of) cases where we don't
1008 * need to do any remapping, just cast the cookie
1009 * directly.
1010 */
1011 port->membase = (void __iomem *)port->mapbase;
1012 }
1013 }
1014
1015 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1016 {
1017 struct sci_port *s = to_sci_port(port);
1018
1019 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1020 return -EINVAL;
1021 if (ser->baud_base < 2400)
1022 /* No paper tape reader for Mitch.. */
1023 return -EINVAL;
1024
1025 return 0;
1026 }
1027
1028 static struct uart_ops sci_uart_ops = {
1029 .tx_empty = sci_tx_empty,
1030 .set_mctrl = sci_set_mctrl,
1031 .get_mctrl = sci_get_mctrl,
1032 .start_tx = sci_start_tx,
1033 .stop_tx = sci_stop_tx,
1034 .stop_rx = sci_stop_rx,
1035 .enable_ms = sci_enable_ms,
1036 .break_ctl = sci_break_ctl,
1037 .startup = sci_startup,
1038 .shutdown = sci_shutdown,
1039 .set_termios = sci_set_termios,
1040 .type = sci_type,
1041 .release_port = sci_release_port,
1042 .request_port = sci_request_port,
1043 .config_port = sci_config_port,
1044 .verify_port = sci_verify_port,
1045 #ifdef CONFIG_CONSOLE_POLL
1046 .poll_get_char = sci_poll_get_char,
1047 .poll_put_char = sci_poll_put_char,
1048 #endif
1049 };
1050
1051 static void __devinit sci_init_single(struct sci_port *sci_port,
1052 unsigned int index,
1053 struct plat_sci_port *p)
1054 {
1055 sci_port->port.ops = &sci_uart_ops;
1056 sci_port->port.iotype = UPIO_MEM;
1057 sci_port->port.line = index;
1058 sci_port->port.fifosize = 1;
1059
1060 #if defined(__H8300H__) || defined(__H8300S__)
1061 #ifdef __H8300S__
1062 sci_port->enable = h8300_sci_enable;
1063 sci_port->disable = h8300_sci_disable;
1064 #endif
1065 sci_port->port.uartclk = CONFIG_CPU_CLOCK;
1066 #elif defined(CONFIG_HAVE_CLK)
1067 /*
1068 * XXX: We should use a proper SCI/SCIF clock
1069 */
1070 {
1071 struct clk *clk = clk_get(NULL, "module_clk");
1072 sci_port->port.uartclk = clk_get_rate(clk);
1073 clk_put(clk);
1074 }
1075 #else
1076 #error "Need a valid uartclk"
1077 #endif
1078
1079 sci_port->break_timer.data = (unsigned long)sci_port;
1080 sci_port->break_timer.function = sci_break_timer;
1081 init_timer(&sci_port->break_timer);
1082
1083 sci_port->port.mapbase = p->mapbase;
1084 sci_port->port.membase = p->membase;
1085
1086 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
1087 sci_port->port.flags = p->flags;
1088 sci_port->type = sci_port->port.type = p->type;
1089
1090 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1091 }
1092
1093 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1094 static struct tty_driver *serial_console_device(struct console *co, int *index)
1095 {
1096 struct uart_driver *p = &sci_uart_driver;
1097 *index = co->index;
1098 return p->tty_driver;
1099 }
1100
1101 static void serial_console_putchar(struct uart_port *port, int ch)
1102 {
1103 sci_poll_put_char(port, ch);
1104 }
1105
1106 /*
1107 * Print a string to the serial port trying not to disturb
1108 * any possible real use of the port...
1109 */
1110 static void serial_console_write(struct console *co, const char *s,
1111 unsigned count)
1112 {
1113 struct uart_port *port = co->data;
1114 unsigned short bits;
1115
1116 uart_console_write(co->data, s, count, serial_console_putchar);
1117
1118 /* wait until fifo is empty and last bit has been transmitted */
1119 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1120 while ((sci_in(port, SCxSR) & bits) != bits)
1121 cpu_relax();
1122 }
1123
1124 static int __init serial_console_setup(struct console *co, char *options)
1125 {
1126 struct sci_port *sci_port;
1127 struct uart_port *port;
1128 int baud = 115200;
1129 int bits = 8;
1130 int parity = 'n';
1131 int flow = 'n';
1132 int ret;
1133
1134 /*
1135 * Check whether an invalid uart number has been specified, and
1136 * if so, search for the first available port that does have
1137 * console support.
1138 */
1139 if (co->index >= SCI_NPORTS)
1140 co->index = 0;
1141
1142 sci_port = &sci_ports[co->index];
1143 port = &sci_port->port;
1144 co->data = port;
1145
1146 /*
1147 * Also need to check port->type, we don't actually have any
1148 * UPIO_PORT ports, but uart_report_port() handily misreports
1149 * it anyways if we don't have a port available by the time this is
1150 * called.
1151 */
1152 if (!port->type)
1153 return -ENODEV;
1154
1155 #ifdef CONFIG_HAVE_CLK
1156 if (!sci_port->clk)
1157 sci_port->clk = clk_get(NULL, "module_clk");
1158 #endif
1159
1160 sci_config_port(port, 0);
1161
1162 if (sci_port->enable)
1163 sci_port->enable(port);
1164
1165 if (options)
1166 uart_parse_options(options, &baud, &parity, &bits, &flow);
1167
1168 ret = uart_set_options(port, co, baud, parity, bits, flow);
1169 #if defined(__H8300H__) || defined(__H8300S__)
1170 /* disable rx interrupt */
1171 if (ret == 0)
1172 sci_stop_rx(port);
1173 #endif
1174 return ret;
1175 }
1176
1177 static struct console serial_console = {
1178 .name = "ttySC",
1179 .device = serial_console_device,
1180 .write = serial_console_write,
1181 .setup = serial_console_setup,
1182 .flags = CON_PRINTBUFFER,
1183 .index = -1,
1184 };
1185
1186 static int __init sci_console_init(void)
1187 {
1188 register_console(&serial_console);
1189 return 0;
1190 }
1191 console_initcall(sci_console_init);
1192 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1193
1194 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1195 #define SCI_CONSOLE (&serial_console)
1196 #else
1197 #define SCI_CONSOLE 0
1198 #endif
1199
1200 static char banner[] __initdata =
1201 KERN_INFO "SuperH SCI(F) driver initialized\n";
1202
1203 static struct uart_driver sci_uart_driver = {
1204 .owner = THIS_MODULE,
1205 .driver_name = "sci",
1206 .dev_name = "ttySC",
1207 .major = SCI_MAJOR,
1208 .minor = SCI_MINOR_START,
1209 .nr = SCI_NPORTS,
1210 .cons = SCI_CONSOLE,
1211 };
1212
1213
1214 static int __devexit sci_remove(struct platform_device *dev)
1215 {
1216 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1217 struct sci_port *p;
1218 unsigned long flags;
1219
1220 #ifdef CONFIG_HAVE_CLK
1221 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1222 #endif
1223
1224 spin_lock_irqsave(&priv->lock, flags);
1225 list_for_each_entry(p, &priv->ports, node)
1226 uart_remove_one_port(&sci_uart_driver, &p->port);
1227
1228 spin_unlock_irqrestore(&priv->lock, flags);
1229
1230 kfree(priv);
1231 return 0;
1232 }
1233
1234 static int __devinit sci_probe_single(struct platform_device *dev,
1235 unsigned int index,
1236 struct plat_sci_port *p,
1237 struct sci_port *sciport)
1238 {
1239 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1240 unsigned long flags;
1241 int ret;
1242
1243 /* Sanity check */
1244 if (unlikely(index >= SCI_NPORTS)) {
1245 dev_notice(&dev->dev, "Attempting to register port "
1246 "%d when only %d are available.\n",
1247 index+1, SCI_NPORTS);
1248 dev_notice(&dev->dev, "Consider bumping "
1249 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1250 return 0;
1251 }
1252
1253 sciport->port.dev = &dev->dev;
1254 sci_init_single(sciport, index, p);
1255
1256 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1257 if (ret)
1258 return ret;
1259
1260 INIT_LIST_HEAD(&sciport->node);
1261
1262 spin_lock_irqsave(&priv->lock, flags);
1263 list_add(&sciport->node, &priv->ports);
1264 spin_unlock_irqrestore(&priv->lock, flags);
1265
1266 return 0;
1267 }
1268
1269 /*
1270 * Register a set of serial devices attached to a platform device. The
1271 * list is terminated with a zero flags entry, which means we expect
1272 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1273 * remapping (such as sh64) should also set UPF_IOREMAP.
1274 */
1275 static int __devinit sci_probe(struct platform_device *dev)
1276 {
1277 struct plat_sci_port *p = dev->dev.platform_data;
1278 struct sh_sci_priv *priv;
1279 int i, ret = -EINVAL;
1280
1281 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1282 if (!priv)
1283 return -ENOMEM;
1284
1285 INIT_LIST_HEAD(&priv->ports);
1286 spin_lock_init(&priv->lock);
1287 platform_set_drvdata(dev, priv);
1288
1289 #ifdef CONFIG_HAVE_CLK
1290 priv->clk_nb.notifier_call = sci_notifier;
1291 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1292 #endif
1293
1294 if (dev->id != -1) {
1295 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1296 if (ret)
1297 goto err_unreg;
1298 } else {
1299 for (i = 0; p && p->flags != 0; p++, i++) {
1300 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1301 if (ret)
1302 goto err_unreg;
1303 }
1304 }
1305
1306 #ifdef CONFIG_SH_STANDARD_BIOS
1307 sh_bios_gdb_detach();
1308 #endif
1309
1310 return 0;
1311
1312 err_unreg:
1313 sci_remove(dev);
1314 return ret;
1315 }
1316
1317 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1318 {
1319 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1320 struct sci_port *p;
1321 unsigned long flags;
1322
1323 spin_lock_irqsave(&priv->lock, flags);
1324 list_for_each_entry(p, &priv->ports, node)
1325 uart_suspend_port(&sci_uart_driver, &p->port);
1326
1327 spin_unlock_irqrestore(&priv->lock, flags);
1328
1329 return 0;
1330 }
1331
1332 static int sci_resume(struct platform_device *dev)
1333 {
1334 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1335 struct sci_port *p;
1336 unsigned long flags;
1337
1338 spin_lock_irqsave(&priv->lock, flags);
1339 list_for_each_entry(p, &priv->ports, node)
1340 uart_resume_port(&sci_uart_driver, &p->port);
1341
1342 spin_unlock_irqrestore(&priv->lock, flags);
1343
1344 return 0;
1345 }
1346
1347 static struct platform_driver sci_driver = {
1348 .probe = sci_probe,
1349 .remove = __devexit_p(sci_remove),
1350 .suspend = sci_suspend,
1351 .resume = sci_resume,
1352 .driver = {
1353 .name = "sh-sci",
1354 .owner = THIS_MODULE,
1355 },
1356 };
1357
1358 static int __init sci_init(void)
1359 {
1360 int ret;
1361
1362 printk(banner);
1363
1364 ret = uart_register_driver(&sci_uart_driver);
1365 if (likely(ret == 0)) {
1366 ret = platform_driver_register(&sci_driver);
1367 if (unlikely(ret))
1368 uart_unregister_driver(&sci_uart_driver);
1369 }
1370
1371 return ret;
1372 }
1373
1374 static void __exit sci_exit(void)
1375 {
1376 platform_driver_unregister(&sci_driver);
1377 uart_unregister_driver(&sci_uart_driver);
1378 }
1379
1380 module_init(sci_init);
1381 module_exit(sci_exit);
1382
1383 MODULE_LICENSE("GPL");
1384 MODULE_ALIAS("platform:sh-sci");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree