staging: gma500: Intel GMA500 staging driver
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / gma500 / psb_powermgmt.c
blob3a6ffb7ff11fd6cfe8b03329fcf88bcf32a35daa
1 /**************************************************************************
2 * Copyright (c) 2009, Intel Corporation.
3 * All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
24 * Authors:
25 * Benjamin Defnet <benjamin.r.defnet@intel.com>
26 * Rajesh Poornachandran <rajesh.poornachandran@intel.com>
29 #include "psb_powermgmt.h"
30 #include "psb_drv.h"
31 #include "psb_intel_reg.h"
32 #include <linux/mutex.h>
33 #include <linux/pm_runtime.h>
35 #undef OSPM_GFX_DPK
37 extern u32 gui32SGXDeviceID;
38 extern u32 gui32MRSTDisplayDeviceID;
39 extern u32 gui32MRSTMSVDXDeviceID;
40 extern u32 gui32MRSTTOPAZDeviceID;
42 struct drm_device *gpDrmDevice = NULL;
43 static struct mutex power_mutex;
44 static bool gbSuspendInProgress = false;
45 static bool gbResumeInProgress = false;
46 static int g_hw_power_status_mask;
47 static atomic_t g_display_access_count;
48 static atomic_t g_graphics_access_count;
49 static atomic_t g_videoenc_access_count;
50 static atomic_t g_videodec_access_count;
51 int allow_runtime_pm = 0;
53 void ospm_power_island_up(int hw_islands);
54 void ospm_power_island_down(int hw_islands);
55 static bool gbSuspended = false;
56 bool gbgfxsuspended = false;
59 * ospm_power_init
61 * Description: Initialize this ospm power management module
63 void ospm_power_init(struct drm_device *dev)
65 struct drm_psb_private *dev_priv = (struct drm_psb_private *)dev->dev_private;
67 gpDrmDevice = dev;
69 dev_priv->apm_base = dev_priv->apm_reg & 0xffff;
70 dev_priv->ospm_base &= 0xffff;
72 mutex_init(&power_mutex);
73 g_hw_power_status_mask = OSPM_ALL_ISLANDS;
74 atomic_set(&g_display_access_count, 0);
75 atomic_set(&g_graphics_access_count, 0);
76 atomic_set(&g_videoenc_access_count, 0);
77 atomic_set(&g_videodec_access_count, 0);
81 * ospm_power_uninit
83 * Description: Uninitialize this ospm power management module
85 void ospm_power_uninit(void)
87 mutex_destroy(&power_mutex);
88 pm_runtime_disable(&gpDrmDevice->pdev->dev);
89 pm_runtime_set_suspended(&gpDrmDevice->pdev->dev);
94 * save_display_registers
96 * Description: We are going to suspend so save current display
97 * register state.
99 static int save_display_registers(struct drm_device *dev)
101 struct drm_psb_private *dev_priv = dev->dev_private;
102 struct drm_crtc * crtc;
103 struct drm_connector * connector;
105 /* Display arbitration control + watermarks */
106 dev_priv->saveDSPARB = PSB_RVDC32(DSPARB);
107 dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1);
108 dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2);
109 dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3);
110 dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4);
111 dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5);
112 dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6);
113 dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
115 /*save crtc and output state*/
116 mutex_lock(&dev->mode_config.mutex);
117 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
118 if(drm_helper_crtc_in_use(crtc)) {
119 crtc->funcs->save(crtc);
123 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
124 connector->funcs->save(connector);
126 mutex_unlock(&dev->mode_config.mutex);
128 /* Interrupt state */
130 * Handled in psb_irq.c
133 return 0;
137 * restore_display_registers
139 * Description: We are going to resume so restore display register state.
141 static int restore_display_registers(struct drm_device *dev)
143 struct drm_psb_private *dev_priv = dev->dev_private;
144 struct drm_crtc * crtc;
145 struct drm_connector * connector;
147 /* Display arbitration + watermarks */
148 PSB_WVDC32(dev_priv->saveDSPARB, DSPARB);
149 PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1);
150 PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2);
151 PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3);
152 PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4);
153 PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5);
154 PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6);
155 PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT);
157 /*make sure VGA plane is off. it initializes to on after reset!*/
158 PSB_WVDC32(0x80000000, VGACNTRL);
160 mutex_lock(&dev->mode_config.mutex);
161 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
162 if(drm_helper_crtc_in_use(crtc))
163 crtc->funcs->restore(crtc);
165 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
166 connector->funcs->restore(connector);
168 mutex_unlock(&dev->mode_config.mutex);
170 /*Interrupt state*/
172 * Handled in psb_irq.c
175 return 0;
178 * powermgmt_suspend_display
180 * Description: Suspend the display hardware saving state and disabling
181 * as necessary.
183 void ospm_suspend_display(struct drm_device *dev)
185 struct drm_psb_private *dev_priv = dev->dev_private;
186 int pp_stat, ret=0;
188 printk(KERN_ALERT "%s \n", __func__);
190 #ifdef OSPM_GFX_DPK
191 printk(KERN_ALERT "%s \n", __func__);
192 #endif
193 if (!(g_hw_power_status_mask & OSPM_DISPLAY_ISLAND))
194 return;
196 save_display_registers(dev);
198 if (dev_priv->iLVDS_enable) {
199 /*shutdown the panel*/
200 PSB_WVDC32(0, PP_CONTROL);
202 do {
203 pp_stat = PSB_RVDC32(PP_STATUS);
204 } while (pp_stat & 0x80000000);
206 /*turn off the plane*/
207 PSB_WVDC32(0x58000000, DSPACNTR);
208 PSB_WVDC32(0, DSPASURF);/*trigger the plane disable*/
209 /*wait ~4 ticks*/
210 msleep(4);
212 /*turn off pipe*/
213 PSB_WVDC32(0x0, PIPEACONF);
214 /*wait ~8 ticks*/
215 msleep(8);
217 /*turn off PLLs*/
218 PSB_WVDC32(0, MRST_DPLL_A);
219 } else {
220 PSB_WVDC32(DPI_SHUT_DOWN, DPI_CONTROL_REG);
221 PSB_WVDC32(0x0, PIPEACONF);
222 PSB_WVDC32(0x2faf0000, BLC_PWM_CTL);
223 while (REG_READ(0x70008) & 0x40000000);
224 while ((PSB_RVDC32(GEN_FIFO_STAT_REG) & DPI_FIFO_EMPTY)
225 != DPI_FIFO_EMPTY);
226 PSB_WVDC32(0, DEVICE_READY_REG);
227 /* turn off panel power */
228 ret = 0;
230 ospm_power_island_down(OSPM_DISPLAY_ISLAND);
234 * ospm_resume_display
236 * Description: Resume the display hardware restoring state and enabling
237 * as necessary.
239 void ospm_resume_display(struct pci_dev *pdev)
241 struct drm_device *dev = pci_get_drvdata(pdev);
242 struct drm_psb_private *dev_priv = dev->dev_private;
243 struct psb_gtt *pg = dev_priv->pg;
245 printk(KERN_ALERT "%s \n", __func__);
247 #ifdef OSPM_GFX_DPK
248 printk(KERN_ALERT "%s \n", __func__);
249 #endif
250 if (g_hw_power_status_mask & OSPM_DISPLAY_ISLAND)
251 return;
253 /* turn on the display power island */
254 ospm_power_island_up(OSPM_DISPLAY_ISLAND);
256 PSB_WVDC32(pg->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
257 pci_write_config_word(pdev, PSB_GMCH_CTRL,
258 pg->gmch_ctrl | _PSB_GMCH_ENABLED);
260 /* Don't reinitialize the GTT as it is unnecessary. The gtt is
261 * stored in memory so it will automatically be restored. All
262 * we need to do is restore the PGETBL_CTL which we already do
263 * above.
265 /*psb_gtt_init(dev_priv->pg, 1);*/
267 restore_display_registers(dev);
270 #if 1
272 * ospm_suspend_pci
274 * Description: Suspend the pci device saving state and disabling
275 * as necessary.
277 static void ospm_suspend_pci(struct pci_dev *pdev)
279 struct drm_device *dev = pci_get_drvdata(pdev);
280 struct drm_psb_private *dev_priv = dev->dev_private;
281 int bsm, vbt;
283 if (gbSuspended)
284 return;
286 #ifdef OSPM_GFX_DPK
287 printk(KERN_ALERT "ospm_suspend_pci\n");
288 #endif
290 #ifdef CONFIG_MDFD_GL3
291 // Power off GL3 after all GFX sub-systems are powered off.
292 ospm_power_island_down(OSPM_GL3_CACHE_ISLAND);
293 #endif
295 pci_save_state(pdev);
296 pci_read_config_dword(pdev, 0x5C, &bsm);
297 dev_priv->saveBSM = bsm;
298 pci_read_config_dword(pdev, 0xFC, &vbt);
299 dev_priv->saveVBT = vbt;
300 pci_read_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, &dev_priv->msi_addr);
301 pci_read_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, &dev_priv->msi_data);
303 pci_disable_device(pdev);
304 pci_set_power_state(pdev, PCI_D3hot);
306 gbSuspended = true;
307 gbgfxsuspended = true;
311 * ospm_resume_pci
313 * Description: Resume the pci device restoring state and enabling
314 * as necessary.
316 static bool ospm_resume_pci(struct pci_dev *pdev)
318 struct drm_device *dev = pci_get_drvdata(pdev);
319 struct drm_psb_private *dev_priv = dev->dev_private;
320 int ret = 0;
322 if (!gbSuspended)
323 return true;
325 #ifdef OSPM_GFX_DPK
326 printk(KERN_ALERT "ospm_resume_pci\n");
327 #endif
329 pci_set_power_state(pdev, PCI_D0);
330 pci_restore_state(pdev);
331 pci_write_config_dword(pdev, 0x5c, dev_priv->saveBSM);
332 pci_write_config_dword(pdev, 0xFC, dev_priv->saveVBT);
333 /* retoring MSI address and data in PCIx space */
334 pci_write_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, dev_priv->msi_addr);
335 pci_write_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, dev_priv->msi_data);
336 ret = pci_enable_device(pdev);
338 if (ret != 0)
339 printk(KERN_ALERT "ospm_resume_pci: pci_enable_device failed: %d\n", ret);
340 else
341 gbSuspended = false;
343 return !gbSuspended;
345 #endif
347 * ospm_power_suspend
349 * Description: OSPM is telling our driver to suspend so save state
350 * and power down all hardware.
352 int ospm_power_suspend(struct pci_dev *pdev, pm_message_t state)
354 int ret = 0;
355 int graphics_access_count;
356 int videoenc_access_count;
357 int videodec_access_count;
358 int display_access_count;
359 bool suspend_pci = true;
361 if(gbSuspendInProgress || gbResumeInProgress)
363 #ifdef OSPM_GFX_DPK
364 printk(KERN_ALERT "OSPM_GFX_DPK: %s system BUSY \n", __func__);
365 #endif
366 return -EBUSY;
369 mutex_lock(&power_mutex);
371 if (!gbSuspended) {
372 graphics_access_count = atomic_read(&g_graphics_access_count);
373 videoenc_access_count = atomic_read(&g_videoenc_access_count);
374 videodec_access_count = atomic_read(&g_videodec_access_count);
375 display_access_count = atomic_read(&g_display_access_count);
377 if (graphics_access_count ||
378 videoenc_access_count ||
379 videodec_access_count ||
380 display_access_count)
381 ret = -EBUSY;
383 if (!ret) {
384 gbSuspendInProgress = true;
386 psb_irq_uninstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
387 ospm_suspend_display(gpDrmDevice);
388 if (suspend_pci == true) {
389 ospm_suspend_pci(pdev);
391 gbSuspendInProgress = false;
392 } else {
393 printk(KERN_ALERT "ospm_power_suspend: device busy: graphics %d videoenc %d videodec %d display %d\n", graphics_access_count, videoenc_access_count, videodec_access_count, display_access_count);
398 mutex_unlock(&power_mutex);
399 return ret;
403 * ospm_power_island_up
405 * Description: Restore power to the specified island(s) (powergating)
407 void ospm_power_island_up(int hw_islands)
409 u32 pwr_cnt = 0;
410 u32 pwr_sts = 0;
411 u32 pwr_mask = 0;
413 struct drm_psb_private *dev_priv =
414 (struct drm_psb_private *) gpDrmDevice->dev_private;
417 if (hw_islands & OSPM_DISPLAY_ISLAND) {
418 pwr_mask = PSB_PWRGT_DISPLAY_MASK;
420 pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
421 pwr_cnt &= ~pwr_mask;
422 outl(pwr_cnt, (dev_priv->ospm_base + PSB_PM_SSC));
424 while (true) {
425 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
426 if ((pwr_sts & pwr_mask) == 0)
427 break;
428 else
429 udelay(10);
433 g_hw_power_status_mask |= hw_islands;
437 * ospm_power_resume
439 int ospm_power_resume(struct pci_dev *pdev)
441 if(gbSuspendInProgress || gbResumeInProgress)
443 #ifdef OSPM_GFX_DPK
444 printk(KERN_ALERT "OSPM_GFX_DPK: %s hw_island: Suspend || gbResumeInProgress!!!! \n", __func__);
445 #endif
446 return 0;
449 mutex_lock(&power_mutex);
451 #ifdef OSPM_GFX_DPK
452 printk(KERN_ALERT "OSPM_GFX_DPK: ospm_power_resume \n");
453 #endif
455 gbResumeInProgress = true;
457 ospm_resume_pci(pdev);
459 ospm_resume_display(gpDrmDevice->pdev);
460 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
461 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
463 gbResumeInProgress = false;
465 mutex_unlock(&power_mutex);
467 return 0;
472 * ospm_power_island_down
474 * Description: Cut power to the specified island(s) (powergating)
476 void ospm_power_island_down(int islands)
478 #if 0
479 u32 pwr_cnt = 0;
480 u32 pwr_mask = 0;
481 u32 pwr_sts = 0;
483 struct drm_psb_private *dev_priv =
484 (struct drm_psb_private *) gpDrmDevice->dev_private;
486 g_hw_power_status_mask &= ~islands;
488 if (islands & OSPM_GRAPHICS_ISLAND) {
489 pwr_cnt |= PSB_PWRGT_GFX_MASK;
490 pwr_mask |= PSB_PWRGT_GFX_MASK;
491 if (dev_priv->graphics_state == PSB_PWR_STATE_ON) {
492 dev_priv->gfx_on_time += (jiffies - dev_priv->gfx_last_mode_change) * 1000 / HZ;
493 dev_priv->gfx_last_mode_change = jiffies;
494 dev_priv->graphics_state = PSB_PWR_STATE_OFF;
495 dev_priv->gfx_off_cnt++;
498 if (islands & OSPM_VIDEO_ENC_ISLAND) {
499 pwr_cnt |= PSB_PWRGT_VID_ENC_MASK;
500 pwr_mask |= PSB_PWRGT_VID_ENC_MASK;
502 if (islands & OSPM_VIDEO_DEC_ISLAND) {
503 pwr_cnt |= PSB_PWRGT_VID_DEC_MASK;
504 pwr_mask |= PSB_PWRGT_VID_DEC_MASK;
506 if (pwr_cnt) {
507 pwr_cnt |= inl(dev_priv->apm_base);
508 outl(pwr_cnt, dev_priv->apm_base + PSB_APM_CMD);
509 while (true) {
510 pwr_sts = inl(dev_priv->apm_base + PSB_APM_STS);
512 if ((pwr_sts & pwr_mask) == pwr_mask)
513 break;
514 else
515 udelay(10);
519 if (islands & OSPM_DISPLAY_ISLAND) {
520 pwr_mask = PSB_PWRGT_DISPLAY_MASK;
522 outl(pwr_mask, (dev_priv->ospm_base + PSB_PM_SSC));
524 while (true) {
525 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
526 if ((pwr_sts & pwr_mask) == pwr_mask)
527 break;
528 else
529 udelay(10);
532 #endif
537 * ospm_power_is_hw_on
539 * Description: do an instantaneous check for if the specified islands
540 * are on. Only use this in cases where you know the g_state_change_mutex
541 * is already held such as in irq install/uninstall. Otherwise, use
542 * ospm_power_using_hw_begin().
544 bool ospm_power_is_hw_on(int hw_islands)
546 return ((g_hw_power_status_mask & hw_islands) == hw_islands) ? true:false;
550 * ospm_power_using_hw_begin
552 * Description: Notify PowerMgmt module that you will be accessing the
553 * specified island's hw so don't power it off. If force_on is true,
554 * this will power on the specified island if it is off.
555 * Otherwise, this will return false and the caller is expected to not
556 * access the hw.
558 * NOTE *** If this is called from and interrupt handler or other atomic
559 * context, then it will return false if we are in the middle of a
560 * power state transition and the caller will be expected to handle that
561 * even if force_on is set to true.
563 bool ospm_power_using_hw_begin(int hw_island, UHBUsage usage)
565 return 1; /*FIXMEAC */
566 #if 0
567 bool ret = true;
568 bool island_is_off = false;
569 bool b_atomic = (in_interrupt() || in_atomic());
570 bool locked = true;
571 struct pci_dev *pdev = gpDrmDevice->pdev;
572 u32 deviceID = 0;
573 bool force_on = usage ? true: false;
574 /*quick path, not 100% race safe, but should be enough comapre to current other code in this file */
575 if (!force_on) {
576 if (hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask))
577 return false;
578 else {
579 locked = false;
580 #ifdef CONFIG_PM_RUNTIME
581 /* increment pm_runtime_refcount */
582 pm_runtime_get(&pdev->dev);
583 #endif
584 goto increase_count;
589 if (!b_atomic)
590 mutex_lock(&power_mutex);
592 island_is_off = hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask);
594 if (b_atomic && (gbSuspendInProgress || gbResumeInProgress || gbSuspended) && force_on && island_is_off)
595 ret = false;
597 if (ret && island_is_off && !force_on)
598 ret = false;
600 if (ret && island_is_off && force_on) {
601 gbResumeInProgress = true;
603 ret = ospm_resume_pci(pdev);
605 if (ret) {
606 switch(hw_island)
608 case OSPM_DISPLAY_ISLAND:
609 deviceID = gui32MRSTDisplayDeviceID;
610 ospm_resume_display(pdev);
611 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
612 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
613 break;
614 case OSPM_GRAPHICS_ISLAND:
615 deviceID = gui32SGXDeviceID;
616 ospm_power_island_up(OSPM_GRAPHICS_ISLAND);
617 psb_irq_preinstall_islands(gpDrmDevice, OSPM_GRAPHICS_ISLAND);
618 psb_irq_postinstall_islands(gpDrmDevice, OSPM_GRAPHICS_ISLAND);
619 break;
620 #if 1
621 case OSPM_VIDEO_DEC_ISLAND:
622 if(!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
623 //printk(KERN_ALERT "%s power on display for video decode use\n", __func__);
624 deviceID = gui32MRSTDisplayDeviceID;
625 ospm_resume_display(pdev);
626 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
627 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
629 else{
630 //printk(KERN_ALERT "%s display is already on for video decode use\n", __func__);
633 if(!ospm_power_is_hw_on(OSPM_VIDEO_DEC_ISLAND)) {
634 //printk(KERN_ALERT "%s power on video decode\n", __func__);
635 deviceID = gui32MRSTMSVDXDeviceID;
636 ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
637 psb_irq_preinstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
638 psb_irq_postinstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
640 else{
641 //printk(KERN_ALERT "%s video decode is already on\n", __func__);
644 break;
645 case OSPM_VIDEO_ENC_ISLAND:
646 if(!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
647 //printk(KERN_ALERT "%s power on display for video encode\n", __func__);
648 deviceID = gui32MRSTDisplayDeviceID;
649 ospm_resume_display(pdev);
650 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
651 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
653 else{
654 //printk(KERN_ALERT "%s display is already on for video encode use\n", __func__);
657 if(!ospm_power_is_hw_on(OSPM_VIDEO_ENC_ISLAND)) {
658 //printk(KERN_ALERT "%s power on video encode\n", __func__);
659 deviceID = gui32MRSTTOPAZDeviceID;
660 ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
661 psb_irq_preinstall_islands(gpDrmDevice, OSPM_VIDEO_ENC_ISLAND);
662 psb_irq_postinstall_islands(gpDrmDevice, OSPM_VIDEO_ENC_ISLAND);
664 else{
665 //printk(KERN_ALERT "%s video decode is already on\n", __func__);
667 #endif
668 break;
670 default:
671 printk(KERN_ALERT "%s unknown island !!!! \n", __func__);
672 break;
677 if (!ret)
678 printk(KERN_ALERT "ospm_power_using_hw_begin: forcing on %d failed\n", hw_island);
680 gbResumeInProgress = false;
682 increase_count:
683 if (ret) {
684 switch(hw_island)
686 case OSPM_GRAPHICS_ISLAND:
687 atomic_inc(&g_graphics_access_count);
688 break;
689 case OSPM_VIDEO_ENC_ISLAND:
690 atomic_inc(&g_videoenc_access_count);
691 break;
692 case OSPM_VIDEO_DEC_ISLAND:
693 atomic_inc(&g_videodec_access_count);
694 break;
695 case OSPM_DISPLAY_ISLAND:
696 atomic_inc(&g_display_access_count);
697 break;
701 if (!b_atomic && locked)
702 mutex_unlock(&power_mutex);
704 return ret;
705 #endif
710 * ospm_power_using_hw_end
712 * Description: Notify PowerMgmt module that you are done accessing the
713 * specified island's hw so feel free to power it off. Note that this
714 * function doesn't actually power off the islands.
716 void ospm_power_using_hw_end(int hw_island)
718 #if 0 /* FIXMEAC */
719 switch(hw_island)
721 case OSPM_GRAPHICS_ISLAND:
722 atomic_dec(&g_graphics_access_count);
723 break;
724 case OSPM_VIDEO_ENC_ISLAND:
725 atomic_dec(&g_videoenc_access_count);
726 break;
727 case OSPM_VIDEO_DEC_ISLAND:
728 atomic_dec(&g_videodec_access_count);
729 break;
730 case OSPM_DISPLAY_ISLAND:
731 atomic_dec(&g_display_access_count);
732 break;
735 //decrement runtime pm ref count
736 pm_runtime_put(&gpDrmDevice->pdev->dev);
738 WARN_ON(atomic_read(&g_graphics_access_count) < 0);
739 WARN_ON(atomic_read(&g_videoenc_access_count) < 0);
740 WARN_ON(atomic_read(&g_videodec_access_count) < 0);
741 WARN_ON(atomic_read(&g_display_access_count) < 0);
742 #endif
745 int ospm_runtime_pm_allow(struct drm_device * dev)
747 return 0;
750 void ospm_runtime_pm_forbid(struct drm_device * dev)
752 struct drm_psb_private * dev_priv = dev->dev_private;
754 DRM_INFO("%s\n", __FUNCTION__);
756 pm_runtime_forbid(&dev->pdev->dev);
757 dev_priv->rpm_enabled = 0;
760 int psb_runtime_suspend(struct device *dev)
762 pm_message_t state;
763 int ret = 0;
764 state.event = 0;
766 #ifdef OSPM_GFX_DPK
767 printk(KERN_ALERT "OSPM_GFX_DPK: %s \n", __func__);
768 #endif
769 if (atomic_read(&g_graphics_access_count) || atomic_read(&g_videoenc_access_count)
770 || atomic_read(&g_videodec_access_count) || atomic_read(&g_display_access_count)){
771 #ifdef OSPM_GFX_DPK
772 printk(KERN_ALERT "OSPM_GFX_DPK: GFX: %d VEC: %d VED: %d DC: %d DSR: %d \n", atomic_read(&g_graphics_access_count),
773 atomic_read(&g_videoenc_access_count), atomic_read(&g_videodec_access_count), atomic_read(&g_display_access_count));
774 #endif
775 return -EBUSY;
777 else
778 ret = ospm_power_suspend(gpDrmDevice->pdev, state);
780 return ret;
783 int psb_runtime_resume(struct device *dev)
785 return 0;
788 int psb_runtime_idle(struct device *dev)
790 /*printk (KERN_ALERT "lvds:%d,mipi:%d\n", dev_priv->is_lvds_on, dev_priv->is_mipi_on);*/
791 if (atomic_read(&g_graphics_access_count) || atomic_read(&g_videoenc_access_count)
792 || atomic_read(&g_videodec_access_count) || atomic_read(&g_display_access_count))
793 return 1;
794 else
795 return 0;