ar9170: handle otus' A-MPDU density definitions
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ar9170 / mac.c
blob45986b6eadbc06c736d0986a28dae7276bc575bd
1 /*
2 * Atheros AR9170 driver
4 * MAC programming
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, see
20 * http://www.gnu.org/licenses/.
22 * This file incorporates work covered by the following copyright and
23 * permission notice:
24 * Copyright (c) 2007-2008 Atheros Communications, Inc.
26 * Permission to use, copy, modify, and/or distribute this software for any
27 * purpose with or without fee is hereby granted, provided that the above
28 * copyright notice and this permission notice appear in all copies.
30 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
31 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
32 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
33 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
34 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
35 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
36 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
38 #include "ar9170.h"
39 #include "cmd.h"
41 int ar9170_set_qos(struct ar9170 *ar)
43 ar9170_regwrite_begin(ar);
45 ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min |
46 (ar->edcf[0].cw_max << 16));
47 ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min |
48 (ar->edcf[1].cw_max << 16));
49 ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min |
50 (ar->edcf[2].cw_max << 16));
51 ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min |
52 (ar->edcf[3].cw_max << 16));
53 ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min |
54 (ar->edcf[4].cw_max << 16));
56 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS,
57 ((ar->edcf[0].aifs * 9 + 10)) |
58 ((ar->edcf[1].aifs * 9 + 10) << 12) |
59 ((ar->edcf[2].aifs * 9 + 10) << 24));
60 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS,
61 ((ar->edcf[2].aifs * 9 + 10) >> 8) |
62 ((ar->edcf[3].aifs * 9 + 10) << 4) |
63 ((ar->edcf[4].aifs * 9 + 10) << 16));
65 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
66 ar->edcf[0].txop | ar->edcf[1].txop << 16);
67 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
68 ar->edcf[1].txop | ar->edcf[3].txop << 16);
70 ar9170_regwrite_finish();
72 return ar9170_regwrite_result();
75 static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity)
77 u32 val;
79 /* don't allow AMPDU density > 8us */
80 if (mpdudensity > 6)
81 return -EINVAL;
83 /* Watch out! Otus uses slightly different density values. */
84 val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0);
86 ar9170_regwrite_begin(ar);
87 ar9170_regwrite(AR9170_MAC_REG_AMPDU_SET, val);
88 ar9170_regwrite_finish();
90 return ar9170_regwrite_result();
93 int ar9170_init_mac(struct ar9170 *ar)
95 ar9170_regwrite_begin(ar);
97 ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40);
99 ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0);
101 /* enable MMIC */
102 ar9170_regwrite(AR9170_MAC_REG_SNIFFER,
103 AR9170_MAC_REG_SNIFFER_DEFAULTS);
105 ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80);
107 ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70);
108 ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000);
109 ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10);
111 /* CF-END mode */
112 ar9170_regwrite(0x1c3b2c, 0x19000000);
114 /* NAV protects ACK only (in TXOP) */
115 ar9170_regwrite(0x1c3b38, 0x201);
117 /* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */
118 /* OTUS set AM to 0x1 */
119 ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170);
121 ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105);
123 /* AGG test code*/
124 /* Aggregation MAX number and timeout */
125 ar9170_regwrite(0x1c3b9c, 0x10000a);
127 ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
128 AR9170_MAC_REG_FTF_DEFAULTS);
130 /* Enable deaggregator, response in sniffer mode */
131 ar9170_regwrite(0x1c3c40, 0x1 | 1<<30);
133 /* rate sets */
134 ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f);
135 ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f);
136 ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
138 /* MIMO response control */
139 ar9170_regwrite(0x1c3694, 0x4003C1E);/* bit 26~28 otus-AM */
141 /* switch MAC to OTUS interface */
142 ar9170_regwrite(0x1c3600, 0x3);
144 ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff);
146 /* set PHY register read timeout (??) */
147 ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008);
149 /* Disable Rx TimeOut, workaround for BB. */
150 ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0);
152 /* Set CPU clock frequency to 88/80MHz */
153 ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL,
154 AR9170_PWR_CLK_AHB_80_88MHZ |
155 AR9170_PWR_CLK_DAC_160_INV_DLY);
157 /* Set WLAN DMA interrupt mode: generate int per packet */
158 ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011);
160 ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT,
161 AR9170_MAC_FCS_FIFO_PROT);
163 /* Disables the CF_END frame, undocumented register */
164 ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND,
165 0x141E0F48);
167 ar9170_regwrite_finish();
169 return ar9170_regwrite_result();
172 static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac)
174 static const u8 zero[ETH_ALEN] = { 0 };
176 if (!mac)
177 mac = zero;
179 ar9170_regwrite_begin(ar);
181 ar9170_regwrite(reg,
182 (mac[3] << 24) | (mac[2] << 16) |
183 (mac[1] << 8) | mac[0]);
185 ar9170_regwrite(reg + 4, (mac[5] << 8) | mac[4]);
187 ar9170_regwrite_finish();
189 return ar9170_regwrite_result();
192 int ar9170_update_multicast(struct ar9170 *ar)
194 int err;
196 ar9170_regwrite_begin(ar);
197 ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H,
198 ar->want_mc_hash >> 32);
199 ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L,
200 ar->want_mc_hash);
202 ar9170_regwrite_finish();
203 err = ar9170_regwrite_result();
205 if (err)
206 return err;
208 ar->cur_mc_hash = ar->want_mc_hash;
210 return 0;
213 int ar9170_update_frame_filter(struct ar9170 *ar)
215 int err;
217 err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER,
218 ar->want_filter);
220 if (err)
221 return err;
223 ar->cur_filter = ar->want_filter;
225 return 0;
228 static int ar9170_set_promiscouous(struct ar9170 *ar)
230 u32 encr_mode, sniffer;
231 int err;
233 err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer);
234 if (err)
235 return err;
237 err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode);
238 if (err)
239 return err;
241 if (ar->sniffer_enabled) {
242 sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
245 * Rx decryption works in place.
247 * If we don't disable it, the hardware will render all
248 * encrypted frames which are encrypted with an unknown
249 * key useless.
252 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
253 ar->sniffer_enabled = true;
254 } else {
255 sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
257 if (ar->rx_software_decryption)
258 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
259 else
260 encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
263 ar9170_regwrite_begin(ar);
264 ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode);
265 ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer);
266 ar9170_regwrite_finish();
268 return ar9170_regwrite_result();
271 int ar9170_set_operating_mode(struct ar9170 *ar)
273 u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS;
274 u8 *mac_addr, *bssid;
275 int err;
277 if (ar->vif) {
278 mac_addr = ar->mac_addr;
279 bssid = ar->bssid;
281 switch (ar->vif->type) {
282 case NL80211_IFTYPE_MESH_POINT:
283 case NL80211_IFTYPE_ADHOC:
284 pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS;
285 break;
286 /* case NL80211_IFTYPE_AP:
287 pm_mode |= AR9170_MAC_REG_POWERMGT_AP;
288 break;*/
289 case NL80211_IFTYPE_WDS:
290 pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS;
291 break;
292 case NL80211_IFTYPE_MONITOR:
293 ar->sniffer_enabled = true;
294 ar->rx_software_decryption = true;
295 break;
296 default:
297 pm_mode |= AR9170_MAC_REG_POWERMGT_STA;
298 break;
300 } else {
301 mac_addr = NULL;
302 bssid = NULL;
305 err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr);
306 if (err)
307 return err;
309 err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid);
310 if (err)
311 return err;
313 err = ar9170_set_promiscouous(ar);
314 if (err)
315 return err;
317 /* set AMPDU density to 8us. */
318 err = ar9170_set_ampdu_density(ar, 6);
319 if (err)
320 return err;
322 ar9170_regwrite_begin(ar);
324 ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode);
325 ar9170_regwrite_finish();
327 return ar9170_regwrite_result();
330 int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry)
332 u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111);
334 return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp);
337 int ar9170_set_beacon_timers(struct ar9170 *ar)
339 u32 v = 0;
340 u32 pretbtt = 0;
342 if (ar->vif) {
343 v |= ar->vif->bss_conf.beacon_int;
345 switch (ar->vif->type) {
346 case NL80211_IFTYPE_MESH_POINT:
347 case NL80211_IFTYPE_ADHOC:
348 v |= BIT(25);
349 break;
350 case NL80211_IFTYPE_AP:
351 v |= BIT(24);
352 pretbtt = (ar->vif->bss_conf.beacon_int - 6) << 16;
353 break;
354 default:
355 break;
358 v |= ar->vif->bss_conf.dtim_period << 16;
361 ar9170_regwrite_begin(ar);
363 ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt);
364 ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v);
365 ar9170_regwrite_finish();
366 return ar9170_regwrite_result();
369 int ar9170_update_beacon(struct ar9170 *ar)
371 struct sk_buff *skb;
372 __le32 *data, *old = NULL;
373 u32 word;
374 int i;
376 skb = ieee80211_beacon_get(ar->hw, ar->vif);
377 if (!skb)
378 return -ENOMEM;
380 data = (__le32 *)skb->data;
381 if (ar->beacon)
382 old = (__le32 *)ar->beacon->data;
384 ar9170_regwrite_begin(ar);
385 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
387 * XXX: This accesses beyond skb data for up
388 * to the last 3 bytes!!
391 if (old && (data[i] == old[i]))
392 continue;
394 word = le32_to_cpu(data[i]);
395 ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word);
398 /* XXX: use skb->cb info */
399 if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
400 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
401 ((skb->len + 4) << (3+16)) + 0x0400);
402 else
403 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
404 ((skb->len + 4) << (3+16)) + 0x0400);
406 ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4);
407 ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS);
408 ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1);
410 ar9170_regwrite_finish();
412 dev_kfree_skb(ar->beacon);
413 ar->beacon = skb;
415 return ar9170_regwrite_result();
418 void ar9170_new_beacon(struct work_struct *work)
420 struct ar9170 *ar = container_of(work, struct ar9170,
421 beacon_work);
422 struct sk_buff *skb;
424 if (unlikely(!IS_STARTED(ar)))
425 return ;
427 mutex_lock(&ar->mutex);
429 if (!ar->vif)
430 goto out;
432 ar9170_update_beacon(ar);
434 rcu_read_lock();
435 while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif)))
436 ar9170_op_tx(ar->hw, skb);
438 rcu_read_unlock();
440 out:
441 mutex_unlock(&ar->mutex);
444 int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype,
445 u8 keyidx, u8 *keydata, int keylen)
447 __le32 vals[7];
448 static const u8 bcast[ETH_ALEN] =
449 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
450 u8 dummy;
452 mac = mac ? : bcast;
454 vals[0] = cpu_to_le32((keyidx << 16) + id);
455 vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype);
456 vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 |
457 mac[3] << 8 | mac[2]);
458 memset(&vals[3], 0, 16);
459 if (keydata)
460 memcpy(&vals[3], keydata, keylen);
462 return ar->exec_cmd(ar, AR9170_CMD_EKEY,
463 sizeof(vals), (u8 *)vals,
464 1, &dummy);
467 int ar9170_disable_key(struct ar9170 *ar, u8 id)
469 __le32 val = cpu_to_le32(id);
470 u8 dummy;
472 return ar->exec_cmd(ar, AR9170_CMD_EKEY,
473 sizeof(val), (u8 *)&val,
474 1, &dummy);