drivers/video/tridentfb.c

   1 /*
   2  * Frame buffer driver for Trident Blade and Image series
   3  *
   4  * Copyright 2001, 2002 - Jani Monoses   <jani@iv.ro>
   5  *
   6  *
   7  * CREDITS:(in order of appearance)
   8  *      skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
   9  *      Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10  *      much inspired by the XFree86 4.x Trident driver sources
  11  *      by Alan Hourihane the FreeVGA project
  12  *      Francesco Salvestrini <salvestrini@users.sf.net> XP support,
  13  *      code, suggestions
  14  * TODO:
  15  *      timing value tweaking so it looks good on every monitor in every mode
  16  *      TGUI acceleration
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/fb.h>
  21 #include <linux/init.h>
  22 #include <linux/pci.h>
  23
  24 #include <linux/delay.h>
  25 #include <video/trident.h>
  26
  27 #define VERSION         "0.7.8-NEWAPI"
  28
  29 struct tridentfb_par {
  30         int vclk;               /* in MHz */
  31         void __iomem *io_virt;  /* iospace virtual memory address */
  32 };
  33
  34 static unsigned char eng_oper;  /* engine operation... */
  35 static struct fb_ops tridentfb_ops;
  36
  37 static struct tridentfb_par default_par;
  38
  39 /* FIXME:kmalloc these 3 instead */
  40 static struct fb_info fb_info;
  41 static u32 pseudo_pal[16];
  42
  43 static struct fb_var_screeninfo default_var;
  44
  45 static struct fb_fix_screeninfo tridentfb_fix = {
  46         .id = "Trident",
  47         .type = FB_TYPE_PACKED_PIXELS,
  48         .ypanstep = 1,
  49         .visual = FB_VISUAL_PSEUDOCOLOR,
  50         .accel = FB_ACCEL_NONE,
  51 };
  52
  53 static int chip_id;
  54
  55 static int defaultaccel;
  56 static int displaytype;
  57
  58 /* defaults which are normally overriden by user values */
  59
  60 /* video mode */
  61 static char *mode_option __devinitdata = "640x480";
  62 static int bpp = 8;
  63
  64 static int noaccel;
  65
  66 static int center;
  67 static int stretch;
  68
  69 static int fp;
  70 static int crt;
  71
  72 static int memsize;
  73 static int memdiff;
  74 static int nativex;
  75
  76 module_param(mode_option, charp, 0);
  77 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
  78 module_param(bpp, int, 0);
  79 module_param(center, int, 0);
  80 module_param(stretch, int, 0);
  81 module_param(noaccel, int, 0);
  82 module_param(memsize, int, 0);
  83 module_param(memdiff, int, 0);
  84 module_param(nativex, int, 0);
  85 module_param(fp, int, 0);
  86 module_param(crt, int, 0);
  87
  88 static int chip3D;
  89 static int chipcyber;
  90
  91 static int is3Dchip(int id)
  92 {
  93         return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
  94                 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
  95                 (id == CYBER9397) || (id == CYBER9397DVD) ||
  96                 (id == CYBER9520) || (id == CYBER9525DVD) ||
  97                 (id == IMAGE975) || (id == IMAGE985) ||
  98                 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
  99                 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
 100                 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
 101                 (id == CYBERBLADEXPAi1));
 102 }
 103
 104 static int iscyber(int id)
 105 {
 106         switch (id) {
 107         case CYBER9388:
 108         case CYBER9382:
 109         case CYBER9385:
 110         case CYBER9397:
 111         case CYBER9397DVD:
 112         case CYBER9520:
 113         case CYBER9525DVD:
 114         case CYBERBLADEE4:
 115         case CYBERBLADEi7D:
 116         case CYBERBLADEi1:
 117         case CYBERBLADEi1D:
 118         case CYBERBLADEAi1:
 119         case CYBERBLADEAi1D:
 120         case CYBERBLADEXPAi1:
 121                 return 1;
 122
 123         case CYBER9320:
 124         case TGUI9660:
 125         case IMAGE975:
 126         case IMAGE985:
 127         case BLADE3D:
 128         case CYBERBLADEi7:      /* VIA MPV4 integrated version */
 129
 130         default:
 131                 /* case CYBERBLDAEXPm8:  Strange */
 132                 /* case CYBERBLDAEXPm16: Strange */
 133                 return 0;
 134         }
 135 }
 136
 137 #define CRT 0x3D0               /* CRTC registers offset for color display */
 138
 139 #ifndef TRIDENT_MMIO
 140         #define TRIDENT_MMIO 1
 141 #endif
 142
 143 #if TRIDENT_MMIO
 144         #define t_outb(val, reg)        writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg)
 145         #define t_inb(reg)      readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg)
 146 #else
 147         #define t_outb(val, reg) outb(val, reg)
 148         #define t_inb(reg) inb(reg)
 149 #endif
 150
 151
 152 static struct accel_switch {
 153         void (*init_accel) (int, int);
 154         void (*wait_engine) (void);
 155         void (*fill_rect) (u32, u32, u32, u32, u32, u32);
 156         void (*copy_rect) (u32, u32, u32, u32, u32, u32);
 157 } *acc;
 158
 159 #define writemmr(r, v)  writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r)
 160 #define readmmr(r)      readl(((struct tridentfb_par *)fb_info.par)->io_virt + r)
 161
 162 /*
 163  * Blade specific acceleration.
 164  */
 165
 166 #define point(x, y) ((y) << 16 | (x))
 167 #define STA     0x2120
 168 #define CMD     0x2144
 169 #define ROP     0x2148
 170 #define CLR     0x2160
 171 #define SR1     0x2100
 172 #define SR2     0x2104
 173 #define DR1     0x2108
 174 #define DR2     0x210C
 175
 176 #define ROP_S   0xCC
 177
 178 static void blade_init_accel(int pitch, int bpp)
 179 {
 180         int v1 = (pitch >> 3) << 20;
 181         int tmp = 0, v2;
 182         switch (bpp) {
 183         case 8:
 184                 tmp = 0;
 185                 break;
 186         case 15:
 187                 tmp = 5;
 188                 break;
 189         case 16:
 190                 tmp = 1;
 191                 break;
 192         case 24:
 193         case 32:
 194                 tmp = 2;
 195                 break;
 196         }
 197         v2 = v1 | (tmp << 29);
 198         writemmr(0x21C0, v2);
 199         writemmr(0x21C4, v2);
 200         writemmr(0x21B8, v2);
 201         writemmr(0x21BC, v2);
 202         writemmr(0x21D0, v1);
 203         writemmr(0x21D4, v1);
 204         writemmr(0x21C8, v1);
 205         writemmr(0x21CC, v1);
 206         writemmr(0x216C, 0);
 207 }
 208
 209 static void blade_wait_engine(void)
 210 {
 211         while (readmmr(STA) & 0xFA800000) ;
 212 }
 213
 214 static void blade_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 215 {
 216         writemmr(CLR, c);
 217         writemmr(ROP, rop ? 0x66 : ROP_S);
 218         writemmr(CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
 219
 220         writemmr(DR1, point(x, y));
 221         writemmr(DR2, point(x + w - 1, y + h - 1));
 222 }
 223
 224 static void blade_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 225 {
 226         u32 s1, s2, d1, d2;
 227         int direction = 2;
 228         s1 = point(x1, y1);
 229         s2 = point(x1 + w - 1, y1 + h - 1);
 230         d1 = point(x2, y2);
 231         d2 = point(x2 + w - 1, y2 + h - 1);
 232
 233         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 234                 direction = 0;
 235
 236         writemmr(ROP, ROP_S);
 237         writemmr(CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
 238
 239         writemmr(SR1, direction ? s2 : s1);
 240         writemmr(SR2, direction ? s1 : s2);
 241         writemmr(DR1, direction ? d2 : d1);
 242         writemmr(DR2, direction ? d1 : d2);
 243 }
 244
 245 static struct accel_switch accel_blade = {
 246         blade_init_accel,
 247         blade_wait_engine,
 248         blade_fill_rect,
 249         blade_copy_rect,
 250 };
 251
 252 /*
 253  * BladeXP specific acceleration functions
 254  */
 255
 256 #define ROP_P 0xF0
 257 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
 258
 259 static void xp_init_accel(int pitch, int bpp)
 260 {
 261         int tmp = 0, v1;
 262         unsigned char x = 0;
 263
 264         switch (bpp) {
 265         case 8:
 266                 x = 0;
 267                 break;
 268         case 16:
 269                 x = 1;
 270                 break;
 271         case 24:
 272                 x = 3;
 273                 break;
 274         case 32:
 275                 x = 2;
 276                 break;
 277         }
 278
 279         switch (pitch << (bpp >> 3)) {
 280         case 8192:
 281         case 512:
 282                 x |= 0x00;
 283                 break;
 284         case 1024:
 285                 x |= 0x04;
 286                 break;
 287         case 2048:
 288                 x |= 0x08;
 289                 break;
 290         case 4096:
 291                 x |= 0x0C;
 292                 break;
 293         }
 294
 295         t_outb(x, 0x2125);
 296
 297         eng_oper = x | 0x40;
 298
 299         switch (bpp) {
 300         case 8:
 301                 tmp = 18;
 302                 break;
 303         case 15:
 304         case 16:
 305                 tmp = 19;
 306                 break;
 307         case 24:
 308         case 32:
 309                 tmp = 20;
 310                 break;
 311         }
 312
 313         v1 = pitch << tmp;
 314
 315         writemmr(0x2154, v1);
 316         writemmr(0x2150, v1);
 317         t_outb(3, 0x2126);
 318 }
 319
 320 static void xp_wait_engine(void)
 321 {
 322         int busy;
 323         int count, timeout;
 324
 325         count = 0;
 326         timeout = 0;
 327         for (;;) {
 328                 busy = t_inb(STA) & 0x80;
 329                 if (busy != 0x80)
 330                         return;
 331                 count++;
 332                 if (count == 10000000) {
 333                         /* Timeout */
 334                         count = 9990000;
 335                         timeout++;
 336                         if (timeout == 8) {
 337                                 /* Reset engine */
 338                                 t_outb(0x00, 0x2120);
 339                                 return;
 340                         }
 341                 }
 342         }
 343 }
 344
 345 static void xp_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 346 {
 347         writemmr(0x2127, ROP_P);
 348         writemmr(0x2158, c);
 349         writemmr(0x2128, 0x4000);
 350         writemmr(0x2140, masked_point(h, w));
 351         writemmr(0x2138, masked_point(y, x));
 352         t_outb(0x01, 0x2124);
 353         t_outb(eng_oper, 0x2125);
 354 }
 355
 356 static void xp_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 357 {
 358         int direction;
 359         u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 360
 361         direction = 0x0004;
 362
 363         if ((x1 < x2) && (y1 == y2)) {
 364                 direction |= 0x0200;
 365                 x1_tmp = x1 + w - 1;
 366                 x2_tmp = x2 + w - 1;
 367         } else {
 368                 x1_tmp = x1;
 369                 x2_tmp = x2;
 370         }
 371
 372         if (y1 < y2) {
 373                 direction |= 0x0100;
 374                 y1_tmp = y1 + h - 1;
 375                 y2_tmp = y2 + h - 1;
 376         } else {
 377                 y1_tmp = y1;
 378                 y2_tmp = y2;
 379         }
 380
 381         writemmr(0x2128, direction);
 382         t_outb(ROP_S, 0x2127);
 383         writemmr(0x213C, masked_point(y1_tmp, x1_tmp));
 384         writemmr(0x2138, masked_point(y2_tmp, x2_tmp));
 385         writemmr(0x2140, masked_point(h, w));
 386         t_outb(0x01, 0x2124);
 387 }
 388
 389 static struct accel_switch accel_xp = {
 390         xp_init_accel,
 391         xp_wait_engine,
 392         xp_fill_rect,
 393         xp_copy_rect,
 394 };
 395
 396 /*
 397  * Image specific acceleration functions
 398  */
 399 static void image_init_accel(int pitch, int bpp)
 400 {
 401         int tmp = 0;
 402         switch (bpp) {
 403         case 8:
 404                 tmp = 0;
 405                 break;
 406         case 15:
 407                 tmp = 5;
 408                 break;
 409         case 16:
 410                 tmp = 1;
 411                 break;
 412         case 24:
 413         case 32:
 414                 tmp = 2;
 415                 break;
 416         }
 417         writemmr(0x2120, 0xF0000000);
 418         writemmr(0x2120, 0x40000000 | tmp);
 419         writemmr(0x2120, 0x80000000);
 420         writemmr(0x2144, 0x00000000);
 421         writemmr(0x2148, 0x00000000);
 422         writemmr(0x2150, 0x00000000);
 423         writemmr(0x2154, 0x00000000);
 424         writemmr(0x2120, 0x60000000 | (pitch << 16) | pitch);
 425         writemmr(0x216C, 0x00000000);
 426         writemmr(0x2170, 0x00000000);
 427         writemmr(0x217C, 0x00000000);
 428         writemmr(0x2120, 0x10000000);
 429         writemmr(0x2130, (2047 << 16) | 2047);
 430 }
 431
 432 static void image_wait_engine(void)
 433 {
 434         while (readmmr(0x2164) & 0xF0000000) ;
 435 }
 436
 437 static void image_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 438 {
 439         writemmr(0x2120, 0x80000000);
 440         writemmr(0x2120, 0x90000000 | ROP_S);
 441
 442         writemmr(0x2144, c);
 443
 444         writemmr(DR1, point(x, y));
 445         writemmr(DR2, point(x + w - 1, y + h - 1));
 446
 447         writemmr(0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
 448 }
 449
 450 static void image_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 451 {
 452         u32 s1, s2, d1, d2;
 453         int direction = 2;
 454         s1 = point(x1, y1);
 455         s2 = point(x1 + w - 1, y1 + h - 1);
 456         d1 = point(x2, y2);
 457         d2 = point(x2 + w - 1, y2 + h - 1);
 458
 459         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 460                 direction = 0;
 461
 462         writemmr(0x2120, 0x80000000);
 463         writemmr(0x2120, 0x90000000 | ROP_S);
 464
 465         writemmr(SR1, direction ? s2 : s1);
 466         writemmr(SR2, direction ? s1 : s2);
 467         writemmr(DR1, direction ? d2 : d1);
 468         writemmr(DR2, direction ? d1 : d2);
 469         writemmr(0x2124, 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
 470 }
 471
 472 static struct accel_switch accel_image = {
 473         image_init_accel,
 474         image_wait_engine,
 475         image_fill_rect,
 476         image_copy_rect,
 477 };
 478
 479 /*
 480  * Accel functions called by the upper layers
 481  */
 482 #ifdef CONFIG_FB_TRIDENT_ACCEL
 483 static void tridentfb_fillrect(struct fb_info *info,
 484                                const struct fb_fillrect *fr)
 485 {
 486         int bpp = info->var.bits_per_pixel;
 487         int col = 0;
 488
 489         switch (bpp) {
 490         default:
 491         case 8:
 492                 col |= fr->color;
 493                 col |= col << 8;
 494                 col |= col << 16;
 495                 break;
 496         case 16:
 497                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 498                 break;
 499         case 32:
 500                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 501                 break;
 502         }
 503
 504         acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop);
 505         acc->wait_engine();
 506 }
 507 static void tridentfb_copyarea(struct fb_info *info,
 508                                const struct fb_copyarea *ca)
 509 {
 510         acc->copy_rect(ca->sx, ca->sy, ca->dx, ca->dy, ca->width, ca->height);
 511         acc->wait_engine();
 512 }
 513 #else /* !CONFIG_FB_TRIDENT_ACCEL */
 514 #define tridentfb_fillrect cfb_fillrect
 515 #define tridentfb_copyarea cfb_copyarea
 516 #endif /* CONFIG_FB_TRIDENT_ACCEL */
 517
 518
 519 /*
 520  * Hardware access functions
 521  */
 522
 523 static inline unsigned char read3X4(int reg)
 524 {
 525         struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par;
 526         writeb(reg, par->io_virt + CRT + 4);
 527         return readb(par->io_virt + CRT + 5);
 528 }
 529
 530 static inline void write3X4(int reg, unsigned char val)
 531 {
 532         struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par;
 533         writeb(reg, par->io_virt + CRT + 4);
 534         writeb(val, par->io_virt + CRT + 5);
 535 }
 536
 537 static inline unsigned char read3C4(int reg)
 538 {
 539         t_outb(reg, 0x3C4);
 540         return t_inb(0x3C5);
 541 }
 542
 543 static inline void write3C4(int reg, unsigned char val)
 544 {
 545         t_outb(reg, 0x3C4);
 546         t_outb(val, 0x3C5);
 547 }
 548
 549 static inline unsigned char read3CE(int reg)
 550 {
 551         t_outb(reg, 0x3CE);
 552         return t_inb(0x3CF);
 553 }
 554
 555 static inline void writeAttr(int reg, unsigned char val)
 556 {
 557         readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A);     /* flip-flop to index */
 558         t_outb(reg, 0x3C0);
 559         t_outb(val, 0x3C0);
 560 }
 561
 562 static inline void write3CE(int reg, unsigned char val)
 563 {
 564         t_outb(reg, 0x3CE);
 565         t_outb(val, 0x3CF);
 566 }
 567
 568 static void enable_mmio(void)
 569 {
 570         /* Goto New Mode */
 571         outb(0x0B, 0x3C4);
 572         inb(0x3C5);
 573
 574         /* Unprotect registers */
 575         outb(NewMode1, 0x3C4);
 576         outb(0x80, 0x3C5);
 577
 578         /* Enable MMIO */
 579         outb(PCIReg, 0x3D4);
 580         outb(inb(0x3D5) | 0x01, 0x3D5);
 581 }
 582
 583 static void disable_mmio(void)
 584 {
 585         /* Goto New Mode */
 586         t_outb(0x0B, 0x3C4);
 587         t_inb(0x3C5);
 588
 589         /* Unprotect registers */
 590         t_outb(NewMode1, 0x3C4);
 591         t_outb(0x80, 0x3C5);
 592
 593         /* Disable MMIO */
 594         t_outb(PCIReg, 0x3D4);
 595         t_outb(t_inb(0x3D5) & ~0x01, 0x3D5);
 596 }
 597
 598 #define crtc_unlock()   write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F)
 599
 600 /*  Return flat panel's maximum x resolution */
 601 static int __devinit get_nativex(void)
 602 {
 603         int x, y, tmp;
 604
 605         if (nativex)
 606                 return nativex;
 607
 608         tmp = (read3CE(VertStretch) >> 4) & 3;
 609
 610         switch (tmp) {
 611         case 0:
 612                 x = 1280; y = 1024;
 613                 break;
 614         case 2:
 615                 x = 1024; y = 768;
 616                 break;
 617         case 3:
 618                 x = 800; y = 600;
 619                 break;
 620         case 4:
 621                 x = 1400; y = 1050;
 622                 break;
 623         case 1:
 624         default:
 625                 x = 640;  y = 480;
 626                 break;
 627         }
 628
 629         output("%dx%d flat panel found\n", x, y);
 630         return x;
 631 }
 632
 633 /* Set pitch */
 634 static void set_lwidth(int width)
 635 {
 636         write3X4(Offset, width & 0xFF);
 637         write3X4(AddColReg,
 638                  (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >> 4));
 639 }
 640
 641 /* For resolutions smaller than FP resolution stretch */
 642 static void screen_stretch(void)
 643 {
 644         if (chip_id != CYBERBLADEXPAi1)
 645                 write3CE(BiosReg, 0);
 646         else
 647                 write3CE(BiosReg, 8);
 648         write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 1);
 649         write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 1);
 650 }
 651
 652 /* For resolutions smaller than FP resolution center */
 653 static void screen_center(void)
 654 {
 655         write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 0x80);
 656         write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 0x80);
 657 }
 658
 659 /* Address of first shown pixel in display memory */
 660 static void set_screen_start(int base)
 661 {
 662         write3X4(StartAddrLow, base & 0xFF);
 663         write3X4(StartAddrHigh, (base & 0xFF00) >> 8);
 664         write3X4(CRTCModuleTest,
 665                  (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11));
 666         write3X4(CRTHiOrd,
 667                  (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17));
 668 }
 669
 670 /* Use 20.12 fixed-point for NTSC value and frequency calculation */
 671 #define calc_freq(n, m, k)  ( ((unsigned long)0xE517 * (n + 8) / ((m + 2) * (1 << k))) >> 12 )
 672
 673 /* Set dotclock frequency */
 674 static void set_vclk(int freq)
 675 {
 676         int m, n, k;
 677         int f, fi, d, di;
 678         unsigned char lo = 0, hi = 0;
 679
 680         d = 20;
 681         for (k = 2; k >= 0; k--)
 682                 for (m = 0; m < 63; m++)
 683                         for (n = 0; n < 128; n++) {
 684                                 fi = calc_freq(n, m, k);
 685                                 if ((di = abs(fi - freq)) < d) {
 686                                         d = di;
 687                                         f = fi;
 688                                         lo = n;
 689                                         hi = (k << 6) | m;
 690                                 }
 691                         }
 692         if (chip3D) {
 693                 write3C4(ClockHigh, hi);
 694                 write3C4(ClockLow, lo);
 695         } else {
 696                 outb(lo, 0x43C8);
 697                 outb(hi, 0x43C9);
 698         }
 699         debug("VCLK = %X %X\n", hi, lo);
 700 }
 701
 702 /* Set number of lines for flat panels*/
 703 static void set_number_of_lines(int lines)
 704 {
 705         int tmp = read3CE(CyberEnhance) & 0x8F;
 706         if (lines > 1024)
 707                 tmp |= 0x50;
 708         else if (lines > 768)
 709                 tmp |= 0x30;
 710         else if (lines > 600)
 711                 tmp |= 0x20;
 712         else if (lines > 480)
 713                 tmp |= 0x10;
 714         write3CE(CyberEnhance, tmp);
 715 }
 716
 717 /*
 718  * If we see that FP is active we assume we have one.
 719  * Otherwise we have a CRT display.User can override.
 720  */
 721 static unsigned int __devinit get_displaytype(void)
 722 {
 723         if (fp)
 724                 return DISPLAY_FP;
 725         if (crt || !chipcyber)
 726                 return DISPLAY_CRT;
 727         return (read3CE(FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT;
 728 }
 729
 730 /* Try detecting the video memory size */
 731 static unsigned int __devinit get_memsize(void)
 732 {
 733         unsigned char tmp, tmp2;
 734         unsigned int k;
 735
 736         /* If memory size provided by user */
 737         if (memsize)
 738                 k = memsize * Kb;
 739         else
 740                 switch (chip_id) {
 741                 case CYBER9525DVD:
 742                         k = 2560 * Kb;
 743                         break;
 744                 default:
 745                         tmp = read3X4(SPR) & 0x0F;
 746                         switch (tmp) {
 747
 748                         case 0x01:
 749                                 k = 512 * Kb;
 750                                 break;
 751                         case 0x02:
 752                                 k = 6 * Mb;     /* XP */
 753                                 break;
 754                         case 0x03:
 755                                 k = 1 * Mb;
 756                                 break;
 757                         case 0x04:
 758                                 k = 8 * Mb;
 759                                 break;
 760                         case 0x06:
 761                                 k = 10 * Mb;    /* XP */
 762                                 break;
 763                         case 0x07:
 764                                 k = 2 * Mb;
 765                                 break;
 766                         case 0x08:
 767                                 k = 12 * Mb;    /* XP */
 768                                 break;
 769                         case 0x0A:
 770                                 k = 14 * Mb;    /* XP */
 771                                 break;
 772                         case 0x0C:
 773                                 k = 16 * Mb;    /* XP */
 774                                 break;
 775                         case 0x0E:              /* XP */
 776
 777                                 tmp2 = read3C4(0xC1);
 778                                 switch (tmp2) {
 779                                 case 0x00:
 780                                         k = 20 * Mb;
 781                                         break;
 782                                 case 0x01:
 783                                         k = 24 * Mb;
 784                                         break;
 785                                 case 0x10:
 786                                         k = 28 * Mb;
 787                                         break;
 788                                 case 0x11:
 789                                         k = 32 * Mb;
 790                                         break;
 791                                 default:
 792                                         k = 1 * Mb;
 793                                         break;
 794                                 }
 795                                 break;
 796
 797                         case 0x0F:
 798                                 k = 4 * Mb;
 799                                 break;
 800                         default:
 801                                 k = 1 * Mb;
 802                                 break;
 803                         }
 804                 }
 805
 806         k -= memdiff * Kb;
 807         output("framebuffer size = %d Kb\n", k / Kb);
 808         return k;
 809 }
 810
 811 /* See if we can handle the video mode described in var */
 812 static int tridentfb_check_var(struct fb_var_screeninfo *var,
 813                                struct fb_info *info)
 814 {
 815         int bpp = var->bits_per_pixel;
 816         debug("enter\n");
 817
 818         /* check color depth */
 819         if (bpp == 24)
 820                 bpp = var->bits_per_pixel = 32;
 821         /* check whether resolution fits on panel and in memory */
 822         if (flatpanel && nativex && var->xres > nativex)
 823                 return -EINVAL;
 824         if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
 825                 return -EINVAL;
 826
 827         switch (bpp) {
 828         case 8:
 829                 var->red.offset = 0;
 830                 var->green.offset = 0;
 831                 var->blue.offset = 0;
 832                 var->red.length = 6;
 833                 var->green.length = 6;
 834                 var->blue.length = 6;
 835                 break;
 836         case 16:
 837                 var->red.offset = 11;
 838                 var->green.offset = 5;
 839                 var->blue.offset = 0;
 840                 var->red.length = 5;
 841                 var->green.length = 6;
 842                 var->blue.length = 5;
 843                 break;
 844         case 32:
 845                 var->red.offset = 16;
 846                 var->green.offset = 8;
 847                 var->blue.offset = 0;
 848                 var->red.length = 8;
 849                 var->green.length = 8;
 850                 var->blue.length = 8;
 851                 break;
 852         default:
 853                 return -EINVAL;
 854         }
 855         debug("exit\n");
 856
 857         return 0;
 858
 859 }
 860
 861 /* Pan the display */
 862 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
 863                                  struct fb_info *info)
 864 {
 865         unsigned int offset;
 866
 867         debug("enter\n");
 868         offset = (var->xoffset + (var->yoffset * var->xres))
 869                 * var->bits_per_pixel / 32;
 870         info->var.xoffset = var->xoffset;
 871         info->var.yoffset = var->yoffset;
 872         set_screen_start(offset);
 873         debug("exit\n");
 874         return 0;
 875 }
 876
 877 #define shadowmode_on()  write3CE(CyberControl, read3CE(CyberControl) | 0x81)
 878 #define shadowmode_off() write3CE(CyberControl, read3CE(CyberControl) & 0x7E)
 879
 880 /* Set the hardware to the requested video mode */
 881 static int tridentfb_set_par(struct fb_info *info)
 882 {
 883         struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
 884         u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
 885         u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
 886         struct fb_var_screeninfo *var = &info->var;
 887         int bpp = var->bits_per_pixel;
 888         unsigned char tmp;
 889         debug("enter\n");
 890         hdispend = var->xres / 8 - 1;
 891         hsyncstart = (var->xres + var->right_margin) / 8;
 892         hsyncend = var->hsync_len / 8;
 893         htotal =
 894                 (var->xres + var->left_margin + var->right_margin +
 895                  var->hsync_len) / 8 - 10;
 896         hblankstart = hdispend + 1;
 897         hblankend = htotal + 5;
 898
 899         vdispend = var->yres - 1;
 900         vsyncstart = var->yres + var->lower_margin;
 901         vsyncend = var->vsync_len;
 902         vtotal = var->upper_margin + vsyncstart + vsyncend - 2;
 903         vblankstart = var->yres;
 904         vblankend = vtotal + 2;
 905
 906         enable_mmio();
 907         crtc_unlock();
 908         write3CE(CyberControl, 8);
 909
 910         if (flatpanel && var->xres < nativex) {
 911                 /*
 912                  * on flat panels with native size larger
 913                  * than requested resolution decide whether
 914                  * we stretch or center
 915                  */
 916                 t_outb(0xEB, 0x3C2);
 917
 918                 shadowmode_on();
 919
 920                 if (center)
 921                         screen_center();
 922                 else if (stretch)
 923                         screen_stretch();
 924
 925         } else {
 926                 t_outb(0x2B, 0x3C2);
 927                 write3CE(CyberControl, 8);
 928         }
 929
 930         /* vertical timing values */
 931         write3X4(CRTVTotal, vtotal & 0xFF);
 932         write3X4(CRTVDispEnd, vdispend & 0xFF);
 933         write3X4(CRTVSyncStart, vsyncstart & 0xFF);
 934         write3X4(CRTVSyncEnd, (vsyncend & 0x0F));
 935         write3X4(CRTVBlankStart, vblankstart & 0xFF);
 936         write3X4(CRTVBlankEnd, 0 /* p->vblankend & 0xFF */ );
 937
 938         /* horizontal timing values */
 939         write3X4(CRTHTotal, htotal & 0xFF);
 940         write3X4(CRTHDispEnd, hdispend & 0xFF);
 941         write3X4(CRTHSyncStart, hsyncstart & 0xFF);
 942         write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
 943         write3X4(CRTHBlankStart, hblankstart & 0xFF);
 944         write3X4(CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */ );
 945
 946         /* higher bits of vertical timing values */
 947         tmp = 0x10;
 948         if (vtotal & 0x100) tmp |= 0x01;
 949         if (vdispend & 0x100) tmp |= 0x02;
 950         if (vsyncstart & 0x100) tmp |= 0x04;
 951         if (vblankstart & 0x100) tmp |= 0x08;
 952
 953         if (vtotal & 0x200) tmp |= 0x20;
 954         if (vdispend & 0x200) tmp |= 0x40;
 955         if (vsyncstart & 0x200) tmp |= 0x80;
 956         write3X4(CRTOverflow, tmp);
 957
 958         tmp = read3X4(CRTHiOrd) | 0x08; /* line compare bit 10 */
 959         if (vtotal & 0x400) tmp |= 0x80;
 960         if (vblankstart & 0x400) tmp |= 0x40;
 961         if (vsyncstart & 0x400) tmp |= 0x20;
 962         if (vdispend & 0x400) tmp |= 0x10;
 963         write3X4(CRTHiOrd, tmp);
 964
 965         tmp = 0;
 966         if (htotal & 0x800) tmp |= 0x800 >> 11;
 967         if (hblankstart & 0x800) tmp |= 0x800 >> 7;
 968         write3X4(HorizOverflow, tmp);
 969
 970         tmp = 0x40;
 971         if (vblankstart & 0x200) tmp |= 0x20;
 972 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80;  /* double scan for 200 line modes */
 973         write3X4(CRTMaxScanLine, tmp);
 974
 975         write3X4(CRTLineCompare, 0xFF);
 976         write3X4(CRTPRowScan, 0);
 977         write3X4(CRTModeControl, 0xC3);
 978
 979         write3X4(LinearAddReg, 0x20);   /* enable linear addressing */
 980
 981         tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
 982         write3X4(CRTCModuleTest, tmp);  /* enable access extended memory */
 983
 984         write3X4(GraphEngReg, 0x80);    /* enable GE for text acceleration */
 985
 986 #ifdef CONFIG_FB_TRIDENT_ACCEL
 987         acc->init_accel(info->var.xres, bpp);
 988 #endif
 989
 990         switch (bpp) {
 991         case 8:
 992                 tmp = 0x00;
 993                 break;
 994         case 16:
 995                 tmp = 0x05;
 996                 break;
 997         case 24:
 998                 tmp = 0x29;
 999                 break;
1000         case 32:
1001                 tmp = 0x09;
1002                 break;
1003         }
1004
1005         write3X4(PixelBusReg, tmp);
1006
1007         tmp = 0x10;
1008         if (chipcyber)
1009                 tmp |= 0x20;
1010         write3X4(DRAMControl, tmp);     /* both IO, linear enable */
1011
1012         write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40);
1013         write3X4(Performance, 0x92);
1014         write3X4(PCIReg, 0x07);         /* MMIO & PCI read and write burst enable */
1015
1016         /* convert from picoseconds to MHz */
1017         par->vclk = 1000000 / info->var.pixclock;
1018         if (bpp == 32)
1019                 par->vclk *= 2;
1020         set_vclk(par->vclk);
1021
1022         write3C4(0, 3);
1023         write3C4(1, 1);         /* set char clock 8 dots wide */
1024         write3C4(2, 0x0F);      /* enable 4 maps because needed in chain4 mode */
1025         write3C4(3, 0);
1026         write3C4(4, 0x0E);      /* memory mode enable bitmaps ?? */
1027
1028         write3CE(MiscExtFunc, (bpp == 32) ? 0x1A : 0x12);       /* divide clock by 2 if 32bpp */
1029                                                         /* chain4 mode display and CPU path */
1030         write3CE(0x5, 0x40);    /* no CGA compat, allow 256 col */
1031         write3CE(0x6, 0x05);    /* graphics mode */
1032         write3CE(0x7, 0x0F);    /* planes? */
1033
1034         if (chip_id == CYBERBLADEXPAi1) {
1035                 /* This fixes snow-effect in 32 bpp */
1036                 write3X4(CRTHSyncStart, 0x84);
1037         }
1038
1039         writeAttr(0x10, 0x41);  /* graphics mode and support 256 color modes */
1040         writeAttr(0x12, 0x0F);  /* planes */
1041         writeAttr(0x13, 0);     /* horizontal pel panning */
1042
1043         /* colors */
1044         for (tmp = 0; tmp < 0x10; tmp++)
1045                 writeAttr(tmp, tmp);
1046         readb(par->io_virt + CRT + 0x0A);       /* flip-flop to index */
1047         t_outb(0x20, 0x3C0);                    /* enable attr */
1048
1049         switch (bpp) {
1050         case 8:
1051                 tmp = 0;
1052                 break;
1053         case 15:
1054                 tmp = 0x10;
1055                 break;
1056         case 16:
1057                 tmp = 0x30;
1058                 break;
1059         case 24:
1060         case 32:
1061                 tmp = 0xD0;
1062                 break;
1063         }
1064
1065         t_inb(0x3C8);
1066         t_inb(0x3C6);
1067         t_inb(0x3C6);
1068         t_inb(0x3C6);
1069         t_inb(0x3C6);
1070         t_outb(tmp, 0x3C6);
1071         t_inb(0x3C8);
1072
1073         if (flatpanel)
1074                 set_number_of_lines(info->var.yres);
1075         set_lwidth(info->var.xres * bpp / (4 * 16));
1076         info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1077         info->fix.line_length = info->var.xres * (bpp >> 3);
1078         info->cmap.len = (bpp == 8) ? 256 : 16;
1079         debug("exit\n");
1080         return 0;
1081 }
1082
1083 /* Set one color register */
1084 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1085                                unsigned blue, unsigned transp,
1086                                struct fb_info *info)
1087 {
1088         int bpp = info->var.bits_per_pixel;
1089
1090         if (regno >= info->cmap.len)
1091                 return 1;
1092
1093         if (bpp == 8) {
1094                 t_outb(0xFF, 0x3C6);
1095                 t_outb(regno, 0x3C8);
1096
1097                 t_outb(red >> 10, 0x3C9);
1098                 t_outb(green >> 10, 0x3C9);
1099                 t_outb(blue >> 10, 0x3C9);
1100
1101         } else if (regno < 16) {
1102                 if (bpp == 16) {        /* RGB 565 */
1103                         u32 col;
1104
1105                         col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1106                                 ((blue & 0xF800) >> 11);
1107                         col |= col << 16;
1108                         ((u32 *)(info->pseudo_palette))[regno] = col;
1109                 } else if (bpp == 32)           /* ARGB 8888 */
1110                         ((u32*)info->pseudo_palette)[regno] =
1111                                 ((transp & 0xFF00) << 16)       |
1112                                 ((red & 0xFF00) << 8)           |
1113                                 ((green & 0xFF00))              |
1114                                 ((blue & 0xFF00) >> 8);
1115         }
1116
1117 /*      debug("exit\n"); */
1118         return 0;
1119 }
1120
1121 /* Try blanking the screen.For flat panels it does nothing */
1122 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1123 {
1124         unsigned char PMCont, DPMSCont;
1125
1126         debug("enter\n");
1127         if (flatpanel)
1128                 return 0;
1129         t_outb(0x04, 0x83C8); /* Read DPMS Control */
1130         PMCont = t_inb(0x83C6) & 0xFC;
1131         DPMSCont = read3CE(PowerStatus) & 0xFC;
1132         switch (blank_mode) {
1133         case FB_BLANK_UNBLANK:
1134                 /* Screen: On, HSync: On, VSync: On */
1135         case FB_BLANK_NORMAL:
1136                 /* Screen: Off, HSync: On, VSync: On */
1137                 PMCont |= 0x03;
1138                 DPMSCont |= 0x00;
1139                 break;
1140         case FB_BLANK_HSYNC_SUSPEND:
1141                 /* Screen: Off, HSync: Off, VSync: On */
1142                 PMCont |= 0x02;
1143                 DPMSCont |= 0x01;
1144                 break;
1145         case FB_BLANK_VSYNC_SUSPEND:
1146                 /* Screen: Off, HSync: On, VSync: Off */
1147                 PMCont |= 0x02;
1148                 DPMSCont |= 0x02;
1149                 break;
1150         case FB_BLANK_POWERDOWN:
1151                 /* Screen: Off, HSync: Off, VSync: Off */
1152                 PMCont |= 0x00;
1153                 DPMSCont |= 0x03;
1154                 break;
1155         }
1156
1157         write3CE(PowerStatus, DPMSCont);
1158         t_outb(4, 0x83C8);
1159         t_outb(PMCont, 0x83C6);
1160
1161         debug("exit\n");
1162
1163         /* let fbcon do a softblank for us */
1164         return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1165 }
1166
1167 static struct fb_ops tridentfb_ops = {
1168         .owner = THIS_MODULE,
1169         .fb_setcolreg = tridentfb_setcolreg,
1170         .fb_pan_display = tridentfb_pan_display,
1171         .fb_blank = tridentfb_blank,
1172         .fb_check_var = tridentfb_check_var,
1173         .fb_set_par = tridentfb_set_par,
1174         .fb_fillrect = tridentfb_fillrect,
1175         .fb_copyarea = tridentfb_copyarea,
1176         .fb_imageblit = cfb_imageblit,
1177 };
1178
1179 static int __devinit trident_pci_probe(struct pci_dev * dev,
1180                                        const struct pci_device_id * id)
1181 {
1182         int err;
1183         unsigned char revision;
1184
1185         err = pci_enable_device(dev);
1186         if (err)
1187                 return err;
1188
1189         chip_id = id->device;
1190
1191         if (chip_id == CYBERBLADEi1)
1192                 output("*** Please do use cyblafb, Cyberblade/i1 support "
1193                        "will soon be removed from tridentfb!\n");
1194
1195
1196         /* If PCI id is 0x9660 then further detect chip type */
1197
1198         if (chip_id == TGUI9660) {
1199                 outb(RevisionID, 0x3C4);
1200                 revision = inb(0x3C5);
1201
1202                 switch (revision) {
1203                 case 0x22:
1204                 case 0x23:
1205                         chip_id = CYBER9397;
1206                         break;
1207                 case 0x2A:
1208                         chip_id = CYBER9397DVD;
1209                         break;
1210                 case 0x30:
1211                 case 0x33:
1212                 case 0x34:
1213                 case 0x35:
1214                 case 0x38:
1215                 case 0x3A:
1216                 case 0xB3:
1217                         chip_id = CYBER9385;
1218                         break;
1219                 case 0x40 ... 0x43:
1220                         chip_id = CYBER9382;
1221                         break;
1222                 case 0x4A:
1223                         chip_id = CYBER9388;
1224                         break;
1225                 default:
1226                         break;
1227                 }
1228         }
1229
1230         chip3D = is3Dchip(chip_id);
1231         chipcyber = iscyber(chip_id);
1232
1233         if (is_xp(chip_id)) {
1234                 acc = &accel_xp;
1235         } else if (is_blade(chip_id)) {
1236                 acc = &accel_blade;
1237         } else {
1238                 acc = &accel_image;
1239         }
1240
1241         /* acceleration is on by default for 3D chips */
1242         defaultaccel = chip3D && !noaccel;
1243
1244         fb_info.par = &default_par;
1245
1246         /* setup MMIO region */
1247         tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1248         tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1249
1250         if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1251                 debug("request_region failed!\n");
1252                 return -1;
1253         }
1254
1255         default_par.io_virt = ioremap_nocache(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1256
1257         if (!default_par.io_virt) {
1258                 debug("ioremap failed\n");
1259                 err = -1;
1260                 goto out_unmap1;
1261         }
1262
1263         enable_mmio();
1264
1265         /* setup framebuffer memory */
1266         tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1267         tridentfb_fix.smem_len = get_memsize();
1268
1269         if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1270                 debug("request_mem_region failed!\n");
1271                 disable_mmio();
1272                 err = -1;
1273                 goto out_unmap1;
1274         }
1275
1276         fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1277                                               tridentfb_fix.smem_len);
1278
1279         if (!fb_info.screen_base) {
1280                 debug("ioremap failed\n");
1281                 err = -1;
1282                 goto out_unmap2;
1283         }
1284
1285         output("%s board found\n", pci_name(dev));
1286         displaytype = get_displaytype();
1287
1288         if (flatpanel)
1289                 nativex = get_nativex();
1290
1291         fb_info.fix = tridentfb_fix;
1292         fb_info.fbops = &tridentfb_ops;
1293
1294
1295         fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1296 #ifdef CONFIG_FB_TRIDENT_ACCEL
1297         fb_info.flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1298 #endif
1299         fb_info.pseudo_palette = pseudo_pal;
1300
1301         if (!fb_find_mode(&default_var, &fb_info,
1302                           mode_option, NULL, 0, NULL, bpp)) {
1303                 err = -EINVAL;
1304                 goto out_unmap2;
1305         }
1306         err = fb_alloc_cmap(&fb_info.cmap, 256, 0);
1307         if (err < 0)
1308                 goto out_unmap2;
1309
1310         if (defaultaccel && acc)
1311                 default_var.accel_flags |= FB_ACCELF_TEXT;
1312         else
1313                 default_var.accel_flags &= ~FB_ACCELF_TEXT;
1314         default_var.activate |= FB_ACTIVATE_NOW;
1315         fb_info.var = default_var;
1316         fb_info.device = &dev->dev;
1317         if (register_framebuffer(&fb_info) < 0) {
1318                 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1319                 fb_dealloc_cmap(&fb_info.cmap);
1320                 err = -EINVAL;
1321                 goto out_unmap2;
1322         }
1323         output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1324            fb_info.node, fb_info.fix.id, default_var.xres,
1325            default_var.yres, default_var.bits_per_pixel);
1326         return 0;
1327
1328 out_unmap2:
1329         if (fb_info.screen_base)
1330                 iounmap(fb_info.screen_base);
1331         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1332         disable_mmio();
1333 out_unmap1:
1334         if (default_par.io_virt)
1335                 iounmap(default_par.io_virt);
1336         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1337         return err;
1338 }
1339
1340 static void __devexit trident_pci_remove(struct pci_dev *dev)
1341 {
1342         struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par;
1343         unregister_framebuffer(&fb_info);
1344         iounmap(par->io_virt);
1345         iounmap(fb_info.screen_base);
1346         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1347         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1348 }
1349
1350 /* List of boards that we are trying to support */
1351 static struct pci_device_id trident_devices[] = {
1352         {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1353         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1354         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1355         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1356         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1357         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1358         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1359         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1360         {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1361         {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1362         {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1363         {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1364         {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1365         {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1366         {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1367         {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1368         {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1369         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1370         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1371         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1372         {0,}
1373 };
1374
1375 MODULE_DEVICE_TABLE(pci, trident_devices);
1376
1377 static struct pci_driver tridentfb_pci_driver = {
1378         .name = "tridentfb",
1379         .id_table = trident_devices,
1380         .probe = trident_pci_probe,
1381         .remove = __devexit_p(trident_pci_remove)
1382 };
1383
1384 /*
1385  * Parse user specified options (`video=trident:')
1386  * example:
1387  *      video=trident:800x600,bpp=16,noaccel
1388  */
1389 #ifndef MODULE
1390 static int __init tridentfb_setup(char *options)
1391 {
1392         char *opt;
1393         if (!options || !*options)
1394                 return 0;
1395         while ((opt = strsep(&options, ",")) != NULL) {
1396                 if (!*opt)
1397                         continue;
1398                 if (!strncmp(opt, "noaccel", 7))
1399                         noaccel = 1;
1400                 else if (!strncmp(opt, "fp", 2))
1401                         displaytype = DISPLAY_FP;
1402                 else if (!strncmp(opt, "crt", 3))
1403                         displaytype = DISPLAY_CRT;
1404                 else if (!strncmp(opt, "bpp=", 4))
1405                         bpp = simple_strtoul(opt + 4, NULL, 0);
1406                 else if (!strncmp(opt, "center", 6))
1407                         center = 1;
1408                 else if (!strncmp(opt, "stretch", 7))
1409                         stretch = 1;
1410                 else if (!strncmp(opt, "memsize=", 8))
1411                         memsize = simple_strtoul(opt + 8, NULL, 0);
1412                 else if (!strncmp(opt, "memdiff=", 8))
1413                         memdiff = simple_strtoul(opt + 8, NULL, 0);
1414                 else if (!strncmp(opt, "nativex=", 8))
1415                         nativex = simple_strtoul(opt + 8, NULL, 0);
1416                 else
1417                         mode_option = opt;
1418         }
1419         return 0;
1420 }
1421 #endif
1422
1423 static int __init tridentfb_init(void)
1424 {
1425 #ifndef MODULE
1426         char *option = NULL;
1427
1428         if (fb_get_options("tridentfb", &option))
1429                 return -ENODEV;
1430         tridentfb_setup(option);
1431 #endif
1432         output("Trident framebuffer %s initializing\n", VERSION);
1433         return pci_register_driver(&tridentfb_pci_driver);
1434 }
1435
1436 static void __exit tridentfb_exit(void)
1437 {
1438         pci_unregister_driver(&tridentfb_pci_driver);
1439 }
1440
1441 module_init(tridentfb_init);
1442 module_exit(tridentfb_exit);
1443
1444 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1445 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1446 MODULE_LICENSE("GPL");
1447