5 * National Semiconductor LM90
7 Addresses scanned: I2C 0x4c
8 Datasheet: Publicly available at the National Semiconductor website
9 http://www.national.com/pf/LM/LM90.html
10 * National Semiconductor LM89
12 Addresses scanned: I2C 0x4c and 0x4d
13 Datasheet: Publicly available at the National Semiconductor website
14 http://www.national.com/mpf/LM/LM89.html
15 * National Semiconductor LM99
17 Addresses scanned: I2C 0x4c and 0x4d
18 Datasheet: Publicly available at the National Semiconductor website
19 http://www.national.com/pf/LM/LM99.html
20 * National Semiconductor LM86
22 Addresses scanned: I2C 0x4c
23 Datasheet: Publicly available at the National Semiconductor website
24 http://www.national.com/mpf/LM/LM86.html
25 * Analog Devices ADM1032
27 Addresses scanned: I2C 0x4c and 0x4d
28 Datasheet: Publicly available at the ON Semiconductor website
29 http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032
30 * Analog Devices ADT7461
32 Addresses scanned: I2C 0x4c and 0x4d
33 Datasheet: Publicly available at the ON Semiconductor website
34 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
37 Addresses scanned: I2C 0x4d
38 Datasheet: Publicly available at the Maxim website
39 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
42 Addresses scanned: I2C 0x4e
43 Datasheet: Publicly available at the Maxim website
44 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
47 Addresses scanned: I2C 0x4c
48 Datasheet: Publicly available at the Maxim website
49 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
52 Addresses scanned: I2C 0x4c
53 Datasheet: Publicly available at the Maxim website
54 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
57 Addresses scanned: I2C 0x4c
58 Datasheet: Publicly available at the Maxim website
59 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
62 Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e)
63 Datasheet: Publicly available at the Maxim website
64 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
67 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
69 Datasheet: Publicly available at the Maxim website
70 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
73 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
75 Datasheet: Publicly available at the Maxim website
76 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
79 Author: Jean Delvare <khali@linux-fr.org>
85 The LM90 is a digital temperature sensor. It senses its own temperature as
86 well as the temperature of up to one external diode. It is compatible
87 with many other devices, many of which are supported by this driver.
89 Note that there is no easy way to differentiate between the MAX6657,
90 MAX6658 and MAX6659 variants. The extra address and features of the
91 MAX6659 are not supported by this driver. The MAX6680 and MAX6681 only
92 differ in their pinout, therefore they obviously can't (and don't need to)
95 The specificity of this family of chipsets over the ADM1021/LM84
96 family is that it features critical limits with hysteresis, and an
97 increased resolution of the remote temperature measurement.
99 The different chipsets of the family are not strictly identical, although
100 very similar. For reference, here comes a non-exhaustive list of specific
104 * Filter and alert configuration register at 0xBF.
105 * ALERT is triggered by temperatures over critical limits.
109 * Better external channel accuracy
113 * External temperature shifted by 16 degrees down
116 * Consecutive alert register at 0x22.
117 * Conversion averaging.
118 * Up to 64 conversions/s.
119 * ALERT is triggered by open remote sensor.
120 * SMBus PEC support for Write Byte and Receive Byte transactions.
123 * Extended temperature range (breaks compatibility)
124 * Lower resolution for remote temperature
127 * Better local resolution
128 * Remote sensor type selection
131 * Better local resolution
133 * Second critical temperature limit
134 * Remote sensor type selection
138 * Remote sensor type selection
140 All temperature values are given in degrees Celsius. Resolution
141 is 1.0 degree for the local temperature, 0.125 degree for the remote
142 temperature, except for the MAX6657, MAX6658 and MAX6659 which have a
143 resolution of 0.125 degree for both temperatures.
145 Each sensor has its own high and low limits, plus a critical limit.
146 Additionally, there is a relative hysteresis value common to both critical
147 values. To make life easier to user-space applications, two absolute values
148 are exported, one for each channel, but these values are of course linked.
149 Only the local hysteresis can be set from user-space, and the same delta
150 applies to the remote hysteresis.
152 The lm90 driver will not update its values more frequently than every
153 other second; reading them more often will do no harm, but will return
159 The ADM1032 is the only chip of the family which supports PEC. It does
160 not support PEC on all transactions though, so some care must be taken.
162 When reading a register value, the PEC byte is computed and sent by the
163 ADM1032 chip. However, in the case of a combined transaction (SMBus Read
164 Byte), the ADM1032 computes the CRC value over only the second half of
165 the message rather than its entirety, because it thinks the first half
166 of the message belongs to a different transaction. As a result, the CRC
167 value differs from what the SMBus master expects, and all reads fail.
169 For this reason, the lm90 driver will enable PEC for the ADM1032 only if
170 the bus supports the SMBus Send Byte and Receive Byte transaction types.
171 These transactions will be used to read register values, instead of
172 SMBus Read Byte, and PEC will work properly.
174 Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
175 Instead, it will try to write the PEC value to the register (because the
176 SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
177 without PEC), which is not what we want. Thus, PEC is explicitly disabled
178 on SMBus Send Byte transactions in the lm90 driver.
180 PEC on byte data transactions represents a significant increase in bandwidth
181 usage (+33% for writes, +25% for reads) in normal conditions. With the need
182 to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
183 two transactions will typically mean twice as much delay waiting for
184 transaction completion, effectively doubling the register cache refresh time.
185 I guess reliability comes at a price, but it's quite expensive this time.
187 So, as not everyone might enjoy the slowdown, PEC can be disabled through
188 sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
189 to that file to enable PEC again.