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matroxfb: make CONFIG_FB_MATROX_MULTIHEAD=y mandatory
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / video / matrox / matroxfb_base.c
blob6ede98da46184ce32e8dfb8887d4af71e02e1257
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writing this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 #include <linux/version.h>
103
104 #define __OLD_VIDIOC_
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <linux/uaccess.h>
117
118 #ifdef CONFIG_PPC_PMAC
119 #include <asm/machdep.h>
120 unsigned char nvram_read_byte(int);
121 static int default_vmode = VMODE_NVRAM;
122 static int default_cmode = CMODE_NVRAM;
123 #endif
124
125 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
126
127 /* --------------------------------------------------------------------- */
128
129 /*
130 * card parameters
131 */
132
133 /* --------------------------------------------------------------------- */
134
135 static struct fb_var_screeninfo vesafb_defined = {
136 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
137 0,0, /* virtual -> visible no offset */
138 8, /* depth -> load bits_per_pixel */
139 0, /* greyscale ? */
140 {0,0,0}, /* R */
141 {0,0,0}, /* G */
142 {0,0,0}, /* B */
143 {0,0,0}, /* transparency */
144 0, /* standard pixel format */
145 FB_ACTIVATE_NOW,
146 -1,-1,
147 FB_ACCELF_TEXT, /* accel flags */
148 39721L,48L,16L,33L,10L,
149 96L,2L,~0, /* No sync info */
150 FB_VMODE_NONINTERLACED,
151 0, {0,0,0,0,0}
152 };
153
154
155
156 /* --------------------------------------------------------------------- */
157 static void update_crtc2(WPMINFO unsigned int pos) {
158 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
159
160 /* Make sure that displays are compatible */
161 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
162 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
163 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
164 ) {
165 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
166 case 16:
167 case 32:
168 pos = pos * 8;
169 if (info->interlaced) {
170 mga_outl(0x3C2C, pos);
171 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
172 } else {
173 mga_outl(0x3C28, pos);
174 }
175 break;
176 }
177 }
178 }
179
180 static void matroxfb_crtc1_panpos(WPMINFO2) {
181 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
182 unsigned long flags;
183 int panpos;
184
185 matroxfb_DAC_lock_irqsave(flags);
186 panpos = ACCESS_FBINFO(crtc1.panpos);
187 if (panpos >= 0) {
188 unsigned int extvga_reg;
189
190 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
191 extvga_reg = mga_inb(M_EXTVGA_INDEX);
192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193 if (extvga_reg != 0x00) {
194 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 }
196 }
197 matroxfb_DAC_unlock_irqrestore(flags);
198 }
199 }
200
201 static irqreturn_t matrox_irq(int irq, void *dev_id)
202 {
203 u_int32_t status;
204 int handled = 0;
205
206 MINFO_FROM(dev_id);
207
208 status = mga_inl(M_STATUS);
209
210 if (status & 0x20) {
211 mga_outl(M_ICLEAR, 0x20);
212 ACCESS_FBINFO(crtc1.vsync.cnt)++;
213 matroxfb_crtc1_panpos(PMINFO2);
214 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
215 handled = 1;
216 }
217 if (status & 0x200) {
218 mga_outl(M_ICLEAR, 0x200);
219 ACCESS_FBINFO(crtc2.vsync.cnt)++;
220 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
221 handled = 1;
222 }
223 return IRQ_RETVAL(handled);
224 }
225
226 int matroxfb_enable_irq(WPMINFO int reenable) {
227 u_int32_t bm;
228
229 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
230 bm = 0x220;
231 else
232 bm = 0x020;
233
234 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
235 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
236 IRQF_SHARED, "matroxfb", MINFO)) {
237 clear_bit(0, &ACCESS_FBINFO(irq_flags));
238 return -EINVAL;
239 }
240 /* Clear any pending field interrupts */
241 mga_outl(M_ICLEAR, bm);
242 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243 } else if (reenable) {
244 u_int32_t ien;
245
246 ien = mga_inl(M_IEN);
247 if ((ien & bm) != bm) {
248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249 mga_outl(M_IEN, ien | bm);
250 }
251 }
252 return 0;
253 }
254
255 static void matroxfb_disable_irq(WPMINFO2) {
256 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
257 /* Flush pending pan-at-vbl request... */
258 matroxfb_crtc1_panpos(PMINFO2);
259 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
260 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
261 else
262 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
263 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
264 }
265 }
266
267 int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
268 struct matrox_vsync *vs;
269 unsigned int cnt;
270 int ret;
271
272 switch (crtc) {
273 case 0:
274 vs = &ACCESS_FBINFO(crtc1.vsync);
275 break;
276 case 1:
277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
278 return -ENODEV;
279 }
280 vs = &ACCESS_FBINFO(crtc2.vsync);
281 break;
282 default:
283 return -ENODEV;
284 }
285 ret = matroxfb_enable_irq(PMINFO 0);
286 if (ret) {
287 return ret;
288 }
289
290 cnt = vs->cnt;
291 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
292 if (ret < 0) {
293 return ret;
294 }
295 if (ret == 0) {
296 matroxfb_enable_irq(PMINFO 1);
297 return -ETIMEDOUT;
298 }
299 return 0;
300 }
301
302 /* --------------------------------------------------------------------- */
303
304 static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
305 unsigned int pos;
306 unsigned short p0, p1, p2;
307 #ifdef CONFIG_FB_MATROX_32MB
308 unsigned int p3;
309 #endif
310 int vbl;
311 unsigned long flags;
312
313 CRITFLAGS
314
315 DBG(__func__)
316
317 if (ACCESS_FBINFO(dead))
318 return;
319
320 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
321 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
322 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
323 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
324 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
325 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
326 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
327 #ifdef CONFIG_FB_MATROX_32MB
328 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
329 #endif
330
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
333
334 CRITBEGIN
335
336 matroxfb_DAC_lock_irqsave(flags);
337 mga_setr(M_CRTC_INDEX, 0x0D, p0);
338 mga_setr(M_CRTC_INDEX, 0x0C, p1);
339 #ifdef CONFIG_FB_MATROX_32MB
340 if (ACCESS_FBINFO(devflags.support32MB))
341 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
342 #endif
343 if (vbl) {
344 ACCESS_FBINFO(crtc1.panpos) = p2;
345 } else {
346 /* Abort any pending change */
347 ACCESS_FBINFO(crtc1.panpos) = -1;
348 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
349 }
350 matroxfb_DAC_unlock_irqrestore(flags);
351
352 update_crtc2(PMINFO pos);
353
354 CRITEND
355 }
356
357 static void matroxfb_remove(WPMINFO int dummy) {
358 /* Currently we are holding big kernel lock on all dead & usecount updates.
359 * Destroy everything after all users release it. Especially do not unregister
360 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
361 * for device unplugged when in use.
362 * In future we should point mmio.vbase & video.vbase somewhere where we can
363 * write data without causing too much damage...
364 */
365
366 ACCESS_FBINFO(dead) = 1;
367 if (ACCESS_FBINFO(usecount)) {
368 /* destroy it later */
369 return;
370 }
371 matroxfb_unregister_device(MINFO);
372 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
373 matroxfb_g450_shutdown(PMINFO2);
374 #ifdef CONFIG_MTRR
375 if (ACCESS_FBINFO(mtrr.vram_valid))
376 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
377 #endif
378 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
379 mga_iounmap(ACCESS_FBINFO(video.vbase));
380 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
381 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
382 kfree(minfo);
383 }
384
385 /*
386 * Open/Release the frame buffer device
387 */
388
389 static int matroxfb_open(struct fb_info *info, int user)
390 {
391 MINFO_FROM_INFO(info);
392
393 DBG_LOOP(__func__)
394
395 if (ACCESS_FBINFO(dead)) {
396 return -ENXIO;
397 }
398 ACCESS_FBINFO(usecount)++;
399 if (user) {
400 ACCESS_FBINFO(userusecount)++;
401 }
402 return(0);
403 }
404
405 static int matroxfb_release(struct fb_info *info, int user)
406 {
407 MINFO_FROM_INFO(info);
408
409 DBG_LOOP(__func__)
410
411 if (user) {
412 if (0 == --ACCESS_FBINFO(userusecount)) {
413 matroxfb_disable_irq(PMINFO2);
414 }
415 }
416 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
417 matroxfb_remove(PMINFO 0);
418 }
419 return(0);
420 }
421
422 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
423 struct fb_info* info) {
424 MINFO_FROM_INFO(info);
425
426 DBG(__func__)
427
428 matrox_pan_var(PMINFO var);
429 return 0;
430 }
431
432 static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
433 int bppshft2;
434
435 DBG(__func__)
436
437 bppshft2 = bpp;
438 if (!bppshft2) {
439 return 8;
440 }
441 if (isInterleave(MINFO))
442 bppshft2 >>= 1;
443 if (ACCESS_FBINFO(devflags.video64bits))
444 bppshft2 >>= 1;
445 return bppshft2;
446 }
447
448 static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
449 int over;
450 int rounding;
451
452 DBG(__func__)
453
454 switch (bpp) {
455 case 0: return xres;
456 case 4: rounding = 128;
457 break;
458 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
459 break;
460 case 16: rounding = 32;
461 break;
462 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
463 break;
464 default: rounding = 16;
465 /* on G400, 16 really does not work */
466 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
467 rounding = 32;
468 break;
469 }
470 if (isInterleave(MINFO)) {
471 rounding *= 2;
472 }
473 over = xres % rounding;
474 if (over)
475 xres += rounding-over;
476 return xres;
477 }
478
479 static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
480 const int* width;
481 int xres_new;
482
483 DBG(__func__)
484
485 if (!bpp) return xres;
486
487 width = ACCESS_FBINFO(capable.vxres);
488
489 if (ACCESS_FBINFO(devflags.precise_width)) {
490 while (*width) {
491 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
492 break;
493 }
494 width++;
495 }
496 xres_new = *width;
497 } else {
498 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
499 }
500 return xres_new;
501 }
502
503 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
504
505 DBG(__func__)
506
507 switch (var->bits_per_pixel) {
508 case 4:
509 return 16; /* pseudocolor... 16 entries HW palette */
510 case 8:
511 return 256; /* pseudocolor... 256 entries HW palette */
512 case 16:
513 return 16; /* directcolor... 16 entries SW palette */
514 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
515 case 24:
516 return 16; /* directcolor... 16 entries SW palette */
517 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
518 case 32:
519 return 16; /* directcolor... 16 entries SW palette */
520 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
521 }
522 return 16; /* return something reasonable... or panic()? */
523 }
524
525 static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
526 struct RGBT {
527 unsigned char bpp;
528 struct {
529 unsigned char offset,
530 length;
531 } red,
532 green,
533 blue,
534 transp;
535 signed char visual;
536 };
537 static const struct RGBT table[]= {
538 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
539 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
540 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
541 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
542 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
543 };
544 struct RGBT const *rgbt;
545 unsigned int bpp = var->bits_per_pixel;
546 unsigned int vramlen;
547 unsigned int memlen;
548
549 DBG(__func__)
550
551 switch (bpp) {
552 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
553 break;
554 case 8: break;
555 case 16: break;
556 case 24: break;
557 case 32: break;
558 default: return -EINVAL;
559 }
560 *ydstorg = 0;
561 vramlen = ACCESS_FBINFO(video.len_usable);
562 if (var->yres_virtual < var->yres)
563 var->yres_virtual = var->yres;
564 if (var->xres_virtual < var->xres)
565 var->xres_virtual = var->xres;
566
567 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
568 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
569 if (memlen > vramlen) {
570 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
571 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
572 }
573 /* There is hardware bug that no line can cross 4MB boundary */
574 /* give up for CFB24, it is impossible to easy workaround it */
575 /* for other try to do something */
576 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
577 if (bpp == 24) {
578 /* sorry */
579 } else {
580 unsigned int linelen;
581 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
582 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
583 unsigned int max_yres;
584
585 while (m1) {
586 int t;
587
588 while (m2 >= m1) m2 -= m1;
589 t = m1;
590 m1 = m2;
591 m2 = t;
592 }
593 m2 = linelen * PAGE_SIZE / m2;
594 *ydstorg = m2 = 0x400000 % m2;
595 max_yres = (vramlen - m2) / linelen;
596 if (var->yres_virtual > max_yres)
597 var->yres_virtual = max_yres;
598 }
599 }
600 /* YDSTLEN contains only signed 16bit value */
601 if (var->yres_virtual > 32767)
602 var->yres_virtual = 32767;
603 /* we must round yres/xres down, we already rounded y/xres_virtual up
604 if it was possible. We should return -EINVAL, but I disagree */
605 if (var->yres_virtual < var->yres)
606 var->yres = var->yres_virtual;
607 if (var->xres_virtual < var->xres)
608 var->xres = var->xres_virtual;
609 if (var->xoffset + var->xres > var->xres_virtual)
610 var->xoffset = var->xres_virtual - var->xres;
611 if (var->yoffset + var->yres > var->yres_virtual)
612 var->yoffset = var->yres_virtual - var->yres;
613
614 if (bpp == 16 && var->green.length == 5) {
615 bpp--; /* an artifical value - 15 */
616 }
617
618 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
619 #define SETCLR(clr)\
620 var->clr.offset = rgbt->clr.offset;\
621 var->clr.length = rgbt->clr.length
622 SETCLR(red);
623 SETCLR(green);
624 SETCLR(blue);
625 SETCLR(transp);
626 #undef SETCLR
627 *visual = rgbt->visual;
628
629 if (bpp > 8)
630 dprintk("matroxfb: truecolor: "
631 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
632 var->transp.length, var->red.length, var->green.length, var->blue.length,
633 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
634
635 *video_cmap_len = matroxfb_get_cmap_len(var);
636 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
637 var->xres_virtual, var->yres_virtual);
638 return 0;
639 }
640
641 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
642 unsigned blue, unsigned transp,
643 struct fb_info *fb_info)
644 {
645 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
646
647 DBG(__func__)
648
649 /*
650 * Set a single color register. The values supplied are
651 * already rounded down to the hardware's capabilities
652 * (according to the entries in the `var' structure). Return
653 * != 0 for invalid regno.
654 */
655
656 if (regno >= ACCESS_FBINFO(curr.cmap_len))
657 return 1;
658
659 if (ACCESS_FBINFO(fbcon).var.grayscale) {
660 /* gray = 0.30*R + 0.59*G + 0.11*B */
661 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
662 }
663
664 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
665 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
666 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
667 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
668
669 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
670 case 4:
671 case 8:
672 mga_outb(M_DAC_REG, regno);
673 mga_outb(M_DAC_VAL, red);
674 mga_outb(M_DAC_VAL, green);
675 mga_outb(M_DAC_VAL, blue);
676 break;
677 case 16:
678 if (regno >= 16)
679 break;
680 {
681 u_int16_t col =
682 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
683 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
684 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
685 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
686 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
687 }
688 break;
689 case 24:
690 case 32:
691 if (regno >= 16)
692 break;
693 ACCESS_FBINFO(cmap[regno]) =
694 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
695 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
696 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
697 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
698 break;
699 }
700 return 0;
701 }
702
703 static void matroxfb_init_fix(WPMINFO2)
704 {
705 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
706 DBG(__func__)
707
708 strcpy(fix->id,"MATROX");
709
710 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
711 fix->ypanstep = 1;
712 fix->ywrapstep = 0;
713 fix->mmio_start = ACCESS_FBINFO(mmio.base);
714 fix->mmio_len = ACCESS_FBINFO(mmio.len);
715 fix->accel = ACCESS_FBINFO(devflags.accelerator);
716 }
717
718 static void matroxfb_update_fix(WPMINFO2)
719 {
720 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
721 DBG(__func__)
722
723 mutex_lock(&ACCESS_FBINFO(fbcon).mm_lock);
724 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
725 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
726 mutex_unlock(&ACCESS_FBINFO(fbcon).mm_lock);
727 }
728
729 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
730 {
731 int err;
732 int visual;
733 int cmap_len;
734 unsigned int ydstorg;
735 MINFO_FROM_INFO(info);
736
737 if (ACCESS_FBINFO(dead)) {
738 return -ENXIO;
739 }
740 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
741 return err;
742 return 0;
743 }
744
745 static int matroxfb_set_par(struct fb_info *info)
746 {
747 int err;
748 int visual;
749 int cmap_len;
750 unsigned int ydstorg;
751 struct fb_var_screeninfo *var;
752 MINFO_FROM_INFO(info);
753
754 DBG(__func__)
755
756 if (ACCESS_FBINFO(dead)) {
757 return -ENXIO;
758 }
759
760 var = &info->var;
761 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
762 return err;
763 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
764 matroxfb_update_fix(PMINFO2);
765 ACCESS_FBINFO(fbcon).fix.visual = visual;
766 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
767 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
768 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
769 {
770 unsigned int pos;
771
772 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
773 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
774 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
775 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
776 if (var->bits_per_pixel == 4)
777 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
778 else
779 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
780 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
781 { struct my_timming mt;
782 struct matrox_hw_state* hw;
783 int out;
784
785 matroxfb_var2my(var, &mt);
786 mt.crtc = MATROXFB_SRC_CRTC1;
787 /* CRTC1 delays */
788 switch (var->bits_per_pixel) {
789 case 0: mt.delay = 31 + 0; break;
790 case 16: mt.delay = 21 + 8; break;
791 case 24: mt.delay = 17 + 8; break;
792 case 32: mt.delay = 16 + 8; break;
793 default: mt.delay = 31 + 8; break;
794 }
795
796 hw = &ACCESS_FBINFO(hw);
797
798 down_read(&ACCESS_FBINFO(altout).lock);
799 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
800 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
801 ACCESS_FBINFO(outputs[out]).output->compute) {
802 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
803 }
804 }
805 up_read(&ACCESS_FBINFO(altout).lock);
806 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
807 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
808 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
809 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
810 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
811
812 hw->CRTC[0x0D] = pos & 0xFF;
813 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
814 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
815 hw->CRTCEXT[8] = pos >> 21;
816 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
817 update_crtc2(PMINFO pos);
818 down_read(&ACCESS_FBINFO(altout).lock);
819 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
820 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
821 ACCESS_FBINFO(outputs[out]).output->program) {
822 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
823 }
824 }
825 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
826 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
827 ACCESS_FBINFO(outputs[out]).output->start) {
828 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
829 }
830 }
831 up_read(&ACCESS_FBINFO(altout).lock);
832 matrox_cfbX_init(PMINFO2);
833 }
834 }
835 ACCESS_FBINFO(initialized) = 1;
836 return 0;
837 }
838
839 static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
840 {
841 unsigned int sts1;
842
843 matroxfb_enable_irq(PMINFO 0);
844 memset(vblank, 0, sizeof(*vblank));
845 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
846 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
847 sts1 = mga_inb(M_INSTS1);
848 vblank->vcount = mga_inl(M_VCOUNT);
849 /* BTW, on my PIII/450 with G400, reading M_INSTS1
850 byte makes this call about 12% slower (1.70 vs. 2.05 us
851 per ioctl()) */
852 if (sts1 & 1)
853 vblank->flags |= FB_VBLANK_HBLANKING;
854 if (sts1 & 8)
855 vblank->flags |= FB_VBLANK_VSYNCING;
856 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
857 vblank->flags |= FB_VBLANK_VBLANKING;
858 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
859 vblank->flags |= FB_VBLANK_HAVE_COUNT;
860 /* Only one writer, aligned int value...
861 it should work without lock and without atomic_t */
862 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
863 }
864 return 0;
865 }
866
867 static struct matrox_altout panellink_output = {
868 .name = "Panellink output",
869 };
870
871 static int matroxfb_ioctl(struct fb_info *info,
872 unsigned int cmd, unsigned long arg)
873 {
874 void __user *argp = (void __user *)arg;
875 MINFO_FROM_INFO(info);
876
877 DBG(__func__)
878
879 if (ACCESS_FBINFO(dead)) {
880 return -ENXIO;
881 }
882
883 switch (cmd) {
884 case FBIOGET_VBLANK:
885 {
886 struct fb_vblank vblank;
887 int err;
888
889 err = matroxfb_get_vblank(PMINFO &vblank);
890 if (err)
891 return err;
892 if (copy_to_user(argp, &vblank, sizeof(vblank)))
893 return -EFAULT;
894 return 0;
895 }
896 case FBIO_WAITFORVSYNC:
897 {
898 u_int32_t crt;
899
900 if (get_user(crt, (u_int32_t __user *)arg))
901 return -EFAULT;
902
903 return matroxfb_wait_for_sync(PMINFO crt);
904 }
905 case MATROXFB_SET_OUTPUT_MODE:
906 {
907 struct matroxioc_output_mode mom;
908 struct matrox_altout *oproc;
909 int val;
910
911 if (copy_from_user(&mom, argp, sizeof(mom)))
912 return -EFAULT;
913 if (mom.output >= MATROXFB_MAX_OUTPUTS)
914 return -ENXIO;
915 down_read(&ACCESS_FBINFO(altout.lock));
916 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
917 if (!oproc) {
918 val = -ENXIO;
919 } else if (!oproc->verifymode) {
920 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
921 val = 0;
922 } else {
923 val = -EINVAL;
924 }
925 } else {
926 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
927 }
928 if (!val) {
929 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
930 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
931 val = 1;
932 }
933 }
934 up_read(&ACCESS_FBINFO(altout.lock));
935 if (val != 1)
936 return val;
937 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
938 case MATROXFB_SRC_CRTC1:
939 matroxfb_set_par(info);
940 break;
941 case MATROXFB_SRC_CRTC2:
942 {
943 struct matroxfb_dh_fb_info* crtc2;
944
945 down_read(&ACCESS_FBINFO(crtc2.lock));
946 crtc2 = ACCESS_FBINFO(crtc2.info);
947 if (crtc2)
948 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
949 up_read(&ACCESS_FBINFO(crtc2.lock));
950 }
951 break;
952 }
953 return 0;
954 }
955 case MATROXFB_GET_OUTPUT_MODE:
956 {
957 struct matroxioc_output_mode mom;
958 struct matrox_altout *oproc;
959 int val;
960
961 if (copy_from_user(&mom, argp, sizeof(mom)))
962 return -EFAULT;
963 if (mom.output >= MATROXFB_MAX_OUTPUTS)
964 return -ENXIO;
965 down_read(&ACCESS_FBINFO(altout.lock));
966 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
967 if (!oproc) {
968 val = -ENXIO;
969 } else {
970 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
971 val = 0;
972 }
973 up_read(&ACCESS_FBINFO(altout.lock));
974 if (val)
975 return val;
976 if (copy_to_user(argp, &mom, sizeof(mom)))
977 return -EFAULT;
978 return 0;
979 }
980 case MATROXFB_SET_OUTPUT_CONNECTION:
981 {
982 u_int32_t tmp;
983 int i;
984 int changes;
985
986 if (copy_from_user(&tmp, argp, sizeof(tmp)))
987 return -EFAULT;
988 for (i = 0; i < 32; i++) {
989 if (tmp & (1 << i)) {
990 if (i >= MATROXFB_MAX_OUTPUTS)
991 return -ENXIO;
992 if (!ACCESS_FBINFO(outputs[i]).output)
993 return -ENXIO;
994 switch (ACCESS_FBINFO(outputs[i]).src) {
995 case MATROXFB_SRC_NONE:
996 case MATROXFB_SRC_CRTC1:
997 break;
998 default:
999 return -EBUSY;
1000 }
1001 }
1002 }
1003 if (ACCESS_FBINFO(devflags.panellink)) {
1004 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1005 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1006 return -EINVAL;
1007 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1008 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1009 return -EBUSY;
1010 }
1011 }
1012 }
1013 }
1014 changes = 0;
1015 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1016 if (tmp & (1 << i)) {
1017 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1018 changes = 1;
1019 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1020 }
1021 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1022 changes = 1;
1023 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1024 }
1025 }
1026 if (!changes)
1027 return 0;
1028 matroxfb_set_par(info);
1029 return 0;
1030 }
1031 case MATROXFB_GET_OUTPUT_CONNECTION:
1032 {
1033 u_int32_t conn = 0;
1034 int i;
1035
1036 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1037 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1038 conn |= 1 << i;
1039 }
1040 }
1041 if (put_user(conn, (u_int32_t __user *)arg))
1042 return -EFAULT;
1043 return 0;
1044 }
1045 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1046 {
1047 u_int32_t conn = 0;
1048 int i;
1049
1050 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1051 if (ACCESS_FBINFO(outputs[i]).output) {
1052 switch (ACCESS_FBINFO(outputs[i]).src) {
1053 case MATROXFB_SRC_NONE:
1054 case MATROXFB_SRC_CRTC1:
1055 conn |= 1 << i;
1056 break;
1057 }
1058 }
1059 }
1060 if (ACCESS_FBINFO(devflags.panellink)) {
1061 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1062 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1063 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1064 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1065 }
1066 if (put_user(conn, (u_int32_t __user *)arg))
1067 return -EFAULT;
1068 return 0;
1069 }
1070 case MATROXFB_GET_ALL_OUTPUTS:
1071 {
1072 u_int32_t conn = 0;
1073 int i;
1074
1075 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1076 if (ACCESS_FBINFO(outputs[i]).output) {
1077 conn |= 1 << i;
1078 }
1079 }
1080 if (put_user(conn, (u_int32_t __user *)arg))
1081 return -EFAULT;
1082 return 0;
1083 }
1084 case VIDIOC_QUERYCAP:
1085 {
1086 struct v4l2_capability r;
1087
1088 memset(&r, 0, sizeof(r));
1089 strcpy(r.driver, "matroxfb");
1090 strcpy(r.card, "Matrox");
1091 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1092 r.version = KERNEL_VERSION(1,0,0);
1093 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1094 if (copy_to_user(argp, &r, sizeof(r)))
1095 return -EFAULT;
1096 return 0;
1097
1098 }
1099 case VIDIOC_QUERYCTRL:
1100 {
1101 struct v4l2_queryctrl qctrl;
1102 int err;
1103
1104 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1105 return -EFAULT;
1106
1107 down_read(&ACCESS_FBINFO(altout).lock);
1108 if (!ACCESS_FBINFO(outputs[1]).output) {
1109 err = -ENXIO;
1110 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1111 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1112 } else {
1113 err = -EINVAL;
1114 }
1115 up_read(&ACCESS_FBINFO(altout).lock);
1116 if (err >= 0 &&
1117 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1118 return -EFAULT;
1119 return err;
1120 }
1121 case VIDIOC_G_CTRL:
1122 {
1123 struct v4l2_control ctrl;
1124 int err;
1125
1126 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1127 return -EFAULT;
1128
1129 down_read(&ACCESS_FBINFO(altout).lock);
1130 if (!ACCESS_FBINFO(outputs[1]).output) {
1131 err = -ENXIO;
1132 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1133 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1134 } else {
1135 err = -EINVAL;
1136 }
1137 up_read(&ACCESS_FBINFO(altout).lock);
1138 if (err >= 0 &&
1139 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1140 return -EFAULT;
1141 return err;
1142 }
1143 case VIDIOC_S_CTRL_OLD:
1144 case VIDIOC_S_CTRL:
1145 {
1146 struct v4l2_control ctrl;
1147 int err;
1148
1149 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1150 return -EFAULT;
1151
1152 down_read(&ACCESS_FBINFO(altout).lock);
1153 if (!ACCESS_FBINFO(outputs[1]).output) {
1154 err = -ENXIO;
1155 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1156 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1157 } else {
1158 err = -EINVAL;
1159 }
1160 up_read(&ACCESS_FBINFO(altout).lock);
1161 return err;
1162 }
1163 }
1164 return -ENOTTY;
1165 }
1166
1167 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1168
1169 static int matroxfb_blank(int blank, struct fb_info *info)
1170 {
1171 int seq;
1172 int crtc;
1173 CRITFLAGS
1174 MINFO_FROM_INFO(info);
1175
1176 DBG(__func__)
1177
1178 if (ACCESS_FBINFO(dead))
1179 return 1;
1180
1181 switch (blank) {
1182 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1183 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1184 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1185 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1186 default: seq = 0x00; crtc = 0x00; break;
1187 }
1188
1189 CRITBEGIN
1190
1191 mga_outb(M_SEQ_INDEX, 1);
1192 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1193 mga_outb(M_EXTVGA_INDEX, 1);
1194 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1195
1196 CRITEND
1197 return 0;
1198 }
1199
1200 static struct fb_ops matroxfb_ops = {
1201 .owner = THIS_MODULE,
1202 .fb_open = matroxfb_open,
1203 .fb_release = matroxfb_release,
1204 .fb_check_var = matroxfb_check_var,
1205 .fb_set_par = matroxfb_set_par,
1206 .fb_setcolreg = matroxfb_setcolreg,
1207 .fb_pan_display =matroxfb_pan_display,
1208 .fb_blank = matroxfb_blank,
1209 .fb_ioctl = matroxfb_ioctl,
1210 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1211 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1212 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1213 /* .fb_cursor = <set by matrox_cfbX_init>, */
1214 };
1215
1216 #define RSDepth(X) (((X) >> 8) & 0x0F)
1217 #define RS8bpp 0x1
1218 #define RS15bpp 0x2
1219 #define RS16bpp 0x3
1220 #define RS32bpp 0x4
1221 #define RS4bpp 0x5
1222 #define RS24bpp 0x6
1223 #define RSText 0x7
1224 #define RSText8 0x8
1225 /* 9-F */
1226 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1227 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1228 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1229 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1230 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1231 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1232 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1233 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1234 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1235 };
1236
1237 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1238 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1239 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1240 static int inv24; /* "matrox:inv24" */
1241 static int cross4MB = -1; /* "matrox:cross4MB" */
1242 static int disabled; /* "matrox:disabled" */
1243 static int noaccel; /* "matrox:noaccel" */
1244 static int nopan; /* "matrox:nopan" */
1245 static int no_pci_retry; /* "matrox:nopciretry" */
1246 static int novga; /* "matrox:novga" */
1247 static int nobios; /* "matrox:nobios" */
1248 static int noinit = 1; /* "matrox:init" */
1249 static int inverse; /* "matrox:inverse" */
1250 static int sgram; /* "matrox:sgram" */
1251 #ifdef CONFIG_MTRR
1252 static int mtrr = 1; /* "matrox:nomtrr" */
1253 #endif
1254 static int grayscale; /* "matrox:grayscale" */
1255 static int dev = -1; /* "matrox:dev:xxxxx" */
1256 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1257 static int depth = -1; /* "matrox:depth:xxxxx" */
1258 static unsigned int xres; /* "matrox:xres:xxxxx" */
1259 static unsigned int yres; /* "matrox:yres:xxxxx" */
1260 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1261 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1262 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1263 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1264 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1265 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1266 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1267 static int sync = -1; /* "matrox:sync:xxxxx" */
1268 static unsigned int fv; /* "matrox:fv:xxxxx" */
1269 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1270 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1271 static int dfp; /* "matrox:dfp */
1272 static int dfp_type = -1; /* "matrox:dfp:xxx */
1273 static int memtype = -1; /* "matrox:memtype:xxx" */
1274 static char outputs[8]; /* "matrox:outputs:xxx" */
1275
1276 #ifndef MODULE
1277 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1278 #endif
1279
1280 static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1281 vaddr_t vm;
1282 unsigned int offs;
1283 unsigned int offs2;
1284 unsigned char orig;
1285 unsigned char bytes[32];
1286 unsigned char* tmp;
1287
1288 DBG(__func__)
1289
1290 vm = ACCESS_FBINFO(video.vbase);
1291 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1292 /* at least 2MB */
1293 if (maxSize < 0x0200000) return 0;
1294 if (maxSize > 0x2000000) maxSize = 0x2000000;
1295
1296 mga_outb(M_EXTVGA_INDEX, 0x03);
1297 orig = mga_inb(M_EXTVGA_DATA);
1298 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1299
1300 tmp = bytes;
1301 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1302 *tmp++ = mga_readb(vm, offs);
1303 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1304 mga_writeb(vm, offs, 0x02);
1305 mga_outb(M_CACHEFLUSH, 0x00);
1306 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1307 if (mga_readb(vm, offs) != 0x02)
1308 break;
1309 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1310 if (mga_readb(vm, offs))
1311 break;
1312 }
1313 tmp = bytes;
1314 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1315 mga_writeb(vm, offs2, *tmp++);
1316
1317 mga_outb(M_EXTVGA_INDEX, 0x03);
1318 mga_outb(M_EXTVGA_DATA, orig);
1319
1320 *realSize = offs - 0x100000;
1321 #ifdef CONFIG_FB_MATROX_MILLENIUM
1322 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1323 #endif
1324 return 1;
1325 }
1326
1327 struct video_board {
1328 int maxvram;
1329 int maxdisplayable;
1330 int accelID;
1331 struct matrox_switch* lowlevel;
1332 };
1333 #ifdef CONFIG_FB_MATROX_MILLENIUM
1334 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1335 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1336 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1337 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1338 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1339 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1340 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1341 #ifdef CONFIG_FB_MATROX_G
1342 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1343 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1344 #ifdef CONFIG_FB_MATROX_32MB
1345 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1346 whole 32MB */
1347 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1348 #else
1349 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1350 #endif
1351 #endif
1352
1353 #define DEVF_VIDEO64BIT 0x0001
1354 #define DEVF_SWAPS 0x0002
1355 #define DEVF_SRCORG 0x0004
1356 #define DEVF_DUALHEAD 0x0008
1357 #define DEVF_CROSS4MB 0x0010
1358 #define DEVF_TEXT4B 0x0020
1359 /* #define DEVF_recycled 0x0040 */
1360 /* #define DEVF_recycled 0x0080 */
1361 #define DEVF_SUPPORT32MB 0x0100
1362 #define DEVF_ANY_VXRES 0x0200
1363 #define DEVF_TEXT16B 0x0400
1364 #define DEVF_CRTC2 0x0800
1365 #define DEVF_MAVEN_CAPABLE 0x1000
1366 #define DEVF_PANELLINK_CAPABLE 0x2000
1367 #define DEVF_G450DAC 0x4000
1368
1369 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1370 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1371 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1372 #define DEVF_G200 (DEVF_G2CORE)
1373 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1374 /* if you'll find how to drive DFP... */
1375 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1376 #define DEVF_G550 (DEVF_G450)
1377
1378 static struct board {
1379 unsigned short vendor, device, rev, svid, sid;
1380 unsigned int flags;
1381 unsigned int maxclk;
1382 enum mga_chip chip;
1383 struct video_board* base;
1384 const char* name;
1385 } dev_list[] = {
1386 #ifdef CONFIG_FB_MATROX_MILLENIUM
1387 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1388 0, 0,
1389 DEVF_TEXT4B,
1390 230000,
1391 MGA_2064,
1392 &vbMillennium,
1393 "Millennium (PCI)"},
1394 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1395 0, 0,
1396 DEVF_SWAPS,
1397 220000,
1398 MGA_2164,
1399 &vbMillennium2,
1400 "Millennium II (PCI)"},
1401 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1402 0, 0,
1403 DEVF_SWAPS,
1404 250000,
1405 MGA_2164,
1406 &vbMillennium2A,
1407 "Millennium II (AGP)"},
1408 #endif
1409 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1410 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1411 0, 0,
1412 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1413 180000,
1414 MGA_1064,
1415 &vbMystique,
1416 "Mystique (PCI)"},
1417 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1418 0, 0,
1419 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1420 220000,
1421 MGA_1164,
1422 &vbMystique,
1423 "Mystique 220 (PCI)"},
1424 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1425 0, 0,
1426 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1427 180000,
1428 MGA_1064,
1429 &vbMystique,
1430 "Mystique (AGP)"},
1431 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1432 0, 0,
1433 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1434 220000,
1435 MGA_1164,
1436 &vbMystique,
1437 "Mystique 220 (AGP)"},
1438 #endif
1439 #ifdef CONFIG_FB_MATROX_G
1440 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1441 0, 0,
1442 DEVF_G100,
1443 230000,
1444 MGA_G100,
1445 &vbG100,
1446 "MGA-G100 (PCI)"},
1447 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1448 0, 0,
1449 DEVF_G100,
1450 230000,
1451 MGA_G100,
1452 &vbG100,
1453 "MGA-G100 (AGP)"},
1454 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, 0xFF,
1455 0, 0,
1456 DEVF_G200,
1457 230000,
1458 MGA_G200,
1459 &vbG200,
1460 "MGA-G200eV (PCI)"},
1461 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1462 0, 0,
1463 DEVF_G200,
1464 250000,
1465 MGA_G200,
1466 &vbG200,
1467 "MGA-G200 (PCI)"},
1468 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1469 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1470 DEVF_G200,
1471 220000,
1472 MGA_G200,
1473 &vbG200,
1474 "MGA-G200 (AGP)"},
1475 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1476 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1477 DEVF_G200,
1478 230000,
1479 MGA_G200,
1480 &vbG200,
1481 "Mystique G200 (AGP)"},
1482 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1483 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1484 DEVF_G200,
1485 250000,
1486 MGA_G200,
1487 &vbG200,
1488 "Millennium G200 (AGP)"},
1489 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1490 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1491 DEVF_G200,
1492 230000,
1493 MGA_G200,
1494 &vbG200,
1495 "Marvel G200 (AGP)"},
1496 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1497 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1498 DEVF_G200,
1499 230000,
1500 MGA_G200,
1501 &vbG200,
1502 "MGA-G200 (AGP)"},
1503 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1504 0, 0,
1505 DEVF_G200,
1506 230000,
1507 MGA_G200,
1508 &vbG200,
1509 "G200 (AGP)"},
1510 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1511 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1512 DEVF_G400,
1513 360000,
1514 MGA_G400,
1515 &vbG400,
1516 "Millennium G400 MAX (AGP)"},
1517 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1518 0, 0,
1519 DEVF_G400,
1520 300000,
1521 MGA_G400,
1522 &vbG400,
1523 "G400 (AGP)"},
1524 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1525 0, 0,
1526 DEVF_G450,
1527 360000,
1528 MGA_G450,
1529 &vbG400,
1530 "G450"},
1531 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1532 0, 0,
1533 DEVF_G550,
1534 360000,
1535 MGA_G550,
1536 &vbG400,
1537 "G550"},
1538 #endif
1539 {0, 0, 0xFF,
1540 0, 0,
1541 0,
1542 0,
1543 0,
1544 NULL,
1545 NULL}};
1546
1547 #ifndef MODULE
1548 static struct fb_videomode defaultmode = {
1549 /* 640x480 @ 60Hz, 31.5 kHz */
1550 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1551 0, FB_VMODE_NONINTERLACED
1552 };
1553 #endif /* !MODULE */
1554
1555 static int hotplug = 0;
1556
1557 static void setDefaultOutputs(WPMINFO2) {
1558 unsigned int i;
1559 const char* ptr;
1560
1561 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
1562 if (ACCESS_FBINFO(devflags.g450dac)) {
1563 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
1564 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1565 } else if (dfp) {
1566 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1567 }
1568 ptr = outputs;
1569 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1570 char c = *ptr++;
1571
1572 if (c == 0) {
1573 break;
1574 }
1575 if (c == '0') {
1576 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
1577 } else if (c == '1') {
1578 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
1579 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
1580 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
1581 } else {
1582 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1583 break;
1584 }
1585 }
1586 /* Nullify this option for subsequent adapters */
1587 outputs[0] = 0;
1588 }
1589
1590 static int initMatrox2(WPMINFO struct board* b){
1591 unsigned long ctrlptr_phys = 0;
1592 unsigned long video_base_phys = 0;
1593 unsigned int memsize;
1594 int err;
1595
1596 static struct pci_device_id intel_82437[] = {
1597 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1598 { },
1599 };
1600
1601 DBG(__func__)
1602
1603 /* set default values... */
1604 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1605
1606 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1607 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1608 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1609
1610 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1611 ACCESS_FBINFO(capable.plnwt) = 1;
1612 ACCESS_FBINFO(chip) = b->chip;
1613 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1614 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1615 if (b->flags & DEVF_TEXT4B) {
1616 ACCESS_FBINFO(devflags.vgastep) = 4;
1617 ACCESS_FBINFO(devflags.textmode) = 4;
1618 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1619 } else if (b->flags & DEVF_TEXT16B) {
1620 ACCESS_FBINFO(devflags.vgastep) = 16;
1621 ACCESS_FBINFO(devflags.textmode) = 1;
1622 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1623 } else {
1624 ACCESS_FBINFO(devflags.vgastep) = 8;
1625 ACCESS_FBINFO(devflags.textmode) = 1;
1626 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1627 }
1628 #ifdef CONFIG_FB_MATROX_32MB
1629 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1630 #endif
1631 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1632 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1633 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1634 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1635 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1636 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1637 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1638 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1639 setDefaultOutputs(PMINFO2);
1640 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1641 ACCESS_FBINFO(outputs[2]).data = MINFO;
1642 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1643 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
1644 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1645 ACCESS_FBINFO(devflags.panellink) = 1;
1646 }
1647
1648 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1649 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1650 if (b->flags & DEVF_SWAPS) {
1651 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1652 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1653 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1654 } else {
1655 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1656 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1657 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1658 }
1659 err = -EINVAL;
1660 if (!ctrlptr_phys) {
1661 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1662 goto fail;
1663 }
1664 if (!video_base_phys) {
1665 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1666 goto fail;
1667 }
1668 memsize = b->base->maxvram;
1669 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1670 goto fail;
1671 }
1672 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1673 goto failCtrlMR;
1674 }
1675 ACCESS_FBINFO(video.len_maximum) = memsize;
1676 /* convert mem (autodetect k, M) */
1677 if (mem < 1024) mem *= 1024;
1678 if (mem < 0x00100000) mem *= 1024;
1679
1680 if (mem && (mem < memsize))
1681 memsize = mem;
1682 err = -ENOMEM;
1683 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
1684 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1685 goto failVideoMR;
1686 }
1687 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
1688 ACCESS_FBINFO(mmio.len) = 16384;
1689 ACCESS_FBINFO(video.base) = video_base_phys;
1690 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
1691 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1692 video_base_phys, memsize);
1693 goto failCtrlIO;
1694 }
1695 {
1696 u_int32_t cmd;
1697 u_int32_t mga_option;
1698
1699 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
1700 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
1701 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1702 mga_option |= MX_OPTION_BSWAP;
1703 /* disable palette snooping */
1704 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1705 if (pci_dev_present(intel_82437)) {
1706 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
1707 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1708 }
1709 mga_option |= 0x20000000;
1710 ACCESS_FBINFO(devflags.nopciretry) = 1;
1711 }
1712 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
1713 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
1714 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
1715
1716 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1717 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1718 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
1719 }
1720
1721 err = -ENXIO;
1722 matroxfb_read_pins(PMINFO2);
1723 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
1724 goto failVideoIO;
1725 }
1726
1727 err = -ENOMEM;
1728 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
1729 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1730 goto failVideoIO;
1731 }
1732 ACCESS_FBINFO(devflags.ydstorg) = 0;
1733
1734 ACCESS_FBINFO(video.base) = video_base_phys;
1735 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
1736 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
1737 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
1738 #ifdef CONFIG_MTRR
1739 if (mtrr) {
1740 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
1741 ACCESS_FBINFO(mtrr.vram_valid) = 1;
1742 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1743 }
1744 #endif /* CONFIG_MTRR */
1745
1746 if (!ACCESS_FBINFO(devflags.novga))
1747 request_region(0x3C0, 32, "matrox");
1748 matroxfb_g450_connect(PMINFO2);
1749 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
1750
1751 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
1752 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
1753 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
1754 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
1755 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
1756
1757 /* static settings */
1758 vesafb_defined.red = colors[depth-1].red;
1759 vesafb_defined.green = colors[depth-1].green;
1760 vesafb_defined.blue = colors[depth-1].blue;
1761 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1762 vesafb_defined.grayscale = grayscale;
1763 vesafb_defined.vmode = 0;
1764 if (noaccel)
1765 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1766
1767 ACCESS_FBINFO(fbops) = matroxfb_ops;
1768 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
1769 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
1770 /* after __init time we are like module... no logo */
1771 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1772 ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1773 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1774 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1775 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1776 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1777 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1778 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
1779 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
1780
1781 #ifndef MODULE
1782 /* mode database is marked __init!!! */
1783 if (!hotplug) {
1784 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
1785 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1786 }
1787 #endif /* !MODULE */
1788
1789 /* mode modifiers */
1790 if (hslen)
1791 vesafb_defined.hsync_len = hslen;
1792 if (vslen)
1793 vesafb_defined.vsync_len = vslen;
1794 if (left != ~0)
1795 vesafb_defined.left_margin = left;
1796 if (right != ~0)
1797 vesafb_defined.right_margin = right;
1798 if (upper != ~0)
1799 vesafb_defined.upper_margin = upper;
1800 if (lower != ~0)
1801 vesafb_defined.lower_margin = lower;
1802 if (xres)
1803 vesafb_defined.xres = xres;
1804 if (yres)
1805 vesafb_defined.yres = yres;
1806 if (sync != -1)
1807 vesafb_defined.sync = sync;
1808 else if (vesafb_defined.sync == ~0) {
1809 vesafb_defined.sync = 0;
1810 if (yres < 400)
1811 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1812 else if (yres < 480)
1813 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1814 }
1815
1816 /* fv, fh, maxclk limits was specified */
1817 {
1818 unsigned int tmp;
1819
1820 if (fv) {
1821 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1822 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1823 if ((tmp < fh) || (fh == 0)) fh = tmp;
1824 }
1825 if (fh) {
1826 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1827 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1828 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1829 }
1830 tmp = (maxclk + 499) / 500;
1831 if (tmp) {
1832 tmp = (2000000000 + tmp) / tmp;
1833 if (tmp > pixclock) pixclock = tmp;
1834 }
1835 }
1836 if (pixclock) {
1837 if (pixclock < 2000) /* > 500MHz */
1838 pixclock = 4000; /* 250MHz */
1839 if (pixclock > 1000000)
1840 pixclock = 1000000; /* 1MHz */
1841 vesafb_defined.pixclock = pixclock;
1842 }
1843
1844 /* FIXME: Where to move this?! */
1845 #if defined(CONFIG_PPC_PMAC)
1846 #ifndef MODULE
1847 if (machine_is(powermac)) {
1848 struct fb_var_screeninfo var;
1849 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1850 default_vmode = VMODE_640_480_60;
1851 #ifdef CONFIG_NVRAM
1852 if (default_cmode == CMODE_NVRAM)
1853 default_cmode = nvram_read_byte(NV_CMODE);
1854 #endif
1855 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1856 default_cmode = CMODE_8;
1857 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1858 var.accel_flags = vesafb_defined.accel_flags;
1859 var.xoffset = var.yoffset = 0;
1860 /* Note: mac_vmode_to_var() does not set all parameters */
1861 vesafb_defined = var;
1862 }
1863 }
1864 #endif /* !MODULE */
1865 #endif /* CONFIG_PPC_PMAC */
1866 vesafb_defined.xres_virtual = vesafb_defined.xres;
1867 if (nopan) {
1868 vesafb_defined.yres_virtual = vesafb_defined.yres;
1869 } else {
1870 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1871 to yres_virtual * xres_virtual < 2^32 */
1872 }
1873 matroxfb_init_fix(PMINFO2);
1874 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase));
1875 /* Normalize values (namely yres_virtual) */
1876 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
1877 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1878 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1879 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1880 * anyway. But we at least tried... */
1881 ACCESS_FBINFO(fbcon.var) = vesafb_defined;
1882 err = -EINVAL;
1883
1884 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1885 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1886 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1887 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1888 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
1889
1890 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1891 * and we do not want currcon == 0 for subsequent framebuffers */
1892
1893 ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev;
1894 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
1895 goto failVideoIO;
1896 }
1897 printk("fb%d: %s frame buffer device\n",
1898 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
1899
1900 /* there is no console on this fb... but we have to initialize hardware
1901 * until someone tells me what is proper thing to do */
1902 if (!ACCESS_FBINFO(initialized)) {
1903 printk(KERN_INFO "fb%d: initializing hardware\n",
1904 ACCESS_FBINFO(fbcon.node));
1905 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1906 * already before, so register_framebuffer works correctly. */
1907 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1908 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
1909 }
1910
1911 return 0;
1912 failVideoIO:;
1913 matroxfb_g450_shutdown(PMINFO2);
1914 mga_iounmap(ACCESS_FBINFO(video.vbase));
1915 failCtrlIO:;
1916 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
1917 failVideoMR:;
1918 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
1919 failCtrlMR:;
1920 release_mem_region(ctrlptr_phys, 16384);
1921 fail:;
1922 return err;
1923 }
1924
1925 static LIST_HEAD(matroxfb_list);
1926 static LIST_HEAD(matroxfb_driver_list);
1927
1928 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1929 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1930 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1931 struct matrox_fb_info* minfo;
1932
1933 list_add(&drv->node, &matroxfb_driver_list);
1934 for (minfo = matroxfb_l(matroxfb_list.next);
1935 minfo != matroxfb_l(&matroxfb_list);
1936 minfo = matroxfb_l(minfo->next_fb.next)) {
1937 void* p;
1938
1939 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1940 continue;
1941 p = drv->probe(minfo);
1942 if (p) {
1943 minfo->drivers_data[minfo->drivers_count] = p;
1944 minfo->drivers[minfo->drivers_count++] = drv;
1945 }
1946 }
1947 return 0;
1948 }
1949
1950 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1951 struct matrox_fb_info* minfo;
1952
1953 list_del(&drv->node);
1954 for (minfo = matroxfb_l(matroxfb_list.next);
1955 minfo != matroxfb_l(&matroxfb_list);
1956 minfo = matroxfb_l(minfo->next_fb.next)) {
1957 int i;
1958
1959 for (i = 0; i < minfo->drivers_count; ) {
1960 if (minfo->drivers[i] == drv) {
1961 if (drv && drv->remove)
1962 drv->remove(minfo, minfo->drivers_data[i]);
1963 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1964 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1965 } else
1966 i++;
1967 }
1968 }
1969 }
1970
1971 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1972 struct matroxfb_driver* drv;
1973 int i = 0;
1974 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
1975 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1976 drv != matroxfb_driver_l(&matroxfb_driver_list);
1977 drv = matroxfb_driver_l(drv->node.next)) {
1978 if (drv && drv->probe) {
1979 void *p = drv->probe(minfo);
1980 if (p) {
1981 minfo->drivers_data[i] = p;
1982 minfo->drivers[i++] = drv;
1983 if (i == MATROXFB_MAX_FB_DRIVERS)
1984 break;
1985 }
1986 }
1987 }
1988 minfo->drivers_count = i;
1989 }
1990
1991 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1992 int i;
1993
1994 list_del(&ACCESS_FBINFO(next_fb));
1995 for (i = 0; i < minfo->drivers_count; i++) {
1996 struct matroxfb_driver* drv = minfo->drivers[i];
1997
1998 if (drv && drv->remove)
1999 drv->remove(minfo, minfo->drivers_data[i]);
2000 }
2001 }
2002
2003 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2004 struct board* b;
2005 u_int16_t svid;
2006 u_int16_t sid;
2007 struct matrox_fb_info* minfo;
2008 int err;
2009 u_int32_t cmd;
2010 DBG(__func__)
2011
2012 svid = pdev->subsystem_vendor;
2013 sid = pdev->subsystem_device;
2014 for (b = dev_list; b->vendor; b++) {
2015 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2016 if (b->svid)
2017 if ((b->svid != svid) || (b->sid != sid)) continue;
2018 break;
2019 }
2020 /* not match... */
2021 if (!b->vendor)
2022 return -ENODEV;
2023 if (dev > 0) {
2024 /* not requested one... */
2025 dev--;
2026 return -ENODEV;
2027 }
2028 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2029 if (pci_enable_device(pdev)) {
2030 return -1;
2031 }
2032
2033 minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
2034 if (!minfo)
2035 return -1;
2036 memset(MINFO, 0, sizeof(*MINFO));
2037
2038 ACCESS_FBINFO(pcidev) = pdev;
2039 ACCESS_FBINFO(dead) = 0;
2040 ACCESS_FBINFO(usecount) = 0;
2041 ACCESS_FBINFO(userusecount) = 0;
2042
2043 pci_set_drvdata(pdev, MINFO);
2044 /* DEVFLAGS */
2045 ACCESS_FBINFO(devflags.memtype) = memtype;
2046 if (memtype != -1)
2047 noinit = 0;
2048 if (cmd & PCI_COMMAND_MEMORY) {
2049 ACCESS_FBINFO(devflags.novga) = novga;
2050 ACCESS_FBINFO(devflags.nobios) = nobios;
2051 ACCESS_FBINFO(devflags.noinit) = noinit;
2052 /* subsequent heads always needs initialization and must not enable BIOS */
2053 novga = 1;
2054 nobios = 1;
2055 noinit = 0;
2056 } else {
2057 ACCESS_FBINFO(devflags.novga) = 1;
2058 ACCESS_FBINFO(devflags.nobios) = 1;
2059 ACCESS_FBINFO(devflags.noinit) = 0;
2060 }
2061
2062 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2063 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2064 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2065 ACCESS_FBINFO(devflags.sgram) = sgram;
2066 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2067
2068 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2069 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2070 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2071 init_rwsem(&ACCESS_FBINFO(altout.lock));
2072 mutex_init(&ACCESS_FBINFO(fbcon).mm_lock);
2073 ACCESS_FBINFO(irq_flags) = 0;
2074 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2075 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2076 ACCESS_FBINFO(crtc1.panpos) = -1;
2077
2078 err = initMatrox2(PMINFO b);
2079 if (!err) {
2080 matroxfb_register_device(MINFO);
2081 return 0;
2082 }
2083 kfree(minfo);
2084 return -1;
2085 }
2086
2087 static void pci_remove_matrox(struct pci_dev* pdev) {
2088 struct matrox_fb_info* minfo;
2089
2090 minfo = pci_get_drvdata(pdev);
2091 matroxfb_remove(PMINFO 1);
2092 }
2093
2094 static struct pci_device_id matroxfb_devices[] = {
2095 #ifdef CONFIG_FB_MATROX_MILLENIUM
2096 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2097 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2098 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2099 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2100 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2101 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2102 #endif
2103 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2104 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2105 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2106 #endif
2107 #ifdef CONFIG_FB_MATROX_G
2108 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2109 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2110 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2112 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI,
2113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2114 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2115 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2116 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2117 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2118 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2119 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2120 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2122 #endif
2123 {0, 0,
2124 0, 0, 0, 0, 0}
2125 };
2126
2127 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2128
2129
2130 static struct pci_driver matroxfb_driver = {
2131 .name = "matroxfb",
2132 .id_table = matroxfb_devices,
2133 .probe = matroxfb_probe,
2134 .remove = pci_remove_matrox,
2135 };
2136
2137 /* **************************** init-time only **************************** */
2138
2139 #define RSResolution(X) ((X) & 0x0F)
2140 #define RS640x400 1
2141 #define RS640x480 2
2142 #define RS800x600 3
2143 #define RS1024x768 4
2144 #define RS1280x1024 5
2145 #define RS1600x1200 6
2146 #define RS768x576 7
2147 #define RS960x720 8
2148 #define RS1152x864 9
2149 #define RS1408x1056 10
2150 #define RS640x350 11
2151 #define RS1056x344 12 /* 132 x 43 text */
2152 #define RS1056x400 13 /* 132 x 50 text */
2153 #define RS1056x480 14 /* 132 x 60 text */
2154 #define RSNoxNo 15
2155 /* 10-FF */
2156 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2157 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2158 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2159 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2160 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2161 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2162 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2163 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2164 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2165 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2166 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2167 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2168 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2169 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2170 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2171 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2172 };
2173
2174 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2175 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2176 /* default must be first */
2177 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2178 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2179 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2180 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2181 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2182 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2183 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2184 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2185 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2186 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2187 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2188 { 0x110, RSCreate(RS640x480, RS15bpp) },
2189 { 0x181, RSCreate(RS768x576, RS15bpp) },
2190 { 0x113, RSCreate(RS800x600, RS15bpp) },
2191 { 0x189, RSCreate(RS960x720, RS15bpp) },
2192 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2193 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2194 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2195 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2196 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2197 { 0x111, RSCreate(RS640x480, RS16bpp) },
2198 { 0x182, RSCreate(RS768x576, RS16bpp) },
2199 { 0x114, RSCreate(RS800x600, RS16bpp) },
2200 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2201 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2202 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2203 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2204 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2205 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2206 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2207 { 0x184, RSCreate(RS768x576, RS24bpp) },
2208 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2209 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2210 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2211 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2212 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2213 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2214 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2215 { 0x112, RSCreate(RS640x480, RS32bpp) },
2216 { 0x183, RSCreate(RS768x576, RS32bpp) },
2217 { 0x115, RSCreate(RS800x600, RS32bpp) },
2218 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2219 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2220 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2221 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2222 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2223 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2224 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2225 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2226 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2227 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2228 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2229 { 0, 0 }};
2230
2231 static void __init matroxfb_init_params(void) {
2232 /* fh from kHz to Hz */
2233 if (fh < 1000)
2234 fh *= 1000; /* 1kHz minimum */
2235 /* maxclk */
2236 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2237 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2238 /* fix VESA number */
2239 if (vesa != ~0)
2240 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2241
2242 /* static settings */
2243 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2244 if (RSptr->vesa == vesa) break;
2245 }
2246 if (!RSptr->vesa) {
2247 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2248 RSptr = vesamap;
2249 }
2250 {
2251 int res = RSResolution(RSptr->info)-1;
2252 if (left == ~0)
2253 left = timmings[res].left;
2254 if (!xres)
2255 xres = timmings[res].xres;
2256 if (right == ~0)
2257 right = timmings[res].right;
2258 if (!hslen)
2259 hslen = timmings[res].hslen;
2260 if (upper == ~0)
2261 upper = timmings[res].upper;
2262 if (!yres)
2263 yres = timmings[res].yres;
2264 if (lower == ~0)
2265 lower = timmings[res].lower;
2266 if (!vslen)
2267 vslen = timmings[res].vslen;
2268 if (!(fv||fh||maxclk||pixclock))
2269 fv = timmings[res].vfreq;
2270 if (depth == -1)
2271 depth = RSDepth(RSptr->info);
2272 }
2273 }
2274
2275 static int __init matrox_init(void) {
2276 int err;
2277
2278 matroxfb_init_params();
2279 err = pci_register_driver(&matroxfb_driver);
2280 dev = -1; /* accept all new devices... */
2281 return err;
2282 }
2283
2284 /* **************************** exit-time only **************************** */
2285
2286 static void __exit matrox_done(void) {
2287 pci_unregister_driver(&matroxfb_driver);
2288 }
2289
2290 #ifndef MODULE
2291
2292 /* ************************* init in-kernel code ************************** */
2293
2294 static int __init matroxfb_setup(char *options) {
2295 char *this_opt;
2296
2297 DBG(__func__)
2298
2299 if (!options || !*options)
2300 return 0;
2301
2302 while ((this_opt = strsep(&options, ",")) != NULL) {
2303 if (!*this_opt) continue;
2304
2305 dprintk("matroxfb_setup: option %s\n", this_opt);
2306
2307 if (!strncmp(this_opt, "dev:", 4))
2308 dev = simple_strtoul(this_opt+4, NULL, 0);
2309 else if (!strncmp(this_opt, "depth:", 6)) {
2310 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2311 case 0: depth = RSText; break;
2312 case 4: depth = RS4bpp; break;
2313 case 8: depth = RS8bpp; break;
2314 case 15:depth = RS15bpp; break;
2315 case 16:depth = RS16bpp; break;
2316 case 24:depth = RS24bpp; break;
2317 case 32:depth = RS32bpp; break;
2318 default:
2319 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2320 }
2321 } else if (!strncmp(this_opt, "xres:", 5))
2322 xres = simple_strtoul(this_opt+5, NULL, 0);
2323 else if (!strncmp(this_opt, "yres:", 5))
2324 yres = simple_strtoul(this_opt+5, NULL, 0);
2325 else if (!strncmp(this_opt, "vslen:", 6))
2326 vslen = simple_strtoul(this_opt+6, NULL, 0);
2327 else if (!strncmp(this_opt, "hslen:", 6))
2328 hslen = simple_strtoul(this_opt+6, NULL, 0);
2329 else if (!strncmp(this_opt, "left:", 5))
2330 left = simple_strtoul(this_opt+5, NULL, 0);
2331 else if (!strncmp(this_opt, "right:", 6))
2332 right = simple_strtoul(this_opt+6, NULL, 0);
2333 else if (!strncmp(this_opt, "upper:", 6))
2334 upper = simple_strtoul(this_opt+6, NULL, 0);
2335 else if (!strncmp(this_opt, "lower:", 6))
2336 lower = simple_strtoul(this_opt+6, NULL, 0);
2337 else if (!strncmp(this_opt, "pixclock:", 9))
2338 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2339 else if (!strncmp(this_opt, "sync:", 5))
2340 sync = simple_strtoul(this_opt+5, NULL, 0);
2341 else if (!strncmp(this_opt, "vesa:", 5))
2342 vesa = simple_strtoul(this_opt+5, NULL, 0);
2343 else if (!strncmp(this_opt, "maxclk:", 7))
2344 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2345 else if (!strncmp(this_opt, "fh:", 3))
2346 fh = simple_strtoul(this_opt+3, NULL, 0);
2347 else if (!strncmp(this_opt, "fv:", 3))
2348 fv = simple_strtoul(this_opt+3, NULL, 0);
2349 else if (!strncmp(this_opt, "mem:", 4))
2350 mem = simple_strtoul(this_opt+4, NULL, 0);
2351 else if (!strncmp(this_opt, "mode:", 5))
2352 strlcpy(videomode, this_opt+5, sizeof(videomode));
2353 else if (!strncmp(this_opt, "outputs:", 8))
2354 strlcpy(outputs, this_opt+8, sizeof(outputs));
2355 else if (!strncmp(this_opt, "dfp:", 4)) {
2356 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2357 dfp = 1;
2358 }
2359 #ifdef CONFIG_PPC_PMAC
2360 else if (!strncmp(this_opt, "vmode:", 6)) {
2361 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2362 if (vmode > 0 && vmode <= VMODE_MAX)
2363 default_vmode = vmode;
2364 } else if (!strncmp(this_opt, "cmode:", 6)) {
2365 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2366 switch (cmode) {
2367 case 0:
2368 case 8:
2369 default_cmode = CMODE_8;
2370 break;
2371 case 15:
2372 case 16:
2373 default_cmode = CMODE_16;
2374 break;
2375 case 24:
2376 case 32:
2377 default_cmode = CMODE_32;
2378 break;
2379 }
2380 }
2381 #endif
2382 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2383 disabled = 1;
2384 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2385 disabled = 0;
2386 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2387 sgram = 1;
2388 else if (!strcmp(this_opt, "sdram"))
2389 sgram = 0;
2390 else if (!strncmp(this_opt, "memtype:", 8))
2391 memtype = simple_strtoul(this_opt+8, NULL, 0);
2392 else {
2393 int value = 1;
2394
2395 if (!strncmp(this_opt, "no", 2)) {
2396 value = 0;
2397 this_opt += 2;
2398 }
2399 if (! strcmp(this_opt, "inverse"))
2400 inverse = value;
2401 else if (!strcmp(this_opt, "accel"))
2402 noaccel = !value;
2403 else if (!strcmp(this_opt, "pan"))
2404 nopan = !value;
2405 else if (!strcmp(this_opt, "pciretry"))
2406 no_pci_retry = !value;
2407 else if (!strcmp(this_opt, "vga"))
2408 novga = !value;
2409 else if (!strcmp(this_opt, "bios"))
2410 nobios = !value;
2411 else if (!strcmp(this_opt, "init"))
2412 noinit = !value;
2413 #ifdef CONFIG_MTRR
2414 else if (!strcmp(this_opt, "mtrr"))
2415 mtrr = value;
2416 #endif
2417 else if (!strcmp(this_opt, "inv24"))
2418 inv24 = value;
2419 else if (!strcmp(this_opt, "cross4MB"))
2420 cross4MB = value;
2421 else if (!strcmp(this_opt, "grayscale"))
2422 grayscale = value;
2423 else if (!strcmp(this_opt, "dfp"))
2424 dfp = value;
2425 else {
2426 strlcpy(videomode, this_opt, sizeof(videomode));
2427 }
2428 }
2429 }
2430 return 0;
2431 }
2432
2433 static int __initdata initialized = 0;
2434
2435 static int __init matroxfb_init(void)
2436 {
2437 char *option = NULL;
2438 int err = 0;
2439
2440 DBG(__func__)
2441
2442 if (fb_get_options("matroxfb", &option))
2443 return -ENODEV;
2444 matroxfb_setup(option);
2445
2446 if (disabled)
2447 return -ENXIO;
2448 if (!initialized) {
2449 initialized = 1;
2450 err = matrox_init();
2451 }
2452 hotplug = 1;
2453 /* never return failure, user can hotplug matrox later... */
2454 return err;
2455 }
2456
2457 module_init(matroxfb_init);
2458
2459 #else
2460
2461 /* *************************** init module code **************************** */
2462
2463 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2464 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2465 MODULE_LICENSE("GPL");
2466
2467 module_param(mem, int, 0);
2468 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2469 module_param(disabled, int, 0);
2470 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2471 module_param(noaccel, int, 0);
2472 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2473 module_param(nopan, int, 0);
2474 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2475 module_param(no_pci_retry, int, 0);
2476 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2477 module_param(novga, int, 0);
2478 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2479 module_param(nobios, int, 0);
2480 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2481 module_param(noinit, int, 0);
2482 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2483 module_param(memtype, int, 0);
2484 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2485 #ifdef CONFIG_MTRR
2486 module_param(mtrr, int, 0);
2487 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2488 #endif
2489 module_param(sgram, int, 0);
2490 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2491 module_param(inv24, int, 0);
2492 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2493 module_param(inverse, int, 0);
2494 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2495 module_param(dev, int, 0);
2496 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2497 module_param(vesa, int, 0);
2498 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2499 module_param(xres, int, 0);
2500 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2501 module_param(yres, int, 0);
2502 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2503 module_param(upper, int, 0);
2504 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2505 module_param(lower, int, 0);
2506 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2507 module_param(vslen, int, 0);
2508 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2509 module_param(left, int, 0);
2510 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2511 module_param(right, int, 0);
2512 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2513 module_param(hslen, int, 0);
2514 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2515 module_param(pixclock, int, 0);
2516 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2517 module_param(sync, int, 0);
2518 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2519 module_param(depth, int, 0);
2520 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2521 module_param(maxclk, int, 0);
2522 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2523 module_param(fh, int, 0);
2524 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2525 module_param(fv, int, 0);
2526 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2527 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2528 module_param(grayscale, int, 0);
2529 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2530 module_param(cross4MB, int, 0);
2531 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2532 module_param(dfp, int, 0);
2533 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2534 module_param(dfp_type, int, 0);
2535 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2536 module_param_string(outputs, outputs, sizeof(outputs), 0);
2537 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2538 #ifdef CONFIG_PPC_PMAC
2539 module_param_named(vmode, default_vmode, int, 0);
2540 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2541 module_param_named(cmode, default_cmode, int, 0);
2542 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2543 #endif
2544
2545 int __init init_module(void){
2546
2547 DBG(__func__)
2548
2549 if (disabled)
2550 return -ENXIO;
2551
2552 if (depth == 0)
2553 depth = RSText;
2554 else if (depth == 4)
2555 depth = RS4bpp;
2556 else if (depth == 8)
2557 depth = RS8bpp;
2558 else if (depth == 15)
2559 depth = RS15bpp;
2560 else if (depth == 16)
2561 depth = RS16bpp;
2562 else if (depth == 24)
2563 depth = RS24bpp;
2564 else if (depth == 32)
2565 depth = RS32bpp;
2566 else if (depth != -1) {
2567 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2568 depth = -1;
2569 }
2570 matrox_init();
2571 /* never return failure; user can hotplug matrox later... */
2572 return 0;
2573 }
2574 #endif /* MODULE */
2575
2576 module_exit(matrox_done);
2577 EXPORT_SYMBOL(matroxfb_register_driver);
2578 EXPORT_SYMBOL(matroxfb_unregister_driver);
2579 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2580 EXPORT_SYMBOL(matroxfb_enable_irq);
2581
2582 /*
2583 * Overrides for Emacs so that we follow Linus's tabbing style.
2584 * ---------------------------------------------------------------------------
2585 * Local variables:
2586 * c-basic-offset: 8
2587 * End:
2588 */
2589
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