mach-ux500: update SoC and board IRQ handling
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / linux / msi.h
blob05acced439a38ec1faf822200740d032778e9022
1 #ifndef LINUX_MSI_H
2 #define LINUX_MSI_H
4 #include <linux/list.h>
6 struct msi_msg {
7 u32 address_lo; /* low 32 bits of msi message address */
8 u32 address_hi; /* high 32 bits of msi message address */
9 u32 data; /* 16 bits of msi message data */
12 /* Helper functions */
13 struct irq_data;
14 struct msi_desc;
15 extern void mask_msi_irq(struct irq_data *data);
16 extern void unmask_msi_irq(struct irq_data *data);
17 extern void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
18 extern void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
19 extern void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
20 extern void read_msi_msg(unsigned int irq, struct msi_msg *msg);
21 extern void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
22 extern void write_msi_msg(unsigned int irq, struct msi_msg *msg);
24 struct msi_desc {
25 struct {
26 __u8 is_msix : 1;
27 __u8 multiple: 3; /* log2 number of messages */
28 __u8 maskbit : 1; /* mask-pending bit supported ? */
29 __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
30 __u8 pos; /* Location of the msi capability */
31 __u16 entry_nr; /* specific enabled entry */
32 unsigned default_irq; /* default pre-assigned irq */
33 } msi_attrib;
35 u32 masked; /* mask bits */
36 unsigned int irq;
37 struct list_head list;
39 union {
40 void __iomem *mask_base;
41 u8 mask_pos;
43 struct pci_dev *dev;
45 /* Last set MSI message */
46 struct msi_msg msg;
50 * The arch hook for setup up msi irqs
52 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
53 void arch_teardown_msi_irq(unsigned int irq);
54 extern int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
55 extern void arch_teardown_msi_irqs(struct pci_dev *dev);
56 extern int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
59 #endif /* LINUX_MSI_H */