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ath9k: load noise floor from history after the full chip reset
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / ar9003_calib.c
blobe4b1a83008547cbe053b18af6f2119bd95486e58
1 /*
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include "hw.h"
18 #include "hw-ops.h"
19 #include "ar9003_phy.h"
20
21 #define MAX_MEASUREMENT 8
22 #define MAX_MAG_DELTA 11
23 #define MAX_PHS_DELTA 10
24
25 struct coeff {
26 int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
27 int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
28 int iqc_coeff[2];
29 };
30
31 enum ar9003_cal_types {
32 IQ_MISMATCH_CAL = BIT(0),
33 TEMP_COMP_CAL = BIT(1),
34 };
35
36 static void ar9003_hw_setup_calibration(struct ath_hw *ah,
37 struct ath9k_cal_list *currCal)
38 {
39 struct ath_common *common = ath9k_hw_common(ah);
40
41 /* Select calibration to run */
42 switch (currCal->calData->calType) {
43 case IQ_MISMATCH_CAL:
44 /*
45 * Start calibration with
46 * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
47 */
48 REG_RMW_FIELD(ah, AR_PHY_TIMING4,
49 AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
50 currCal->calData->calCountMax);
51 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
52
53 ath_dbg(common, ATH_DBG_CALIBRATE,
54 "starting IQ Mismatch Calibration\n");
55
56 /* Kick-off cal */
57 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
58 break;
59 case TEMP_COMP_CAL:
60 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
61 AR_PHY_65NM_CH0_THERM_LOCAL, 1);
62 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
63 AR_PHY_65NM_CH0_THERM_START, 1);
64
65 ath_dbg(common, ATH_DBG_CALIBRATE,
66 "starting Temperature Compensation Calibration\n");
67 break;
68 }
69 }
70
71 /*
72 * Generic calibration routine.
73 * Recalibrate the lower PHY chips to account for temperature/environment
74 * changes.
75 */
76 static bool ar9003_hw_per_calibration(struct ath_hw *ah,
77 struct ath9k_channel *ichan,
78 u8 rxchainmask,
79 struct ath9k_cal_list *currCal)
80 {
81 struct ath9k_hw_cal_data *caldata = ah->caldata;
82 /* Cal is assumed not done until explicitly set below */
83 bool iscaldone = false;
84
85 /* Calibration in progress. */
86 if (currCal->calState == CAL_RUNNING) {
87 /* Check to see if it has finished. */
88 if (!(REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL)) {
89 /*
90 * Accumulate cal measures for active chains
91 */
92 currCal->calData->calCollect(ah);
93 ah->cal_samples++;
94
95 if (ah->cal_samples >=
96 currCal->calData->calNumSamples) {
97 unsigned int i, numChains = 0;
98 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
99 if (rxchainmask & (1 << i))
100 numChains++;
101 }
102
103 /*
104 * Process accumulated data
105 */
106 currCal->calData->calPostProc(ah, numChains);
107
108 /* Calibration has finished. */
109 caldata->CalValid |= currCal->calData->calType;
110 currCal->calState = CAL_DONE;
111 iscaldone = true;
112 } else {
113 /*
114 * Set-up collection of another sub-sample until we
115 * get desired number
116 */
117 ar9003_hw_setup_calibration(ah, currCal);
118 }
119 }
120 } else if (!(caldata->CalValid & currCal->calData->calType)) {
121 /* If current cal is marked invalid in channel, kick it off */
122 ath9k_hw_reset_calibration(ah, currCal);
123 }
124
125 return iscaldone;
126 }
127
128 static bool ar9003_hw_calibrate(struct ath_hw *ah,
129 struct ath9k_channel *chan,
130 u8 rxchainmask,
131 bool longcal)
132 {
133 bool iscaldone = true;
134 struct ath9k_cal_list *currCal = ah->cal_list_curr;
135
136 /*
137 * For given calibration:
138 * 1. Call generic cal routine
139 * 2. When this cal is done (isCalDone) if we have more cals waiting
140 * (eg after reset), mask this to upper layers by not propagating
141 * isCalDone if it is set to TRUE.
142 * Instead, change isCalDone to FALSE and setup the waiting cal(s)
143 * to be run.
144 */
145 if (currCal &&
146 (currCal->calState == CAL_RUNNING ||
147 currCal->calState == CAL_WAITING)) {
148 iscaldone = ar9003_hw_per_calibration(ah, chan,
149 rxchainmask, currCal);
150 if (iscaldone) {
151 ah->cal_list_curr = currCal = currCal->calNext;
152
153 if (currCal->calState == CAL_WAITING) {
154 iscaldone = false;
155 ath9k_hw_reset_calibration(ah, currCal);
156 }
157 }
158 }
159
160 /* Do NF cal only at longer intervals */
161 if (longcal) {
162 /*
163 * Get the value from the previous NF cal and update
164 * history buffer.
165 */
166 ath9k_hw_getnf(ah, chan);
167
168 /*
169 * Load the NF from history buffer of the current channel.
170 * NF is slow time-variant, so it is OK to use a historical
171 * value.
172 */
173 ath9k_hw_loadnf(ah, ah->curchan);
174
175 /* start NF calibration, without updating BB NF register */
176 ath9k_hw_start_nfcal(ah, false);
177 }
178
179 return iscaldone;
180 }
181
182 static void ar9003_hw_iqcal_collect(struct ath_hw *ah)
183 {
184 int i;
185
186 /* Accumulate IQ cal measures for active chains */
187 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
188 if (ah->txchainmask & BIT(i)) {
189 ah->totalPowerMeasI[i] +=
190 REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
191 ah->totalPowerMeasQ[i] +=
192 REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
193 ah->totalIqCorrMeas[i] +=
194 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
195 ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
196 "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
197 ah->cal_samples, i, ah->totalPowerMeasI[i],
198 ah->totalPowerMeasQ[i],
199 ah->totalIqCorrMeas[i]);
200 }
201 }
202 }
203
204 static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
205 {
206 struct ath_common *common = ath9k_hw_common(ah);
207 u32 powerMeasQ, powerMeasI, iqCorrMeas;
208 u32 qCoffDenom, iCoffDenom;
209 int32_t qCoff, iCoff;
210 int iqCorrNeg, i;
211 static const u_int32_t offset_array[3] = {
212 AR_PHY_RX_IQCAL_CORR_B0,
213 AR_PHY_RX_IQCAL_CORR_B1,
214 AR_PHY_RX_IQCAL_CORR_B2,
215 };
216
217 for (i = 0; i < numChains; i++) {
218 powerMeasI = ah->totalPowerMeasI[i];
219 powerMeasQ = ah->totalPowerMeasQ[i];
220 iqCorrMeas = ah->totalIqCorrMeas[i];
221
222 ath_dbg(common, ATH_DBG_CALIBRATE,
223 "Starting IQ Cal and Correction for Chain %d\n",
224 i);
225
226 ath_dbg(common, ATH_DBG_CALIBRATE,
227 "Orignal: Chn %diq_corr_meas = 0x%08x\n",
228 i, ah->totalIqCorrMeas[i]);
229
230 iqCorrNeg = 0;
231
232 if (iqCorrMeas > 0x80000000) {
233 iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
234 iqCorrNeg = 1;
235 }
236
237 ath_dbg(common, ATH_DBG_CALIBRATE,
238 "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
239 ath_dbg(common, ATH_DBG_CALIBRATE,
240 "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
241 ath_dbg(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
242 iqCorrNeg);
243
244 iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 256;
245 qCoffDenom = powerMeasQ / 64;
246
247 if ((iCoffDenom != 0) && (qCoffDenom != 0)) {
248 iCoff = iqCorrMeas / iCoffDenom;
249 qCoff = powerMeasI / qCoffDenom - 64;
250 ath_dbg(common, ATH_DBG_CALIBRATE,
251 "Chn %d iCoff = 0x%08x\n", i, iCoff);
252 ath_dbg(common, ATH_DBG_CALIBRATE,
253 "Chn %d qCoff = 0x%08x\n", i, qCoff);
254
255 /* Force bounds on iCoff */
256 if (iCoff >= 63)
257 iCoff = 63;
258 else if (iCoff <= -63)
259 iCoff = -63;
260
261 /* Negate iCoff if iqCorrNeg == 0 */
262 if (iqCorrNeg == 0x0)
263 iCoff = -iCoff;
264
265 /* Force bounds on qCoff */
266 if (qCoff >= 63)
267 qCoff = 63;
268 else if (qCoff <= -63)
269 qCoff = -63;
270
271 iCoff = iCoff & 0x7f;
272 qCoff = qCoff & 0x7f;
273
274 ath_dbg(common, ATH_DBG_CALIBRATE,
275 "Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
276 i, iCoff, qCoff);
277 ath_dbg(common, ATH_DBG_CALIBRATE,
278 "Register offset (0x%04x) before update = 0x%x\n",
279 offset_array[i],
280 REG_READ(ah, offset_array[i]));
281
282 REG_RMW_FIELD(ah, offset_array[i],
283 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
284 iCoff);
285 REG_RMW_FIELD(ah, offset_array[i],
286 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
287 qCoff);
288 ath_dbg(common, ATH_DBG_CALIBRATE,
289 "Register offset (0x%04x) QI COFF (bitfields 0x%08x) after update = 0x%x\n",
290 offset_array[i],
291 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
292 REG_READ(ah, offset_array[i]));
293 ath_dbg(common, ATH_DBG_CALIBRATE,
294 "Register offset (0x%04x) QQ COFF (bitfields 0x%08x) after update = 0x%x\n",
295 offset_array[i],
296 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
297 REG_READ(ah, offset_array[i]));
298
299 ath_dbg(common, ATH_DBG_CALIBRATE,
300 "IQ Cal and Correction done for Chain %d\n", i);
301 }
302 }
303
304 REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0,
305 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE);
306 ath_dbg(common, ATH_DBG_CALIBRATE,
307 "IQ Cal and Correction (offset 0x%04x) enabled (bit position 0x%08x). New Value 0x%08x\n",
308 (unsigned) (AR_PHY_RX_IQCAL_CORR_B0),
309 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE,
310 REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0));
311 }
312
313 static const struct ath9k_percal_data iq_cal_single_sample = {
314 IQ_MISMATCH_CAL,
315 MIN_CAL_SAMPLES,
316 PER_MAX_LOG_COUNT,
317 ar9003_hw_iqcal_collect,
318 ar9003_hw_iqcalibrate
319 };
320
321 static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
322 {
323 ah->iq_caldata.calData = &iq_cal_single_sample;
324 }
325
326 /*
327 * solve 4x4 linear equation used in loopback iq cal.
328 */
329 static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah,
330 s32 sin_2phi_1,
331 s32 cos_2phi_1,
332 s32 sin_2phi_2,
333 s32 cos_2phi_2,
334 s32 mag_a0_d0,
335 s32 phs_a0_d0,
336 s32 mag_a1_d0,
337 s32 phs_a1_d0,
338 s32 solved_eq[])
339 {
340 s32 f1 = cos_2phi_1 - cos_2phi_2,
341 f3 = sin_2phi_1 - sin_2phi_2,
342 f2;
343 s32 mag_tx, phs_tx, mag_rx, phs_rx;
344 const s32 result_shift = 1 << 15;
345 struct ath_common *common = ath9k_hw_common(ah);
346
347 f2 = (f1 * f1 + f3 * f3) / result_shift;
348
349 if (!f2) {
350 ath_dbg(common, ATH_DBG_CALIBRATE, "Divide by 0\n");
351 return false;
352 }
353
354 /* mag mismatch, tx */
355 mag_tx = f1 * (mag_a0_d0 - mag_a1_d0) + f3 * (phs_a0_d0 - phs_a1_d0);
356 /* phs mismatch, tx */
357 phs_tx = f3 * (-mag_a0_d0 + mag_a1_d0) + f1 * (phs_a0_d0 - phs_a1_d0);
358
359 mag_tx = (mag_tx / f2);
360 phs_tx = (phs_tx / f2);
361
362 /* mag mismatch, rx */
363 mag_rx = mag_a0_d0 - (cos_2phi_1 * mag_tx + sin_2phi_1 * phs_tx) /
364 result_shift;
365 /* phs mismatch, rx */
366 phs_rx = phs_a0_d0 + (sin_2phi_1 * mag_tx - cos_2phi_1 * phs_tx) /
367 result_shift;
368
369 solved_eq[0] = mag_tx;
370 solved_eq[1] = phs_tx;
371 solved_eq[2] = mag_rx;
372 solved_eq[3] = phs_rx;
373
374 return true;
375 }
376
377 static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im)
378 {
379 s32 abs_i = abs(in_re),
380 abs_q = abs(in_im),
381 max_abs, min_abs;
382
383 if (abs_i > abs_q) {
384 max_abs = abs_i;
385 min_abs = abs_q;
386 } else {
387 max_abs = abs_q;
388 min_abs = abs_i;
389 }
390
391 return max_abs - (max_abs / 32) + (min_abs / 8) + (min_abs / 4);
392 }
393
394 #define DELPT 32
395
396 static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
397 s32 chain_idx,
398 const s32 iq_res[],
399 s32 iqc_coeff[])
400 {
401 s32 i2_m_q2_a0_d0, i2_p_q2_a0_d0, iq_corr_a0_d0,
402 i2_m_q2_a0_d1, i2_p_q2_a0_d1, iq_corr_a0_d1,
403 i2_m_q2_a1_d0, i2_p_q2_a1_d0, iq_corr_a1_d0,
404 i2_m_q2_a1_d1, i2_p_q2_a1_d1, iq_corr_a1_d1;
405 s32 mag_a0_d0, mag_a1_d0, mag_a0_d1, mag_a1_d1,
406 phs_a0_d0, phs_a1_d0, phs_a0_d1, phs_a1_d1,
407 sin_2phi_1, cos_2phi_1,
408 sin_2phi_2, cos_2phi_2;
409 s32 mag_tx, phs_tx, mag_rx, phs_rx;
410 s32 solved_eq[4], mag_corr_tx, phs_corr_tx, mag_corr_rx, phs_corr_rx,
411 q_q_coff, q_i_coff;
412 const s32 res_scale = 1 << 15;
413 const s32 delpt_shift = 1 << 8;
414 s32 mag1, mag2;
415 struct ath_common *common = ath9k_hw_common(ah);
416
417 i2_m_q2_a0_d0 = iq_res[0] & 0xfff;
418 i2_p_q2_a0_d0 = (iq_res[0] >> 12) & 0xfff;
419 iq_corr_a0_d0 = ((iq_res[0] >> 24) & 0xff) + ((iq_res[1] & 0xf) << 8);
420
421 if (i2_m_q2_a0_d0 > 0x800)
422 i2_m_q2_a0_d0 = -((0xfff - i2_m_q2_a0_d0) + 1);
423
424 if (i2_p_q2_a0_d0 > 0x800)
425 i2_p_q2_a0_d0 = -((0xfff - i2_p_q2_a0_d0) + 1);
426
427 if (iq_corr_a0_d0 > 0x800)
428 iq_corr_a0_d0 = -((0xfff - iq_corr_a0_d0) + 1);
429
430 i2_m_q2_a0_d1 = (iq_res[1] >> 4) & 0xfff;
431 i2_p_q2_a0_d1 = (iq_res[2] & 0xfff);
432 iq_corr_a0_d1 = (iq_res[2] >> 12) & 0xfff;
433
434 if (i2_m_q2_a0_d1 > 0x800)
435 i2_m_q2_a0_d1 = -((0xfff - i2_m_q2_a0_d1) + 1);
436
437 if (i2_p_q2_a0_d1 > 0x800)
438 i2_p_q2_a0_d1 = -((0xfff - i2_p_q2_a0_d1) + 1);
439
440 if (iq_corr_a0_d1 > 0x800)
441 iq_corr_a0_d1 = -((0xfff - iq_corr_a0_d1) + 1);
442
443 i2_m_q2_a1_d0 = ((iq_res[2] >> 24) & 0xff) + ((iq_res[3] & 0xf) << 8);
444 i2_p_q2_a1_d0 = (iq_res[3] >> 4) & 0xfff;
445 iq_corr_a1_d0 = iq_res[4] & 0xfff;
446
447 if (i2_m_q2_a1_d0 > 0x800)
448 i2_m_q2_a1_d0 = -((0xfff - i2_m_q2_a1_d0) + 1);
449
450 if (i2_p_q2_a1_d0 > 0x800)
451 i2_p_q2_a1_d0 = -((0xfff - i2_p_q2_a1_d0) + 1);
452
453 if (iq_corr_a1_d0 > 0x800)
454 iq_corr_a1_d0 = -((0xfff - iq_corr_a1_d0) + 1);
455
456 i2_m_q2_a1_d1 = (iq_res[4] >> 12) & 0xfff;
457 i2_p_q2_a1_d1 = ((iq_res[4] >> 24) & 0xff) + ((iq_res[5] & 0xf) << 8);
458 iq_corr_a1_d1 = (iq_res[5] >> 4) & 0xfff;
459
460 if (i2_m_q2_a1_d1 > 0x800)
461 i2_m_q2_a1_d1 = -((0xfff - i2_m_q2_a1_d1) + 1);
462
463 if (i2_p_q2_a1_d1 > 0x800)
464 i2_p_q2_a1_d1 = -((0xfff - i2_p_q2_a1_d1) + 1);
465
466 if (iq_corr_a1_d1 > 0x800)
467 iq_corr_a1_d1 = -((0xfff - iq_corr_a1_d1) + 1);
468
469 if ((i2_p_q2_a0_d0 == 0) || (i2_p_q2_a0_d1 == 0) ||
470 (i2_p_q2_a1_d0 == 0) || (i2_p_q2_a1_d1 == 0)) {
471 ath_dbg(common, ATH_DBG_CALIBRATE,
472 "Divide by 0:\n"
473 "a0_d0=%d\n"
474 "a0_d1=%d\n"
475 "a2_d0=%d\n"
476 "a1_d1=%d\n",
477 i2_p_q2_a0_d0, i2_p_q2_a0_d1,
478 i2_p_q2_a1_d0, i2_p_q2_a1_d1);
479 return false;
480 }
481
482 mag_a0_d0 = (i2_m_q2_a0_d0 * res_scale) / i2_p_q2_a0_d0;
483 phs_a0_d0 = (iq_corr_a0_d0 * res_scale) / i2_p_q2_a0_d0;
484
485 mag_a0_d1 = (i2_m_q2_a0_d1 * res_scale) / i2_p_q2_a0_d1;
486 phs_a0_d1 = (iq_corr_a0_d1 * res_scale) / i2_p_q2_a0_d1;
487
488 mag_a1_d0 = (i2_m_q2_a1_d0 * res_scale) / i2_p_q2_a1_d0;
489 phs_a1_d0 = (iq_corr_a1_d0 * res_scale) / i2_p_q2_a1_d0;
490
491 mag_a1_d1 = (i2_m_q2_a1_d1 * res_scale) / i2_p_q2_a1_d1;
492 phs_a1_d1 = (iq_corr_a1_d1 * res_scale) / i2_p_q2_a1_d1;
493
494 /* w/o analog phase shift */
495 sin_2phi_1 = (((mag_a0_d0 - mag_a0_d1) * delpt_shift) / DELPT);
496 /* w/o analog phase shift */
497 cos_2phi_1 = (((phs_a0_d1 - phs_a0_d0) * delpt_shift) / DELPT);
498 /* w/ analog phase shift */
499 sin_2phi_2 = (((mag_a1_d0 - mag_a1_d1) * delpt_shift) / DELPT);
500 /* w/ analog phase shift */
501 cos_2phi_2 = (((phs_a1_d1 - phs_a1_d0) * delpt_shift) / DELPT);
502
503 /*
504 * force sin^2 + cos^2 = 1;
505 * find magnitude by approximation
506 */
507 mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1);
508 mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2);
509
510 if ((mag1 == 0) || (mag2 == 0)) {
511 ath_dbg(common, ATH_DBG_CALIBRATE,
512 "Divide by 0: mag1=%d, mag2=%d\n",
513 mag1, mag2);
514 return false;
515 }
516
517 /* normalization sin and cos by mag */
518 sin_2phi_1 = (sin_2phi_1 * res_scale / mag1);
519 cos_2phi_1 = (cos_2phi_1 * res_scale / mag1);
520 sin_2phi_2 = (sin_2phi_2 * res_scale / mag2);
521 cos_2phi_2 = (cos_2phi_2 * res_scale / mag2);
522
523 /* calculate IQ mismatch */
524 if (!ar9003_hw_solve_iq_cal(ah,
525 sin_2phi_1, cos_2phi_1,
526 sin_2phi_2, cos_2phi_2,
527 mag_a0_d0, phs_a0_d0,
528 mag_a1_d0,
529 phs_a1_d0, solved_eq)) {
530 ath_dbg(common, ATH_DBG_CALIBRATE,
531 "Call to ar9003_hw_solve_iq_cal() failed.\n");
532 return false;
533 }
534
535 mag_tx = solved_eq[0];
536 phs_tx = solved_eq[1];
537 mag_rx = solved_eq[2];
538 phs_rx = solved_eq[3];
539
540 ath_dbg(common, ATH_DBG_CALIBRATE,
541 "chain %d: mag mismatch=%d phase mismatch=%d\n",
542 chain_idx, mag_tx/res_scale, phs_tx/res_scale);
543
544 if (res_scale == mag_tx) {
545 ath_dbg(common, ATH_DBG_CALIBRATE,
546 "Divide by 0: mag_tx=%d, res_scale=%d\n",
547 mag_tx, res_scale);
548 return false;
549 }
550
551 /* calculate and quantize Tx IQ correction factor */
552 mag_corr_tx = (mag_tx * res_scale) / (res_scale - mag_tx);
553 phs_corr_tx = -phs_tx;
554
555 q_q_coff = (mag_corr_tx * 128 / res_scale);
556 q_i_coff = (phs_corr_tx * 256 / res_scale);
557
558 ath_dbg(common, ATH_DBG_CALIBRATE,
559 "tx chain %d: mag corr=%d phase corr=%d\n",
560 chain_idx, q_q_coff, q_i_coff);
561
562 if (q_i_coff < -63)
563 q_i_coff = -63;
564 if (q_i_coff > 63)
565 q_i_coff = 63;
566 if (q_q_coff < -63)
567 q_q_coff = -63;
568 if (q_q_coff > 63)
569 q_q_coff = 63;
570
571 iqc_coeff[0] = (q_q_coff * 128) + q_i_coff;
572
573 ath_dbg(common, ATH_DBG_CALIBRATE,
574 "tx chain %d: iq corr coeff=%x\n",
575 chain_idx, iqc_coeff[0]);
576
577 if (-mag_rx == res_scale) {
578 ath_dbg(common, ATH_DBG_CALIBRATE,
579 "Divide by 0: mag_rx=%d, res_scale=%d\n",
580 mag_rx, res_scale);
581 return false;
582 }
583
584 /* calculate and quantize Rx IQ correction factors */
585 mag_corr_rx = (-mag_rx * res_scale) / (res_scale + mag_rx);
586 phs_corr_rx = -phs_rx;
587
588 q_q_coff = (mag_corr_rx * 128 / res_scale);
589 q_i_coff = (phs_corr_rx * 256 / res_scale);
590
591 ath_dbg(common, ATH_DBG_CALIBRATE,
592 "rx chain %d: mag corr=%d phase corr=%d\n",
593 chain_idx, q_q_coff, q_i_coff);
594
595 if (q_i_coff < -63)
596 q_i_coff = -63;
597 if (q_i_coff > 63)
598 q_i_coff = 63;
599 if (q_q_coff < -63)
600 q_q_coff = -63;
601 if (q_q_coff > 63)
602 q_q_coff = 63;
603
604 iqc_coeff[1] = (q_q_coff * 128) + q_i_coff;
605
606 ath_dbg(common, ATH_DBG_CALIBRATE,
607 "rx chain %d: iq corr coeff=%x\n",
608 chain_idx, iqc_coeff[1]);
609
610 return true;
611 }
612
613 static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
614 int max_delta)
615 {
616 int mp_max = -64, max_idx = 0;
617 int mp_min = 63, min_idx = 0;
618 int mp_avg = 0, i, outlier_idx = 0, mp_count = 0;
619
620 /* find min/max mismatch across all calibrated gains */
621 for (i = 0; i < nmeasurement; i++) {
622 if (mp_coeff[i] > mp_max) {
623 mp_max = mp_coeff[i];
624 max_idx = i;
625 } else if (mp_coeff[i] < mp_min) {
626 mp_min = mp_coeff[i];
627 min_idx = i;
628 }
629 }
630
631 /* find average (exclude max abs value) */
632 for (i = 0; i < nmeasurement; i++) {
633 if ((abs(mp_coeff[i]) < abs(mp_max)) ||
634 (abs(mp_coeff[i]) < abs(mp_min))) {
635 mp_avg += mp_coeff[i];
636 mp_count++;
637 }
638 }
639
640 /*
641 * finding mean magnitude/phase if possible, otherwise
642 * just use the last value as the mean
643 */
644 if (mp_count)
645 mp_avg /= mp_count;
646 else
647 mp_avg = mp_coeff[nmeasurement - 1];
648
649 /* detect outlier */
650 if (abs(mp_max - mp_min) > max_delta) {
651 if (abs(mp_max - mp_avg) > abs(mp_min - mp_avg))
652 outlier_idx = max_idx;
653 else
654 outlier_idx = min_idx;
655
656 mp_coeff[outlier_idx] = mp_avg;
657 }
658 }
659
660 static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
661 u8 num_chains,
662 struct coeff *coeff)
663 {
664 int i, im, nmeasurement;
665 u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
666
667 memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
668 for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
669 tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
670 AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
671 if (!AR_SREV_9485(ah)) {
672 tx_corr_coeff[i * 2][1] =
673 tx_corr_coeff[(i * 2) + 1][1] =
674 AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
675
676 tx_corr_coeff[i * 2][2] =
677 tx_corr_coeff[(i * 2) + 1][2] =
678 AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
679 }
680 }
681
682 /* Load the average of 2 passes */
683 for (i = 0; i < num_chains; i++) {
684 nmeasurement = REG_READ_FIELD(ah,
685 AR_PHY_TX_IQCAL_STATUS_B0,
686 AR_PHY_CALIBRATED_GAINS_0);
687
688 if (nmeasurement > MAX_MEASUREMENT)
689 nmeasurement = MAX_MEASUREMENT;
690
691 /* detect outlier only if nmeasurement > 1 */
692 if (nmeasurement > 1) {
693 /* Detect magnitude outlier */
694 ar9003_hw_detect_outlier(coeff->mag_coeff[i],
695 nmeasurement, MAX_MAG_DELTA);
696
697 /* Detect phase outlier */
698 ar9003_hw_detect_outlier(coeff->phs_coeff[i],
699 nmeasurement, MAX_PHS_DELTA);
700 }
701
702 for (im = 0; im < nmeasurement; im++) {
703
704 coeff->iqc_coeff[0] = (coeff->mag_coeff[i][im] & 0x7f) |
705 ((coeff->phs_coeff[i][im] & 0x7f) << 7);
706
707 if ((im % 2) == 0)
708 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
709 AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
710 coeff->iqc_coeff[0]);
711 else
712 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
713 AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
714 coeff->iqc_coeff[0]);
715 }
716 }
717
718 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
719 AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
720 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
721 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
722
723 return;
724
725 }
726
727 static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
728 {
729 struct ath_common *common = ath9k_hw_common(ah);
730 u8 tx_gain_forced;
731
732 tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
733 AR_PHY_TXGAIN_FORCE);
734 if (tx_gain_forced)
735 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
736 AR_PHY_TXGAIN_FORCE, 0);
737
738 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
739 AR_PHY_TX_IQCAL_START_DO_CAL, 1);
740
741 if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
742 AR_PHY_TX_IQCAL_START_DO_CAL, 0,
743 AH_WAIT_TIMEOUT)) {
744 ath_dbg(common, ATH_DBG_CALIBRATE,
745 "Tx IQ Cal is not completed.\n");
746 return false;
747 }
748 return true;
749 }
750
751 static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah)
752 {
753 struct ath_common *common = ath9k_hw_common(ah);
754 const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
755 AR_PHY_TX_IQCAL_STATUS_B0,
756 AR_PHY_TX_IQCAL_STATUS_B1,
757 AR_PHY_TX_IQCAL_STATUS_B2,
758 };
759 const u_int32_t chan_info_tab[] = {
760 AR_PHY_CHAN_INFO_TAB_0,
761 AR_PHY_CHAN_INFO_TAB_1,
762 AR_PHY_CHAN_INFO_TAB_2,
763 };
764 struct coeff coeff;
765 s32 iq_res[6];
766 u8 num_chains = 0;
767 int i, im, j;
768 int nmeasurement;
769
770 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
771 if (ah->txchainmask & (1 << i))
772 num_chains++;
773 }
774
775 for (i = 0; i < num_chains; i++) {
776 nmeasurement = REG_READ_FIELD(ah,
777 AR_PHY_TX_IQCAL_STATUS_B0,
778 AR_PHY_CALIBRATED_GAINS_0);
779 if (nmeasurement > MAX_MEASUREMENT)
780 nmeasurement = MAX_MEASUREMENT;
781
782 for (im = 0; im < nmeasurement; im++) {
783 ath_dbg(common, ATH_DBG_CALIBRATE,
784 "Doing Tx IQ Cal for chain %d.\n", i);
785
786 if (REG_READ(ah, txiqcal_status[i]) &
787 AR_PHY_TX_IQCAL_STATUS_FAILED) {
788 ath_dbg(common, ATH_DBG_CALIBRATE,
789 "Tx IQ Cal failed for chain %d.\n", i);
790 goto tx_iqcal_fail;
791 }
792
793 for (j = 0; j < 3; j++) {
794 u32 idx = 2 * j, offset = 4 * (3 * im + j);
795
796 REG_RMW_FIELD(ah,
797 AR_PHY_CHAN_INFO_MEMORY,
798 AR_PHY_CHAN_INFO_TAB_S2_READ,
799 0);
800
801 /* 32 bits */
802 iq_res[idx] = REG_READ(ah,
803 chan_info_tab[i] +
804 offset);
805
806 REG_RMW_FIELD(ah,
807 AR_PHY_CHAN_INFO_MEMORY,
808 AR_PHY_CHAN_INFO_TAB_S2_READ,
809 1);
810
811 /* 16 bits */
812 iq_res[idx + 1] = 0xffff & REG_READ(ah,
813 chan_info_tab[i] + offset);
814
815 ath_dbg(common, ATH_DBG_CALIBRATE,
816 "IQ RES[%d]=0x%x"
817 "IQ_RES[%d]=0x%x\n",
818 idx, iq_res[idx], idx + 1,
819 iq_res[idx + 1]);
820 }
821
822 if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
823 coeff.iqc_coeff)) {
824 ath_dbg(common, ATH_DBG_CALIBRATE,
825 "Failed in calculation of \
826 IQ correction.\n");
827 goto tx_iqcal_fail;
828 }
829
830 coeff.mag_coeff[i][im] = coeff.iqc_coeff[0] & 0x7f;
831 coeff.phs_coeff[i][im] =
832 (coeff.iqc_coeff[0] >> 7) & 0x7f;
833
834 if (coeff.mag_coeff[i][im] > 63)
835 coeff.mag_coeff[i][im] -= 128;
836 if (coeff.phs_coeff[i][im] > 63)
837 coeff.phs_coeff[i][im] -= 128;
838 }
839 }
840 ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains, &coeff);
841
842 return;
843
844 tx_iqcal_fail:
845 ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
846 return;
847 }
848 static bool ar9003_hw_init_cal(struct ath_hw *ah,
849 struct ath9k_channel *chan)
850 {
851 struct ath_common *common = ath9k_hw_common(ah);
852 bool txiqcal_done = false;
853
854 /* Do Tx IQ Calibration */
855 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
856 AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
857 DELPT);
858
859 /*
860 * For AR9485 or later chips, TxIQ cal runs as part of
861 * AGC calibration
862 */
863 if (AR_SREV_9485_OR_LATER(ah))
864 txiqcal_done = true;
865 else {
866 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
867 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
868 udelay(5);
869 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
870 }
871
872 /* Calibrate the AGC */
873 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
874 REG_READ(ah, AR_PHY_AGC_CONTROL) |
875 AR_PHY_AGC_CONTROL_CAL);
876
877 /* Poll for offset calibration complete */
878 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
879 0, AH_WAIT_TIMEOUT)) {
880 ath_dbg(common, ATH_DBG_CALIBRATE,
881 "offset calibration failed to complete in 1ms; noisy environment?\n");
882 return false;
883 }
884
885 if (txiqcal_done)
886 ar9003_hw_tx_iq_cal_post_proc(ah);
887
888 ath9k_hw_loadnf(ah, chan);
889 ath9k_hw_start_nfcal(ah, true);
890
891 /* Initialize list pointers */
892 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
893 ah->supp_cals = IQ_MISMATCH_CAL;
894
895 if (ah->supp_cals & IQ_MISMATCH_CAL) {
896 INIT_CAL(&ah->iq_caldata);
897 INSERT_CAL(ah, &ah->iq_caldata);
898 ath_dbg(common, ATH_DBG_CALIBRATE,
899 "enabling IQ Calibration.\n");
900 }
901
902 if (ah->supp_cals & TEMP_COMP_CAL) {
903 INIT_CAL(&ah->tempCompCalData);
904 INSERT_CAL(ah, &ah->tempCompCalData);
905 ath_dbg(common, ATH_DBG_CALIBRATE,
906 "enabling Temperature Compensation Calibration.\n");
907 }
908
909 /* Initialize current pointer to first element in list */
910 ah->cal_list_curr = ah->cal_list;
911
912 if (ah->cal_list_curr)
913 ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
914
915 if (ah->caldata)
916 ah->caldata->CalValid = 0;
917
918 return true;
919 }
920
921 void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
922 {
923 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
924 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
925
926 priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
927 priv_ops->init_cal = ar9003_hw_init_cal;
928 priv_ops->setup_calibration = ar9003_hw_setup_calibration;
929
930 ops->calibrate = ar9003_hw_calibrate;
931 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree