ACPI: bay: use IS_ERR for return of register_platform_device_simple
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-i386 / desc.h
blobf398cc456448187bff38c53ad81a314d2d063212
1 #ifndef __ARCH_DESC_H
2 #define __ARCH_DESC_H
4 #include <asm/ldt.h>
5 #include <asm/segment.h>
7 #ifndef __ASSEMBLY__
9 #include <linux/preempt.h>
10 #include <linux/smp.h>
11 #include <linux/percpu.h>
13 #include <asm/mmu.h>
15 extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
17 struct Xgt_desc_struct {
18 unsigned short size;
19 unsigned long address __attribute__((packed));
20 unsigned short pad;
21 } __attribute__ ((packed));
23 extern struct Xgt_desc_struct idt_descr;
24 DECLARE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr);
27 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
29 return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address;
32 extern struct desc_struct idt_table[];
33 extern void set_intr_gate(unsigned int irq, void * addr);
35 static inline void pack_descriptor(__u32 *a, __u32 *b,
36 unsigned long base, unsigned long limit, unsigned char type, unsigned char flags)
38 *a = ((base & 0xffff) << 16) | (limit & 0xffff);
39 *b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
40 (limit & 0x000f0000) | ((type & 0xff) << 8) | ((flags & 0xf) << 20);
43 static inline void pack_gate(__u32 *a, __u32 *b,
44 unsigned long base, unsigned short seg, unsigned char type, unsigned char flags)
46 *a = (seg << 16) | (base & 0xffff);
47 *b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff);
50 #define DESCTYPE_LDT 0x82 /* present, system, DPL-0, LDT */
51 #define DESCTYPE_TSS 0x89 /* present, system, DPL-0, 32-bit TSS */
52 #define DESCTYPE_TASK 0x85 /* present, system, DPL-0, task gate */
53 #define DESCTYPE_INT 0x8e /* present, system, DPL-0, interrupt gate */
54 #define DESCTYPE_TRAP 0x8f /* present, system, DPL-0, trap gate */
55 #define DESCTYPE_DPL3 0x60 /* DPL-3 */
56 #define DESCTYPE_S 0x10 /* !system */
58 #ifdef CONFIG_PARAVIRT
59 #include <asm/paravirt.h>
60 #else
61 #define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
63 #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
64 #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
65 #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
66 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
68 #define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
69 #define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
70 #define store_tr(tr) __asm__ ("str %0":"=m" (tr))
71 #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
73 #if TLS_SIZE != 24
74 # error update this code.
75 #endif
77 static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
79 #define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
80 C(0); C(1); C(2);
81 #undef C
84 #define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
85 #define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
86 #define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
88 static inline void write_dt_entry(void *dt, int entry, __u32 entry_a, __u32 entry_b)
90 __u32 *lp = (__u32 *)((char *)dt + entry*8);
91 *lp = entry_a;
92 *(lp+1) = entry_b;
95 #define set_ldt native_set_ldt
96 #endif /* CONFIG_PARAVIRT */
98 static inline fastcall void native_set_ldt(const void *addr,
99 unsigned int entries)
101 if (likely(entries == 0))
102 __asm__ __volatile__("lldt %w0"::"q" (0));
103 else {
104 unsigned cpu = smp_processor_id();
105 __u32 a, b;
107 pack_descriptor(&a, &b, (unsigned long)addr,
108 entries * sizeof(struct desc_struct) - 1,
109 DESCTYPE_LDT, 0);
110 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, a, b);
111 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
115 static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg)
117 __u32 a, b;
118 pack_gate(&a, &b, (unsigned long)addr, seg, type, 0);
119 write_idt_entry(idt_table, gate, a, b);
122 static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, const void *addr)
124 __u32 a, b;
125 pack_descriptor(&a, &b, (unsigned long)addr,
126 offsetof(struct tss_struct, __cacheline_filler) - 1,
127 DESCTYPE_TSS, 0);
128 write_gdt_entry(get_cpu_gdt_table(cpu), entry, a, b);
132 #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
134 #define LDT_entry_a(info) \
135 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
137 #define LDT_entry_b(info) \
138 (((info)->base_addr & 0xff000000) | \
139 (((info)->base_addr & 0x00ff0000) >> 16) | \
140 ((info)->limit & 0xf0000) | \
141 (((info)->read_exec_only ^ 1) << 9) | \
142 ((info)->contents << 10) | \
143 (((info)->seg_not_present ^ 1) << 15) | \
144 ((info)->seg_32bit << 22) | \
145 ((info)->limit_in_pages << 23) | \
146 ((info)->useable << 20) | \
147 0x7000)
149 #define LDT_empty(info) (\
150 (info)->base_addr == 0 && \
151 (info)->limit == 0 && \
152 (info)->contents == 0 && \
153 (info)->read_exec_only == 1 && \
154 (info)->seg_32bit == 0 && \
155 (info)->limit_in_pages == 0 && \
156 (info)->seg_not_present == 1 && \
157 (info)->useable == 0 )
159 static inline void clear_LDT(void)
161 set_ldt(NULL, 0);
165 * load one particular LDT into the current CPU
167 static inline void load_LDT_nolock(mm_context_t *pc)
169 set_ldt(pc->ldt, pc->size);
172 static inline void load_LDT(mm_context_t *pc)
174 preempt_disable();
175 load_LDT_nolock(pc);
176 preempt_enable();
179 static inline unsigned long get_desc_base(unsigned long *desc)
181 unsigned long base;
182 base = ((desc[0] >> 16) & 0x0000ffff) |
183 ((desc[1] << 16) & 0x00ff0000) |
184 (desc[1] & 0xff000000);
185 return base;
188 #else /* __ASSEMBLY__ */
191 * GET_DESC_BASE reads the descriptor base of the specified segment.
193 * Args:
194 * idx - descriptor index
195 * gdt - GDT pointer
196 * base - 32bit register to which the base will be written
197 * lo_w - lo word of the "base" register
198 * lo_b - lo byte of the "base" register
199 * hi_b - hi byte of the low word of the "base" register
201 * Example:
202 * GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah)
203 * Will read the base address of GDT_ENTRY_ESPFIX_SS and put it into %eax.
205 #define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) \
206 movb idx*8+4(gdt), lo_b; \
207 movb idx*8+7(gdt), hi_b; \
208 shll $16, base; \
209 movw idx*8+2(gdt), lo_w;
211 #endif /* !__ASSEMBLY__ */
213 #endif