arch/m68knommu/platform/coldfire/timers.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      timers.c -- generic ColdFire hardware timer support.
   5  *
   6  *      Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
   7  */
   8
   9 /***************************************************************************/
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/sched.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/profile.h>
  17 #include <linux/clocksource.h>
  18 #include <asm/io.h>
  19 #include <asm/traps.h>
  20 #include <asm/machdep.h>
  21 #include <asm/coldfire.h>
  22 #include <asm/mcftimer.h>
  23 #include <asm/mcfsim.h>
  24
  25 /***************************************************************************/
  26
  27 /*
  28  *      By default use timer1 as the system clock timer.
  29  */
  30 #define FREQ    (MCF_BUSCLK / 16)
  31 #define TA(a)   (MCF_MBAR + MCFTIMER_BASE1 + (a))
  32
  33 /*
  34  *      These provide the underlying interrupt vector support.
  35  *      Unfortunately it is a little different on each ColdFire.
  36  */
  37 extern void mcf_settimericr(int timer, int level);
  38 void coldfire_profile_init(void);
  39
  40 #if defined(CONFIG_M532x)
  41 #define __raw_readtrr   __raw_readl
  42 #define __raw_writetrr  __raw_writel
  43 #else
  44 #define __raw_readtrr   __raw_readw
  45 #define __raw_writetrr  __raw_writew
  46 #endif
  47
  48 static u32 mcftmr_cycles_per_jiffy;
  49 static u32 mcftmr_cnt;
  50
  51 /***************************************************************************/
  52
  53 static irqreturn_t mcftmr_tick(int irq, void *dummy)
  54 {
  55         /* Reset the ColdFire timer */
  56         __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
  57
  58         mcftmr_cnt += mcftmr_cycles_per_jiffy;
  59         return arch_timer_interrupt(irq, dummy);
  60 }
  61
  62 /***************************************************************************/
  63
  64 static struct irqaction mcftmr_timer_irq = {
  65         .name    = "timer",
  66         .flags   = IRQF_DISABLED | IRQF_TIMER,
  67         .handler = mcftmr_tick,
  68 };
  69
  70 /***************************************************************************/
  71
  72 static cycle_t mcftmr_read_clk(struct clocksource *cs)
  73 {
  74         unsigned long flags;
  75         u32 cycles;
  76         u16 tcn;
  77
  78         local_irq_save(flags);
  79         tcn = __raw_readw(TA(MCFTIMER_TCN));
  80         cycles = mcftmr_cnt;
  81         local_irq_restore(flags);
  82
  83         return cycles + tcn;
  84 }
  85
  86 /***************************************************************************/
  87
  88 static struct clocksource mcftmr_clk = {
  89         .name   = "tmr",
  90         .rating = 250,
  91         .read   = mcftmr_read_clk,
  92         .shift  = 20,
  93         .mask   = CLOCKSOURCE_MASK(32),
  94         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
  95 };
  96
  97 /***************************************************************************/
  98
  99 void hw_timer_init(void)
 100 {
 101         setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
 102
 103         __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
 104         mcftmr_cycles_per_jiffy = FREQ / HZ;
 105         /*
 106          *      The coldfire timer runs from 0 to TRR included, then 0
 107          *      again and so on.  It counts thus actually TRR + 1 steps
 108          *      for 1 tick, not TRR.  So if you want n cycles,
 109          *      initialize TRR with n - 1.
 110          */
 111         __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
 112         __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
 113                 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
 114
 115         mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
 116         clocksource_register(&mcftmr_clk);
 117
 118         mcf_clrimr(MCFINTC_TIMER1);
 119
 120 #ifdef CONFIG_HIGHPROFILE
 121         coldfire_profile_init();
 122 #endif
 123 }
 124
 125 /***************************************************************************/
 126 #ifdef CONFIG_HIGHPROFILE
 127 /***************************************************************************/
 128
 129 /*
 130  *      By default use timer2 as the profiler clock timer.
 131  */
 132 #define PA(a)   (MCF_MBAR + MCFTIMER_BASE2 + (a))
 133
 134 /*
 135  *      Choose a reasonably fast profile timer. Make it an odd value to
 136  *      try and get good coverage of kernel operations.
 137  */
 138 #define PROFILEHZ       1013
 139
 140 /*
 141  *      Use the other timer to provide high accuracy profiling info.
 142  */
 143 irqreturn_t coldfire_profile_tick(int irq, void *dummy)
 144 {
 145         /* Reset ColdFire timer2 */
 146         __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
 147         if (current->pid)
 148                 profile_tick(CPU_PROFILING);
 149         return IRQ_HANDLED;
 150 }
 151
 152 /***************************************************************************/
 153
 154 static struct irqaction coldfire_profile_irq = {
 155         .name    = "profile timer",
 156         .flags   = IRQF_DISABLED | IRQF_TIMER,
 157         .handler = coldfire_profile_tick,
 158 };
 159
 160 void coldfire_profile_init(void)
 161 {
 162         printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
 163                PROFILEHZ);
 164
 165         setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
 166
 167         /* Set up TIMER 2 as high speed profile clock */
 168         __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
 169
 170         __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
 171         __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
 172                 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
 173
 174         mcf_clrimr(MCFINTC_TIMER2);
 175 }
 176
 177 /***************************************************************************/
 178 #endif  /* CONFIG_HIGHPROFILE */
 179 /***************************************************************************/