include/asm-i386/desc.h

   1 #ifndef __ARCH_DESC_H
   2 #define __ARCH_DESC_H
   3
   4 #include <asm/ldt.h>
   5 #include <asm/segment.h>
   6
   7 #define CPU_16BIT_STACK_SIZE 1024
   8
   9 #ifndef __ASSEMBLY__
  10
  11 #include <linux/preempt.h>
  12 #include <linux/smp.h>
  13 #include <linux/percpu.h>
  14
  15 #include <asm/mmu.h>
  16
  17 extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
  18
  19 DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
  20
  21 struct Xgt_desc_struct {
  22         unsigned short size;
  23         unsigned long address __attribute__((packed));
  24         unsigned short pad;
  25 } __attribute__ ((packed));
  26
  27 extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
  28
  29 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
  30 {
  31         return ((struct desc_struct *)cpu_gdt_descr[cpu].address);
  32 }
  33
  34 #define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
  35 #define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
  36
  37 #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
  38 #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
  39 #define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr))
  40 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt))
  41
  42 #define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
  43 #define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
  44 #define store_tr(tr) __asm__ ("str %0":"=mr" (tr))
  45 #define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt))
  46
  47 /*
  48  * This is the ldt that every process will get unless we need
  49  * something other than this.
  50  */
  51 extern struct desc_struct default_ldt[];
  52 extern void set_intr_gate(unsigned int irq, void * addr);
  53
  54 #define _set_tssldt_desc(n,addr,limit,type) \
  55 __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
  56         "movw %w1,2(%2)\n\t" \
  57         "rorl $16,%1\n\t" \
  58         "movb %b1,4(%2)\n\t" \
  59         "movb %4,5(%2)\n\t" \
  60         "movb $0,6(%2)\n\t" \
  61         "movb %h1,7(%2)\n\t" \
  62         "rorl $16,%1" \
  63         : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
  64
  65 static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
  66 {
  67         _set_tssldt_desc(&get_cpu_gdt_table(cpu)[entry], (int)addr,
  68                 offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);
  69 }
  70
  71 #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
  72
  73 static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
  74 {
  75         _set_tssldt_desc(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82);
  76 }
  77
  78 #define LDT_entry_a(info) \
  79         ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
  80
  81 #define LDT_entry_b(info) \
  82         (((info)->base_addr & 0xff000000) | \
  83         (((info)->base_addr & 0x00ff0000) >> 16) | \
  84         ((info)->limit & 0xf0000) | \
  85         (((info)->read_exec_only ^ 1) << 9) | \
  86         ((info)->contents << 10) | \
  87         (((info)->seg_not_present ^ 1) << 15) | \
  88         ((info)->seg_32bit << 22) | \
  89         ((info)->limit_in_pages << 23) | \
  90         ((info)->useable << 20) | \
  91         0x7000)
  92
  93 #define LDT_empty(info) (\
  94         (info)->base_addr       == 0    && \
  95         (info)->limit           == 0    && \
  96         (info)->contents        == 0    && \
  97         (info)->read_exec_only  == 1    && \
  98         (info)->seg_32bit       == 0    && \
  99         (info)->limit_in_pages  == 0    && \
 100         (info)->seg_not_present == 1    && \
 101         (info)->useable         == 0    )
 102
 103 static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b)
 104 {
 105         __u32 *lp = (__u32 *)((char *)ldt + entry*8);
 106         *lp = entry_a;
 107         *(lp+1) = entry_b;
 108 }
 109
 110 #if TLS_SIZE != 24
 111 # error update this code.
 112 #endif
 113
 114 static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
 115 {
 116 #define C(i) get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
 117         C(0); C(1); C(2);
 118 #undef C
 119 }
 120
 121 static inline void clear_LDT(void)
 122 {
 123         int cpu = get_cpu();
 124
 125         set_ldt_desc(cpu, &default_ldt[0], 5);
 126         load_LDT_desc();
 127         put_cpu();
 128 }
 129
 130 /*
 131  * load one particular LDT into the current CPU
 132  */
 133 static inline void load_LDT_nolock(mm_context_t *pc, int cpu)
 134 {
 135         void *segments = pc->ldt;
 136         int count = pc->size;
 137
 138         if (likely(!count)) {
 139                 segments = &default_ldt[0];
 140                 count = 5;
 141         }
 142
 143         set_ldt_desc(cpu, segments, count);
 144         load_LDT_desc();
 145 }
 146
 147 static inline void load_LDT(mm_context_t *pc)
 148 {
 149         int cpu = get_cpu();
 150         load_LDT_nolock(pc, cpu);
 151         put_cpu();
 152 }
 153
 154 static inline unsigned long get_desc_base(unsigned long *desc)
 155 {
 156         unsigned long base;
 157         base = ((desc[0] >> 16)  & 0x0000ffff) |
 158                 ((desc[1] << 16) & 0x00ff0000) |
 159                 (desc[1] & 0xff000000);
 160         return base;
 161 }
 162
 163 #endif /* !__ASSEMBLY__ */
 164
 165 #endif