Linux 2.6.31.8
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / arm / aaci.c
blobdbb05b7725589fedfe4f650c3a57396d891e8192
1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
22 #include <asm/io.h>
23 #include <asm/irq.h>
24 #include <asm/sizes.h>
26 #include <sound/core.h>
27 #include <sound/initval.h>
28 #include <sound/ac97_codec.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
32 #include "aaci.h"
33 #include "devdma.h"
35 #define DRIVER_NAME "aaci-pl041"
38 * PM support is not complete. Turn it off.
40 #undef CONFIG_PM
42 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
44 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
47 * Ensure that the slot 1/2 RX registers are empty.
49 v = readl(aaci->base + AACI_SLFR);
50 if (v & SLFR_2RXV)
51 readl(aaci->base + AACI_SL2RX);
52 if (v & SLFR_1RXV)
53 readl(aaci->base + AACI_SL1RX);
55 writel(maincr, aaci->base + AACI_MAINCR);
59 * P29:
60 * The recommended use of programming the external codec through slot 1
61 * and slot 2 data is to use the channels during setup routines and the
62 * slot register at any other time. The data written into slot 1, slot 2
63 * and slot 12 registers is transmitted only when their corresponding
64 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
65 * register.
67 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
68 unsigned short val)
70 struct aaci *aaci = ac97->private_data;
71 u32 v;
72 int timeout = 5000;
74 if (ac97->num >= 4)
75 return;
77 mutex_lock(&aaci->ac97_sem);
79 aaci_ac97_select_codec(aaci, ac97);
82 * P54: You must ensure that AACI_SL2TX is always written
83 * to, if required, before data is written to AACI_SL1TX.
85 writel(val << 4, aaci->base + AACI_SL2TX);
86 writel(reg << 12, aaci->base + AACI_SL1TX);
89 * Wait for the transmission of both slots to complete.
91 do {
92 v = readl(aaci->base + AACI_SLFR);
93 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
95 if (!timeout)
96 dev_err(&aaci->dev->dev,
97 "timeout waiting for write to complete\n");
99 mutex_unlock(&aaci->ac97_sem);
103 * Read an AC'97 register.
105 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
107 struct aaci *aaci = ac97->private_data;
108 u32 v;
109 int timeout = 5000;
110 int retries = 10;
112 if (ac97->num >= 4)
113 return ~0;
115 mutex_lock(&aaci->ac97_sem);
117 aaci_ac97_select_codec(aaci, ac97);
120 * Write the register address to slot 1.
122 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
125 * Wait for the transmission to complete.
127 do {
128 v = readl(aaci->base + AACI_SLFR);
129 } while ((v & SLFR_1TXB) && --timeout);
131 if (!timeout) {
132 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
133 v = ~0;
134 goto out;
138 * Give the AC'97 codec more than enough time
139 * to respond. (42us = ~2 frames at 48kHz.)
141 udelay(42);
144 * Wait for slot 2 to indicate data.
146 timeout = 5000;
147 do {
148 cond_resched();
149 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
150 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
152 if (!timeout) {
153 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
154 v = ~0;
155 goto out;
158 do {
159 v = readl(aaci->base + AACI_SL1RX) >> 12;
160 if (v == reg) {
161 v = readl(aaci->base + AACI_SL2RX) >> 4;
162 break;
163 } else if (--retries) {
164 dev_warn(&aaci->dev->dev,
165 "ac97 read back fail. retry\n");
166 continue;
167 } else {
168 dev_warn(&aaci->dev->dev,
169 "wrong ac97 register read back (%x != %x)\n",
170 v, reg);
171 v = ~0;
173 } while (retries);
174 out:
175 mutex_unlock(&aaci->ac97_sem);
176 return v;
179 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
181 u32 val;
182 int timeout = 5000;
184 do {
185 val = readl(aacirun->base + AACI_SR);
186 } while (val & (SR_TXB|SR_RXB) && timeout--);
192 * Interrupt support.
194 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
196 if (mask & ISR_ORINTR) {
197 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
198 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
201 if (mask & ISR_RXTOINTR) {
202 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
203 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
206 if (mask & ISR_RXINTR) {
207 struct aaci_runtime *aacirun = &aaci->capture;
208 void *ptr;
210 if (!aacirun->substream || !aacirun->start) {
211 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
212 writel(0, aacirun->base + AACI_IE);
213 return;
215 ptr = aacirun->ptr;
217 do {
218 unsigned int len = aacirun->fifosz;
219 u32 val;
221 if (aacirun->bytes <= 0) {
222 aacirun->bytes += aacirun->period;
223 aacirun->ptr = ptr;
224 spin_unlock(&aaci->lock);
225 snd_pcm_period_elapsed(aacirun->substream);
226 spin_lock(&aaci->lock);
228 if (!(aacirun->cr & CR_EN))
229 break;
231 val = readl(aacirun->base + AACI_SR);
232 if (!(val & SR_RXHF))
233 break;
234 if (!(val & SR_RXFF))
235 len >>= 1;
237 aacirun->bytes -= len;
239 /* reading 16 bytes at a time */
240 for( ; len > 0; len -= 16) {
241 asm(
242 "ldmia %1, {r0, r1, r2, r3}\n\t"
243 "stmia %0!, {r0, r1, r2, r3}"
244 : "+r" (ptr)
245 : "r" (aacirun->fifo)
246 : "r0", "r1", "r2", "r3", "cc");
248 if (ptr >= aacirun->end)
249 ptr = aacirun->start;
251 } while(1);
252 aacirun->ptr = ptr;
255 if (mask & ISR_URINTR) {
256 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
257 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
260 if (mask & ISR_TXINTR) {
261 struct aaci_runtime *aacirun = &aaci->playback;
262 void *ptr;
264 if (!aacirun->substream || !aacirun->start) {
265 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
266 writel(0, aacirun->base + AACI_IE);
267 return;
270 ptr = aacirun->ptr;
271 do {
272 unsigned int len = aacirun->fifosz;
273 u32 val;
275 if (aacirun->bytes <= 0) {
276 aacirun->bytes += aacirun->period;
277 aacirun->ptr = ptr;
278 spin_unlock(&aaci->lock);
279 snd_pcm_period_elapsed(aacirun->substream);
280 spin_lock(&aaci->lock);
282 if (!(aacirun->cr & CR_EN))
283 break;
285 val = readl(aacirun->base + AACI_SR);
286 if (!(val & SR_TXHE))
287 break;
288 if (!(val & SR_TXFE))
289 len >>= 1;
291 aacirun->bytes -= len;
293 /* writing 16 bytes at a time */
294 for ( ; len > 0; len -= 16) {
295 asm(
296 "ldmia %0!, {r0, r1, r2, r3}\n\t"
297 "stmia %1, {r0, r1, r2, r3}"
298 : "+r" (ptr)
299 : "r" (aacirun->fifo)
300 : "r0", "r1", "r2", "r3", "cc");
302 if (ptr >= aacirun->end)
303 ptr = aacirun->start;
305 } while (1);
307 aacirun->ptr = ptr;
311 static irqreturn_t aaci_irq(int irq, void *devid)
313 struct aaci *aaci = devid;
314 u32 mask;
315 int i;
317 spin_lock(&aaci->lock);
318 mask = readl(aaci->base + AACI_ALLINTS);
319 if (mask) {
320 u32 m = mask;
321 for (i = 0; i < 4; i++, m >>= 7) {
322 if (m & 0x7f) {
323 aaci_fifo_irq(aaci, i, m);
327 spin_unlock(&aaci->lock);
329 return mask ? IRQ_HANDLED : IRQ_NONE;
335 * ALSA support.
338 struct aaci_stream {
339 unsigned char codec_idx;
340 unsigned char rate_idx;
343 static struct aaci_stream aaci_streams[] = {
344 [ACSTREAM_FRONT] = {
345 .codec_idx = 0,
346 .rate_idx = AC97_RATES_FRONT_DAC,
348 [ACSTREAM_SURROUND] = {
349 .codec_idx = 0,
350 .rate_idx = AC97_RATES_SURR_DAC,
352 [ACSTREAM_LFE] = {
353 .codec_idx = 0,
354 .rate_idx = AC97_RATES_LFE_DAC,
358 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
360 struct aaci_stream *s = aaci_streams + streamid;
361 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
364 static unsigned int rate_list[] = {
365 5512, 8000, 11025, 16000, 22050, 32000, 44100,
366 48000, 64000, 88200, 96000, 176400, 192000
370 * Double-rate rule: we can support double rate iff channels == 2
371 * (unimplemented)
373 static int
374 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
376 struct aaci *aaci = rule->private;
377 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
378 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
380 switch (c->max) {
381 case 6:
382 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
383 case 4:
384 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
385 case 2:
386 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
389 return snd_interval_list(hw_param_interval(p, rule->var),
390 ARRAY_SIZE(rate_list), rate_list,
391 rate_mask);
394 static struct snd_pcm_hardware aaci_hw_info = {
395 .info = SNDRV_PCM_INFO_MMAP |
396 SNDRV_PCM_INFO_MMAP_VALID |
397 SNDRV_PCM_INFO_INTERLEAVED |
398 SNDRV_PCM_INFO_BLOCK_TRANSFER |
399 SNDRV_PCM_INFO_RESUME,
402 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
403 * words. It also doesn't support 12-bit at all.
405 .formats = SNDRV_PCM_FMTBIT_S16_LE,
407 /* should this be continuous or knot? */
408 .rates = SNDRV_PCM_RATE_CONTINUOUS,
409 .rate_max = 48000,
410 .rate_min = 4000,
411 .channels_min = 2,
412 .channels_max = 6,
413 .buffer_bytes_max = 64 * 1024,
414 .period_bytes_min = 256,
415 .period_bytes_max = PAGE_SIZE,
416 .periods_min = 4,
417 .periods_max = PAGE_SIZE / 16,
420 static int __aaci_pcm_open(struct aaci *aaci,
421 struct snd_pcm_substream *substream,
422 struct aaci_runtime *aacirun)
424 struct snd_pcm_runtime *runtime = substream->runtime;
425 int ret;
427 aacirun->substream = substream;
428 runtime->private_data = aacirun;
429 runtime->hw = aaci_hw_info;
432 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
433 * mode, each 32-bit word contains one sample. If we're in
434 * compact mode, each 32-bit word contains two samples, effectively
435 * halving the FIFO size. However, we don't know for sure which
436 * we'll be using at this point. We set this to the lower limit.
438 runtime->hw.fifo_size = aaci->fifosize * 2;
441 * Add rule describing hardware rate dependency
442 * on the number of channels.
444 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
445 aaci_rule_rate_by_channels, aaci,
446 SNDRV_PCM_HW_PARAM_CHANNELS,
447 SNDRV_PCM_HW_PARAM_RATE, -1);
448 if (ret)
449 goto out;
451 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
452 DRIVER_NAME, aaci);
453 if (ret)
454 goto out;
456 return 0;
458 out:
459 return ret;
464 * Common ALSA stuff
466 static int aaci_pcm_close(struct snd_pcm_substream *substream)
468 struct aaci *aaci = substream->private_data;
469 struct aaci_runtime *aacirun = substream->runtime->private_data;
471 WARN_ON(aacirun->cr & CR_EN);
473 aacirun->substream = NULL;
474 free_irq(aaci->dev->irq[0], aaci);
476 return 0;
479 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
481 struct aaci_runtime *aacirun = substream->runtime->private_data;
484 * This must not be called with the device enabled.
486 WARN_ON(aacirun->cr & CR_EN);
488 if (aacirun->pcm_open)
489 snd_ac97_pcm_close(aacirun->pcm);
490 aacirun->pcm_open = 0;
493 * Clear out the DMA and any allocated buffers.
495 devdma_hw_free(NULL, substream);
497 return 0;
500 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
501 struct aaci_runtime *aacirun,
502 struct snd_pcm_hw_params *params)
504 int err;
506 aaci_pcm_hw_free(substream);
507 if (aacirun->pcm_open) {
508 snd_ac97_pcm_close(aacirun->pcm);
509 aacirun->pcm_open = 0;
512 err = devdma_hw_alloc(NULL, substream,
513 params_buffer_bytes(params));
514 if (err < 0)
515 goto out;
517 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
518 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
519 params_channels(params),
520 aacirun->pcm->r[0].slots);
521 else
522 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
523 params_channels(params),
524 aacirun->pcm->r[0].slots);
526 if (err)
527 goto out;
529 aacirun->pcm_open = 1;
531 out:
532 return err;
535 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
537 struct snd_pcm_runtime *runtime = substream->runtime;
538 struct aaci_runtime *aacirun = runtime->private_data;
540 aacirun->start = (void *)runtime->dma_area;
541 aacirun->end = aacirun->start + runtime->dma_bytes;
542 aacirun->ptr = aacirun->start;
543 aacirun->period =
544 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
546 return 0;
549 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
551 struct snd_pcm_runtime *runtime = substream->runtime;
552 struct aaci_runtime *aacirun = runtime->private_data;
553 ssize_t bytes = aacirun->ptr - aacirun->start;
555 return bytes_to_frames(runtime, bytes);
558 static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma)
560 return devdma_mmap(NULL, substream, vma);
565 * Playback specific ALSA stuff
567 static const u32 channels_to_txmask[] = {
568 [2] = CR_SL3 | CR_SL4,
569 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
570 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
574 * We can support two and four channel audio. Unfortunately
575 * six channel audio requires a non-standard channel ordering:
576 * 2 -> FL(3), FR(4)
577 * 4 -> FL(3), FR(4), SL(7), SR(8)
578 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
579 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
580 * This requires an ALSA configuration file to correct.
582 static unsigned int channel_list[] = { 2, 4, 6 };
584 static int
585 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
587 struct aaci *aaci = rule->private;
588 unsigned int chan_mask = 1 << 0, slots;
591 * pcms[0] is the our 5.1 PCM instance.
593 slots = aaci->ac97_bus->pcms[0].r[0].slots;
594 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
595 chan_mask |= 1 << 1;
596 if (slots & (1 << AC97_SLOT_LFE))
597 chan_mask |= 1 << 2;
600 return snd_interval_list(hw_param_interval(p, rule->var),
601 ARRAY_SIZE(channel_list), channel_list,
602 chan_mask);
605 static int aaci_pcm_open(struct snd_pcm_substream *substream)
607 struct aaci *aaci = substream->private_data;
608 int ret;
611 * Add rule describing channel dependency.
613 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
614 SNDRV_PCM_HW_PARAM_CHANNELS,
615 aaci_rule_channels, aaci,
616 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
617 if (ret)
618 return ret;
620 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
621 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
622 } else {
623 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
625 return ret;
628 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
629 struct snd_pcm_hw_params *params)
631 struct aaci *aaci = substream->private_data;
632 struct aaci_runtime *aacirun = substream->runtime->private_data;
633 unsigned int channels = params_channels(params);
634 int ret;
636 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
637 !channels_to_txmask[channels]);
639 ret = aaci_pcm_hw_params(substream, aacirun, params);
642 * Enable FIFO, compact mode, 16 bits per sample.
643 * FIXME: double rate slots?
645 if (ret >= 0) {
646 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
647 aacirun->cr |= channels_to_txmask[channels];
649 aacirun->fifosz = aaci->fifosize * 4;
650 if (aacirun->cr & CR_COMPACT)
651 aacirun->fifosz >>= 1;
653 return ret;
656 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
658 u32 ie;
660 ie = readl(aacirun->base + AACI_IE);
661 ie &= ~(IE_URIE|IE_TXIE);
662 writel(ie, aacirun->base + AACI_IE);
663 aacirun->cr &= ~CR_EN;
664 aaci_chan_wait_ready(aacirun);
665 writel(aacirun->cr, aacirun->base + AACI_TXCR);
668 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
670 u32 ie;
672 aaci_chan_wait_ready(aacirun);
673 aacirun->cr |= CR_EN;
675 ie = readl(aacirun->base + AACI_IE);
676 ie |= IE_URIE | IE_TXIE;
677 writel(ie, aacirun->base + AACI_IE);
678 writel(aacirun->cr, aacirun->base + AACI_TXCR);
681 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
683 struct aaci *aaci = substream->private_data;
684 struct aaci_runtime *aacirun = substream->runtime->private_data;
685 unsigned long flags;
686 int ret = 0;
688 spin_lock_irqsave(&aaci->lock, flags);
689 switch (cmd) {
690 case SNDRV_PCM_TRIGGER_START:
691 aaci_pcm_playback_start(aacirun);
692 break;
694 case SNDRV_PCM_TRIGGER_RESUME:
695 aaci_pcm_playback_start(aacirun);
696 break;
698 case SNDRV_PCM_TRIGGER_STOP:
699 aaci_pcm_playback_stop(aacirun);
700 break;
702 case SNDRV_PCM_TRIGGER_SUSPEND:
703 aaci_pcm_playback_stop(aacirun);
704 break;
706 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
707 break;
709 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
710 break;
712 default:
713 ret = -EINVAL;
715 spin_unlock_irqrestore(&aaci->lock, flags);
717 return ret;
720 static struct snd_pcm_ops aaci_playback_ops = {
721 .open = aaci_pcm_open,
722 .close = aaci_pcm_close,
723 .ioctl = snd_pcm_lib_ioctl,
724 .hw_params = aaci_pcm_playback_hw_params,
725 .hw_free = aaci_pcm_hw_free,
726 .prepare = aaci_pcm_prepare,
727 .trigger = aaci_pcm_playback_trigger,
728 .pointer = aaci_pcm_pointer,
729 .mmap = aaci_pcm_mmap,
732 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
733 struct snd_pcm_hw_params *params)
735 struct aaci *aaci = substream->private_data;
736 struct aaci_runtime *aacirun = substream->runtime->private_data;
737 int ret;
739 ret = aaci_pcm_hw_params(substream, aacirun, params);
741 if (ret >= 0) {
742 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
744 /* Line in record: slot 3 and 4 */
745 aacirun->cr |= CR_SL3 | CR_SL4;
747 aacirun->fifosz = aaci->fifosize * 4;
749 if (aacirun->cr & CR_COMPACT)
750 aacirun->fifosz >>= 1;
752 return ret;
755 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
757 u32 ie;
759 aaci_chan_wait_ready(aacirun);
761 ie = readl(aacirun->base + AACI_IE);
762 ie &= ~(IE_ORIE | IE_RXIE);
763 writel(ie, aacirun->base+AACI_IE);
765 aacirun->cr &= ~CR_EN;
767 writel(aacirun->cr, aacirun->base + AACI_RXCR);
770 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
772 u32 ie;
774 aaci_chan_wait_ready(aacirun);
776 #ifdef DEBUG
777 /* RX Timeout value: bits 28:17 in RXCR */
778 aacirun->cr |= 0xf << 17;
779 #endif
781 aacirun->cr |= CR_EN;
782 writel(aacirun->cr, aacirun->base + AACI_RXCR);
784 ie = readl(aacirun->base + AACI_IE);
785 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
786 writel(ie, aacirun->base + AACI_IE);
789 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
791 struct aaci *aaci = substream->private_data;
792 struct aaci_runtime *aacirun = substream->runtime->private_data;
793 unsigned long flags;
794 int ret = 0;
796 spin_lock_irqsave(&aaci->lock, flags);
798 switch (cmd) {
799 case SNDRV_PCM_TRIGGER_START:
800 aaci_pcm_capture_start(aacirun);
801 break;
803 case SNDRV_PCM_TRIGGER_RESUME:
804 aaci_pcm_capture_start(aacirun);
805 break;
807 case SNDRV_PCM_TRIGGER_STOP:
808 aaci_pcm_capture_stop(aacirun);
809 break;
811 case SNDRV_PCM_TRIGGER_SUSPEND:
812 aaci_pcm_capture_stop(aacirun);
813 break;
815 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
816 break;
818 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
819 break;
821 default:
822 ret = -EINVAL;
825 spin_unlock_irqrestore(&aaci->lock, flags);
827 return ret;
830 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
832 struct snd_pcm_runtime *runtime = substream->runtime;
833 struct aaci *aaci = substream->private_data;
835 aaci_pcm_prepare(substream);
837 /* allow changing of sample rate */
838 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
839 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
840 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
842 /* Record select: Mic: 0, Aux: 3, Line: 4 */
843 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
845 return 0;
848 static struct snd_pcm_ops aaci_capture_ops = {
849 .open = aaci_pcm_open,
850 .close = aaci_pcm_close,
851 .ioctl = snd_pcm_lib_ioctl,
852 .hw_params = aaci_pcm_capture_hw_params,
853 .hw_free = aaci_pcm_hw_free,
854 .prepare = aaci_pcm_capture_prepare,
855 .trigger = aaci_pcm_capture_trigger,
856 .pointer = aaci_pcm_pointer,
857 .mmap = aaci_pcm_mmap,
861 * Power Management.
863 #ifdef CONFIG_PM
864 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
866 struct aaci *aaci = card->private_data;
867 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
868 snd_pcm_suspend_all(aaci->pcm);
869 return 0;
872 static int aaci_do_resume(struct snd_card *card, unsigned int state)
874 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
875 return 0;
878 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
880 struct snd_card *card = amba_get_drvdata(dev);
881 return card ? aaci_do_suspend(card) : 0;
884 static int aaci_resume(struct amba_device *dev)
886 struct snd_card *card = amba_get_drvdata(dev);
887 return card ? aaci_do_resume(card) : 0;
889 #else
890 #define aaci_do_suspend NULL
891 #define aaci_do_resume NULL
892 #define aaci_suspend NULL
893 #define aaci_resume NULL
894 #endif
897 static struct ac97_pcm ac97_defs[] __devinitdata = {
898 [0] = { /* Front PCM */
899 .exclusive = 1,
900 .r = {
901 [0] = {
902 .slots = (1 << AC97_SLOT_PCM_LEFT) |
903 (1 << AC97_SLOT_PCM_RIGHT) |
904 (1 << AC97_SLOT_PCM_CENTER) |
905 (1 << AC97_SLOT_PCM_SLEFT) |
906 (1 << AC97_SLOT_PCM_SRIGHT) |
907 (1 << AC97_SLOT_LFE),
911 [1] = { /* PCM in */
912 .stream = 1,
913 .exclusive = 1,
914 .r = {
915 [0] = {
916 .slots = (1 << AC97_SLOT_PCM_LEFT) |
917 (1 << AC97_SLOT_PCM_RIGHT),
921 [2] = { /* Mic in */
922 .stream = 1,
923 .exclusive = 1,
924 .r = {
925 [0] = {
926 .slots = (1 << AC97_SLOT_MIC),
932 static struct snd_ac97_bus_ops aaci_bus_ops = {
933 .write = aaci_ac97_write,
934 .read = aaci_ac97_read,
937 static int __devinit aaci_probe_ac97(struct aaci *aaci)
939 struct snd_ac97_template ac97_template;
940 struct snd_ac97_bus *ac97_bus;
941 struct snd_ac97 *ac97;
942 int ret;
945 * Assert AACIRESET for 2us
947 writel(0, aaci->base + AACI_RESET);
948 udelay(2);
949 writel(RESET_NRST, aaci->base + AACI_RESET);
952 * Give the AC'97 codec more than enough time
953 * to wake up. (42us = ~2 frames at 48kHz.)
955 udelay(42);
957 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
958 if (ret)
959 goto out;
961 ac97_bus->clock = 48000;
962 aaci->ac97_bus = ac97_bus;
964 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
965 ac97_template.private_data = aaci;
966 ac97_template.num = 0;
967 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
969 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
970 if (ret)
971 goto out;
972 aaci->ac97 = ac97;
975 * Disable AC97 PC Beep input on audio codecs.
977 if (ac97_is_audio(ac97))
978 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
980 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
981 if (ret)
982 goto out;
984 aaci->playback.pcm = &ac97_bus->pcms[0];
985 aaci->capture.pcm = &ac97_bus->pcms[1];
987 out:
988 return ret;
991 static void aaci_free_card(struct snd_card *card)
993 struct aaci *aaci = card->private_data;
994 if (aaci->base)
995 iounmap(aaci->base);
998 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
1000 struct aaci *aaci;
1001 struct snd_card *card;
1002 int err;
1004 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
1005 THIS_MODULE, sizeof(struct aaci), &card);
1006 if (err < 0)
1007 return NULL;
1009 card->private_free = aaci_free_card;
1011 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
1012 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
1013 snprintf(card->longname, sizeof(card->longname),
1014 "%s at 0x%016llx, irq %d",
1015 card->shortname, (unsigned long long)dev->res.start,
1016 dev->irq[0]);
1018 aaci = card->private_data;
1019 mutex_init(&aaci->ac97_sem);
1020 spin_lock_init(&aaci->lock);
1021 aaci->card = card;
1022 aaci->dev = dev;
1024 /* Set MAINCR to allow slot 1 and 2 data IO */
1025 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
1026 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
1028 return aaci;
1031 static int __devinit aaci_init_pcm(struct aaci *aaci)
1033 struct snd_pcm *pcm;
1034 int ret;
1036 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
1037 if (ret == 0) {
1038 aaci->pcm = pcm;
1039 pcm->private_data = aaci;
1040 pcm->info_flags = 0;
1042 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
1044 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
1045 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
1048 return ret;
1051 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
1053 struct aaci_runtime *aacirun = &aaci->playback;
1054 int i;
1056 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
1058 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
1059 writel(0, aacirun->fifo);
1061 writel(0, aacirun->base + AACI_TXCR);
1064 * Re-initialise the AACI after the FIFO depth test, to
1065 * ensure that the FIFOs are empty. Unfortunately, merely
1066 * disabling the channel doesn't clear the FIFO.
1068 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
1069 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1072 * If we hit 4096, we failed. Go back to the specified
1073 * fifo depth.
1075 if (i == 4096)
1076 i = 8;
1078 return i;
1081 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1083 struct aaci *aaci;
1084 int ret, i;
1086 ret = amba_request_regions(dev, NULL);
1087 if (ret)
1088 return ret;
1090 aaci = aaci_init_card(dev);
1091 if (!aaci) {
1092 ret = -ENOMEM;
1093 goto out;
1096 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1097 if (!aaci->base) {
1098 ret = -ENOMEM;
1099 goto out;
1103 * Playback uses AACI channel 0
1105 aaci->playback.base = aaci->base + AACI_CSCH1;
1106 aaci->playback.fifo = aaci->base + AACI_DR1;
1109 * Capture uses AACI channel 0
1111 aaci->capture.base = aaci->base + AACI_CSCH1;
1112 aaci->capture.fifo = aaci->base + AACI_DR1;
1114 for (i = 0; i < 4; i++) {
1115 void __iomem *base = aaci->base + i * 0x14;
1117 writel(0, base + AACI_IE);
1118 writel(0, base + AACI_TXCR);
1119 writel(0, base + AACI_RXCR);
1122 writel(0x1fff, aaci->base + AACI_INTCLR);
1123 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1125 ret = aaci_probe_ac97(aaci);
1126 if (ret)
1127 goto out;
1130 * Size the FIFOs (must be multiple of 16).
1132 aaci->fifosize = aaci_size_fifo(aaci);
1133 if (aaci->fifosize & 15) {
1134 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1135 aaci->fifosize);
1136 ret = -ENODEV;
1137 goto out;
1140 ret = aaci_init_pcm(aaci);
1141 if (ret)
1142 goto out;
1144 snd_card_set_dev(aaci->card, &dev->dev);
1146 ret = snd_card_register(aaci->card);
1147 if (ret == 0) {
1148 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1149 aaci->fifosize);
1150 amba_set_drvdata(dev, aaci->card);
1151 return ret;
1154 out:
1155 if (aaci)
1156 snd_card_free(aaci->card);
1157 amba_release_regions(dev);
1158 return ret;
1161 static int __devexit aaci_remove(struct amba_device *dev)
1163 struct snd_card *card = amba_get_drvdata(dev);
1165 amba_set_drvdata(dev, NULL);
1167 if (card) {
1168 struct aaci *aaci = card->private_data;
1169 writel(0, aaci->base + AACI_MAINCR);
1171 snd_card_free(card);
1172 amba_release_regions(dev);
1175 return 0;
1178 static struct amba_id aaci_ids[] = {
1180 .id = 0x00041041,
1181 .mask = 0x000fffff,
1183 { 0, 0 },
1186 static struct amba_driver aaci_driver = {
1187 .drv = {
1188 .name = DRIVER_NAME,
1190 .probe = aaci_probe,
1191 .remove = __devexit_p(aaci_remove),
1192 .suspend = aaci_suspend,
1193 .resume = aaci_resume,
1194 .id_table = aaci_ids,
1197 static int __init aaci_init(void)
1199 return amba_driver_register(&aaci_driver);
1202 static void __exit aaci_exit(void)
1204 amba_driver_unregister(&aaci_driver);
1207 module_init(aaci_init);
1208 module_exit(aaci_exit);
1210 MODULE_LICENSE("GPL");
1211 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");