2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
39 #define DRIVER_VERSION "14-Jun-2006"
40 static const char driver_name
[] = "asix";
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_IPG2 0x14
59 #define AX_CMD_WRITE_MULTI_FILTER 0x16
60 #define AX88172_CMD_READ_NODE_ID 0x17
61 #define AX_CMD_READ_PHY_ID 0x19
62 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
63 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
64 #define AX_CMD_READ_MONITOR_MODE 0x1c
65 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
66 #define AX_CMD_READ_GPIOS 0x1e
67 #define AX_CMD_WRITE_GPIOS 0x1f
68 #define AX_CMD_SW_RESET 0x20
69 #define AX_CMD_SW_PHY_STATUS 0x21
70 #define AX_CMD_SW_PHY_SELECT 0x22
72 #define AX_MONITOR_MODE 0x01
73 #define AX_MONITOR_LINK 0x02
74 #define AX_MONITOR_MAGIC 0x04
75 #define AX_MONITOR_HSFS 0x10
77 /* AX88172 Medium Status Register values */
78 #define AX88172_MEDIUM_FD 0x02
79 #define AX88172_MEDIUM_TX 0x04
80 #define AX88172_MEDIUM_FC 0x10
81 #define AX88172_MEDIUM_DEFAULT \
82 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
84 #define AX_MCAST_FILTER_SIZE 8
85 #define AX_MAX_MCAST 64
87 #define AX_SWRESET_CLEAR 0x00
88 #define AX_SWRESET_RR 0x01
89 #define AX_SWRESET_RT 0x02
90 #define AX_SWRESET_PRTE 0x04
91 #define AX_SWRESET_PRL 0x08
92 #define AX_SWRESET_BZ 0x10
93 #define AX_SWRESET_IPRL 0x20
94 #define AX_SWRESET_IPPD 0x40
96 #define AX88772_IPG0_DEFAULT 0x15
97 #define AX88772_IPG1_DEFAULT 0x0c
98 #define AX88772_IPG2_DEFAULT 0x12
100 /* AX88772 & AX88178 Medium Mode Register */
101 #define AX_MEDIUM_PF 0x0080
102 #define AX_MEDIUM_JFE 0x0040
103 #define AX_MEDIUM_TFC 0x0020
104 #define AX_MEDIUM_RFC 0x0010
105 #define AX_MEDIUM_ENCK 0x0008
106 #define AX_MEDIUM_AC 0x0004
107 #define AX_MEDIUM_FD 0x0002
108 #define AX_MEDIUM_GM 0x0001
109 #define AX_MEDIUM_SM 0x1000
110 #define AX_MEDIUM_SBP 0x0800
111 #define AX_MEDIUM_PS 0x0200
112 #define AX_MEDIUM_RE 0x0100
114 #define AX88178_MEDIUM_DEFAULT \
115 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
116 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
119 #define AX88772_MEDIUM_DEFAULT \
120 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
121 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
122 AX_MEDIUM_AC | AX_MEDIUM_RE )
124 /* AX88772 & AX88178 RX_CTL values */
125 #define AX_RX_CTL_SO 0x0080
126 #define AX_RX_CTL_AP 0x0020
127 #define AX_RX_CTL_AM 0x0010
128 #define AX_RX_CTL_AB 0x0008
129 #define AX_RX_CTL_SEP 0x0004
130 #define AX_RX_CTL_AMALL 0x0002
131 #define AX_RX_CTL_PRO 0x0001
132 #define AX_RX_CTL_MFB_2048 0x0000
133 #define AX_RX_CTL_MFB_4096 0x0100
134 #define AX_RX_CTL_MFB_8192 0x0200
135 #define AX_RX_CTL_MFB_16384 0x0300
137 #define AX_DEFAULT_RX_CTL \
138 (AX_RX_CTL_SO | AX_RX_CTL_AB )
140 /* GPIO 0 .. 2 toggles */
141 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
142 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
143 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
144 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
145 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
146 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
147 #define AX_GPIO_RESERVED 0x40 /* Reserved */
148 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150 #define AX_EEPROM_MAGIC 0xdeadbeef
151 #define AX88172_EEPROM_LEN 0x40
152 #define AX88772_EEPROM_LEN 0xff
154 #define PHY_MODE_MARVELL 0x0000
155 #define MII_MARVELL_LED_CTRL 0x0018
156 #define MII_MARVELL_STATUS 0x001b
157 #define MII_MARVELL_CTRL 0x0014
159 #define MARVELL_LED_MANUAL 0x0019
161 #define MARVELL_STATUS_HWCFG 0x0004
163 #define MARVELL_CTRL_TXDELAY 0x0002
164 #define MARVELL_CTRL_RXDELAY 0x0080
166 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
168 u8 multi_filter
[AX_MCAST_FILTER_SIZE
];
174 struct ax88172_int_data
{
180 } __attribute__ ((packed
));
182 static int asix_read_cmd(struct usbnet
*dev
, u8 cmd
, u16 value
, u16 index
,
183 u16 size
, void *data
)
185 devdbg(dev
,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
186 cmd
, value
, index
, size
);
187 return usb_control_msg(
189 usb_rcvctrlpipe(dev
->udev
, 0),
191 USB_DIR_IN
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
196 USB_CTRL_GET_TIMEOUT
);
199 static int asix_write_cmd(struct usbnet
*dev
, u8 cmd
, u16 value
, u16 index
,
200 u16 size
, void *data
)
202 devdbg(dev
,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
203 cmd
, value
, index
, size
);
204 return usb_control_msg(
206 usb_sndctrlpipe(dev
->udev
, 0),
208 USB_DIR_OUT
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
213 USB_CTRL_SET_TIMEOUT
);
216 static void asix_async_cmd_callback(struct urb
*urb
)
218 struct usb_ctrlrequest
*req
= (struct usb_ctrlrequest
*)urb
->context
;
221 printk(KERN_DEBUG
"asix_async_cmd_callback() failed with %d",
229 asix_write_cmd_async(struct usbnet
*dev
, u8 cmd
, u16 value
, u16 index
,
230 u16 size
, void *data
)
232 struct usb_ctrlrequest
*req
;
236 devdbg(dev
,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
237 cmd
, value
, index
, size
);
238 if ((urb
= usb_alloc_urb(0, GFP_ATOMIC
)) == NULL
) {
239 deverr(dev
, "Error allocating URB in write_cmd_async!");
243 if ((req
= kmalloc(sizeof(struct usb_ctrlrequest
), GFP_ATOMIC
)) == NULL
) {
244 deverr(dev
, "Failed to allocate memory for control request");
249 req
->bRequestType
= USB_DIR_OUT
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
;
251 req
->wValue
= cpu_to_le16(value
);
252 req
->wIndex
= cpu_to_le16(index
);
253 req
->wLength
= cpu_to_le16(size
);
255 usb_fill_control_urb(urb
, dev
->udev
,
256 usb_sndctrlpipe(dev
->udev
, 0),
257 (void *)req
, data
, size
,
258 asix_async_cmd_callback
, req
);
260 if((status
= usb_submit_urb(urb
, GFP_ATOMIC
)) < 0) {
261 deverr(dev
, "Error submitting the control message: status=%d",
268 static int asix_rx_fixup(struct usbnet
*dev
, struct sk_buff
*skb
)
273 struct sk_buff
*ax_skb
;
276 head
= (u8
*) skb
->data
;
277 memcpy(&header
, head
, sizeof(header
));
278 le32_to_cpus(&header
);
279 packet
= head
+ sizeof(header
);
283 while (skb
->len
> 0) {
284 if ((short)(header
& 0x0000ffff) !=
285 ~((short)((header
& 0xffff0000) >> 16))) {
286 deverr(dev
,"asix_rx_fixup() Bad Header Length");
288 /* get the packet length */
289 size
= (u16
) (header
& 0x0000ffff);
291 if ((skb
->len
) - ((size
+ 1) & 0xfffe) == 0)
293 if (size
> ETH_FRAME_LEN
) {
294 deverr(dev
,"asix_rx_fixup() Bad RX Length %d", size
);
297 ax_skb
= skb_clone(skb
, GFP_ATOMIC
);
300 ax_skb
->data
= packet
;
301 ax_skb
->tail
= packet
+ size
;
302 usbnet_skb_return(dev
, ax_skb
);
307 skb_pull(skb
, (size
+ 1) & 0xfffe);
312 head
= (u8
*) skb
->data
;
313 memcpy(&header
, head
, sizeof(header
));
314 le32_to_cpus(&header
);
315 packet
= head
+ sizeof(header
);
320 deverr(dev
,"asix_rx_fixup() Bad SKB Length %d", skb
->len
);
326 static struct sk_buff
*asix_tx_fixup(struct usbnet
*dev
, struct sk_buff
*skb
,
330 int headroom
= skb_headroom(skb
);
331 int tailroom
= skb_tailroom(skb
);
333 u32 padbytes
= 0xffff0000;
335 padlen
= ((skb
->len
+ 4) % 512) ? 0 : 4;
337 if ((!skb_cloned(skb
))
338 && ((headroom
+ tailroom
) >= (4 + padlen
))) {
339 if ((headroom
< 4) || (tailroom
< padlen
)) {
340 skb
->data
= memmove(skb
->head
+ 4, skb
->data
, skb
->len
);
341 skb
->tail
= skb
->data
+ skb
->len
;
344 struct sk_buff
*skb2
;
345 skb2
= skb_copy_expand(skb
, 4, padlen
, flags
);
346 dev_kfree_skb_any(skb
);
353 packet_len
= (((skb
->len
- 4) ^ 0x0000ffff) << 16) + (skb
->len
- 4);
354 memcpy(skb
->data
, &packet_len
, sizeof(packet_len
));
356 if ((skb
->len
% 512) == 0) {
357 memcpy( skb
->tail
, &padbytes
, sizeof(padbytes
));
358 skb_put(skb
, sizeof(padbytes
));
363 static void asix_status(struct usbnet
*dev
, struct urb
*urb
)
365 struct ax88172_int_data
*event
;
368 if (urb
->actual_length
< 8)
371 event
= urb
->transfer_buffer
;
372 link
= event
->link
& 0x01;
373 if (netif_carrier_ok(dev
->net
) != link
) {
375 netif_carrier_on(dev
->net
);
376 usbnet_defer_kevent (dev
, EVENT_LINK_RESET
);
378 netif_carrier_off(dev
->net
);
379 devdbg(dev
, "Link Status is: %d", link
);
383 static inline int asix_set_sw_mii(struct usbnet
*dev
)
386 ret
= asix_write_cmd(dev
, AX_CMD_SET_SW_MII
, 0x0000, 0, 0, NULL
);
388 deverr(dev
, "Failed to enable software MII access");
392 static inline int asix_set_hw_mii(struct usbnet
*dev
)
395 ret
= asix_write_cmd(dev
, AX_CMD_SET_HW_MII
, 0x0000, 0, 0, NULL
);
397 deverr(dev
, "Failed to enable hardware MII access");
401 static inline int asix_get_phy_addr(struct usbnet
*dev
)
406 devdbg(dev
, "asix_get_phy_addr()");
408 buf
= kmalloc(2, GFP_KERNEL
);
412 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_PHY_ID
,
413 0, 0, 2, buf
)) < 2) {
414 deverr(dev
, "Error reading PHYID register: %02x", ret
);
417 devdbg(dev
, "asix_get_phy_addr() returning 0x%04x", *((u16
*)buf
));
418 ret
= *((u8
*)buf
+ 1);
425 static int asix_sw_reset(struct usbnet
*dev
, u8 flags
)
429 ret
= asix_write_cmd(dev
, AX_CMD_SW_RESET
, flags
, 0, 0, NULL
);
431 deverr(dev
,"Failed to send software reset: %02x", ret
);
436 static u16
asix_read_rx_ctl(struct usbnet
*dev
)
441 buf
= kmalloc(2, GFP_KERNEL
);
445 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_RX_CTL
,
446 0, 0, 2, buf
)) < 2) {
447 deverr(dev
, "Error reading RX_CTL register: %02x", ret
);
450 ret
= le16_to_cpu(*((u16
*)buf
));
457 static int asix_write_rx_ctl(struct usbnet
*dev
, u16 mode
)
461 devdbg(dev
,"asix_write_rx_ctl() - mode = 0x%04x", mode
);
462 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_RX_CTL
, mode
, 0, 0, NULL
);
464 deverr(dev
, "Failed to write RX_CTL mode to 0x%04x: %02x",
470 static u16
asix_read_medium_status(struct usbnet
*dev
)
475 buf
= kmalloc(2, GFP_KERNEL
);
479 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_MEDIUM_STATUS
,
480 0, 0, 2, buf
)) < 2) {
481 deverr(dev
, "Error reading Medium Status register: %02x", ret
);
484 ret
= le16_to_cpu(*((u16
*)buf
));
491 static int asix_write_medium_mode(struct usbnet
*dev
, u16 mode
)
495 devdbg(dev
,"asix_write_medium_mode() - mode = 0x%04x", mode
);
496 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_MEDIUM_MODE
, mode
, 0, 0, NULL
);
498 deverr(dev
, "Failed to write Medium Mode mode to 0x%04x: %02x",
504 static int asix_write_gpio(struct usbnet
*dev
, u16 value
, int sleep
)
508 devdbg(dev
,"asix_write_gpio() - value = 0x%04x", value
);
509 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_GPIOS
, value
, 0, 0, NULL
);
511 deverr(dev
, "Failed to write GPIO value 0x%04x: %02x",
521 * AX88772 & AX88178 have a 16-bit RX_CTL value
523 static void asix_set_multicast(struct net_device
*net
)
525 struct usbnet
*dev
= netdev_priv(net
);
526 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
527 u16 rx_ctl
= AX_DEFAULT_RX_CTL
;
529 if (net
->flags
& IFF_PROMISC
) {
530 rx_ctl
|= AX_RX_CTL_PRO
;
531 } else if (net
->flags
& IFF_ALLMULTI
532 || net
->mc_count
> AX_MAX_MCAST
) {
533 rx_ctl
|= AX_RX_CTL_AMALL
;
534 } else if (net
->mc_count
== 0) {
535 /* just broadcast and directed */
537 /* We use the 20 byte dev->data
538 * for our 8 byte filter buffer
539 * to avoid allocating memory that
540 * is tricky to free later */
541 struct dev_mc_list
*mc_list
= net
->mc_list
;
545 memset(data
->multi_filter
, 0, AX_MCAST_FILTER_SIZE
);
547 /* Build the multicast hash filter. */
548 for (i
= 0; i
< net
->mc_count
; i
++) {
551 mc_list
->dmi_addr
) >> 26;
552 data
->multi_filter
[crc_bits
>> 3] |=
554 mc_list
= mc_list
->next
;
557 asix_write_cmd_async(dev
, AX_CMD_WRITE_MULTI_FILTER
, 0, 0,
558 AX_MCAST_FILTER_SIZE
, data
->multi_filter
);
560 rx_ctl
|= AX_RX_CTL_AM
;
563 asix_write_cmd_async(dev
, AX_CMD_WRITE_RX_CTL
, rx_ctl
, 0, 0, NULL
);
566 static int asix_mdio_read(struct net_device
*netdev
, int phy_id
, int loc
)
568 struct usbnet
*dev
= netdev_priv(netdev
);
571 mutex_lock(&dev
->phy_mutex
);
572 asix_set_sw_mii(dev
);
573 asix_read_cmd(dev
, AX_CMD_READ_MII_REG
, phy_id
,
574 (__u16
)loc
, 2, (u16
*)&res
);
575 asix_set_hw_mii(dev
);
576 mutex_unlock(&dev
->phy_mutex
);
578 devdbg(dev
, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id
, loc
, le16_to_cpu(res
& 0xffff));
580 return le16_to_cpu(res
& 0xffff);
584 asix_mdio_write(struct net_device
*netdev
, int phy_id
, int loc
, int val
)
586 struct usbnet
*dev
= netdev_priv(netdev
);
587 u16 res
= cpu_to_le16(val
);
589 devdbg(dev
, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id
, loc
, val
);
590 mutex_lock(&dev
->phy_mutex
);
591 asix_set_sw_mii(dev
);
592 asix_write_cmd(dev
, AX_CMD_WRITE_MII_REG
, phy_id
,
593 (__u16
)loc
, 2, (u16
*)&res
);
594 asix_set_hw_mii(dev
);
595 mutex_unlock(&dev
->phy_mutex
);
598 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
599 static u32
asix_get_phyid(struct usbnet
*dev
)
604 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID1
);
608 phy_id
= (phy_reg
& 0xffff) << 16;
610 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID2
);
614 phy_id
|= (phy_reg
& 0xffff);
620 asix_get_wol(struct net_device
*net
, struct ethtool_wolinfo
*wolinfo
)
622 struct usbnet
*dev
= netdev_priv(net
);
625 if (asix_read_cmd(dev
, AX_CMD_READ_MONITOR_MODE
, 0, 0, 1, &opt
) < 0) {
626 wolinfo
->supported
= 0;
627 wolinfo
->wolopts
= 0;
630 wolinfo
->supported
= WAKE_PHY
| WAKE_MAGIC
;
631 wolinfo
->wolopts
= 0;
632 if (opt
& AX_MONITOR_MODE
) {
633 if (opt
& AX_MONITOR_LINK
)
634 wolinfo
->wolopts
|= WAKE_PHY
;
635 if (opt
& AX_MONITOR_MAGIC
)
636 wolinfo
->wolopts
|= WAKE_MAGIC
;
641 asix_set_wol(struct net_device
*net
, struct ethtool_wolinfo
*wolinfo
)
643 struct usbnet
*dev
= netdev_priv(net
);
647 if (wolinfo
->wolopts
& WAKE_PHY
)
648 opt
|= AX_MONITOR_LINK
;
649 if (wolinfo
->wolopts
& WAKE_MAGIC
)
650 opt
|= AX_MONITOR_MAGIC
;
652 opt
|= AX_MONITOR_MODE
;
654 if (asix_write_cmd(dev
, AX_CMD_WRITE_MONITOR_MODE
,
655 opt
, 0, 0, &buf
) < 0)
661 static int asix_get_eeprom_len(struct net_device
*net
)
663 struct usbnet
*dev
= netdev_priv(net
);
664 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
666 return data
->eeprom_len
;
669 static int asix_get_eeprom(struct net_device
*net
,
670 struct ethtool_eeprom
*eeprom
, u8
*data
)
672 struct usbnet
*dev
= netdev_priv(net
);
673 u16
*ebuf
= (u16
*)data
;
676 /* Crude hack to ensure that we don't overwrite memory
677 * if an odd length is supplied
682 eeprom
->magic
= AX_EEPROM_MAGIC
;
684 /* ax8817x returns 2 bytes from eeprom on read */
685 for (i
=0; i
< eeprom
->len
/ 2; i
++) {
686 if (asix_read_cmd(dev
, AX_CMD_READ_EEPROM
,
687 eeprom
->offset
+ i
, 0, 2, &ebuf
[i
]) < 0)
693 static void asix_get_drvinfo (struct net_device
*net
,
694 struct ethtool_drvinfo
*info
)
696 struct usbnet
*dev
= netdev_priv(net
);
697 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
699 /* Inherit standard device info */
700 usbnet_get_drvinfo(net
, info
);
701 strncpy (info
->driver
, driver_name
, sizeof info
->driver
);
702 strncpy (info
->version
, DRIVER_VERSION
, sizeof info
->version
);
703 info
->eedump_len
= data
->eeprom_len
;
706 static u32
asix_get_link(struct net_device
*net
)
708 struct usbnet
*dev
= netdev_priv(net
);
710 return mii_link_ok(&dev
->mii
);
713 static int asix_ioctl (struct net_device
*net
, struct ifreq
*rq
, int cmd
)
715 struct usbnet
*dev
= netdev_priv(net
);
717 return generic_mii_ioctl(&dev
->mii
, if_mii(rq
), cmd
, NULL
);
720 /* We need to override some ethtool_ops so we require our
721 own structure so we don't interfere with other usbnet
722 devices that may be connected at the same time. */
723 static struct ethtool_ops ax88172_ethtool_ops
= {
724 .get_drvinfo
= asix_get_drvinfo
,
725 .get_link
= asix_get_link
,
726 .get_msglevel
= usbnet_get_msglevel
,
727 .set_msglevel
= usbnet_set_msglevel
,
728 .get_wol
= asix_get_wol
,
729 .set_wol
= asix_set_wol
,
730 .get_eeprom_len
= asix_get_eeprom_len
,
731 .get_eeprom
= asix_get_eeprom
,
732 .get_settings
= usbnet_get_settings
,
733 .set_settings
= usbnet_set_settings
,
734 .nway_reset
= usbnet_nway_reset
,
737 static void ax88172_set_multicast(struct net_device
*net
)
739 struct usbnet
*dev
= netdev_priv(net
);
740 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
743 if (net
->flags
& IFF_PROMISC
) {
745 } else if (net
->flags
& IFF_ALLMULTI
746 || net
->mc_count
> AX_MAX_MCAST
) {
748 } else if (net
->mc_count
== 0) {
749 /* just broadcast and directed */
751 /* We use the 20 byte dev->data
752 * for our 8 byte filter buffer
753 * to avoid allocating memory that
754 * is tricky to free later */
755 struct dev_mc_list
*mc_list
= net
->mc_list
;
759 memset(data
->multi_filter
, 0, AX_MCAST_FILTER_SIZE
);
761 /* Build the multicast hash filter. */
762 for (i
= 0; i
< net
->mc_count
; i
++) {
765 mc_list
->dmi_addr
) >> 26;
766 data
->multi_filter
[crc_bits
>> 3] |=
768 mc_list
= mc_list
->next
;
771 asix_write_cmd_async(dev
, AX_CMD_WRITE_MULTI_FILTER
, 0, 0,
772 AX_MCAST_FILTER_SIZE
, data
->multi_filter
);
777 asix_write_cmd_async(dev
, AX_CMD_WRITE_RX_CTL
, rx_ctl
, 0, 0, NULL
);
780 static int ax88172_link_reset(struct usbnet
*dev
)
783 struct ethtool_cmd ecmd
;
785 mii_check_media(&dev
->mii
, 1, 1);
786 mii_ethtool_gset(&dev
->mii
, &ecmd
);
787 mode
= AX88172_MEDIUM_DEFAULT
;
789 if (ecmd
.duplex
!= DUPLEX_FULL
)
790 mode
|= ~AX88172_MEDIUM_FD
;
792 devdbg(dev
, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd
.speed
, ecmd
.duplex
, mode
);
794 asix_write_medium_mode(dev
, mode
);
799 static int ax88172_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
804 unsigned long gpio_bits
= dev
->driver_info
->data
;
805 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
807 data
->eeprom_len
= AX88172_EEPROM_LEN
;
809 usbnet_get_endpoints(dev
,intf
);
811 buf
= kmalloc(ETH_ALEN
, GFP_KERNEL
);
817 /* Toggle the GPIOs in a manufacturer/model specific way */
818 for (i
= 2; i
>= 0; i
--) {
819 if ((ret
= asix_write_cmd(dev
, AX_CMD_WRITE_GPIOS
,
820 (gpio_bits
>> (i
* 8)) & 0xff, 0, 0,
826 if ((ret
= asix_write_rx_ctl(dev
, 0x80)) < 0)
829 /* Get the MAC address */
830 memset(buf
, 0, ETH_ALEN
);
831 if ((ret
= asix_read_cmd(dev
, AX88172_CMD_READ_NODE_ID
,
832 0, 0, 6, buf
)) < 0) {
833 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret
);
836 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
838 /* Initialize MII structure */
839 dev
->mii
.dev
= dev
->net
;
840 dev
->mii
.mdio_read
= asix_mdio_read
;
841 dev
->mii
.mdio_write
= asix_mdio_write
;
842 dev
->mii
.phy_id_mask
= 0x3f;
843 dev
->mii
.reg_num_mask
= 0x1f;
844 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
845 dev
->net
->do_ioctl
= asix_ioctl
;
847 dev
->net
->set_multicast_list
= ax88172_set_multicast
;
848 dev
->net
->ethtool_ops
= &ax88172_ethtool_ops
;
850 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
851 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
852 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
853 mii_nway_restart(&dev
->mii
);
862 static struct ethtool_ops ax88772_ethtool_ops
= {
863 .get_drvinfo
= asix_get_drvinfo
,
864 .get_link
= asix_get_link
,
865 .get_msglevel
= usbnet_get_msglevel
,
866 .set_msglevel
= usbnet_set_msglevel
,
867 .get_wol
= asix_get_wol
,
868 .set_wol
= asix_set_wol
,
869 .get_eeprom_len
= asix_get_eeprom_len
,
870 .get_eeprom
= asix_get_eeprom
,
871 .get_settings
= usbnet_get_settings
,
872 .set_settings
= usbnet_set_settings
,
873 .nway_reset
= usbnet_nway_reset
,
876 static int ax88772_link_reset(struct usbnet
*dev
)
879 struct ethtool_cmd ecmd
;
881 mii_check_media(&dev
->mii
, 1, 1);
882 mii_ethtool_gset(&dev
->mii
, &ecmd
);
883 mode
= AX88772_MEDIUM_DEFAULT
;
885 if (ecmd
.speed
!= SPEED_100
)
886 mode
&= ~AX_MEDIUM_PS
;
888 if (ecmd
.duplex
!= DUPLEX_FULL
)
889 mode
&= ~AX_MEDIUM_FD
;
891 devdbg(dev
, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd
.speed
, ecmd
.duplex
, mode
);
893 asix_write_medium_mode(dev
, mode
);
898 static int ax88772_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
903 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
906 data
->eeprom_len
= AX88772_EEPROM_LEN
;
908 usbnet_get_endpoints(dev
,intf
);
910 buf
= kmalloc(6, GFP_KERNEL
);
912 dbg ("Cannot allocate memory for buffer");
917 if ((ret
= asix_write_gpio(dev
,
918 AX_GPIO_RSE
| AX_GPIO_GPO_2
| AX_GPIO_GPO2EN
, 5)) < 0)
921 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
922 embd_phy
= ((asix_get_phy_addr(dev
) & 0x1f) == 0x10 ? 1 : 0);
923 if ((ret
= asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
,
924 embd_phy
, 0, 0, buf
)) < 0) {
925 dbg("Select PHY #1 failed: %d", ret
);
929 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
| AX_SWRESET_PRL
)) < 0)
933 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_CLEAR
)) < 0)
938 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
)) < 0)
942 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_PRTE
)) < 0)
947 rx_ctl
= asix_read_rx_ctl(dev
);
948 dbg("RX_CTL is 0x%04x after software reset", rx_ctl
);
949 if ((ret
= asix_write_rx_ctl(dev
, 0x0000)) < 0)
952 rx_ctl
= asix_read_rx_ctl(dev
);
953 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl
);
955 /* Get the MAC address */
956 memset(buf
, 0, ETH_ALEN
);
957 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
,
958 0, 0, ETH_ALEN
, buf
)) < 0) {
959 dbg("Failed to read MAC address: %d", ret
);
962 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
964 /* Initialize MII structure */
965 dev
->mii
.dev
= dev
->net
;
966 dev
->mii
.mdio_read
= asix_mdio_read
;
967 dev
->mii
.mdio_write
= asix_mdio_write
;
968 dev
->mii
.phy_id_mask
= 0x1f;
969 dev
->mii
.reg_num_mask
= 0x1f;
970 dev
->net
->do_ioctl
= asix_ioctl
;
971 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
973 phyid
= asix_get_phyid(dev
);
974 dbg("PHYID=0x%08x", phyid
);
976 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_PRL
)) < 0)
981 if ((ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
| AX_SWRESET_PRL
)) < 0)
986 dev
->net
->set_multicast_list
= asix_set_multicast
;
987 dev
->net
->ethtool_ops
= &ax88772_ethtool_ops
;
989 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
990 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
991 ADVERTISE_ALL
| ADVERTISE_CSMA
);
992 mii_nway_restart(&dev
->mii
);
994 if ((ret
= asix_write_medium_mode(dev
, AX88772_MEDIUM_DEFAULT
)) < 0)
997 if ((ret
= asix_write_cmd(dev
, AX_CMD_WRITE_IPG0
,
998 AX88772_IPG0_DEFAULT
| AX88772_IPG1_DEFAULT
,
999 AX88772_IPG2_DEFAULT
, 0, buf
)) < 0) {
1000 dbg("Write IPG,IPG1,IPG2 failed: %d", ret
);
1004 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1005 if ((ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
)) < 0)
1008 rx_ctl
= asix_read_rx_ctl(dev
);
1009 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl
);
1011 rx_ctl
= asix_read_medium_status(dev
);
1012 dbg("Medium Status is 0x%04x after all initializations", rx_ctl
);
1016 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1017 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
1018 /* hard_mtu is still the default - the device does not support
1020 dev
->rx_urb_size
= 2048;
1031 static struct ethtool_ops ax88178_ethtool_ops
= {
1032 .get_drvinfo
= asix_get_drvinfo
,
1033 .get_link
= asix_get_link
,
1034 .get_msglevel
= usbnet_get_msglevel
,
1035 .set_msglevel
= usbnet_set_msglevel
,
1036 .get_wol
= asix_get_wol
,
1037 .set_wol
= asix_set_wol
,
1038 .get_eeprom_len
= asix_get_eeprom_len
,
1039 .get_eeprom
= asix_get_eeprom
,
1040 .get_settings
= usbnet_get_settings
,
1041 .set_settings
= usbnet_set_settings
,
1042 .nway_reset
= usbnet_nway_reset
,
1045 static int marvell_phy_init(struct usbnet
*dev
)
1047 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
1050 devdbg(dev
,"marvell_phy_init()");
1052 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_STATUS
);
1053 devdbg(dev
,"MII_MARVELL_STATUS = 0x%04x", reg
);
1055 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_CTRL
,
1056 MARVELL_CTRL_RXDELAY
| MARVELL_CTRL_TXDELAY
);
1058 if (data
->ledmode
) {
1059 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
1060 MII_MARVELL_LED_CTRL
);
1061 devdbg(dev
,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg
);
1064 reg
|= (1 + 0x0100);
1065 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
,
1066 MII_MARVELL_LED_CTRL
, reg
);
1068 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
1069 MII_MARVELL_LED_CTRL
);
1070 devdbg(dev
,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg
);
1077 static int marvell_led_status(struct usbnet
*dev
, u16 speed
)
1079 u16 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
);
1081 devdbg(dev
, "marvell_led_status() read 0x%04x", reg
);
1083 /* Clear out the center LED bits - 0x03F0 */
1097 devdbg(dev
, "marvell_led_status() writing 0x%04x", reg
);
1098 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
, reg
);
1103 static int ax88178_link_reset(struct usbnet
*dev
)
1106 struct ethtool_cmd ecmd
;
1107 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
1109 devdbg(dev
,"ax88178_link_reset()");
1111 mii_check_media(&dev
->mii
, 1, 1);
1112 mii_ethtool_gset(&dev
->mii
, &ecmd
);
1113 mode
= AX88178_MEDIUM_DEFAULT
;
1115 if (ecmd
.speed
== SPEED_1000
)
1116 mode
|= AX_MEDIUM_GM
| AX_MEDIUM_ENCK
;
1117 else if (ecmd
.speed
== SPEED_100
)
1118 mode
|= AX_MEDIUM_PS
;
1120 mode
&= ~(AX_MEDIUM_PS
| AX_MEDIUM_GM
);
1122 if (ecmd
.duplex
== DUPLEX_FULL
)
1123 mode
|= AX_MEDIUM_FD
;
1125 mode
&= ~AX_MEDIUM_FD
;
1127 devdbg(dev
, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd
.speed
, ecmd
.duplex
, mode
);
1129 asix_write_medium_mode(dev
, mode
);
1131 if (data
->phymode
== PHY_MODE_MARVELL
&& data
->ledmode
)
1132 marvell_led_status(dev
, ecmd
.speed
);
1137 static void ax88178_set_mfb(struct usbnet
*dev
)
1139 u16 mfb
= AX_RX_CTL_MFB_16384
;
1142 int old_rx_urb_size
= dev
->rx_urb_size
;
1144 if (dev
->hard_mtu
< 2048) {
1145 dev
->rx_urb_size
= 2048;
1146 mfb
= AX_RX_CTL_MFB_2048
;
1147 } else if (dev
->hard_mtu
< 4096) {
1148 dev
->rx_urb_size
= 4096;
1149 mfb
= AX_RX_CTL_MFB_4096
;
1150 } else if (dev
->hard_mtu
< 8192) {
1151 dev
->rx_urb_size
= 8192;
1152 mfb
= AX_RX_CTL_MFB_8192
;
1153 } else if (dev
->hard_mtu
< 16384) {
1154 dev
->rx_urb_size
= 16384;
1155 mfb
= AX_RX_CTL_MFB_16384
;
1158 rxctl
= asix_read_rx_ctl(dev
);
1159 asix_write_rx_ctl(dev
, (rxctl
& ~AX_RX_CTL_MFB_16384
) | mfb
);
1161 medium
= asix_read_medium_status(dev
);
1162 if (dev
->net
->mtu
> 1500)
1163 medium
|= AX_MEDIUM_JFE
;
1165 medium
&= ~AX_MEDIUM_JFE
;
1166 asix_write_medium_mode(dev
, medium
);
1168 if (dev
->rx_urb_size
> old_rx_urb_size
)
1169 usbnet_unlink_rx_urbs(dev
);
1172 static int ax88178_change_mtu(struct net_device
*net
, int new_mtu
)
1174 struct usbnet
*dev
= netdev_priv(net
);
1175 int ll_mtu
= new_mtu
+ net
->hard_header_len
+ 4;
1177 devdbg(dev
, "ax88178_change_mtu() new_mtu=%d", new_mtu
);
1179 if (new_mtu
<= 0 || ll_mtu
> 16384)
1182 if ((ll_mtu
% dev
->maxpacket
) == 0)
1186 dev
->hard_mtu
= net
->mtu
+ net
->hard_header_len
;
1187 ax88178_set_mfb(dev
);
1192 static int ax88178_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
1194 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
1201 usbnet_get_endpoints(dev
,intf
);
1203 buf
= kmalloc(6, GFP_KERNEL
);
1205 dbg ("Cannot allocate memory for buffer");
1211 asix_read_cmd(dev
, AX_CMD_READ_GPIOS
, 0, 0, 1, &eeprom
);
1212 dbg("GPIO Status: 0x%04x", eeprom
);
1214 asix_write_cmd(dev
, AX_CMD_WRITE_ENABLE
, 0, 0, 0, NULL
);
1215 asix_read_cmd(dev
, AX_CMD_READ_EEPROM
, 0x0017, 0, 2, &eeprom
);
1216 asix_write_cmd(dev
, AX_CMD_WRITE_DISABLE
, 0, 0, 0, NULL
);
1218 dbg("EEPROM index 0x17 is 0x%04x", eeprom
);
1220 if (eeprom
== 0xffff) {
1221 data
->phymode
= PHY_MODE_MARVELL
;
1225 data
->phymode
= eeprom
& 7;
1226 data
->ledmode
= eeprom
>> 8;
1227 gpio0
= (eeprom
& 0x80) ? 0 : 1;
1229 dbg("GPIO0: %d, PhyMode: %d", gpio0
, data
->phymode
);
1231 asix_write_gpio(dev
, AX_GPIO_RSE
| AX_GPIO_GPO_1
| AX_GPIO_GPO1EN
, 40);
1232 if ((eeprom
>> 8) != 1) {
1233 asix_write_gpio(dev
, 0x003c, 30);
1234 asix_write_gpio(dev
, 0x001c, 300);
1235 asix_write_gpio(dev
, 0x003c, 30);
1237 dbg("gpio phymode == 1 path");
1238 asix_write_gpio(dev
, AX_GPIO_GPO1EN
, 30);
1239 asix_write_gpio(dev
, AX_GPIO_GPO1EN
| AX_GPIO_GPO_1
, 30);
1242 asix_sw_reset(dev
, 0);
1245 asix_sw_reset(dev
, AX_SWRESET_PRL
| AX_SWRESET_IPPD
);
1248 asix_write_rx_ctl(dev
, 0);
1250 /* Get the MAC address */
1251 memset(buf
, 0, ETH_ALEN
);
1252 if ((ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
,
1253 0, 0, ETH_ALEN
, buf
)) < 0) {
1254 dbg("Failed to read MAC address: %d", ret
);
1257 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
1259 /* Initialize MII structure */
1260 dev
->mii
.dev
= dev
->net
;
1261 dev
->mii
.mdio_read
= asix_mdio_read
;
1262 dev
->mii
.mdio_write
= asix_mdio_write
;
1263 dev
->mii
.phy_id_mask
= 0x1f;
1264 dev
->mii
.reg_num_mask
= 0xff;
1265 dev
->mii
.supports_gmii
= 1;
1266 dev
->net
->do_ioctl
= asix_ioctl
;
1267 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
1268 dev
->net
->set_multicast_list
= asix_set_multicast
;
1269 dev
->net
->ethtool_ops
= &ax88178_ethtool_ops
;
1270 dev
->net
->change_mtu
= &ax88178_change_mtu
;
1272 phyid
= asix_get_phyid(dev
);
1273 dbg("PHYID=0x%08x", phyid
);
1275 if (data
->phymode
== PHY_MODE_MARVELL
) {
1276 marvell_phy_init(dev
);
1280 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
,
1281 BMCR_RESET
| BMCR_ANENABLE
);
1282 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
1283 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
1284 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_CTRL1000
,
1285 ADVERTISE_1000FULL
);
1287 mii_nway_restart(&dev
->mii
);
1289 if ((ret
= asix_write_medium_mode(dev
, AX88178_MEDIUM_DEFAULT
)) < 0)
1292 if ((ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
)) < 0)
1297 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1298 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
1299 /* hard_mtu is still the default - the device does not support
1301 dev
->rx_urb_size
= 2048;
1312 static const struct driver_info ax8817x_info
= {
1313 .description
= "ASIX AX8817x USB 2.0 Ethernet",
1314 .bind
= ax88172_bind
,
1315 .status
= asix_status
,
1316 .link_reset
= ax88172_link_reset
,
1317 .reset
= ax88172_link_reset
,
1318 .flags
= FLAG_ETHER
,
1322 static const struct driver_info dlink_dub_e100_info
= {
1323 .description
= "DLink DUB-E100 USB Ethernet",
1324 .bind
= ax88172_bind
,
1325 .status
= asix_status
,
1326 .link_reset
= ax88172_link_reset
,
1327 .reset
= ax88172_link_reset
,
1328 .flags
= FLAG_ETHER
,
1332 static const struct driver_info netgear_fa120_info
= {
1333 .description
= "Netgear FA-120 USB Ethernet",
1334 .bind
= ax88172_bind
,
1335 .status
= asix_status
,
1336 .link_reset
= ax88172_link_reset
,
1337 .reset
= ax88172_link_reset
,
1338 .flags
= FLAG_ETHER
,
1342 static const struct driver_info hawking_uf200_info
= {
1343 .description
= "Hawking UF200 USB Ethernet",
1344 .bind
= ax88172_bind
,
1345 .status
= asix_status
,
1346 .link_reset
= ax88172_link_reset
,
1347 .reset
= ax88172_link_reset
,
1348 .flags
= FLAG_ETHER
,
1352 static const struct driver_info ax88772_info
= {
1353 .description
= "ASIX AX88772 USB 2.0 Ethernet",
1354 .bind
= ax88772_bind
,
1355 .status
= asix_status
,
1356 .link_reset
= ax88772_link_reset
,
1357 .reset
= ax88772_link_reset
,
1358 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
,
1359 .rx_fixup
= asix_rx_fixup
,
1360 .tx_fixup
= asix_tx_fixup
,
1363 static const struct driver_info ax88178_info
= {
1364 .description
= "ASIX AX88178 USB 2.0 Ethernet",
1365 .bind
= ax88178_bind
,
1366 .status
= asix_status
,
1367 .link_reset
= ax88178_link_reset
,
1368 .reset
= ax88178_link_reset
,
1369 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
,
1370 .rx_fixup
= asix_rx_fixup
,
1371 .tx_fixup
= asix_tx_fixup
,
1374 static const struct usb_device_id products
[] = {
1377 USB_DEVICE (0x077b, 0x2226),
1378 .driver_info
= (unsigned long) &ax8817x_info
,
1381 USB_DEVICE (0x0846, 0x1040),
1382 .driver_info
= (unsigned long) &netgear_fa120_info
,
1385 USB_DEVICE (0x2001, 0x1a00),
1386 .driver_info
= (unsigned long) &dlink_dub_e100_info
,
1388 // Intellinet, ST Lab USB Ethernet
1389 USB_DEVICE (0x0b95, 0x1720),
1390 .driver_info
= (unsigned long) &ax8817x_info
,
1392 // Hawking UF200, TrendNet TU2-ET100
1393 USB_DEVICE (0x07b8, 0x420a),
1394 .driver_info
= (unsigned long) &hawking_uf200_info
,
1396 // Billionton Systems, USB2AR
1397 USB_DEVICE (0x08dd, 0x90ff),
1398 .driver_info
= (unsigned long) &ax8817x_info
,
1401 USB_DEVICE (0x0557, 0x2009),
1402 .driver_info
= (unsigned long) &ax8817x_info
,
1404 // Buffalo LUA-U2-KTX
1405 USB_DEVICE (0x0411, 0x003d),
1406 .driver_info
= (unsigned long) &ax8817x_info
,
1408 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1409 USB_DEVICE (0x6189, 0x182d),
1410 .driver_info
= (unsigned long) &ax8817x_info
,
1412 // corega FEther USB2-TX
1413 USB_DEVICE (0x07aa, 0x0017),
1414 .driver_info
= (unsigned long) &ax8817x_info
,
1416 // Surecom EP-1427X-2
1417 USB_DEVICE (0x1189, 0x0893),
1418 .driver_info
= (unsigned long) &ax8817x_info
,
1420 // goodway corp usb gwusb2e
1421 USB_DEVICE (0x1631, 0x6200),
1422 .driver_info
= (unsigned long) &ax8817x_info
,
1424 // ASIX AX88772 10/100
1425 USB_DEVICE (0x0b95, 0x7720),
1426 .driver_info
= (unsigned long) &ax88772_info
,
1428 // ASIX AX88178 10/100/1000
1429 USB_DEVICE (0x0b95, 0x1780),
1430 .driver_info
= (unsigned long) &ax88178_info
,
1432 // Linksys USB200M Rev 2
1433 USB_DEVICE (0x13b1, 0x0018),
1434 .driver_info
= (unsigned long) &ax88772_info
,
1436 // 0Q0 cable ethernet
1437 USB_DEVICE (0x1557, 0x7720),
1438 .driver_info
= (unsigned long) &ax88772_info
,
1440 // DLink DUB-E100 H/W Ver B1
1441 USB_DEVICE (0x07d1, 0x3c05),
1442 .driver_info
= (unsigned long) &ax88772_info
,
1444 // DLink DUB-E100 H/W Ver B1 Alternate
1445 USB_DEVICE (0x2001, 0x3c05),
1446 .driver_info
= (unsigned long) &ax88772_info
,
1449 USB_DEVICE (0x1737, 0x0039),
1450 .driver_info
= (unsigned long) &ax88178_info
,
1453 USB_DEVICE (0x04bb, 0x0930),
1454 .driver_info
= (unsigned long) &ax88178_info
,
1458 MODULE_DEVICE_TABLE(usb
, products
);
1460 static struct usb_driver asix_driver
= {
1462 .id_table
= products
,
1463 .probe
= usbnet_probe
,
1464 .suspend
= usbnet_suspend
,
1465 .resume
= usbnet_resume
,
1466 .disconnect
= usbnet_disconnect
,
1469 static int __init
asix_init(void)
1471 return usb_register(&asix_driver
);
1473 module_init(asix_init
);
1475 static void __exit
asix_exit(void)
1477 usb_deregister(&asix_driver
);
1479 module_exit(asix_exit
);
1481 MODULE_AUTHOR("David Hollis");
1482 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1483 MODULE_LICENSE("GPL");