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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / blackfin / mach-common / smp.c
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1 /*
2 * File: arch/blackfin/kernel/smp.c
3 * Author: Philippe Gerum <rpm@xenomai.org>
4 * IPI management based on arch/arm/kernel/smp.c.
6 * Copyright 2007 Analog Devices Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see the file COPYING, or write
20 * to the Free Software Foundation, Inc.,
21 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/spinlock.h>
28 #include <linux/sched.h>
29 #include <linux/interrupt.h>
30 #include <linux/cache.h>
31 #include <linux/profile.h>
32 #include <linux/errno.h>
33 #include <linux/mm.h>
34 #include <linux/cpu.h>
35 #include <linux/smp.h>
36 #include <linux/seq_file.h>
37 #include <linux/irq.h>
38 #include <asm/atomic.h>
39 #include <asm/cacheflush.h>
40 #include <asm/mmu_context.h>
41 #include <asm/pgtable.h>
42 #include <asm/pgalloc.h>
43 #include <asm/processor.h>
44 #include <asm/ptrace.h>
45 #include <asm/cpu.h>
46 #include <linux/err.h>
48 struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
50 void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
51 *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb,
52 *init_saved_dcplb_fault_addr_coreb;
54 cpumask_t cpu_possible_map;
55 EXPORT_SYMBOL(cpu_possible_map);
57 cpumask_t cpu_online_map;
58 EXPORT_SYMBOL(cpu_online_map);
60 #define BFIN_IPI_RESCHEDULE 0
61 #define BFIN_IPI_CALL_FUNC 1
62 #define BFIN_IPI_CPU_STOP 2
64 struct blackfin_flush_data {
65 unsigned long start;
66 unsigned long end;
69 void *secondary_stack;
72 struct smp_call_struct {
73 void (*func)(void *info);
74 void *info;
75 int wait;
76 cpumask_t pending;
77 cpumask_t waitmask;
80 static struct blackfin_flush_data smp_flush_data;
82 static DEFINE_SPINLOCK(stop_lock);
84 struct ipi_message {
85 struct list_head list;
86 unsigned long type;
87 struct smp_call_struct call_struct;
90 struct ipi_message_queue {
91 struct list_head head;
92 spinlock_t lock;
93 unsigned long count;
96 static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);
98 static void ipi_cpu_stop(unsigned int cpu)
100 spin_lock(&stop_lock);
101 printk(KERN_CRIT "CPU%u: stopping\n", cpu);
102 dump_stack();
103 spin_unlock(&stop_lock);
105 cpu_clear(cpu, cpu_online_map);
107 local_irq_disable();
109 while (1)
110 SSYNC();
113 static void ipi_flush_icache(void *info)
115 struct blackfin_flush_data *fdata = info;
117 /* Invalidate the memory holding the bounds of the flushed region. */
118 blackfin_dcache_invalidate_range((unsigned long)fdata,
119 (unsigned long)fdata + sizeof(*fdata));
121 blackfin_icache_flush_range(fdata->start, fdata->end);
124 static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
126 int wait;
127 void (*func)(void *info);
128 void *info;
129 func = msg->call_struct.func;
130 info = msg->call_struct.info;
131 wait = msg->call_struct.wait;
132 cpu_clear(cpu, msg->call_struct.pending);
133 func(info);
134 if (wait)
135 cpu_clear(cpu, msg->call_struct.waitmask);
136 else
137 kfree(msg);
140 static irqreturn_t ipi_handler(int irq, void *dev_instance)
142 struct ipi_message *msg, *mg;
143 struct ipi_message_queue *msg_queue;
144 unsigned int cpu = smp_processor_id();
146 platform_clear_ipi(cpu);
148 msg_queue = &__get_cpu_var(ipi_msg_queue);
149 msg_queue->count++;
151 spin_lock(&msg_queue->lock);
152 list_for_each_entry_safe(msg, mg, &msg_queue->head, list) {
153 list_del(&msg->list);
154 switch (msg->type) {
155 case BFIN_IPI_RESCHEDULE:
156 /* That's the easiest one; leave it to
157 * return_from_int. */
158 kfree(msg);
159 break;
160 case BFIN_IPI_CALL_FUNC:
161 spin_unlock(&msg_queue->lock);
162 ipi_call_function(cpu, msg);
163 spin_lock(&msg_queue->lock);
164 break;
165 case BFIN_IPI_CPU_STOP:
166 spin_unlock(&msg_queue->lock);
167 ipi_cpu_stop(cpu);
168 spin_lock(&msg_queue->lock);
169 kfree(msg);
170 break;
171 default:
172 printk(KERN_CRIT "CPU%u: Unknown IPI message \
173 0x%lx\n", cpu, msg->type);
174 kfree(msg);
175 break;
178 spin_unlock(&msg_queue->lock);
179 return IRQ_HANDLED;
182 static void ipi_queue_init(void)
184 unsigned int cpu;
185 struct ipi_message_queue *msg_queue;
186 for_each_possible_cpu(cpu) {
187 msg_queue = &per_cpu(ipi_msg_queue, cpu);
188 INIT_LIST_HEAD(&msg_queue->head);
189 spin_lock_init(&msg_queue->lock);
190 msg_queue->count = 0;
194 int smp_call_function(void (*func)(void *info), void *info, int wait)
196 unsigned int cpu;
197 cpumask_t callmap;
198 unsigned long flags;
199 struct ipi_message_queue *msg_queue;
200 struct ipi_message *msg;
202 callmap = cpu_online_map;
203 cpu_clear(smp_processor_id(), callmap);
204 if (cpus_empty(callmap))
205 return 0;
207 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
208 INIT_LIST_HEAD(&msg->list);
209 msg->call_struct.func = func;
210 msg->call_struct.info = info;
211 msg->call_struct.wait = wait;
212 msg->call_struct.pending = callmap;
213 msg->call_struct.waitmask = callmap;
214 msg->type = BFIN_IPI_CALL_FUNC;
216 for_each_cpu_mask(cpu, callmap) {
217 msg_queue = &per_cpu(ipi_msg_queue, cpu);
218 spin_lock_irqsave(&msg_queue->lock, flags);
219 list_add(&msg->list, &msg_queue->head);
220 spin_unlock_irqrestore(&msg_queue->lock, flags);
221 platform_send_ipi_cpu(cpu);
223 if (wait) {
224 while (!cpus_empty(msg->call_struct.waitmask))
225 blackfin_dcache_invalidate_range(
226 (unsigned long)(&msg->call_struct.waitmask),
227 (unsigned long)(&msg->call_struct.waitmask));
228 kfree(msg);
230 return 0;
232 EXPORT_SYMBOL_GPL(smp_call_function);
234 int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
235 int wait)
237 unsigned int cpu = cpuid;
238 cpumask_t callmap;
239 unsigned long flags;
240 struct ipi_message_queue *msg_queue;
241 struct ipi_message *msg;
243 if (cpu_is_offline(cpu))
244 return 0;
245 cpus_clear(callmap);
246 cpu_set(cpu, callmap);
248 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
249 INIT_LIST_HEAD(&msg->list);
250 msg->call_struct.func = func;
251 msg->call_struct.info = info;
252 msg->call_struct.wait = wait;
253 msg->call_struct.pending = callmap;
254 msg->call_struct.waitmask = callmap;
255 msg->type = BFIN_IPI_CALL_FUNC;
257 msg_queue = &per_cpu(ipi_msg_queue, cpu);
258 spin_lock_irqsave(&msg_queue->lock, flags);
259 list_add(&msg->list, &msg_queue->head);
260 spin_unlock_irqrestore(&msg_queue->lock, flags);
261 platform_send_ipi_cpu(cpu);
263 if (wait) {
264 while (!cpus_empty(msg->call_struct.waitmask))
265 blackfin_dcache_invalidate_range(
266 (unsigned long)(&msg->call_struct.waitmask),
267 (unsigned long)(&msg->call_struct.waitmask));
268 kfree(msg);
270 return 0;
272 EXPORT_SYMBOL_GPL(smp_call_function_single);
274 void smp_send_reschedule(int cpu)
276 unsigned long flags;
277 struct ipi_message_queue *msg_queue;
278 struct ipi_message *msg;
280 if (cpu_is_offline(cpu))
281 return;
283 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
284 memset(msg, 0, sizeof(msg));
285 INIT_LIST_HEAD(&msg->list);
286 msg->type = BFIN_IPI_RESCHEDULE;
288 msg_queue = &per_cpu(ipi_msg_queue, cpu);
289 spin_lock_irqsave(&msg_queue->lock, flags);
290 list_add(&msg->list, &msg_queue->head);
291 spin_unlock_irqrestore(&msg_queue->lock, flags);
292 platform_send_ipi_cpu(cpu);
294 return;
297 void smp_send_stop(void)
299 unsigned int cpu;
300 cpumask_t callmap;
301 unsigned long flags;
302 struct ipi_message_queue *msg_queue;
303 struct ipi_message *msg;
305 callmap = cpu_online_map;
306 cpu_clear(smp_processor_id(), callmap);
307 if (cpus_empty(callmap))
308 return;
310 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
311 memset(msg, 0, sizeof(msg));
312 INIT_LIST_HEAD(&msg->list);
313 msg->type = BFIN_IPI_CPU_STOP;
315 for_each_cpu_mask(cpu, callmap) {
316 msg_queue = &per_cpu(ipi_msg_queue, cpu);
317 spin_lock_irqsave(&msg_queue->lock, flags);
318 list_add(&msg->list, &msg_queue->head);
319 spin_unlock_irqrestore(&msg_queue->lock, flags);
320 platform_send_ipi_cpu(cpu);
322 return;
325 int __cpuinit __cpu_up(unsigned int cpu)
327 struct task_struct *idle;
328 int ret;
330 idle = fork_idle(cpu);
331 if (IS_ERR(idle)) {
332 printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
333 return PTR_ERR(idle);
336 secondary_stack = task_stack_page(idle) + THREAD_SIZE;
337 smp_wmb();
339 ret = platform_boot_secondary(cpu, idle);
341 if (ret) {
342 cpu_clear(cpu, cpu_present_map);
343 printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
344 free_task(idle);
345 } else
346 cpu_set(cpu, cpu_online_map);
348 secondary_stack = NULL;
350 return ret;
353 static void __cpuinit setup_secondary(unsigned int cpu)
355 #if !(defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE))
356 struct irq_desc *timer_desc;
357 #endif
358 unsigned long ilat;
360 bfin_write_IMASK(0);
361 CSYNC();
362 ilat = bfin_read_ILAT();
363 CSYNC();
364 bfin_write_ILAT(ilat);
365 CSYNC();
367 /* Reserve the PDA space for the secondary CPU. */
368 reserve_pda();
370 /* Enable interrupt levels IVG7-15. IARs have been already
371 * programmed by the boot CPU. */
372 bfin_irq_flags |= IMASK_IVG15 |
373 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
374 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
376 #if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
377 /* Power down the core timer, just to play safe. */
378 bfin_write_TCNTL(0);
380 /* system timer0 has been setup by CoreA. */
381 #else
382 timer_desc = irq_desc + IRQ_CORETMR;
383 setup_core_timer();
384 timer_desc->chip->enable(IRQ_CORETMR);
385 #endif
388 void __cpuinit secondary_start_kernel(void)
390 unsigned int cpu = smp_processor_id();
391 struct mm_struct *mm = &init_mm;
393 if (_bfin_swrst & SWRST_DBL_FAULT_B) {
394 printk(KERN_EMERG "CoreB Recovering from DOUBLE FAULT event\n");
395 #ifdef CONFIG_DEBUG_DOUBLEFAULT
396 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
397 (int)init_saved_seqstat_coreb & SEQSTAT_EXCAUSE, init_saved_retx_coreb);
398 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr_coreb);
399 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr_coreb);
400 #endif
401 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
402 init_retx_coreb);
406 * We want the D-cache to be enabled early, in case the atomic
407 * support code emulates cache coherence (see
408 * __ARCH_SYNC_CORE_DCACHE).
410 init_exception_vectors();
412 bfin_setup_caches(cpu);
414 local_irq_disable();
416 /* Attach the new idle task to the global mm. */
417 atomic_inc(&mm->mm_users);
418 atomic_inc(&mm->mm_count);
419 current->active_mm = mm;
420 BUG_ON(current->mm); /* Can't be, but better be safe than sorry. */
422 preempt_disable();
424 setup_secondary(cpu);
426 local_irq_enable();
428 platform_secondary_init(cpu);
430 cpu_idle();
433 void __init smp_prepare_boot_cpu(void)
437 void __init smp_prepare_cpus(unsigned int max_cpus)
439 platform_prepare_cpus(max_cpus);
440 ipi_queue_init();
441 platform_request_ipi(&ipi_handler);
444 void __init smp_cpus_done(unsigned int max_cpus)
446 unsigned long bogosum = 0;
447 unsigned int cpu;
449 for_each_online_cpu(cpu)
450 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
452 printk(KERN_INFO "SMP: Total of %d processors activated "
453 "(%lu.%02lu BogoMIPS).\n",
454 num_online_cpus(),
455 bogosum / (500000/HZ),
456 (bogosum / (5000/HZ)) % 100);
459 void smp_icache_flush_range_others(unsigned long start, unsigned long end)
461 smp_flush_data.start = start;
462 smp_flush_data.end = end;
464 if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
465 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
467 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
469 #ifdef __ARCH_SYNC_CORE_DCACHE
470 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
472 void resync_core_dcache(void)
474 unsigned int cpu = get_cpu();
475 blackfin_invalidate_entire_dcache();
476 ++per_cpu(cpu_data, cpu).dcache_invld_count;
477 put_cpu();
479 EXPORT_SYMBOL(resync_core_dcache);
480 #endif