2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
21 #include <mach/board.h>
23 #include <mach/gpio.h>
25 #include <video/atmel_lcdc.h>
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
33 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
35 #if defined(CONFIG_ARCH_AT91)
36 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
37 | FBINFO_PARTIAL_PAN_OK \
38 | FBINFO_HWACCEL_YPAN)
40 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
41 struct fb_var_screeninfo
*var
)
45 #elif defined(CONFIG_AVR32)
46 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
47 | FBINFO_PARTIAL_PAN_OK \
48 | FBINFO_HWACCEL_XPAN \
49 | FBINFO_HWACCEL_YPAN)
51 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
52 struct fb_var_screeninfo
*var
)
57 pixeloff
= (var
->xoffset
* var
->bits_per_pixel
) & 0x1f;
59 dma2dcfg
= ((var
->xres_virtual
- var
->xres
) * var
->bits_per_pixel
) / 8;
60 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
61 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
63 /* Update configuration */
64 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
65 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
66 | ATMEL_LCDC_DMAUPDT
);
70 static const u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
71 | ATMEL_LCDC_POL_POSITIVE
72 | ATMEL_LCDC_ENA_PWMENABLE
;
74 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
76 /* some bl->props field just changed */
77 static int atmel_bl_update_status(struct backlight_device
*bl
)
79 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
80 int power
= sinfo
->bl_power
;
81 int brightness
= bl
->props
.brightness
;
83 /* REVISIT there may be a meaningful difference between
84 * fb_blank and power ... there seem to be some cases
85 * this doesn't handle correctly.
87 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
88 power
= bl
->props
.fb_blank
;
89 else if (bl
->props
.power
!= sinfo
->bl_power
)
90 power
= bl
->props
.power
;
92 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
93 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
94 else if (power
!= FB_BLANK_UNBLANK
)
97 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
98 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
99 brightness
? contrast_ctr
: 0);
101 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
106 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
108 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
110 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
113 static struct backlight_ops atmel_lcdc_bl_ops
= {
114 .update_status
= atmel_bl_update_status
,
115 .get_brightness
= atmel_bl_get_brightness
,
118 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
120 struct backlight_device
*bl
;
122 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
124 if (sinfo
->backlight
)
127 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
,
128 sinfo
, &atmel_lcdc_bl_ops
);
130 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
134 sinfo
->backlight
= bl
;
136 bl
->props
.power
= FB_BLANK_UNBLANK
;
137 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
138 bl
->props
.max_brightness
= 0xff;
139 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
142 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
144 if (sinfo
->backlight
)
145 backlight_device_unregister(sinfo
->backlight
);
150 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
152 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
155 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
161 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
163 /* have some default contrast/backlight settings */
164 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
165 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
167 if (sinfo
->lcdcon_is_backlight
)
168 init_backlight(sinfo
);
172 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata
= {
173 .type
= FB_TYPE_PACKED_PIXELS
,
174 .visual
= FB_VISUAL_TRUECOLOR
,
178 .accel
= FB_ACCEL_NONE
,
181 static unsigned long compute_hozval(unsigned long xres
, unsigned long lcdcon2
)
185 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
186 || cpu_is_at32ap7000()))
190 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
192 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
195 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
196 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
197 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
198 value
= DIV_ROUND_UP(value
, 4);
200 value
= DIV_ROUND_UP(value
, 8);
206 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info
*sinfo
)
208 /* Turn off the LCD controller and the DMA controller */
209 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
210 sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
212 /* Wait for the LCDC core to become idle */
213 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
216 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
219 static void atmel_lcdfb_stop(struct atmel_lcdfb_info
*sinfo
)
221 atmel_lcdfb_stop_nowait(sinfo
);
223 /* Wait for DMA engine to become idle... */
224 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
228 static void atmel_lcdfb_start(struct atmel_lcdfb_info
*sinfo
)
230 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, sinfo
->default_dmacon
);
231 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
232 (sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
)
236 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
237 struct fb_var_screeninfo
*var
)
239 struct atmel_lcdfb_info
*sinfo
= info
->par
;
240 struct fb_fix_screeninfo
*fix
= &info
->fix
;
241 unsigned long dma_addr
;
243 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
244 + var
->xoffset
* var
->bits_per_pixel
/ 8);
248 /* Set framebuffer DMA base address and pixel offset */
249 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
251 atmel_lcdfb_update_dma2d(sinfo
, var
);
254 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
256 struct fb_info
*info
= sinfo
->info
;
258 dma_free_writecombine(info
->device
, info
->fix
.smem_len
,
259 info
->screen_base
, info
->fix
.smem_start
);
263 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
264 * @sinfo: the frame buffer to allocate memory for
266 * This function is called only from the atmel_lcdfb_probe()
267 * so no locking by fb_info->mm_lock around smem_len setting is needed.
269 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
271 struct fb_info
*info
= sinfo
->info
;
272 struct fb_var_screeninfo
*var
= &info
->var
;
273 unsigned int smem_len
;
275 smem_len
= (var
->xres_virtual
* var
->yres_virtual
276 * ((var
->bits_per_pixel
+ 7) / 8));
277 info
->fix
.smem_len
= max(smem_len
, sinfo
->smem_len
);
279 info
->screen_base
= dma_alloc_writecombine(info
->device
, info
->fix
.smem_len
,
280 (dma_addr_t
*)&info
->fix
.smem_start
, GFP_KERNEL
);
282 if (!info
->screen_base
) {
286 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
291 static const struct fb_videomode
*atmel_lcdfb_choose_mode(struct fb_var_screeninfo
*var
,
292 struct fb_info
*info
)
294 struct fb_videomode varfbmode
;
295 const struct fb_videomode
*fbmode
= NULL
;
297 fb_var_to_videomode(&varfbmode
, var
);
298 fbmode
= fb_find_nearest_mode(&varfbmode
, &info
->modelist
);
300 fb_videomode_to_var(var
, fbmode
);
306 * atmel_lcdfb_check_var - Validates a var passed in.
307 * @var: frame buffer variable screen structure
308 * @info: frame buffer structure that represents a single frame buffer
310 * Checks to see if the hardware supports the state requested by
311 * var passed in. This function does not alter the hardware
312 * state!!! This means the data stored in struct fb_info and
313 * struct atmel_lcdfb_info do not change. This includes the var
314 * inside of struct fb_info. Do NOT change these. This function
315 * can be called on its own if we intent to only test a mode and
316 * not actually set it. The stuff in modedb.c is a example of
317 * this. If the var passed in is slightly off by what the
318 * hardware can support then we alter the var PASSED in to what
319 * we can do. If the hardware doesn't support mode change a
320 * -EINVAL will be returned by the upper layers. You don't need
321 * to implement this function then. If you hardware doesn't
322 * support changing the resolution then this function is not
323 * needed. In this case the driver would just provide a var that
324 * represents the static state the screen is in.
326 * Returns negative errno on error, or zero on success.
328 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
329 struct fb_info
*info
)
331 struct device
*dev
= info
->device
;
332 struct atmel_lcdfb_info
*sinfo
= info
->par
;
333 unsigned long clk_value_khz
;
335 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
337 dev_dbg(dev
, "%s:\n", __func__
);
339 if (!(var
->pixclock
&& var
->bits_per_pixel
)) {
340 /* choose a suitable mode if possible */
341 if (!atmel_lcdfb_choose_mode(var
, info
)) {
342 dev_err(dev
, "needed value not specified\n");
347 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
348 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
349 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
350 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
352 if (PICOS2KHZ(var
->pixclock
) > clk_value_khz
) {
353 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
357 /* Do not allow to have real resoulution larger than virtual */
358 if (var
->xres
> var
->xres_virtual
)
359 var
->xres_virtual
= var
->xres
;
361 if (var
->yres
> var
->yres_virtual
)
362 var
->yres_virtual
= var
->yres
;
364 /* Force same alignment for each line */
365 var
->xres
= (var
->xres
+ 3) & ~3UL;
366 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
368 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
369 var
->transp
.msb_right
= 0;
370 var
->transp
.offset
= var
->transp
.length
= 0;
371 var
->xoffset
= var
->yoffset
= 0;
373 if (info
->fix
.smem_len
) {
374 unsigned int smem_len
= (var
->xres_virtual
* var
->yres_virtual
375 * ((var
->bits_per_pixel
+ 7) / 8));
376 if (smem_len
> info
->fix
.smem_len
)
380 /* Saturate vertical and horizontal timings at maximum values */
381 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
382 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
383 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
384 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
385 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
387 var
->right_margin
= min_t(u32
, var
->right_margin
,
388 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
389 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
390 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
391 var
->left_margin
= min_t(u32
, var
->left_margin
,
394 /* Some parameters can't be zero */
395 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
396 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
397 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
398 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
400 switch (var
->bits_per_pixel
) {
405 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
406 var
->red
.length
= var
->green
.length
= var
->blue
.length
407 = var
->bits_per_pixel
;
411 if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
413 var
->red
.offset
= 11;
414 var
->blue
.offset
= 0;
415 var
->green
.length
= 6;
416 } else if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB555
) {
417 var
->red
.offset
= 10;
418 var
->blue
.offset
= 0;
419 var
->green
.length
= 5;
423 var
->blue
.offset
= 10;
424 var
->green
.length
= 5;
426 var
->green
.offset
= 5;
427 var
->red
.length
= var
->blue
.length
= 5;
430 var
->transp
.offset
= 24;
431 var
->transp
.length
= 8;
434 if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
436 var
->red
.offset
= 16;
437 var
->blue
.offset
= 0;
441 var
->blue
.offset
= 16;
443 var
->green
.offset
= 8;
444 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
447 dev_err(dev
, "color depth %d not supported\n",
448 var
->bits_per_pixel
);
458 static void atmel_lcdfb_reset(struct atmel_lcdfb_info
*sinfo
)
462 atmel_lcdfb_stop(sinfo
);
463 atmel_lcdfb_start(sinfo
);
467 * atmel_lcdfb_set_par - Alters the hardware state.
468 * @info: frame buffer structure that represents a single frame buffer
470 * Using the fb_var_screeninfo in fb_info we set the resolution
471 * of the this particular framebuffer. This function alters the
472 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
473 * not alter var in fb_info since we are using that data. This
474 * means we depend on the data in var inside fb_info to be
475 * supported by the hardware. atmel_lcdfb_check_var is always called
476 * before atmel_lcdfb_set_par to ensure this. Again if you can't
477 * change the resolution you don't need this function.
480 static int atmel_lcdfb_set_par(struct fb_info
*info
)
482 struct atmel_lcdfb_info
*sinfo
= info
->par
;
483 unsigned long hozval_linesz
;
485 unsigned long clk_value_khz
;
486 unsigned long bits_per_line
;
490 dev_dbg(info
->device
, "%s:\n", __func__
);
491 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
492 info
->var
.xres
, info
->var
.yres
,
493 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
495 atmel_lcdfb_stop_nowait(sinfo
);
497 if (info
->var
.bits_per_pixel
== 1)
498 info
->fix
.visual
= FB_VISUAL_MONO01
;
499 else if (info
->var
.bits_per_pixel
<= 8)
500 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
502 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
504 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
505 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
507 /* Re-initialize the DMA engine... */
508 dev_dbg(info
->device
, " * update DMA engine\n");
509 atmel_lcdfb_update_dma(info
, &info
->var
);
511 /* ...set frame size and burst length = 8 words (?) */
512 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
513 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
514 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
516 /* Now, the LCDC core... */
518 /* Set pixel clock */
519 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
521 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
524 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
525 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
527 value
= (value
/ 2) - 1;
528 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n",
530 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
,
531 value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
532 info
->var
.pixclock
= KHZ2PICOS(clk_value_khz
/ (2 * (value
+ 1)));
533 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
534 PICOS2KHZ(info
->var
.pixclock
));
538 /* Initialize control register 2 */
539 value
= sinfo
->default_lcdcon2
;
541 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
542 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
543 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
544 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
546 switch (info
->var
.bits_per_pixel
) {
547 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
548 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
549 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
550 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
551 case 15: /* fall through */
552 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
553 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
554 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
555 default: BUG(); break;
557 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
558 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
560 /* Vertical timing */
561 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
562 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
563 value
|= info
->var
.lower_margin
;
564 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
565 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
567 /* Horizontal timing */
568 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
569 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
570 value
|= (info
->var
.left_margin
- 1);
571 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
572 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
574 /* Horizontal value (aka line size) */
575 hozval_linesz
= compute_hozval(info
->var
.xres
,
576 lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
));
579 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
580 value
|= info
->var
.yres
- 1;
581 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
582 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
584 /* FIFO Threshold: Use formula from data sheet */
585 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
586 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
588 /* Toggle LCD_MODE every frame */
589 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
591 /* Disable all interrupts */
592 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
593 /* Enable FIFO & DMA errors */
594 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
| ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
596 /* ...wait for DMA engine to become idle... */
597 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
600 atmel_lcdfb_start(sinfo
);
602 dev_dbg(info
->device
, " * DONE\n");
607 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
610 chan
>>= 16 - bf
->length
;
611 return chan
<< bf
->offset
;
615 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
616 * @regno: Which register in the CLUT we are programming
617 * @red: The red value which can be up to 16 bits wide
618 * @green: The green value which can be up to 16 bits wide
619 * @blue: The blue value which can be up to 16 bits wide.
620 * @transp: If supported the alpha value which can be up to 16 bits wide.
621 * @info: frame buffer info structure
623 * Set a single color register. The values supplied have a 16 bit
624 * magnitude which needs to be scaled in this function for the hardware.
625 * Things to take into consideration are how many color registers, if
626 * any, are supported with the current color visual. With truecolor mode
627 * no color palettes are supported. Here a psuedo palette is created
628 * which we store the value in pseudo_palette in struct fb_info. For
629 * pseudocolor mode we have a limited color palette. To deal with this
630 * we can program what color is displayed for a particular pixel value.
631 * DirectColor is similar in that we can program each color field. If
632 * we have a static colormap we don't need to implement this function.
634 * Returns negative errno on error, or zero on success. In an
635 * ideal world, this would have been the case, but as it turns
636 * out, the other drivers return 1 on failure, so that's what
639 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
640 unsigned int green
, unsigned int blue
,
641 unsigned int transp
, struct fb_info
*info
)
643 struct atmel_lcdfb_info
*sinfo
= info
->par
;
648 if (info
->var
.grayscale
)
649 red
= green
= blue
= (19595 * red
+ 38470 * green
650 + 7471 * blue
) >> 16;
652 switch (info
->fix
.visual
) {
653 case FB_VISUAL_TRUECOLOR
:
655 pal
= info
->pseudo_palette
;
657 val
= chan_to_field(red
, &info
->var
.red
);
658 val
|= chan_to_field(green
, &info
->var
.green
);
659 val
|= chan_to_field(blue
, &info
->var
.blue
);
666 case FB_VISUAL_PSEUDOCOLOR
:
668 val
= ((red
>> 11) & 0x001f);
669 val
|= ((green
>> 6) & 0x03e0);
670 val
|= ((blue
>> 1) & 0x7c00);
673 * TODO: intensity bit. Maybe something like
674 * ~(red[10] ^ green[10] ^ blue[10]) & 1
677 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
682 case FB_VISUAL_MONO01
:
684 val
= (regno
== 0) ? 0x00 : 0x1F;
685 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
695 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
696 struct fb_info
*info
)
698 dev_dbg(info
->device
, "%s\n", __func__
);
700 atmel_lcdfb_update_dma(info
, var
);
705 static struct fb_ops atmel_lcdfb_ops
= {
706 .owner
= THIS_MODULE
,
707 .fb_check_var
= atmel_lcdfb_check_var
,
708 .fb_set_par
= atmel_lcdfb_set_par
,
709 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
710 .fb_pan_display
= atmel_lcdfb_pan_display
,
711 .fb_fillrect
= cfb_fillrect
,
712 .fb_copyarea
= cfb_copyarea
,
713 .fb_imageblit
= cfb_imageblit
,
716 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
718 struct fb_info
*info
= dev_id
;
719 struct atmel_lcdfb_info
*sinfo
= info
->par
;
722 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
723 if (status
& ATMEL_LCDC_UFLWI
) {
724 dev_warn(info
->device
, "FIFO underflow %#x\n", status
);
725 /* reset DMA and FIFO to avoid screen shifting */
726 schedule_work(&sinfo
->task
);
728 lcdc_writel(sinfo
, ATMEL_LCDC_ICR
, status
);
733 * LCD controller task (to reset the LCD)
735 static void atmel_lcdfb_task(struct work_struct
*work
)
737 struct atmel_lcdfb_info
*sinfo
=
738 container_of(work
, struct atmel_lcdfb_info
, task
);
740 atmel_lcdfb_reset(sinfo
);
743 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
745 struct fb_info
*info
= sinfo
->info
;
748 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
750 dev_info(info
->device
,
751 "%luKiB frame buffer at %08lx (mapped at %p)\n",
752 (unsigned long)info
->fix
.smem_len
/ 1024,
753 (unsigned long)info
->fix
.smem_start
,
756 /* Allocate colormap */
757 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
759 dev_err(info
->device
, "Alloc color map failed\n");
764 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
767 clk_enable(sinfo
->bus_clk
);
768 clk_enable(sinfo
->lcdc_clk
);
771 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
774 clk_disable(sinfo
->bus_clk
);
775 clk_disable(sinfo
->lcdc_clk
);
779 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
781 struct device
*dev
= &pdev
->dev
;
782 struct fb_info
*info
;
783 struct atmel_lcdfb_info
*sinfo
;
784 struct atmel_lcdfb_info
*pdata_sinfo
;
785 struct fb_videomode fbmode
;
786 struct resource
*regs
= NULL
;
787 struct resource
*map
= NULL
;
790 dev_dbg(dev
, "%s BEGIN\n", __func__
);
793 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
795 dev_err(dev
, "cannot allocate memory\n");
801 if (dev
->platform_data
) {
802 pdata_sinfo
= (struct atmel_lcdfb_info
*)dev
->platform_data
;
803 sinfo
->default_bpp
= pdata_sinfo
->default_bpp
;
804 sinfo
->default_dmacon
= pdata_sinfo
->default_dmacon
;
805 sinfo
->default_lcdcon2
= pdata_sinfo
->default_lcdcon2
;
806 sinfo
->default_monspecs
= pdata_sinfo
->default_monspecs
;
807 sinfo
->atmel_lcdfb_power_control
= pdata_sinfo
->atmel_lcdfb_power_control
;
808 sinfo
->guard_time
= pdata_sinfo
->guard_time
;
809 sinfo
->smem_len
= pdata_sinfo
->smem_len
;
810 sinfo
->lcdcon_is_backlight
= pdata_sinfo
->lcdcon_is_backlight
;
811 sinfo
->lcd_wiring_mode
= pdata_sinfo
->lcd_wiring_mode
;
813 dev_err(dev
, "cannot get default configuration\n");
819 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
820 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
821 info
->pseudo_palette
= sinfo
->pseudo_palette
;
822 info
->fbops
= &atmel_lcdfb_ops
;
824 memcpy(&info
->monspecs
, sinfo
->default_monspecs
, sizeof(info
->monspecs
));
825 info
->fix
= atmel_lcdfb_fix
;
827 /* Enable LCDC Clocks */
828 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
829 || cpu_is_at32ap7000()) {
830 sinfo
->bus_clk
= clk_get(dev
, "hck1");
831 if (IS_ERR(sinfo
->bus_clk
)) {
832 ret
= PTR_ERR(sinfo
->bus_clk
);
836 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
837 if (IS_ERR(sinfo
->lcdc_clk
)) {
838 ret
= PTR_ERR(sinfo
->lcdc_clk
);
841 atmel_lcdfb_start_clock(sinfo
);
843 ret
= fb_find_mode(&info
->var
, info
, NULL
, info
->monspecs
.modedb
,
844 info
->monspecs
.modedb_len
, info
->monspecs
.modedb
,
847 dev_err(dev
, "no suitable video mode found\n");
852 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
854 dev_err(dev
, "resources unusable\n");
859 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
860 if (sinfo
->irq_base
< 0) {
861 dev_err(dev
, "unable to get irq\n");
862 ret
= sinfo
->irq_base
;
866 /* Initialize video memory */
867 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
869 /* use a pre-allocated memory buffer */
870 info
->fix
.smem_start
= map
->start
;
871 info
->fix
.smem_len
= map
->end
- map
->start
+ 1;
872 if (!request_mem_region(info
->fix
.smem_start
,
873 info
->fix
.smem_len
, pdev
->name
)) {
878 info
->screen_base
= ioremap(info
->fix
.smem_start
, info
->fix
.smem_len
);
879 if (!info
->screen_base
)
883 * Don't clear the framebuffer -- someone may have set
887 /* alocate memory buffer */
888 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
890 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
896 info
->fix
.mmio_start
= regs
->start
;
897 info
->fix
.mmio_len
= regs
->end
- regs
->start
+ 1;
899 if (!request_mem_region(info
->fix
.mmio_start
,
900 info
->fix
.mmio_len
, pdev
->name
)) {
905 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
907 dev_err(dev
, "cannot map LCDC registers\n");
911 /* Initialize PWM for contrast or backlight ("off") */
912 init_contrast(sinfo
);
915 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
917 dev_err(dev
, "request_irq failed: %d\n", ret
);
921 /* Some operations on the LCDC might sleep and
922 * require a preemptible task context */
923 INIT_WORK(&sinfo
->task
, atmel_lcdfb_task
);
925 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
927 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
928 goto unregister_irqs
;
932 * This makes sure that our colour bitfield
933 * descriptors are correctly initialised.
935 atmel_lcdfb_check_var(&info
->var
, info
);
937 ret
= fb_set_var(info
, &info
->var
);
939 dev_warn(dev
, "unable to set display parameters\n");
943 dev_set_drvdata(dev
, info
);
946 * Tell the world that we're ready to go
948 ret
= register_framebuffer(info
);
950 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
954 /* add selected videomode to modelist */
955 fb_var_to_videomode(&fbmode
, &info
->var
);
956 fb_add_videomode(&fbmode
, &info
->modelist
);
958 /* Power up the LCDC screen */
959 if (sinfo
->atmel_lcdfb_power_control
)
960 sinfo
->atmel_lcdfb_power_control(1);
962 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
963 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
968 dev_set_drvdata(dev
, NULL
);
970 fb_dealloc_cmap(&info
->cmap
);
972 cancel_work_sync(&sinfo
->task
);
973 free_irq(sinfo
->irq_base
, info
);
975 exit_backlight(sinfo
);
976 iounmap(sinfo
->mmio
);
978 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
981 iounmap(info
->screen_base
);
983 atmel_lcdfb_free_video_memory(sinfo
);
987 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
989 atmel_lcdfb_stop_clock(sinfo
);
990 clk_put(sinfo
->lcdc_clk
);
993 clk_put(sinfo
->bus_clk
);
995 framebuffer_release(info
);
997 dev_dbg(dev
, "%s FAILED\n", __func__
);
1001 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
1003 struct device
*dev
= &pdev
->dev
;
1004 struct fb_info
*info
= dev_get_drvdata(dev
);
1005 struct atmel_lcdfb_info
*sinfo
;
1007 if (!info
|| !info
->par
)
1011 cancel_work_sync(&sinfo
->task
);
1012 exit_backlight(sinfo
);
1013 if (sinfo
->atmel_lcdfb_power_control
)
1014 sinfo
->atmel_lcdfb_power_control(0);
1015 unregister_framebuffer(info
);
1016 atmel_lcdfb_stop_clock(sinfo
);
1017 clk_put(sinfo
->lcdc_clk
);
1019 clk_put(sinfo
->bus_clk
);
1020 fb_dealloc_cmap(&info
->cmap
);
1021 free_irq(sinfo
->irq_base
, info
);
1022 iounmap(sinfo
->mmio
);
1023 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1024 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
1025 iounmap(info
->screen_base
);
1026 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1028 atmel_lcdfb_free_video_memory(sinfo
);
1031 dev_set_drvdata(dev
, NULL
);
1032 framebuffer_release(info
);
1039 static int atmel_lcdfb_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1041 struct fb_info
*info
= platform_get_drvdata(pdev
);
1042 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1045 * We don't want to handle interrupts while the clock is
1046 * stopped. It may take forever.
1048 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
1050 sinfo
->saved_lcdcon
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
1051 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, 0);
1052 if (sinfo
->atmel_lcdfb_power_control
)
1053 sinfo
->atmel_lcdfb_power_control(0);
1055 atmel_lcdfb_stop(sinfo
);
1056 atmel_lcdfb_stop_clock(sinfo
);
1061 static int atmel_lcdfb_resume(struct platform_device
*pdev
)
1063 struct fb_info
*info
= platform_get_drvdata(pdev
);
1064 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1066 atmel_lcdfb_start_clock(sinfo
);
1067 atmel_lcdfb_start(sinfo
);
1068 if (sinfo
->atmel_lcdfb_power_control
)
1069 sinfo
->atmel_lcdfb_power_control(1);
1070 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, sinfo
->saved_lcdcon
);
1072 /* Enable FIFO & DMA errors */
1073 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
1074 | ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
1080 #define atmel_lcdfb_suspend NULL
1081 #define atmel_lcdfb_resume NULL
1084 static struct platform_driver atmel_lcdfb_driver
= {
1085 .remove
= __exit_p(atmel_lcdfb_remove
),
1086 .suspend
= atmel_lcdfb_suspend
,
1087 .resume
= atmel_lcdfb_resume
,
1090 .name
= "atmel_lcdfb",
1091 .owner
= THIS_MODULE
,
1095 static int __init
atmel_lcdfb_init(void)
1097 return platform_driver_probe(&atmel_lcdfb_driver
, atmel_lcdfb_probe
);
1100 static void __exit
atmel_lcdfb_exit(void)
1102 platform_driver_unregister(&atmel_lcdfb_driver
);
1105 module_init(atmel_lcdfb_init
);
1106 module_exit(atmel_lcdfb_exit
);
1108 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1109 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1110 MODULE_LICENSE("GPL");