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hwmon: (w83795) Rework beep_enable implementation
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / hwmon / w83795.c
blobfd70a7b4629536e34422a2a31471c62b8acf3ea2
1 /*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/i2c.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/err.h>
35 #include <linux/mutex.h>
36 #include <linux/delay.h>
37
38 /* Addresses to scan */
39 static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
41 };
42
43
44 static int reset;
45 module_param(reset, bool, 0);
46 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49 #define W83795_REG_BANKSEL 0x00
50 #define W83795_REG_VENDORID 0xfd
51 #define W83795_REG_CHIPID 0xfe
52 #define W83795_REG_DEVICEID 0xfb
53 #define W83795_REG_DEVICEID_A 0xff
54
55 #define W83795_REG_I2C_ADDR 0xfc
56 #define W83795_REG_CONFIG 0x01
57 #define W83795_REG_CONFIG_CONFIG48 0x04
58 #define W83795_REG_CONFIG_START 0x01
59
60 /* Multi-Function Pin Ctrl Registers */
61 #define W83795_REG_VOLT_CTRL1 0x02
62 #define W83795_REG_VOLT_CTRL2 0x03
63 #define W83795_REG_TEMP_CTRL1 0x04
64 #define W83795_REG_TEMP_CTRL2 0x05
65 #define W83795_REG_FANIN_CTRL1 0x06
66 #define W83795_REG_FANIN_CTRL2 0x07
67 #define W83795_REG_VMIGB_CTRL 0x08
68
69 #define TEMP_CTRL_DISABLE 0
70 #define TEMP_CTRL_TD 1
71 #define TEMP_CTRL_VSEN 2
72 #define TEMP_CTRL_TR 3
73 #define TEMP_CTRL_SHIFT 4
74 #define TEMP_CTRL_HASIN_SHIFT 5
75 /* temp mode may effect VSEN17-12 (in20-15) */
76 static const u16 W83795_REG_TEMP_CTRL[][6] = {
77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
84 };
85
86 #define TEMP_READ 0
87 #define TEMP_CRIT 1
88 #define TEMP_CRIT_HYST 2
89 #define TEMP_WARN 3
90 #define TEMP_WARN_HYST 4
91 /* only crit and crit_hyst affect real-time alarm status
92 * current crit crit_hyst warn warn_hyst */
93 static const u16 W83795_REG_TEMP[][5] = {
94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
100 };
101
102 #define IN_READ 0
103 #define IN_MAX 1
104 #define IN_LOW 2
105 static const u16 W83795_REG_IN[][3] = {
106 /* Current, HL, LL */
107 {0x10, 0x70, 0x71}, /* VSEN1 */
108 {0x11, 0x72, 0x73}, /* VSEN2 */
109 {0x12, 0x74, 0x75}, /* VSEN3 */
110 {0x13, 0x76, 0x77}, /* VSEN4 */
111 {0x14, 0x78, 0x79}, /* VSEN5 */
112 {0x15, 0x7a, 0x7b}, /* VSEN6 */
113 {0x16, 0x7c, 0x7d}, /* VSEN7 */
114 {0x17, 0x7e, 0x7f}, /* VSEN8 */
115 {0x18, 0x80, 0x81}, /* VSEN9 */
116 {0x19, 0x82, 0x83}, /* VSEN10 */
117 {0x1A, 0x84, 0x85}, /* VSEN11 */
118 {0x1B, 0x86, 0x87}, /* VTT */
119 {0x1C, 0x88, 0x89}, /* 3VDD */
120 {0x1D, 0x8a, 0x8b}, /* 3VSB */
121 {0x1E, 0x8c, 0x8d}, /* VBAT */
122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
123 {0x20, 0xaa, 0xab}, /* VSEN13 */
124 {0x21, 0x96, 0x97}, /* VSEN14 */
125 {0x22, 0x9a, 0x9b}, /* VSEN15 */
126 {0x23, 0x9e, 0x9f}, /* VSEN16 */
127 {0x24, 0xa2, 0xa3}, /* VSEN17 */
128 };
129 #define W83795_REG_VRLSB 0x3C
130 #define VRLSB_SHIFT 6
131
132 static const u8 W83795_REG_IN_HL_LSB[] = {
133 0x8e, /* VSEN1-4 */
134 0x90, /* VSEN5-8 */
135 0x92, /* VSEN9-11 */
136 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
137 0xa8, /* VSEN12 */
138 0xac, /* VSEN13 */
139 0x98, /* VSEN14 */
140 0x9c, /* VSEN15 */
141 0xa0, /* VSEN16 */
142 0xa4, /* VSEN17 */
143 };
144
145 #define IN_LSB_REG(index, type) \
146 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
147 : (W83795_REG_IN_HL_LSB[(index)] + 1))
148
149 #define IN_LSB_REG_NUM 10
150
151 #define IN_LSB_SHIFT 0
152 #define IN_LSB_IDX 1
153 static const u8 IN_LSB_SHIFT_IDX[][2] = {
154 /* High/Low LSB shift, LSB No. */
155 {0x00, 0x00}, /* VSEN1 */
156 {0x02, 0x00}, /* VSEN2 */
157 {0x04, 0x00}, /* VSEN3 */
158 {0x06, 0x00}, /* VSEN4 */
159 {0x00, 0x01}, /* VSEN5 */
160 {0x02, 0x01}, /* VSEN6 */
161 {0x04, 0x01}, /* VSEN7 */
162 {0x06, 0x01}, /* VSEN8 */
163 {0x00, 0x02}, /* VSEN9 */
164 {0x02, 0x02}, /* VSEN10 */
165 {0x04, 0x02}, /* VSEN11 */
166 {0x00, 0x03}, /* VTT */
167 {0x02, 0x03}, /* 3VDD */
168 {0x04, 0x03}, /* 3VSB */
169 {0x06, 0x03}, /* VBAT */
170 {0x06, 0x04}, /* VSEN12 */
171 {0x06, 0x05}, /* VSEN13 */
172 {0x06, 0x06}, /* VSEN14 */
173 {0x06, 0x07}, /* VSEN15 */
174 {0x06, 0x08}, /* VSEN16 */
175 {0x06, 0x09}, /* VSEN17 */
176 };
177
178
179 /* 3VDD, 3VSB, VBAT * 0.006 */
180 #define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
181 #define REST_VLT_END 14 /* the 13th volt to 15th */
182
183 #define W83795_REG_FAN(index) (0x2E + (index))
184 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
185 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
186 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
187 (((index) % 1) ? 4 : 0)
188
189 #define W83795_REG_VID_CTRL 0x6A
190
191 #define ALARM_BEEP_REG_NUM 6
192 #define W83795_REG_ALARM(index) (0x41 + (index))
193 #define W83795_REG_BEEP(index) (0x50 + (index))
194
195 #define W83795_REG_CLR_CHASSIS 0x4D
196
197
198 #define W83795_REG_TEMP_NUM 6
199 #define W83795_REG_FCMS1 0x201
200 #define W83795_REG_FCMS2 0x208
201 #define W83795_REG_TFMR(index) (0x202 + (index))
202 #define W83795_REG_FOMC 0x20F
203
204 #define W83795_REG_TSS(index) (0x209 + (index))
205
206 #define PWM_OUTPUT 0
207 #define PWM_START 1
208 #define PWM_NONSTOP 2
209 #define PWM_STOP_TIME 3
210 #define PWM_FREQ 4
211 #define W83795_REG_PWM(index, nr) \
212 (((nr) == 0 ? 0x210 : \
213 (nr) == 1 ? 0x220 : \
214 (nr) == 2 ? 0x228 : \
215 (nr) == 3 ? 0x230 : 0x218) + (index))
216
217 #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
218 #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
219 #define W83795_REG_TFTS 0x250
220
221 #define TEMP_PWM_TTTI 0
222 #define TEMP_PWM_CTFS 1
223 #define TEMP_PWM_HCT 2
224 #define TEMP_PWM_HOT 3
225 #define W83795_REG_TTTI(index) (0x260 + (index))
226 #define W83795_REG_CTFS(index) (0x268 + (index))
227 #define W83795_REG_HT(index) (0x270 + (index))
228
229 #define SF4_TEMP 0
230 #define SF4_PWM 1
231 #define W83795_REG_SF4_TEMP(temp_num, index) \
232 (0x280 + 0x10 * (temp_num) + (index))
233 #define W83795_REG_SF4_PWM(temp_num, index) \
234 (0x288 + 0x10 * (temp_num) + (index))
235
236 #define W83795_REG_DTSC 0x301
237 #define W83795_REG_DTSE 0x302
238 #define W83795_REG_DTS(index) (0x26 + (index))
239 #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
240
241 #define DTS_CRIT 0
242 #define DTS_CRIT_HYST 1
243 #define DTS_WARN 2
244 #define DTS_WARN_HYST 3
245 #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
246
247 #define SETUP_PWM_DEFAULT 0
248 #define SETUP_PWM_UPTIME 1
249 #define SETUP_PWM_DOWNTIME 2
250 #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
251
252 static inline u16 in_from_reg(u8 index, u16 val)
253 {
254 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
255 return val * 6;
256 else
257 return val * 2;
258 }
259
260 static inline u16 in_to_reg(u8 index, u16 val)
261 {
262 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
263 return val / 6;
264 else
265 return val / 2;
266 }
267
268 static inline unsigned long fan_from_reg(u16 val)
269 {
270 if ((val == 0xfff) || (val == 0))
271 return 0;
272 return 1350000UL / val;
273 }
274
275 static inline u16 fan_to_reg(long rpm)
276 {
277 if (rpm <= 0)
278 return 0x0fff;
279 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
280 }
281
282 static inline unsigned long time_from_reg(u8 reg)
283 {
284 return reg * 100;
285 }
286
287 static inline u8 time_to_reg(unsigned long val)
288 {
289 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
290 }
291
292 static inline long temp_from_reg(s8 reg)
293 {
294 return reg * 1000;
295 }
296
297 static inline s8 temp_to_reg(long val, s8 min, s8 max)
298 {
299 return SENSORS_LIMIT(val / 1000, min, max);
300 }
301
302 static const u16 pwm_freq_cksel0[16] = {
303 1024, 512, 341, 256, 205, 171, 146, 128,
304 85, 64, 32, 16, 8, 4, 2, 1
305 };
306
307 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
308 {
309 unsigned long base_clock;
310
311 if (reg & 0x80) {
312 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
313 return base_clock / ((reg & 0x7f) + 1);
314 } else
315 return pwm_freq_cksel0[reg & 0x0f];
316 }
317
318 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
319 {
320 unsigned long base_clock;
321 u8 reg0, reg1;
322 unsigned long best0, best1;
323
324 /* Best fit for cksel = 0 */
325 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
326 if (val > (pwm_freq_cksel0[reg0] +
327 pwm_freq_cksel0[reg0 + 1]) / 2)
328 break;
329 }
330 if (val < 375) /* cksel = 1 can't beat this */
331 return reg0;
332 best0 = pwm_freq_cksel0[reg0];
333
334 /* Best fit for cksel = 1 */
335 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
336 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
337 best1 = base_clock / reg1;
338 reg1 = 0x80 | (reg1 - 1);
339
340 /* Choose the closest one */
341 if (abs(val - best0) > abs(val - best1))
342 return reg1;
343 else
344 return reg0;
345 }
346
347 enum chip_types {w83795g, w83795adg};
348
349 struct w83795_data {
350 struct device *hwmon_dev;
351 struct mutex update_lock;
352 unsigned long last_updated; /* In jiffies */
353 enum chip_types chip_type;
354
355 u8 bank;
356
357 u32 has_in; /* Enable monitor VIN or not */
358 u8 has_dyn_in; /* Only in2-0 can have this */
359 u16 in[21][3]; /* Register value, read/high/low */
360 u8 in_lsb[10][3]; /* LSB Register value, high/low */
361 u8 has_gain; /* has gain: in17-20 * 8 */
362
363 u16 has_fan; /* Enable fan14-1 or not */
364 u16 fan[14]; /* Register value combine */
365 u16 fan_min[14]; /* Register value combine */
366
367 u8 has_temp; /* Enable monitor temp6-1 or not */
368 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
369 u8 temp_read_vrlsb[6];
370 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
371 u8 temp_src[3]; /* Register value */
372
373 u8 enable_dts; /* Enable PECI and SB-TSI,
374 * bit 0: =1 enable, =0 disable,
375 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
376 u8 has_dts; /* Enable monitor DTS temp */
377 s8 dts[8]; /* Register value */
378 u8 dts_read_vrlsb[8]; /* Register value */
379 s8 dts_ext[4]; /* Register value */
380
381 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
382 * no config register, only affected by chip
383 * type */
384 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
385 * time, freq */
386 u16 clkin; /* CLKIN frequency in kHz */
387 u8 pwm_fcms[2]; /* Register value */
388 u8 pwm_tfmr[6]; /* Register value */
389 u8 pwm_fomc; /* Register value */
390
391 u16 target_speed[8]; /* Register value, target speed for speed
392 * cruise */
393 u8 tol_speed; /* tolerance of target speed */
394 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
395 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
396
397 u8 setup_pwm[3]; /* Register value */
398
399 u8 alarms[6]; /* Register value */
400 u8 beeps[6]; /* Register value */
401
402 char valid;
403 };
404
405 /*
406 * Hardware access
407 * We assume that nobdody can change the bank outside the driver.
408 */
409
410 /* Must be called with data->update_lock held, except during initialization */
411 static int w83795_set_bank(struct i2c_client *client, u8 bank)
412 {
413 struct w83795_data *data = i2c_get_clientdata(client);
414 int err;
415
416 /* If the same bank is already set, nothing to do */
417 if ((data->bank & 0x07) == bank)
418 return 0;
419
420 /* Change to new bank, preserve all other bits */
421 bank |= data->bank & ~0x07;
422 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
423 if (err < 0) {
424 dev_err(&client->dev,
425 "Failed to set bank to %d, err %d\n",
426 (int)bank, err);
427 return err;
428 }
429 data->bank = bank;
430
431 return 0;
432 }
433
434 /* Must be called with data->update_lock held, except during initialization */
435 static u8 w83795_read(struct i2c_client *client, u16 reg)
436 {
437 int err;
438
439 err = w83795_set_bank(client, reg >> 8);
440 if (err < 0)
441 return 0x00; /* Arbitrary */
442
443 err = i2c_smbus_read_byte_data(client, reg & 0xff);
444 if (err < 0) {
445 dev_err(&client->dev,
446 "Failed to read from register 0x%03x, err %d\n",
447 (int)reg, err);
448 return 0x00; /* Arbitrary */
449 }
450 return err;
451 }
452
453 /* Must be called with data->update_lock held, except during initialization */
454 static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
455 {
456 int err;
457
458 err = w83795_set_bank(client, reg >> 8);
459 if (err < 0)
460 return err;
461
462 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
463 if (err < 0)
464 dev_err(&client->dev,
465 "Failed to write to register 0x%03x, err %d\n",
466 (int)reg, err);
467 return err;
468 }
469
470 static struct w83795_data *w83795_update_device(struct device *dev)
471 {
472 struct i2c_client *client = to_i2c_client(dev);
473 struct w83795_data *data = i2c_get_clientdata(client);
474 u16 tmp;
475 int i;
476
477 mutex_lock(&data->update_lock);
478
479 if (!(time_after(jiffies, data->last_updated + HZ * 2)
480 || !data->valid))
481 goto END;
482
483 /* Update the voltages value */
484 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
485 if (!(data->has_in & (1 << i)))
486 continue;
487 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
488 tmp |= (w83795_read(client, W83795_REG_VRLSB)
489 >> VRLSB_SHIFT) & 0x03;
490 data->in[i][IN_READ] = tmp;
491 }
492
493 /* in0-2 can have dynamic limits (W83795G only) */
494 if (data->has_dyn_in) {
495 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
496 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
497
498 for (i = 0; i < 3; i++) {
499 if (!(data->has_dyn_in & (1 << i)))
500 continue;
501 data->in[i][IN_MAX] =
502 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
503 data->in[i][IN_LOW] =
504 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
505 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
506 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
507 }
508 }
509
510 /* Update fan */
511 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
512 if (!(data->has_fan & (1 << i)))
513 continue;
514 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
515 data->fan[i] |=
516 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
517 }
518
519 /* Update temperature */
520 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
521 /* even stop monitor, register still keep value, just read out
522 * it */
523 if (!(data->has_temp & (1 << i))) {
524 data->temp[i][TEMP_READ] = 0;
525 data->temp_read_vrlsb[i] = 0;
526 continue;
527 }
528 data->temp[i][TEMP_READ] =
529 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
530 data->temp_read_vrlsb[i] =
531 w83795_read(client, W83795_REG_VRLSB);
532 }
533
534 /* Update dts temperature */
535 if (data->enable_dts != 0) {
536 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
537 if (!(data->has_dts & (1 << i)))
538 continue;
539 data->dts[i] =
540 w83795_read(client, W83795_REG_DTS(i));
541 data->dts_read_vrlsb[i] =
542 w83795_read(client, W83795_REG_VRLSB);
543 }
544 }
545
546 /* Update pwm output */
547 for (i = 0; i < data->has_pwm; i++) {
548 data->pwm[i][PWM_OUTPUT] =
549 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
550 }
551
552 /* update alarm */
553 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
554 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
555
556 data->last_updated = jiffies;
557 data->valid = 1;
558
559 END:
560 mutex_unlock(&data->update_lock);
561 return data;
562 }
563
564 /*
565 * Sysfs attributes
566 */
567
568 #define ALARM_STATUS 0
569 #define BEEP_ENABLE 1
570 static ssize_t
571 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
572 {
573 struct w83795_data *data = w83795_update_device(dev);
574 struct sensor_device_attribute_2 *sensor_attr =
575 to_sensor_dev_attr_2(attr);
576 int nr = sensor_attr->nr;
577 int index = sensor_attr->index >> 3;
578 int bit = sensor_attr->index & 0x07;
579 u8 val;
580
581 if (ALARM_STATUS == nr) {
582 val = (data->alarms[index] >> (bit)) & 1;
583 } else { /* BEEP_ENABLE */
584 val = (data->beeps[index] >> (bit)) & 1;
585 }
586
587 return sprintf(buf, "%u\n", val);
588 }
589
590 static ssize_t
591 store_beep(struct device *dev, struct device_attribute *attr,
592 const char *buf, size_t count)
593 {
594 struct i2c_client *client = to_i2c_client(dev);
595 struct w83795_data *data = i2c_get_clientdata(client);
596 struct sensor_device_attribute_2 *sensor_attr =
597 to_sensor_dev_attr_2(attr);
598 int index = sensor_attr->index >> 3;
599 int shift = sensor_attr->index & 0x07;
600 u8 beep_bit = 1 << shift;
601 unsigned long val;
602
603 if (strict_strtoul(buf, 10, &val) < 0)
604 return -EINVAL;
605 if (val != 0 && val != 1)
606 return -EINVAL;
607
608 mutex_lock(&data->update_lock);
609 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
610 data->beeps[index] &= ~beep_bit;
611 data->beeps[index] |= val << shift;
612 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
613 mutex_unlock(&data->update_lock);
614
615 return count;
616 }
617
618 /* Write any value to clear chassis alarm */
619 static ssize_t
620 store_chassis_clear(struct device *dev,
621 struct device_attribute *attr, const char *buf,
622 size_t count)
623 {
624 struct i2c_client *client = to_i2c_client(dev);
625 struct w83795_data *data = i2c_get_clientdata(client);
626 u8 val;
627
628 mutex_lock(&data->update_lock);
629 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
630 val |= 0x80;
631 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
632 mutex_unlock(&data->update_lock);
633 return count;
634 }
635
636 #define FAN_INPUT 0
637 #define FAN_MIN 1
638 static ssize_t
639 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
640 {
641 struct sensor_device_attribute_2 *sensor_attr =
642 to_sensor_dev_attr_2(attr);
643 int nr = sensor_attr->nr;
644 int index = sensor_attr->index;
645 struct w83795_data *data = w83795_update_device(dev);
646 u16 val;
647
648 if (FAN_INPUT == nr)
649 val = data->fan[index] & 0x0fff;
650 else
651 val = data->fan_min[index] & 0x0fff;
652
653 return sprintf(buf, "%lu\n", fan_from_reg(val));
654 }
655
656 static ssize_t
657 store_fan_min(struct device *dev, struct device_attribute *attr,
658 const char *buf, size_t count)
659 {
660 struct sensor_device_attribute_2 *sensor_attr =
661 to_sensor_dev_attr_2(attr);
662 int index = sensor_attr->index;
663 struct i2c_client *client = to_i2c_client(dev);
664 struct w83795_data *data = i2c_get_clientdata(client);
665 unsigned long val;
666
667 if (strict_strtoul(buf, 10, &val))
668 return -EINVAL;
669 val = fan_to_reg(val);
670
671 mutex_lock(&data->update_lock);
672 data->fan_min[index] = val;
673 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
674 val &= 0x0f;
675 if (index % 1) {
676 val <<= 4;
677 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
678 & 0x0f;
679 } else {
680 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
681 & 0xf0;
682 }
683 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
684 mutex_unlock(&data->update_lock);
685
686 return count;
687 }
688
689 static ssize_t
690 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
691 {
692 struct w83795_data *data = w83795_update_device(dev);
693 struct sensor_device_attribute_2 *sensor_attr =
694 to_sensor_dev_attr_2(attr);
695 int nr = sensor_attr->nr;
696 int index = sensor_attr->index;
697 unsigned int val;
698
699 switch (nr) {
700 case PWM_STOP_TIME:
701 val = time_from_reg(data->pwm[index][nr]);
702 break;
703 case PWM_FREQ:
704 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
705 break;
706 default:
707 val = data->pwm[index][nr];
708 break;
709 }
710
711 return sprintf(buf, "%u\n", val);
712 }
713
714 static ssize_t
715 store_pwm(struct device *dev, struct device_attribute *attr,
716 const char *buf, size_t count)
717 {
718 struct i2c_client *client = to_i2c_client(dev);
719 struct w83795_data *data = i2c_get_clientdata(client);
720 struct sensor_device_attribute_2 *sensor_attr =
721 to_sensor_dev_attr_2(attr);
722 int nr = sensor_attr->nr;
723 int index = sensor_attr->index;
724 unsigned long val;
725
726 if (strict_strtoul(buf, 10, &val) < 0)
727 return -EINVAL;
728
729 mutex_lock(&data->update_lock);
730 switch (nr) {
731 case PWM_STOP_TIME:
732 val = time_to_reg(val);
733 break;
734 case PWM_FREQ:
735 val = pwm_freq_to_reg(val, data->clkin);
736 break;
737 default:
738 val = SENSORS_LIMIT(val, 0, 0xff);
739 break;
740 }
741 w83795_write(client, W83795_REG_PWM(index, nr), val);
742 data->pwm[index][nr] = val;
743 mutex_unlock(&data->update_lock);
744 return count;
745 }
746
747 static ssize_t
748 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
749 {
750 struct sensor_device_attribute_2 *sensor_attr =
751 to_sensor_dev_attr_2(attr);
752 struct i2c_client *client = to_i2c_client(dev);
753 struct w83795_data *data = i2c_get_clientdata(client);
754 int index = sensor_attr->index;
755 u8 tmp;
756
757 if (1 == (data->pwm_fcms[0] & (1 << index))) {
758 tmp = 2;
759 goto out;
760 }
761 for (tmp = 0; tmp < 6; tmp++) {
762 if (data->pwm_tfmr[tmp] & (1 << index)) {
763 tmp = 3;
764 goto out;
765 }
766 }
767 if (data->pwm_fomc & (1 << index))
768 tmp = 0;
769 else
770 tmp = 1;
771
772 out:
773 return sprintf(buf, "%u\n", tmp);
774 }
775
776 static ssize_t
777 store_pwm_enable(struct device *dev, struct device_attribute *attr,
778 const char *buf, size_t count)
779 {
780 struct i2c_client *client = to_i2c_client(dev);
781 struct w83795_data *data = i2c_get_clientdata(client);
782 struct sensor_device_attribute_2 *sensor_attr =
783 to_sensor_dev_attr_2(attr);
784 int index = sensor_attr->index;
785 unsigned long val;
786 int i;
787
788 if (strict_strtoul(buf, 10, &val) < 0)
789 return -EINVAL;
790 if (val > 2)
791 return -EINVAL;
792
793 mutex_lock(&data->update_lock);
794 switch (val) {
795 case 0:
796 case 1:
797 data->pwm_fcms[0] &= ~(1 << index);
798 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
799 for (i = 0; i < 6; i++) {
800 data->pwm_tfmr[i] &= ~(1 << index);
801 w83795_write(client, W83795_REG_TFMR(i),
802 data->pwm_tfmr[i]);
803 }
804 data->pwm_fomc |= 1 << index;
805 data->pwm_fomc ^= val << index;
806 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
807 break;
808 case 2:
809 data->pwm_fcms[0] |= (1 << index);
810 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
811 break;
812 }
813 mutex_unlock(&data->update_lock);
814 return count;
815 }
816
817 static ssize_t
818 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
819 {
820 struct sensor_device_attribute_2 *sensor_attr =
821 to_sensor_dev_attr_2(attr);
822 struct i2c_client *client = to_i2c_client(dev);
823 struct w83795_data *data = i2c_get_clientdata(client);
824 int index = sensor_attr->index;
825 u8 val = index / 2;
826 u8 tmp = data->temp_src[val];
827
828 if (index % 1)
829 val = 4;
830 else
831 val = 0;
832 tmp >>= val;
833 tmp &= 0x0f;
834
835 return sprintf(buf, "%u\n", tmp);
836 }
837
838 static ssize_t
839 store_temp_src(struct device *dev, struct device_attribute *attr,
840 const char *buf, size_t count)
841 {
842 struct i2c_client *client = to_i2c_client(dev);
843 struct w83795_data *data = i2c_get_clientdata(client);
844 struct sensor_device_attribute_2 *sensor_attr =
845 to_sensor_dev_attr_2(attr);
846 int index = sensor_attr->index;
847 unsigned long tmp;
848 u8 val = index / 2;
849
850 if (strict_strtoul(buf, 10, &tmp) < 0)
851 return -EINVAL;
852 tmp = SENSORS_LIMIT(tmp, 0, 15);
853
854 mutex_lock(&data->update_lock);
855 if (index % 1) {
856 tmp <<= 4;
857 data->temp_src[val] &= 0x0f;
858 } else {
859 data->temp_src[val] &= 0xf0;
860 }
861 data->temp_src[val] |= tmp;
862 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
863 mutex_unlock(&data->update_lock);
864
865 return count;
866 }
867
868 #define TEMP_PWM_ENABLE 0
869 #define TEMP_PWM_FAN_MAP 1
870 static ssize_t
871 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
872 char *buf)
873 {
874 struct i2c_client *client = to_i2c_client(dev);
875 struct w83795_data *data = i2c_get_clientdata(client);
876 struct sensor_device_attribute_2 *sensor_attr =
877 to_sensor_dev_attr_2(attr);
878 int nr = sensor_attr->nr;
879 int index = sensor_attr->index;
880 u8 tmp = 0xff;
881
882 switch (nr) {
883 case TEMP_PWM_ENABLE:
884 tmp = (data->pwm_fcms[1] >> index) & 1;
885 if (tmp)
886 tmp = 4;
887 else
888 tmp = 3;
889 break;
890 case TEMP_PWM_FAN_MAP:
891 tmp = data->pwm_tfmr[index];
892 break;
893 }
894
895 return sprintf(buf, "%u\n", tmp);
896 }
897
898 static ssize_t
899 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
900 const char *buf, size_t count)
901 {
902 struct i2c_client *client = to_i2c_client(dev);
903 struct w83795_data *data = i2c_get_clientdata(client);
904 struct sensor_device_attribute_2 *sensor_attr =
905 to_sensor_dev_attr_2(attr);
906 int nr = sensor_attr->nr;
907 int index = sensor_attr->index;
908 unsigned long tmp;
909
910 if (strict_strtoul(buf, 10, &tmp) < 0)
911 return -EINVAL;
912
913 switch (nr) {
914 case TEMP_PWM_ENABLE:
915 if ((tmp != 3) && (tmp != 4))
916 return -EINVAL;
917 tmp -= 3;
918 mutex_lock(&data->update_lock);
919 data->pwm_fcms[1] &= ~(1 << index);
920 data->pwm_fcms[1] |= tmp << index;
921 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
922 mutex_unlock(&data->update_lock);
923 break;
924 case TEMP_PWM_FAN_MAP:
925 mutex_lock(&data->update_lock);
926 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
927 w83795_write(client, W83795_REG_TFMR(index), tmp);
928 data->pwm_tfmr[index] = tmp;
929 mutex_unlock(&data->update_lock);
930 break;
931 }
932 return count;
933 }
934
935 #define FANIN_TARGET 0
936 #define FANIN_TOL 1
937 static ssize_t
938 show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
939 {
940 struct i2c_client *client = to_i2c_client(dev);
941 struct w83795_data *data = i2c_get_clientdata(client);
942 struct sensor_device_attribute_2 *sensor_attr =
943 to_sensor_dev_attr_2(attr);
944 int nr = sensor_attr->nr;
945 int index = sensor_attr->index;
946 u16 tmp = 0;
947
948 switch (nr) {
949 case FANIN_TARGET:
950 tmp = fan_from_reg(data->target_speed[index]);
951 break;
952 case FANIN_TOL:
953 tmp = data->tol_speed;
954 break;
955 }
956
957 return sprintf(buf, "%u\n", tmp);
958 }
959
960 static ssize_t
961 store_fanin(struct device *dev, struct device_attribute *attr,
962 const char *buf, size_t count)
963 {
964 struct i2c_client *client = to_i2c_client(dev);
965 struct w83795_data *data = i2c_get_clientdata(client);
966 struct sensor_device_attribute_2 *sensor_attr =
967 to_sensor_dev_attr_2(attr);
968 int nr = sensor_attr->nr;
969 int index = sensor_attr->index;
970 unsigned long val;
971
972 if (strict_strtoul(buf, 10, &val) < 0)
973 return -EINVAL;
974
975 mutex_lock(&data->update_lock);
976 switch (nr) {
977 case FANIN_TARGET:
978 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
979 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
980 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
981 data->target_speed[index] = val;
982 break;
983 case FANIN_TOL:
984 val = SENSORS_LIMIT(val, 0, 0x3f);
985 w83795_write(client, W83795_REG_TFTS, val);
986 data->tol_speed = val;
987 break;
988 }
989 mutex_unlock(&data->update_lock);
990
991 return count;
992 }
993
994
995 static ssize_t
996 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
997 {
998 struct i2c_client *client = to_i2c_client(dev);
999 struct w83795_data *data = i2c_get_clientdata(client);
1000 struct sensor_device_attribute_2 *sensor_attr =
1001 to_sensor_dev_attr_2(attr);
1002 int nr = sensor_attr->nr;
1003 int index = sensor_attr->index;
1004 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1005
1006 return sprintf(buf, "%ld\n", tmp);
1007 }
1008
1009 static ssize_t
1010 store_temp_pwm(struct device *dev, struct device_attribute *attr,
1011 const char *buf, size_t count)
1012 {
1013 struct i2c_client *client = to_i2c_client(dev);
1014 struct w83795_data *data = i2c_get_clientdata(client);
1015 struct sensor_device_attribute_2 *sensor_attr =
1016 to_sensor_dev_attr_2(attr);
1017 int nr = sensor_attr->nr;
1018 int index = sensor_attr->index;
1019 unsigned long val;
1020 u8 tmp;
1021
1022 if (strict_strtoul(buf, 10, &val) < 0)
1023 return -EINVAL;
1024 val /= 1000;
1025
1026 mutex_lock(&data->update_lock);
1027 switch (nr) {
1028 case TEMP_PWM_TTTI:
1029 val = SENSORS_LIMIT(val, 0, 0x7f);
1030 w83795_write(client, W83795_REG_TTTI(index), val);
1031 break;
1032 case TEMP_PWM_CTFS:
1033 val = SENSORS_LIMIT(val, 0, 0x7f);
1034 w83795_write(client, W83795_REG_CTFS(index), val);
1035 break;
1036 case TEMP_PWM_HCT:
1037 val = SENSORS_LIMIT(val, 0, 0x0f);
1038 tmp = w83795_read(client, W83795_REG_HT(index));
1039 tmp &= 0x0f;
1040 tmp |= (val << 4) & 0xf0;
1041 w83795_write(client, W83795_REG_HT(index), tmp);
1042 break;
1043 case TEMP_PWM_HOT:
1044 val = SENSORS_LIMIT(val, 0, 0x0f);
1045 tmp = w83795_read(client, W83795_REG_HT(index));
1046 tmp &= 0xf0;
1047 tmp |= val & 0x0f;
1048 w83795_write(client, W83795_REG_HT(index), tmp);
1049 break;
1050 }
1051 data->pwm_temp[index][nr] = val;
1052 mutex_unlock(&data->update_lock);
1053
1054 return count;
1055 }
1056
1057 static ssize_t
1058 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1059 {
1060 struct i2c_client *client = to_i2c_client(dev);
1061 struct w83795_data *data = i2c_get_clientdata(client);
1062 struct sensor_device_attribute_2 *sensor_attr =
1063 to_sensor_dev_attr_2(attr);
1064 int nr = sensor_attr->nr;
1065 int index = sensor_attr->index;
1066
1067 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1068 }
1069
1070 static ssize_t
1071 store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1072 const char *buf, size_t count)
1073 {
1074 struct i2c_client *client = to_i2c_client(dev);
1075 struct w83795_data *data = i2c_get_clientdata(client);
1076 struct sensor_device_attribute_2 *sensor_attr =
1077 to_sensor_dev_attr_2(attr);
1078 int nr = sensor_attr->nr;
1079 int index = sensor_attr->index;
1080 unsigned long val;
1081
1082 if (strict_strtoul(buf, 10, &val) < 0)
1083 return -EINVAL;
1084
1085 mutex_lock(&data->update_lock);
1086 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1087 data->sf4_reg[index][SF4_PWM][nr] = val;
1088 mutex_unlock(&data->update_lock);
1089
1090 return count;
1091 }
1092
1093 static ssize_t
1094 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1095 {
1096 struct i2c_client *client = to_i2c_client(dev);
1097 struct w83795_data *data = i2c_get_clientdata(client);
1098 struct sensor_device_attribute_2 *sensor_attr =
1099 to_sensor_dev_attr_2(attr);
1100 int nr = sensor_attr->nr;
1101 int index = sensor_attr->index;
1102
1103 return sprintf(buf, "%u\n",
1104 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1105 }
1106
1107 static ssize_t
1108 store_sf4_temp(struct device *dev, struct device_attribute *attr,
1109 const char *buf, size_t count)
1110 {
1111 struct i2c_client *client = to_i2c_client(dev);
1112 struct w83795_data *data = i2c_get_clientdata(client);
1113 struct sensor_device_attribute_2 *sensor_attr =
1114 to_sensor_dev_attr_2(attr);
1115 int nr = sensor_attr->nr;
1116 int index = sensor_attr->index;
1117 unsigned long val;
1118
1119 if (strict_strtoul(buf, 10, &val) < 0)
1120 return -EINVAL;
1121 val /= 1000;
1122
1123 mutex_lock(&data->update_lock);
1124 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1125 data->sf4_reg[index][SF4_TEMP][nr] = val;
1126 mutex_unlock(&data->update_lock);
1127
1128 return count;
1129 }
1130
1131
1132 static ssize_t
1133 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1134 {
1135 struct sensor_device_attribute_2 *sensor_attr =
1136 to_sensor_dev_attr_2(attr);
1137 int nr = sensor_attr->nr;
1138 int index = sensor_attr->index;
1139 struct w83795_data *data = w83795_update_device(dev);
1140 long temp = temp_from_reg(data->temp[index][nr]);
1141
1142 if (TEMP_READ == nr)
1143 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
1144 * 250;
1145 return sprintf(buf, "%ld\n", temp);
1146 }
1147
1148 static ssize_t
1149 store_temp(struct device *dev, struct device_attribute *attr,
1150 const char *buf, size_t count)
1151 {
1152 struct sensor_device_attribute_2 *sensor_attr =
1153 to_sensor_dev_attr_2(attr);
1154 int nr = sensor_attr->nr;
1155 int index = sensor_attr->index;
1156 struct i2c_client *client = to_i2c_client(dev);
1157 struct w83795_data *data = i2c_get_clientdata(client);
1158 long tmp;
1159
1160 if (strict_strtol(buf, 10, &tmp) < 0)
1161 return -EINVAL;
1162
1163 mutex_lock(&data->update_lock);
1164 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1165 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1166 mutex_unlock(&data->update_lock);
1167 return count;
1168 }
1169
1170
1171 static ssize_t
1172 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1173 {
1174 struct i2c_client *client = to_i2c_client(dev);
1175 struct w83795_data *data = i2c_get_clientdata(client);
1176 struct sensor_device_attribute_2 *sensor_attr =
1177 to_sensor_dev_attr_2(attr);
1178 int index = sensor_attr->index;
1179 u8 tmp;
1180
1181 if (data->enable_dts == 0)
1182 return sprintf(buf, "%d\n", 0);
1183
1184 if ((data->has_dts >> index) & 0x01) {
1185 if (data->enable_dts & 2)
1186 tmp = 5;
1187 else
1188 tmp = 6;
1189 } else {
1190 tmp = 0;
1191 }
1192
1193 return sprintf(buf, "%d\n", tmp);
1194 }
1195
1196 static ssize_t
1197 show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1198 {
1199 struct sensor_device_attribute_2 *sensor_attr =
1200 to_sensor_dev_attr_2(attr);
1201 int index = sensor_attr->index;
1202 struct w83795_data *data = w83795_update_device(dev);
1203 long temp = temp_from_reg(data->dts[index]);
1204
1205 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
1206 return sprintf(buf, "%ld\n", temp);
1207 }
1208
1209 static ssize_t
1210 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1211 {
1212 struct sensor_device_attribute_2 *sensor_attr =
1213 to_sensor_dev_attr_2(attr);
1214 int nr = sensor_attr->nr;
1215 struct i2c_client *client = to_i2c_client(dev);
1216 struct w83795_data *data = i2c_get_clientdata(client);
1217 long temp = temp_from_reg(data->dts_ext[nr]);
1218
1219 return sprintf(buf, "%ld\n", temp);
1220 }
1221
1222 static ssize_t
1223 store_dts_ext(struct device *dev, struct device_attribute *attr,
1224 const char *buf, size_t count)
1225 {
1226 struct sensor_device_attribute_2 *sensor_attr =
1227 to_sensor_dev_attr_2(attr);
1228 int nr = sensor_attr->nr;
1229 struct i2c_client *client = to_i2c_client(dev);
1230 struct w83795_data *data = i2c_get_clientdata(client);
1231 long tmp;
1232
1233 if (strict_strtol(buf, 10, &tmp) < 0)
1234 return -EINVAL;
1235
1236 mutex_lock(&data->update_lock);
1237 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1238 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1239 mutex_unlock(&data->update_lock);
1240 return count;
1241 }
1242
1243
1244 /*
1245 Type 3: Thermal diode
1246 Type 4: Thermistor
1247
1248 Temp5-6, default TR
1249 Temp1-4, default TD
1250 */
1251
1252 static ssize_t
1253 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1254 {
1255 struct i2c_client *client = to_i2c_client(dev);
1256 struct w83795_data *data = i2c_get_clientdata(client);
1257 struct sensor_device_attribute_2 *sensor_attr =
1258 to_sensor_dev_attr_2(attr);
1259 int index = sensor_attr->index;
1260 u8 tmp;
1261
1262 if (data->has_temp >> index & 0x01) {
1263 if (data->temp_mode >> index & 0x01)
1264 tmp = 3;
1265 else
1266 tmp = 4;
1267 } else {
1268 tmp = 0;
1269 }
1270
1271 return sprintf(buf, "%d\n", tmp);
1272 }
1273
1274 static ssize_t
1275 store_temp_mode(struct device *dev, struct device_attribute *attr,
1276 const char *buf, size_t count)
1277 {
1278 struct i2c_client *client = to_i2c_client(dev);
1279 struct w83795_data *data = i2c_get_clientdata(client);
1280 struct sensor_device_attribute_2 *sensor_attr =
1281 to_sensor_dev_attr_2(attr);
1282 int index = sensor_attr->index;
1283 unsigned long val;
1284 u8 tmp;
1285 u32 mask;
1286
1287 if (strict_strtoul(buf, 10, &val) < 0)
1288 return -EINVAL;
1289 if ((val != 4) && (val != 3))
1290 return -EINVAL;
1291 if ((index > 3) && (val == 3))
1292 return -EINVAL;
1293
1294 mutex_lock(&data->update_lock);
1295 if (val == 3) {
1296 val = TEMP_CTRL_TD;
1297 data->has_temp |= 1 << index;
1298 data->temp_mode |= 1 << index;
1299 } else if (val == 4) {
1300 val = TEMP_CTRL_TR;
1301 data->has_temp |= 1 << index;
1302 tmp = 1 << index;
1303 data->temp_mode &= ~tmp;
1304 }
1305
1306 if (index > 3)
1307 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1308 else
1309 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1310
1311 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1312 tmp &= ~mask;
1313 tmp |= W83795_REG_TEMP_CTRL[index][val];
1314
1315 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1316 data->has_in &= ~mask;
1317
1318 if (index > 3)
1319 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1320 else
1321 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1322
1323 mutex_unlock(&data->update_lock);
1324 return count;
1325 }
1326
1327
1328 /* show/store VIN */
1329 static ssize_t
1330 show_in(struct device *dev, struct device_attribute *attr, char *buf)
1331 {
1332 struct sensor_device_attribute_2 *sensor_attr =
1333 to_sensor_dev_attr_2(attr);
1334 int nr = sensor_attr->nr;
1335 int index = sensor_attr->index;
1336 struct w83795_data *data = w83795_update_device(dev);
1337 u16 val = data->in[index][nr];
1338 u8 lsb_idx;
1339
1340 switch (nr) {
1341 case IN_READ:
1342 /* calculate this value again by sensors as sensors3.conf */
1343 if ((index >= 17) &&
1344 !((data->has_gain >> (index - 17)) & 1))
1345 val *= 8;
1346 break;
1347 case IN_MAX:
1348 case IN_LOW:
1349 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1350 val <<= 2;
1351 val |= (data->in_lsb[lsb_idx][nr] >>
1352 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1353 if ((index >= 17) &&
1354 !((data->has_gain >> (index - 17)) & 1))
1355 val *= 8;
1356 break;
1357 }
1358 val = in_from_reg(index, val);
1359
1360 return sprintf(buf, "%d\n", val);
1361 }
1362
1363 static ssize_t
1364 store_in(struct device *dev, struct device_attribute *attr,
1365 const char *buf, size_t count)
1366 {
1367 struct sensor_device_attribute_2 *sensor_attr =
1368 to_sensor_dev_attr_2(attr);
1369 int nr = sensor_attr->nr;
1370 int index = sensor_attr->index;
1371 struct i2c_client *client = to_i2c_client(dev);
1372 struct w83795_data *data = i2c_get_clientdata(client);
1373 unsigned long val;
1374 u8 tmp;
1375 u8 lsb_idx;
1376
1377 if (strict_strtoul(buf, 10, &val) < 0)
1378 return -EINVAL;
1379 val = in_to_reg(index, val);
1380
1381 if ((index >= 17) &&
1382 !((data->has_gain >> (index - 17)) & 1))
1383 val /= 8;
1384 val = SENSORS_LIMIT(val, 0, 0x3FF);
1385 mutex_lock(&data->update_lock);
1386
1387 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1388 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1389 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1390 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1391 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1392 data->in_lsb[lsb_idx][nr] = tmp;
1393
1394 tmp = (val >> 2) & 0xff;
1395 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1396 data->in[index][nr] = tmp;
1397
1398 mutex_unlock(&data->update_lock);
1399 return count;
1400 }
1401
1402
1403 static ssize_t
1404 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1405 {
1406 struct sensor_device_attribute_2 *sensor_attr =
1407 to_sensor_dev_attr_2(attr);
1408 int nr = sensor_attr->nr;
1409 struct i2c_client *client = to_i2c_client(dev);
1410 struct w83795_data *data = i2c_get_clientdata(client);
1411 u16 val = data->setup_pwm[nr];
1412
1413 switch (nr) {
1414 case SETUP_PWM_UPTIME:
1415 case SETUP_PWM_DOWNTIME:
1416 val = time_from_reg(val);
1417 break;
1418 }
1419
1420 return sprintf(buf, "%d\n", val);
1421 }
1422
1423 static ssize_t
1424 store_sf_setup(struct device *dev, struct device_attribute *attr,
1425 const char *buf, size_t count)
1426 {
1427 struct sensor_device_attribute_2 *sensor_attr =
1428 to_sensor_dev_attr_2(attr);
1429 int nr = sensor_attr->nr;
1430 struct i2c_client *client = to_i2c_client(dev);
1431 struct w83795_data *data = i2c_get_clientdata(client);
1432 unsigned long val;
1433
1434 if (strict_strtoul(buf, 10, &val) < 0)
1435 return -EINVAL;
1436
1437 switch (nr) {
1438 case SETUP_PWM_DEFAULT:
1439 val = SENSORS_LIMIT(val, 0, 0xff);
1440 break;
1441 case SETUP_PWM_UPTIME:
1442 case SETUP_PWM_DOWNTIME:
1443 val = time_to_reg(val);
1444 if (val == 0)
1445 return -EINVAL;
1446 break;
1447 }
1448
1449 mutex_lock(&data->update_lock);
1450 data->setup_pwm[nr] = val;
1451 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1452 mutex_unlock(&data->update_lock);
1453 return count;
1454 }
1455
1456
1457 #define NOT_USED -1
1458
1459 /* Don't change the attribute order, _max and _min are accessed by index
1460 * somewhere else in the code */
1461 #define SENSOR_ATTR_IN(index) { \
1462 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1463 IN_READ, index), \
1464 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1465 store_in, IN_MAX, index), \
1466 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1467 store_in, IN_LOW, index), \
1468 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1469 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1470 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1471 show_alarm_beep, store_beep, BEEP_ENABLE, \
1472 index + ((index > 14) ? 1 : 0)) }
1473
1474 #define SENSOR_ATTR_FAN(index) { \
1475 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1476 NULL, FAN_INPUT, index - 1), \
1477 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1478 show_fan, store_fan_min, FAN_MIN, index - 1), \
1479 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1480 NULL, ALARM_STATUS, index + 31), \
1481 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1482 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
1483
1484 #define SENSOR_ATTR_PWM(index) { \
1485 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1486 store_pwm, PWM_OUTPUT, index - 1), \
1487 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1488 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1489 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1490 show_pwm, store_pwm, PWM_START, index - 1), \
1491 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1492 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1493 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1494 show_pwm, store_pwm, PWM_FREQ, index - 1), \
1495 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1496 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1497 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1498 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
1499
1500 #define SENSOR_ATTR_DTS(index) { \
1501 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1502 show_dts_mode, NULL, NOT_USED, index - 7), \
1503 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1504 NULL, NOT_USED, index - 7), \
1505 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
1506 store_dts_ext, DTS_CRIT, NOT_USED), \
1507 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1508 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1509 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1510 store_dts_ext, DTS_WARN, NOT_USED), \
1511 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1512 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1513 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1514 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1515 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1516 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
1517
1518 #define SENSOR_ATTR_TEMP(index) { \
1519 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1520 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1521 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1522 NULL, TEMP_READ, index - 1), \
1523 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
1524 store_temp, TEMP_CRIT, index - 1), \
1525 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1526 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1527 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1528 store_temp, TEMP_WARN, index - 1), \
1529 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1530 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1531 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1532 show_alarm_beep, NULL, ALARM_STATUS, \
1533 index + (index > 4 ? 11 : 17)), \
1534 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1535 show_alarm_beep, store_beep, BEEP_ENABLE, \
1536 index + (index > 4 ? 11 : 17)), \
1537 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1538 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1539 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1540 show_temp_pwm_enable, store_temp_pwm_enable, \
1541 TEMP_PWM_ENABLE, index - 1), \
1542 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1543 show_temp_pwm_enable, store_temp_pwm_enable, \
1544 TEMP_PWM_FAN_MAP, index - 1), \
1545 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1546 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1547 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
1548 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1549 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
1550 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1551 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1552 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1553 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1554 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1555 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1556 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1557 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1558 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1559 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1560 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1561 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1562 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1563 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1564 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1565 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1566 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1567 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1568 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1569 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1570 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1571 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1572 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1573 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1574 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1575 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1576 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1577 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1578 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1579 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1580 show_sf4_temp, store_sf4_temp, 6, index - 1) }
1581
1582
1583 static struct sensor_device_attribute_2 w83795_in[][5] = {
1584 SENSOR_ATTR_IN(0),
1585 SENSOR_ATTR_IN(1),
1586 SENSOR_ATTR_IN(2),
1587 SENSOR_ATTR_IN(3),
1588 SENSOR_ATTR_IN(4),
1589 SENSOR_ATTR_IN(5),
1590 SENSOR_ATTR_IN(6),
1591 SENSOR_ATTR_IN(7),
1592 SENSOR_ATTR_IN(8),
1593 SENSOR_ATTR_IN(9),
1594 SENSOR_ATTR_IN(10),
1595 SENSOR_ATTR_IN(11),
1596 SENSOR_ATTR_IN(12),
1597 SENSOR_ATTR_IN(13),
1598 SENSOR_ATTR_IN(14),
1599 SENSOR_ATTR_IN(15),
1600 SENSOR_ATTR_IN(16),
1601 SENSOR_ATTR_IN(17),
1602 SENSOR_ATTR_IN(18),
1603 SENSOR_ATTR_IN(19),
1604 SENSOR_ATTR_IN(20),
1605 };
1606
1607 static const struct sensor_device_attribute_2 w83795_fan[][4] = {
1608 SENSOR_ATTR_FAN(1),
1609 SENSOR_ATTR_FAN(2),
1610 SENSOR_ATTR_FAN(3),
1611 SENSOR_ATTR_FAN(4),
1612 SENSOR_ATTR_FAN(5),
1613 SENSOR_ATTR_FAN(6),
1614 SENSOR_ATTR_FAN(7),
1615 SENSOR_ATTR_FAN(8),
1616 SENSOR_ATTR_FAN(9),
1617 SENSOR_ATTR_FAN(10),
1618 SENSOR_ATTR_FAN(11),
1619 SENSOR_ATTR_FAN(12),
1620 SENSOR_ATTR_FAN(13),
1621 SENSOR_ATTR_FAN(14),
1622 };
1623
1624 static const struct sensor_device_attribute_2 w83795_temp[][29] = {
1625 SENSOR_ATTR_TEMP(1),
1626 SENSOR_ATTR_TEMP(2),
1627 SENSOR_ATTR_TEMP(3),
1628 SENSOR_ATTR_TEMP(4),
1629 SENSOR_ATTR_TEMP(5),
1630 SENSOR_ATTR_TEMP(6),
1631 };
1632
1633 static const struct sensor_device_attribute_2 w83795_dts[][8] = {
1634 SENSOR_ATTR_DTS(7),
1635 SENSOR_ATTR_DTS(8),
1636 SENSOR_ATTR_DTS(9),
1637 SENSOR_ATTR_DTS(10),
1638 SENSOR_ATTR_DTS(11),
1639 SENSOR_ATTR_DTS(12),
1640 SENSOR_ATTR_DTS(13),
1641 SENSOR_ATTR_DTS(14),
1642 };
1643
1644 static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
1645 SENSOR_ATTR_PWM(1),
1646 SENSOR_ATTR_PWM(2),
1647 SENSOR_ATTR_PWM(3),
1648 SENSOR_ATTR_PWM(4),
1649 SENSOR_ATTR_PWM(5),
1650 SENSOR_ATTR_PWM(6),
1651 SENSOR_ATTR_PWM(7),
1652 SENSOR_ATTR_PWM(8),
1653 };
1654
1655 static const struct sensor_device_attribute_2 sda_single_files[] = {
1656 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1657 store_chassis_clear, ALARM_STATUS, 46),
1658 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1659 store_beep, BEEP_ENABLE, 47),
1660 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1661 store_fanin, FANIN_TOL, NOT_USED),
1662 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1663 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1664 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1665 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1666 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1667 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1668 };
1669
1670 /*
1671 * Driver interface
1672 */
1673
1674 static void w83795_init_client(struct i2c_client *client)
1675 {
1676 struct w83795_data *data = i2c_get_clientdata(client);
1677 static const u16 clkin[4] = { /* in kHz */
1678 14318, 24000, 33333, 48000
1679 };
1680 u8 config;
1681
1682 if (reset)
1683 w83795_write(client, W83795_REG_CONFIG, 0x80);
1684
1685 /* Start monitoring if needed */
1686 config = w83795_read(client, W83795_REG_CONFIG);
1687 if (!(config & W83795_REG_CONFIG_START)) {
1688 dev_info(&client->dev, "Enabling monitoring operations\n");
1689 w83795_write(client, W83795_REG_CONFIG,
1690 config | W83795_REG_CONFIG_START);
1691 }
1692
1693 data->clkin = clkin[(config >> 3) & 0x3];
1694 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
1695 }
1696
1697 static int w83795_get_device_id(struct i2c_client *client)
1698 {
1699 int device_id;
1700
1701 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1702
1703 /* Special case for rev. A chips; can't be checked first because later
1704 revisions emulate this for compatibility */
1705 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1706 int alt_id;
1707
1708 alt_id = i2c_smbus_read_byte_data(client,
1709 W83795_REG_DEVICEID_A);
1710 if (alt_id == 0x50)
1711 device_id = alt_id;
1712 }
1713
1714 return device_id;
1715 }
1716
1717 /* Return 0 if detection is successful, -ENODEV otherwise */
1718 static int w83795_detect(struct i2c_client *client,
1719 struct i2c_board_info *info)
1720 {
1721 int bank, vendor_id, device_id, expected, i2c_addr, config;
1722 struct i2c_adapter *adapter = client->adapter;
1723 unsigned short address = client->addr;
1724 const char *chip_name;
1725
1726 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1727 return -ENODEV;
1728 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1729 if (bank < 0 || (bank & 0x7c)) {
1730 dev_dbg(&adapter->dev,
1731 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1732 address, "bank");
1733 return -ENODEV;
1734 }
1735
1736 /* Check Nuvoton vendor ID */
1737 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1738 expected = bank & 0x80 ? 0x5c : 0xa3;
1739 if (vendor_id != expected) {
1740 dev_dbg(&adapter->dev,
1741 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1742 address, "vendor id");
1743 return -ENODEV;
1744 }
1745
1746 /* Check device ID */
1747 device_id = w83795_get_device_id(client) |
1748 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1749 if ((device_id >> 4) != 0x795) {
1750 dev_dbg(&adapter->dev,
1751 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1752 address, "device id\n");
1753 return -ENODEV;
1754 }
1755
1756 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1757 should match */
1758 if ((bank & 0x07) == 0) {
1759 i2c_addr = i2c_smbus_read_byte_data(client,
1760 W83795_REG_I2C_ADDR);
1761 if ((i2c_addr & 0x7f) != address) {
1762 dev_dbg(&adapter->dev,
1763 "w83795: Detection failed at addr 0x%02hx, "
1764 "check %s\n", address, "i2c addr");
1765 return -ENODEV;
1766 }
1767 }
1768
1769 /* Check 795 chip type: 795G or 795ADG
1770 Usually we don't write to chips during detection, but here we don't
1771 quite have the choice; hopefully it's OK, we are about to return
1772 success anyway */
1773 if ((bank & 0x07) != 0)
1774 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1775 bank & ~0x07);
1776 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1777 if (config & W83795_REG_CONFIG_CONFIG48)
1778 chip_name = "w83795adg";
1779 else
1780 chip_name = "w83795g";
1781
1782 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
1783 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1784 'A' + (device_id & 0xf), address);
1785
1786 return 0;
1787 }
1788
1789 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1790 const struct device_attribute *))
1791 {
1792 struct w83795_data *data = dev_get_drvdata(dev);
1793 int err, i, j;
1794
1795 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1796 if (!(data->has_in & (1 << i)))
1797 continue;
1798 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1799 err = fn(dev, &w83795_in[i][j].dev_attr);
1800 if (err)
1801 return err;
1802 }
1803 }
1804
1805 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1806 if (!(data->has_fan & (1 << i)))
1807 continue;
1808 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1809 err = fn(dev, &w83795_fan[i][j].dev_attr);
1810 if (err)
1811 return err;
1812 }
1813 }
1814
1815 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1816 err = fn(dev, &sda_single_files[i].dev_attr);
1817 if (err)
1818 return err;
1819 }
1820
1821 for (i = 0; i < data->has_pwm; i++) {
1822 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1823 err = fn(dev, &w83795_pwm[i][j].dev_attr);
1824 if (err)
1825 return err;
1826 }
1827 }
1828
1829 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1830 if (!(data->has_temp & (1 << i)))
1831 continue;
1832 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1833 err = fn(dev, &w83795_temp[i][j].dev_attr);
1834 if (err)
1835 return err;
1836 }
1837 }
1838
1839 if (data->enable_dts != 0) {
1840 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
1841 if (!(data->has_dts & (1 << i)))
1842 continue;
1843 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1844 err = fn(dev, &w83795_dts[i][j].dev_attr);
1845 if (err)
1846 return err;
1847 }
1848 }
1849 }
1850
1851 return 0;
1852 }
1853
1854 /* We need a wrapper that fits in w83795_handle_files */
1855 static int device_remove_file_wrapper(struct device *dev,
1856 const struct device_attribute *attr)
1857 {
1858 device_remove_file(dev, attr);
1859 return 0;
1860 }
1861
1862 static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1863 {
1864 struct w83795_data *data = i2c_get_clientdata(client);
1865 u8 vid_ctl;
1866 int i, err_max, err_min;
1867
1868 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1869
1870 /* Return immediately if VRM isn't configured */
1871 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1872 return;
1873
1874 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1875 for (i = 0; i < 2; i++) {
1876 if (!(data->has_dyn_in & (1 << i)))
1877 continue;
1878
1879 /* Voltage limits in dynamic mode, switch to read-only */
1880 err_max = sysfs_chmod_file(&client->dev.kobj,
1881 &w83795_in[i][2].dev_attr.attr,
1882 S_IRUGO);
1883 err_min = sysfs_chmod_file(&client->dev.kobj,
1884 &w83795_in[i][3].dev_attr.attr,
1885 S_IRUGO);
1886 if (err_max || err_min)
1887 dev_warn(&client->dev, "Failed to set in%d limits "
1888 "read-only (%d, %d)\n", i, err_max, err_min);
1889 else
1890 dev_info(&client->dev, "in%d limits set dynamically "
1891 "from VID\n", i);
1892 }
1893 }
1894
1895 /* Check pins that can be used for either temperature or voltage monitoring */
1896 static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1897 int temp_chan, int in_chan)
1898 {
1899 /* config is a 2-bit value */
1900 switch (config) {
1901 case 0x2: /* Voltage monitoring */
1902 data->has_in |= 1 << in_chan;
1903 break;
1904 case 0x1: /* Thermal diode */
1905 if (temp_chan >= 4)
1906 break;
1907 data->temp_mode |= 1 << temp_chan;
1908 /* fall through */
1909 case 0x3: /* Thermistor */
1910 data->has_temp |= 1 << temp_chan;
1911 break;
1912 }
1913 }
1914
1915 static int w83795_probe(struct i2c_client *client,
1916 const struct i2c_device_id *id)
1917 {
1918 int i;
1919 u8 tmp;
1920 struct device *dev = &client->dev;
1921 struct w83795_data *data;
1922 int err;
1923
1924 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1925 if (!data) {
1926 err = -ENOMEM;
1927 goto exit;
1928 }
1929
1930 i2c_set_clientdata(client, data);
1931 data->chip_type = id->driver_data;
1932 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1933 mutex_init(&data->update_lock);
1934
1935 /* Initialize the chip */
1936 w83795_init_client(client);
1937
1938 /* Check which voltages and fans are present */
1939 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1940 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1941 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1942 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
1943
1944 /* Check which analog temperatures and extra voltages are present */
1945 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1946 if (tmp & 0x20)
1947 data->enable_dts = 1;
1948 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1949 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
1950 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1951 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
1952 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
1953 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
1954 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
1955
1956 /* Check DTS enable status */
1957 if (data->enable_dts) {
1958 if (1 & w83795_read(client, W83795_REG_DTSC))
1959 data->enable_dts |= 2;
1960 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1961 }
1962
1963 /* Report PECI Tbase values */
1964 if (data->enable_dts == 1) {
1965 for (i = 0; i < 8; i++) {
1966 if (!(data->has_dts & (1 << i)))
1967 continue;
1968 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
1969 dev_info(&client->dev,
1970 "PECI agent %d Tbase temperature: %u\n",
1971 i + 1, (unsigned int)tmp & 0x7f);
1972 }
1973 }
1974
1975 /* First update the voltages measured value and limits */
1976 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1977 if (!(data->has_in & (1 << i)))
1978 continue;
1979 data->in[i][IN_MAX] =
1980 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1981 data->in[i][IN_LOW] =
1982 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1983 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
1984 tmp |= (w83795_read(client, W83795_REG_VRLSB)
1985 >> VRLSB_SHIFT) & 0x03;
1986 data->in[i][IN_READ] = tmp;
1987 }
1988 for (i = 0; i < IN_LSB_REG_NUM; i++) {
1989 data->in_lsb[i][IN_MAX] =
1990 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1991 data->in_lsb[i][IN_LOW] =
1992 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1993 }
1994 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1995
1996 /* First update fan and limits */
1997 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1998 if (!(data->has_fan & (1 << i)))
1999 continue;
2000 data->fan_min[i] =
2001 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
2002 data->fan_min[i] |=
2003 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i)) >>
2004 W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
2005 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
2006 data->fan[i] |=
2007 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
2008 }
2009
2010 /* temperature and limits */
2011 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2012 if (!(data->has_temp & (1 << i)))
2013 continue;
2014 data->temp[i][TEMP_CRIT] =
2015 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
2016 data->temp[i][TEMP_CRIT_HYST] =
2017 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
2018 data->temp[i][TEMP_WARN] =
2019 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
2020 data->temp[i][TEMP_WARN_HYST] =
2021 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
2022 data->temp[i][TEMP_READ] =
2023 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
2024 data->temp_read_vrlsb[i] =
2025 w83795_read(client, W83795_REG_VRLSB);
2026 }
2027
2028 /* dts temperature and limits */
2029 if (data->enable_dts != 0) {
2030 data->dts_ext[DTS_CRIT] =
2031 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
2032 data->dts_ext[DTS_CRIT_HYST] =
2033 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
2034 data->dts_ext[DTS_WARN] =
2035 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
2036 data->dts_ext[DTS_WARN_HYST] =
2037 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
2038 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
2039 if (!(data->has_dts & (1 << i)))
2040 continue;
2041 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
2042 data->dts_read_vrlsb[i] =
2043 w83795_read(client, W83795_REG_VRLSB);
2044 }
2045 }
2046
2047 /* First update temp source selction */
2048 for (i = 0; i < 3; i++)
2049 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
2050
2051 /* pwm and smart fan */
2052 if (data->chip_type == w83795g)
2053 data->has_pwm = 8;
2054 else
2055 data->has_pwm = 2;
2056 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
2057 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
2058 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
2059 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
2060 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
2061 for (i = 0; i < data->has_pwm; i++) {
2062 for (tmp = 0; tmp < 5; tmp++) {
2063 data->pwm[i][tmp] =
2064 w83795_read(client, W83795_REG_PWM(i, tmp));
2065 }
2066 }
2067 for (i = 0; i < 8; i++) {
2068 data->target_speed[i] =
2069 w83795_read(client, W83795_REG_FTSH(i)) << 4;
2070 data->target_speed[i] |=
2071 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
2072 }
2073 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
2074
2075 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2076 data->pwm_temp[i][TEMP_PWM_TTTI] =
2077 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
2078 data->pwm_temp[i][TEMP_PWM_CTFS] =
2079 w83795_read(client, W83795_REG_CTFS(i));
2080 tmp = w83795_read(client, W83795_REG_HT(i));
2081 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
2082 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
2083 }
2084 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2085 for (tmp = 0; tmp < 7; tmp++) {
2086 data->sf4_reg[i][SF4_TEMP][tmp] =
2087 w83795_read(client,
2088 W83795_REG_SF4_TEMP(i, tmp));
2089 data->sf4_reg[i][SF4_PWM][tmp] =
2090 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
2091 }
2092 }
2093
2094 /* Setup PWM Register */
2095 for (i = 0; i < 3; i++) {
2096 data->setup_pwm[i] =
2097 w83795_read(client, W83795_REG_SETUP_PWM(i));
2098 }
2099
2100 /* alarm and beep */
2101 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
2102 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
2103 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2104 }
2105
2106 err = w83795_handle_files(dev, device_create_file);
2107 if (err)
2108 goto exit_remove;
2109
2110 if (data->chip_type == w83795g)
2111 w83795_check_dynamic_in_limits(client);
2112
2113 data->hwmon_dev = hwmon_device_register(dev);
2114 if (IS_ERR(data->hwmon_dev)) {
2115 err = PTR_ERR(data->hwmon_dev);
2116 goto exit_remove;
2117 }
2118
2119 return 0;
2120
2121 exit_remove:
2122 w83795_handle_files(dev, device_remove_file_wrapper);
2123 kfree(data);
2124 exit:
2125 return err;
2126 }
2127
2128 static int w83795_remove(struct i2c_client *client)
2129 {
2130 struct w83795_data *data = i2c_get_clientdata(client);
2131
2132 hwmon_device_unregister(data->hwmon_dev);
2133 w83795_handle_files(&client->dev, device_remove_file_wrapper);
2134 kfree(data);
2135
2136 return 0;
2137 }
2138
2139
2140 static const struct i2c_device_id w83795_id[] = {
2141 { "w83795g", w83795g },
2142 { "w83795adg", w83795adg },
2143 { }
2144 };
2145 MODULE_DEVICE_TABLE(i2c, w83795_id);
2146
2147 static struct i2c_driver w83795_driver = {
2148 .driver = {
2149 .name = "w83795",
2150 },
2151 .probe = w83795_probe,
2152 .remove = w83795_remove,
2153 .id_table = w83795_id,
2154
2155 .class = I2C_CLASS_HWMON,
2156 .detect = w83795_detect,
2157 .address_list = normal_i2c,
2158 };
2159
2160 static int __init sensors_w83795_init(void)
2161 {
2162 return i2c_add_driver(&w83795_driver);
2163 }
2164
2165 static void __exit sensors_w83795_exit(void)
2166 {
2167 i2c_del_driver(&w83795_driver);
2168 }
2169
2170 MODULE_AUTHOR("Wei Song");
2171 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
2172 MODULE_LICENSE("GPL");
2173
2174 module_init(sensors_w83795_init);
2175 module_exit(sensors_w83795_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree